H.J. Lu [Mon, 21 Sep 2020 19:17:01 +0000 (12:17 -0700)]
x86: Add <x86gprintrin.h>
For sources which can't use any vector instructions, <x86intrin.h> and
<immintrin.h> cannot be included for compiler intrinsics:
$ echo "#include <x86intrin.h>" | gcc -S -O2 -mno-sse -mno-mmx -x c -
In file included from /usr/include/stdlib.h:1013,
from /usr/lib/gcc/x86_64-redhat-linux/10/include/mm_malloc.h:27,
from /usr/lib/gcc/x86_64-redhat-linux/10/include/xmmintrin.h:34,
from /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:29,
from /usr/lib/gcc/x86_64-redhat-linux/10/include/x86intrin.h:32,
from <stdin>:1:
/usr/include/bits/stdlib-float.h: In function ‘atof’:
/usr/include/bits/stdlib-float.h:26:1: error: SSE register return with SSE disabled
26 | {
| ^
$
libgcc/config/i386/shadow-stack-unwind.h has a workaround:
/* NB: We need _get_ssp and _inc_ssp from <cetintrin.h>. But we can't
include <x86intrin.h> which ends up including <mm_malloc.h>, which
includes <stdlib.h> and <errno.h> unconditionally. But we can't
include any libc system headers unconditionally from libgcc. Avoid
including <mm_malloc.h> here by defining _IMMINTRIN_H_INCLUDED. */
#define _IMMINTRIN_H_INCLUDED
#include <cetintrin.h>
#undef _IMMINTRIN_H_INCLUDED
Add a standalone intrinsic header file, <x86gprintrin.h>, to provide
integer only intrinsics. All integer only intrinsics are placed in
<x86gprintrin.h>. <x86intrin.h> and <immintrin.h> simply include
<x86gprintrin.h>.
gcc/
PR target/97148
* config.gcc (extra_headers): Add x86gprintrin.h.
* config/i386/adxintrin.h: Check _X86GPRINTRIN_H_INCLUDED for
<x86gprintrin.h>.
* config/i386/bmi2intrin.h: Likewise.
* config/i386/bmiintrin.h: Likewise.
* config/i386/cetintrin.h: Likewise.
* config/i386/cldemoteintrin.h: Likewise.
* config/i386/clflushoptintrin.h: Likewise.
* config/i386/clwbintrin.h: Likewise.
* config/i386/enqcmdintrin.h: Likewise.
* config/i386/fxsrintrin.h: Likewise.
* config/i386/ia32intrin.h: Likewise.
* config/i386/lwpintrin.h: Likewise.
* config/i386/lzcntintrin.h: Likewise.
* config/i386/movdirintrin.h: Likewise.
* config/i386/pconfigintrin.h: Likewise.
* config/i386/pkuintrin.h: Likewise.
* config/i386/rdseedintrin.h: Likewise.
* config/i386/rtmintrin.h: Likewise.
* config/i386/serializeintrin.h: Likewise.
* config/i386/tbmintrin.h: Likewise.
* config/i386/tsxldtrkintrin.h: Likewise.
* config/i386/waitpkgintrin.h: Likewise.
* config/i386/wbnoinvdintrin.h: Likewise.
* config/i386/xsavecintrin.h: Likewise.
* config/i386/xsaveintrin.h: Likewise.
* config/i386/xsaveoptintrin.h: Likewise.
* config/i386/xsavesintrin.h: Likewise.
* config/i386/xtestintrin.h: Likewise.
* config/i386/immintrin.h: Include <x86gprintrin.h> instead of
<fxsrintrin.h>, <xsaveintrin.h>, <xsaveoptintrin.h>,
<xsavesintrin.h>, <xsavecintrin.h>, <lzcntintrin.h>,
<bmiintrin.h>, <bmi2intrin.h>, <xtestintrin.h>, <cetintrin.h>,
<movdirintrin.h>, <sgxintrin.h, <pconfigintrin.h>,
<waitpkgintrin.h>, <cldemoteintrin.h>, <enqcmdintrin.h>,
<serializeintrin.h>, <tsxldtrkintrin.h>, <adxintrin.h>,
<clwbintrin.h>, <clflushoptintrin.h>, <wbnoinvdintrin.h> and
<pkuintrin.h>.
(_wbinvd): Moved to config/i386/x86gprintrin.h.
(_rdrand16_step): Likewise.
(_rdrand32_step): Likewise.
(_rdpid_u32): Likewise.
(_readfsbase_u32): Likewise.
(_readfsbase_u64): Likewise.
(_readgsbase_u32): Likewise.
(_readgsbase_u64): Likewise.
(_writefsbase_u32): Likewise.
(_writefsbase_u64): Likewise.
(_writegsbase_u32): Likewise.
(_writegsbase_u64): Likewise.
(_rdrand64_step): Likewise.
(_ptwrite64): Likewise.
(_ptwrite32): Likewise.
* config/i386/x86gprintrin.h: New file.
* config/i386/x86intrin.h: Include <x86gprintrin.h>. Don't
include <ia32intrin.h>, <lwpintrin.h>, <tbmintrin.h>,
<popcntintrin.h>, <mwaitxintrin.h> and <clzerointrin.h>.
gcc/testsuite/
* gcc.target/i386/avx-1.c (__builtin_ia32_lwpval32): New to
support <lwpintrin.h> included in <x86gprintrin.h>.
(__builtin_ia32_lwpval64): Likewise.
(__builtin_ia32_lwpins32): Likewise.
(__builtin_ia32_lwpins64): Likewise.
(__builtin_ia32_bextri_u32): New to support <tbmintrin.h>
included in <x86gprintrin.h>.
(__builtin_ia32_bextri_u64): Likewise.
* gcc.target/i386/x86gprintrin-1.c: New test.
* gcc.target/i386/x86gprintrin-2.c: Likewise.
* gcc.target/i386/x86gprintrin-3.c: Likewise.
* gcc.target/i386/x86gprintrin-4.c: Likewise.
* gcc.target/i386/x86gprintrin-4a.c: Likewise.
* gcc.target/i386/x86gprintrin-5.c: Likewise.
* gcc.target/i386/x86gprintrin-5a.c: Likewise.
* gcc.target/i386/x86gprintrin-5b.c: Likewise.
* gcc.target/i386/x86gprintrin-6.c: Likewise.
libgcc/
PR target/97148
* config/i386/shadow-stack-unwind.h: Include <x86gprintrin.h>
instead of <cetintrin.h>.
Tom de Vries [Fri, 9 Oct 2020 09:36:10 +0000 (11:36 +0200)]
[nvptx] Set -misa=sm_35 by default
The nvptx-as assembler verifies the ptx code using ptxas, if there's any
in the PATH.
The default in the nvptx port for -misa=sm_xx is sm_30, but the ptxas of the
latest cuda release (11.1) no longer supports sm_30.
Consequently we cannot build gcc against that release (although we should
still be able to build without any cuda release).
Fix this by setting -misa=sm_35 by default.
Tested check-gcc on nvptx.
Tested libgomp on x86_64-linux with nvpx accelerator.
Both build again cuda 9.1.
gcc/ChangeLog:
2020-10-09 Tom de Vries <tdevries@suse.de>
PR target/97348
* config/nvptx/nvptx.h (ASM_SPEC): Also pass -m to nvptx-as if
default is used.
* config/nvptx/nvptx.opt (misa): Init with PTX_ISA_SM35.
Richard Biener [Fri, 9 Oct 2020 11:15:42 +0000 (13:15 +0200)]
Fixup gcc.dg/vect/pr65947-3.c when masked loads are available
The following adds a effective target to properly allow
the gcc.dg/vect/pr65947-3.c expected vectorization to be adjusted
when run with, say, -march=cascadelake.
2020-10-09 Richard Biener <rguenther@suse.de>
gcc/
* doc/sourcebuild.texi (vect_masked_load): Document.
gcc/testsuite
* lib/target-supports.exp (check_effective_target_vect_masked_load):
New effective target.
* gcc.dg/vect/pr65947-3.c: Update.
Richard Biener [Fri, 9 Oct 2020 10:24:46 +0000 (12:24 +0200)]
tree-optimization/97334 - improve BB SLP discovery
We're running into a multiplication with one unvectorizable
operand we expect to build from scalars but SLP discovery
fatally fails the build of both since one stmt is commutated:
_60 = _58 * _59;
_63 = _59 * _62;
_66 = _59 * _65;
...
where _59 is the "bad" operand. The following patch makes the
case work where the first stmt has a good operand by not fatally
failing the SLP build for the operand but communicating upwards
how to commutate.
2020-10-09 Richard Biener <rguenther@suse.de>
PR tree-optimization/97334
* tree-vect-slp.c (vect_build_slp_tree_1): Do not fatally
fail lanes other than zero when BB vectorizing.
* gcc.dg/vect/bb-slp-pr65935.c: Amend.
Jonathan Wakely [Fri, 9 Oct 2020 10:52:56 +0000 (11:52 +0100)]
libstdc++: Fix unused variable warning
libstdc++-v3/ChangeLog:
* testsuite/util/testsuite_performance.h (report_header): Remove
unused variable.
Jan Hubicka [Fri, 9 Oct 2020 09:29:58 +0000 (11:29 +0200)]
IPA modref: fix miscompilation in clone when IPA modref is used
gcc/ChangeLog:
PR ipa/97292
PR ipa/97335
* ipa-modref-tree.h (copy_from): Drop summary in a
clone.
Richard Biener [Fri, 9 Oct 2020 08:19:38 +0000 (10:19 +0200)]
tree-optimization/97347 - fix another SLP constant insertion issue
Just use edge insertion which will appropriately handle the situation
from botan.
2020-10-09 Richard Biener <rguenther@suse.de>
PR tree-optimization/97347
* tree-vect-slp.c (vect_create_constant_vectors): Use
edge insertion when inserting on the fallthru edge,
appropriately insert at the start of BBs when inserting
after PHIs.
* g++.dg/vect/pr97347.cc: New testcase.
Andrew MacLeod [Fri, 9 Oct 2020 08:46:50 +0000 (10:46 +0200)]
Fix for PR97317.
gcc/ChangeLog:
PR tree-optimization/97317
* range-op.cc (operator_cast::op1_range): Handle casts where the precision
of the RHS is only 1 greater than the precision of the LHS.
gcc/testsuite/ChangeLog:
* gcc.dg/pr97317.c: New test.
Richard Biener [Fri, 9 Oct 2020 07:47:44 +0000 (09:47 +0200)]
random memory leak fixes
This fixes leaks discovered checking whether I introduced new ones
with the last vectorizer changes.
2020-10-09 Richard Biener <rguenther@suse.de>
* cgraphunit.c (expand_all_functions): Free tp_first_run_order.
* ipa-modref.c (pass_ipa_modref::execute): Free order.
* tree-ssa-loop-niter.c (estimate_numbers_of_iterations): Free
loop body.
* tree-vect-data-refs.c (vect_find_stmt_data_reference): Free
data references upon failure.
* tree-vect-loop.c (update_epilogue_loop_vinfo): Free BBs
array of the original loop.
* tree-vect-slp.c (vect_slp_bbs): Use an auto_vec for
dataref_groups to release its memory.
Jakub Jelinek [Fri, 9 Oct 2020 08:19:16 +0000 (10:19 +0200)]
vrp: Fix up gcc.target/aarch64/pr90838.c [PR97312, PR94801]
> Perhaps another way out of this would be document and enforce that
> __builtin_c[lt]z{,l,ll} etc calls are undefined at zero, but C[TL]Z ifn
> calls are defined there based on *_DEFINED_VALUE_AT_ZERO (*) == 2
The following patch implements that, i.e. __builtin_c?z* now take full
advantage of them being UB at zero, while the ifns are well defined at zero
if *_DEFINED_VALUE_AT_ZERO (*) == 2. That is what fixes PR94801.
Furthermore, to fix PR97312, if it is well defined at zero and the value at
zero is prec, we don't lower the maximum unless the argument is known to be
non-zero.
For gimple-range.cc I guess we could improve it if needed e.g. by returning
a [0,7][32,32] range for .CTZ of e.g. [0,137], but for now it (roughly)
matches what vr-values.c does.
2020-10-09 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/94801
PR target/97312
* vr-values.c (vr_values::extract_range_basic) <CASE_CFN_CLZ,
CASE_CFN_CTZ>: When stmt is not an internal-fn call or
C?Z_DEFINED_VALUE_AT_ZERO is not 2, assume argument is not zero
and thus use [0, prec-1] range unless it can be further improved.
For CTZ, don't update maxi from upper bound if it was previously prec.
* gimple-range.cc (gimple_ranger::range_of_builtin_call) <CASE_CFN_CLZ,
CASE_CFN_CTZ>: Likewise.
* gcc.dg/tree-ssa/pr94801.c: New test.
Jakub Jelinek [Fri, 9 Oct 2020 08:16:57 +0000 (10:16 +0200)]
match.pd: Fix up FFS -> CTZ + 1 optimization [PR97325]
And no testcase was included, I'm including one below.
Anyway, this PR and the other CTZ related discussions led me to discover a
bug I've made earlier, CLZ/CTZ builtins have unsigned arguments and e.g.
both the vr-values.cc and now gimple-range.cc code heavily relies on that,
but __builtin_ffs has a signed operand and this optimization was incorrectly
making the operand signed too, so I guess it would greatly confuse VRP in
some cases.
2020-10-09 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/97325
* match.pd (FFS(nonzero) -> CTZ(nonzero) + 1): Cast argument to
corresponding unsigned type.
* gcc.c-torture/execute/pr97325.c: New test.
Aldy Hernandez [Fri, 9 Oct 2020 07:31:47 +0000 (09:31 +0200)]
Move pr97315-1.c test to g++.dg/opt/.
gcc/testsuite/ChangeLog:
PR testsuite/97337
* gcc.dg/pr97315-1.c: Moved to...
* g++.dg/opt/pr97315-1.C: ...here.
Richard Biener [Fri, 9 Oct 2020 06:56:21 +0000 (08:56 +0200)]
fix ICE with BB vectorization of PHIs
This fixes a vector CTOR insertion issue when we try to insert after
a PHI node.
2020-10-09 Richard Biener <rguenther@suse.de>
* tree-vect-slp.c (vect_create_constant_vectors): Properly insert
after PHIs.
* gcc.dg/vect/bb-slp-phis-1.c: New testcase.
GCC Administrator [Fri, 9 Oct 2020 00:16:27 +0000 (00:16 +0000)]
Daily bump.
Patrick Palka [Thu, 8 Oct 2020 22:10:05 +0000 (18:10 -0400)]
libstdc++: Make ranges::construct_at constexpr-friendly [PR95788]
This rewrites ranges::construct_at in terms of std::construct_at so
that we can piggyback on the compiler's existing support for
intercepting placement new within std::construct_at during constexpr
evaluation, instead of having to additionally teach the compiler about
ranges::construct_at.
While we're making changes to ranges::construct_at, this patch also
declares it conditionally noexcept and qualifies the calls to declval in
its requires-clause.
libstdc++-v3/ChangeLog:
PR libstdc++/95788
* include/bits/ranges_uninitialized.h:
(__construct_at_fn::operator()): Rewrite in terms of
std::construct_at. Declare it conditionally noexcept. Qualify
calls to declval in its requires-clause.
* testsuite/20_util/specialized_algorithms/construct_at/95788.cc:
New test.
Jason Merrill [Thu, 8 Oct 2020 19:43:26 +0000 (15:43 -0400)]
c++: Fix member alias template in C++17 and up. [PR96805]
Here we're trying to push into a<T>::c<N> in order to instantiate t<N>, but
were building a TYPENAME_TYPE for it because a<T> isn't open yet. Don't
do that when we know we're trying to enter the scope.
gcc/cp/ChangeLog:
PR c++/96805
PR c++/96199
* pt.c (tsubst_aggr_type): Don't build a TYPENAME_TYPE when
entering_scope.
(tsubst_template_decl): Use tsubst_aggr_type.
gcc/testsuite/ChangeLog:
PR c++/96805
* g++.dg/cpp0x/alias-decl-pr96805.C: New test.
Alexandre Oliva [Thu, 8 Oct 2020 20:12:18 +0000 (17:12 -0300)]
take type from intrinsic in sincos pass
This is a first step towards enabling the sincos optimization in Ada.
The issue this patch solves is that sincos takes the type to be looked
up with mathfn_built_in from variables or temporaries passed as
arguments to SIN and COS intrinsics. In Ada, different float types
may be used but, despite their representation equivalence, their
distinctness causes the optimization to be skipped, because they are
not the types that mathfn_built_in expects.
This patch introduces a function that maps intrinsics to the type
they're associated with, and uses that type, obtained from the
intrinsics used in calls to be optimized, to look up the correspoding
CEXPI intrinsic.
For the sake of defensive programming, when using the type obtained
from the intrinsic, it now checks that, if different types are found
for the used argument, or for other calls that use it, that the types
are interchangeable.
for gcc/ChangeLog
* builtins.c (mathfn_built_in_type): New.
* builtins.h (mathfn_built_in_type): Declare.
* tree-ssa-math-opts.c (execute_cse_sincos_1): Use it to
obtain the type expected by the intrinsic.
Nathan Sidwell [Thu, 8 Oct 2020 19:11:37 +0000 (12:11 -0700)]
libcpp: Directly peek for initial line marker
Using the tokenizer to sniff for an initial line marker for
preprocessed input is a little brittle, particularly with
-fdirectives-only. If there is no marker we'll happily munch initial
comments. This patch directly sniffs the buffer. This is safe
because the initial line marker was machine generated and must be
right at the beginning of the file. Anything else is not such a line
marker. The same is true for the initial directory marker. For that
tokenizing the string is simplest, but at that point it's either a
regular line marker or a directory marker. If it's a regular marker,
unwinding tokens is fine.
libcpp/
* internal.h (enum include_type): Rename IT_MAIN_INJECT to
IT_PRE_MAIN.
* init.c (cpp_read_main_file): If there is no line marker, adjust
the initial line marker.
(read_original_filename): Return bool, peek the buffer directly
before trying to tokenize.
(read_original_directory): Likewise. Directly prod the string
literal.
* files.c (_cpp_stack_file): Adjust for IT_PRE_MAIN change.
Will Schmidt [Mon, 21 Sep 2020 19:26:43 +0000 (14:26 -0500)]
[PATCH, rs6000] Rename BU_P10_MISC_2 define to BU_P10_POWERPC64_MISC_2
Rename our BU_P10_MISC_2 built-in define macro to be
BU_P10_POWERPC64_MISC_2. This more accurately reflects
that the macro includes the RS6000_BTM_POWERPC64 entry,
and matches the style we used for the P7 equivalent.
gcc/ChangeLog:
* config/rs6000/rs6000-builtin.def (BU_P10_MISC_2): Rename
to BU_P10_POWERPC64_MISC_2.
CFUGED, CNTLZDM, CNTTZDM, PDEPD, PEXTD): Call renamed macro.
Jan Hubicka [Thu, 8 Oct 2020 15:15:58 +0000 (17:15 +0200)]
Disable TBAA in some uses of call_may_clobber_ref_p
* tree-nrv.c (dest_safe_for_nrv_p): Disable tbaa in
call_may_clobber_ref_p and ref_maybe_used_by_stmt_p.
* tree-tailcall.c (find_tail_calls): Likewise.
* tree-ssa-alias.c (call_may_clobber_ref_p): Add tbaa_p parameter.
* tree-ssa-alias.h (call_may_clobber_ref_p): Update prototype.
* tree-ssa-sccvn.c (vn_reference_lookup_3): Pass data->tbaa_p
to call_may_clobber_ref_p_1.
Mark Wielaard [Tue, 6 Oct 2020 15:41:19 +0000 (17:41 +0200)]
debug: Make sure to output .file 0 when generating DWARF5.
When gas outputs DWARF5 .debug_line[_str] then we have to tell it the
comp_dir and main file name for the zero entry line table. Otherwise
gas has to guess at the CU compilation directory and file.
Before a gcc -gdwarf-5 ../src/hello.c line table looked like:
Directory table:
0 ../src (24)
1 ../src (24)
2 /usr/include (31)
File name table:
0 hello.c (16), 0
1 hello.c (16), 1
2 stdio.h (44), 2
With this patch it looks like:
Directory table:
0 /tmp/obj (0)
1 ../src (24)
2 /usr/include (31)
File name table:
0 ../src/hello.c (9), 0
1 hello.c (16), 1
2 stdio.h (44), 2
gcc/ChangeLog:
* dwarf2out.c (dwarf2out_finish): Emit .file 0 entry when
generating DWARF5 .debug_line table through gas.
qing zhao [Thu, 8 Oct 2020 15:01:07 +0000 (17:01 +0200)]
Improve documentation of -fallow-store-data-races
2020-10-08 John Henning <john.henning@oracle.com>
gcc/
PR other/97309
* doc/invoke.texi: Improve documentation of
-fallow-store-data-races.
Jonathan Wakely [Thu, 8 Oct 2020 14:14:58 +0000 (15:14 +0100)]
libstdc++: Add assertions for preconditions in sampling distributions [PR 82584]
These three distributions all require 0 < S where S is the sum of the
weights. When the sum is zero there's an undefined FP division by zero.
Add assertions to help users diagnose the problem.
libstdc++-v3/ChangeLog:
PR libstdc++/82584
* include/bits/random.tcc
(discrete_distribution::param_type::_M_initialize)
(piecewise_constant_distribution::param_type::_M_initialize)
(piecewise_linear_distribution::param_type::_M_initialize):
Add assertions for positive sums..
* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error
line.
Christophe Lyon [Mon, 5 Oct 2020 09:52:59 +0000 (09:52 +0000)]
arm: [MVE] Add missing __arm_vcvtnq_u32_f32 intrinsic (PR 96914)
__arm_vcvtnq_u32_f32 was missing from arm_mve.h, although the s32_f32 and
[su]16_f16 versions were present.
This patch adds the missing version and testcase, which are
cut-and-paste from the other versions.
2020-10-08 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
PR target/96914
* config/arm/arm_mve.h (__arm_vcvtnq_u32_f32): New.
gcc/testsuite/
PR target/96914
* gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c: New test.
Richard Biener [Tue, 6 Oct 2020 13:47:15 +0000 (15:47 +0200)]
SLP vectorize multiple BBs at once
This work from Martin Liska was motivated by gcc.dg/vect/bb-slp-22.c
which shows how poorly we currently BB vectorize code like
a0 = in[0] + 23;
a1 = in[1] + 142;
a2 = in[2] + 2;
a3 = in[3] + 31;
if (x > y)
{
b[0] = a0;
b[1] = a1;
b[2] = a2;
b[3] = a3;
}
else
{
out[0] = a0 * (x + 1);
out[1] = a1 * (y + 1);
out[2] = a2 * (x + 1);
out[3] = a3 * (y + 1);
}
namely by vectorizing the stores but not the common load (and add)
they are feeded with.
Thus with the following patch we change the BB vectorizer from
operating on a single basic-block at a time to consider somewhat
larger regions (but not the whole function yet because of issues
with vector size iteration).
I took the opportunity to remove the fancy region iterations again
now that we operate on BB granularity and in the end need to visit
PHI nodes as well.
2020-10-08 Martin Liska <mliska@suse.cz>
Richard Biener <rguenther@suse.de>
* tree-vectorizer.h (_bb_vec_info::const_iterator): Remove.
(_bb_vec_info::const_reverse_iterator): Likewise.
(_bb_vec_info::region_stmts): Likewise.
(_bb_vec_info::reverse_region_stmts): Likewise.
(_bb_vec_info::_bb_vec_info): Adjust.
(_bb_vec_info::bb): Remove.
(_bb_vec_info::region_begin): Remove.
(_bb_vec_info::region_end): Remove.
(_bb_vec_info::bbs): New vector of BBs.
(vect_slp_function): Declare.
* tree-vect-patterns.c (vect_determine_precisions): Use
regular stmt iteration.
(vect_pattern_recog): Likewise.
* tree-vect-slp.c: Include cfganal.h, tree-eh.h and tree-cfg.h.
(vect_build_slp_tree_1): Properly refuse to vectorize
volatile and throwing stmts.
(vect_build_slp_tree_2): Pass group-size down to
get_vectype_for_scalar_type.
(_bb_vec_info::_bb_vec_info): Use regular stmt iteration,
adjust for changed region specification.
(_bb_vec_info::~_bb_vec_info): Likewise.
(vect_slp_check_for_constructors): Likewise.
(vect_slp_region): Likewise.
(vect_slp_bbs): New worker operating on a vector of BBs.
(vect_slp_bb): Wrap it.
(vect_slp_function): New function splitting the function
into multi-BB regions.
(vect_create_constant_vectors): Handle the case of inserting
after a throwing def.
(vect_schedule_slp_instance): Adjust.
* tree-vectorizer.c (vec_info::remove_stmt): Simplify again.
(vec_info::insert_seq_on_entry): Adjust.
(pass_slp_vectorize::execute): Also init PHIs. Call
vect_slp_function.
* gcc.dg/vect/bb-slp-22.c: Adjust.
* gfortran.dg/pr68627.f: Likewise.
Jonathan Wakely [Thu, 8 Oct 2020 13:03:52 +0000 (14:03 +0100)]
libstdc++: Add C++11 member functions for ios::failure in old ABI
The new constructors that C++11 added to std::ios_base::failure were
missing for the old ABI. This adds them, but just ignores the
std::error_code argument (because there's nowhere to store it).
This also adds a code() member, which should be provided by the
std::system_error base class, but that base class isn't present in the
old ABI.
This allows the old ios::failure to be used in code that expects the new
API, although with reduced functionality.
libstdc++-v3/ChangeLog:
* include/bits/ios_base.h (ios_base::failure): Add constructors
takeing error_code argument. Add code() member function.
* testsuite/27_io/ios_base/failure/cxx11.cc: Allow test to
run for the old ABI but do not check for derivation from
std::system_error.
* testsuite/27_io/ios_base/failure/error_code.cc: New test.
Jonathan Wakely [Thu, 8 Oct 2020 13:01:00 +0000 (14:01 +0100)]
libstdc++: Avoid divide by zero in default template arguments
My previous attempt to fix this only worked when m is a power of two.
There is still a bug when a=00 and !has_single_bit(m).
Instead of trying to make _Mod work for a==0 this change ensures that we
never instantiate it with a==0. For C++17 we can use if-constexpr, but
otherwise we need to use a different multipler. It doesn't matter what
we use, as it won't actually be called, only instantiated.
libstdc++-v3/ChangeLog:
* include/bits/random.h (__detail::_Mod): Revert last change.
(__detail::__mod): Do not use _Mod for a==0 case.
* testsuite/26_numerics/random/linear_congruential_engine/operators/call.cc:
Check other cases with a==0. Also check runtime results.
* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error
line.
Richard Biener [Thu, 8 Oct 2020 11:18:57 +0000 (13:18 +0200)]
tree-optimization/97330 - fix bad load sinking
This fixes bad placement of sunk loads.
2020-10-08 Richard Biener <rguenther@suse.de>
PR tree-optimization/97330
* tree-ssa-sink.c (statement_sink_location): Avoid skipping
PHIs when they dominate the insert location.
* gcc.dg/torture/pr97330-1.c: New testcase.
* gcc.dg/torture/pr97330-2.c: Likewise.
Jan Hubicka [Thu, 8 Oct 2020 12:13:54 +0000 (14:13 +0200)]
Fix handling of parm_offset in ipa-modref on 32bit targets.
* ipa-modref.c (get_access): Fix handling of offsets.
* tree-ssa-alias.c (modref_may_conflict): Watch for overflows.
Martin Liska [Thu, 8 Oct 2020 11:16:05 +0000 (13:16 +0200)]
IPA MOD REF: add debug counter.
gcc/ChangeLog:
* dbgcnt.def (DEBUG_COUNTER): Add ipa_mod_ref debug counter.
* tree-ssa-alias.c (modref_may_conflict): Handle the counter.
Richard Biener [Thu, 8 Oct 2020 09:53:51 +0000 (11:53 +0200)]
adjust BB vectorization dump scanning
This adjusts BB vectorization testcases to look for the number of
SLP subgraphs vectorized rather than for the number of basic blocks
we've found opportunities in because followup patches will play
with the granularity we work on, vectorizing multiple basic blocks
at a time.
Together with this, because I noticed when looking at non-obvious
mismatches, I avoid analyzing group-size 1 SLP instances which
result in pointless V1mode vectorizations.
It might be interesting to work on adding sth like
dg-warning to look for -fopt-info-{optimized,missing} so
we could directly annotate (not) vectorized loops instead of
relying on fragile counts.
2020-10-08 Richard Biener <rguenther@suse.de>
* tree-vectorizer.c (try_vectorize_loop_1): Do not dump
"basic block vectorized".
(pass_slp_vectorize::execute): Likewise.
* tree-vect-slp.c (vect_analyze_slp_instance): Avoid
re-analyzing split single stmts.
* g++.dg/vect/slp-pr50819.cc: Adjust.
* gcc.dg/vect/bb-slp-1.c: Adjust.
* gcc.dg/vect/bb-slp-10.c: Adjust.
* gcc.dg/vect/bb-slp-11.c: Adjust.
* gcc.dg/vect/bb-slp-13.c: Adjust.
* gcc.dg/vect/bb-slp-14.c: Adjust.
* gcc.dg/vect/bb-slp-15.c: Adjust.
* gcc.dg/vect/bb-slp-16.c: Adjust.
* gcc.dg/vect/bb-slp-17.c: Adjust.
* gcc.dg/vect/bb-slp-18.c: Adjust.
* gcc.dg/vect/bb-slp-19.c: Adjust.
* gcc.dg/vect/bb-slp-2.c: Adjust.
* gcc.dg/vect/bb-slp-20.c: Adjust.
* gcc.dg/vect/bb-slp-21.c: Adjust.
* gcc.dg/vect/bb-slp-22.c: Adjust.
* gcc.dg/vect/bb-slp-23.c: Adjust.
* gcc.dg/vect/bb-slp-24.c: Adjust.
* gcc.dg/vect/bb-slp-25.c: Adjust.
* gcc.dg/vect/bb-slp-26.c: Adjust.
* gcc.dg/vect/bb-slp-27.c: Adjust.
* gcc.dg/vect/bb-slp-28.c: Adjust.
* gcc.dg/vect/bb-slp-29.c: Adjust.
* gcc.dg/vect/bb-slp-3.c: Adjust.
* gcc.dg/vect/bb-slp-30.c: Adjust.
* gcc.dg/vect/bb-slp-31.c: Adjust.
* gcc.dg/vect/bb-slp-34.c: Adjust.
* gcc.dg/vect/bb-slp-35.c: Adjust.
* gcc.dg/vect/bb-slp-36.c: Adjust.
* gcc.dg/vect/bb-slp-38.c: Adjust.
* gcc.dg/vect/bb-slp-4.c: Adjust.
* gcc.dg/vect/bb-slp-45.c: Adjust.
* gcc.dg/vect/bb-slp-46.c: Adjust.
* gcc.dg/vect/bb-slp-48.c: Adjust.
* gcc.dg/vect/bb-slp-5.c: Adjust.
* gcc.dg/vect/bb-slp-6.c: Adjust.
* gcc.dg/vect/bb-slp-7.c: Adjust.
* gcc.dg/vect/bb-slp-8.c: Adjust.
* gcc.dg/vect/bb-slp-8a.c: Adjust.
* gcc.dg/vect/bb-slp-8b.c: Adjust.
* gcc.dg/vect/bb-slp-9.c: Adjust.
* gcc.dg/vect/bb-slp-div-2.c: Adjust.
* gcc.dg/vect/bb-slp-over-widen-1.c: Adjust.
* gcc.dg/vect/bb-slp-over-widen-2.c: Adjust.
* gcc.dg/vect/bb-slp-pattern-2.c: Adjust.
* gcc.dg/vect/bb-slp-pow-1.c: Adjust.
* gcc.dg/vect/bb-slp-pr58135.c: Adjust.
* gcc.dg/vect/bb-slp-pr65935.c: Adjust.
* gcc.dg/vect/bb-slp-pr78205.c: Adjust.
* gcc.dg/vect/bb-slp-pr81635-1.c: Adjust.
* gcc.dg/vect/bb-slp-pr81635-3.c: Adjust.
* gcc.dg/vect/bb-slp-pr95839-2.c: Adjust.
* gcc.dg/vect/bb-slp-pr95839.c: Adjust.
* gcc.dg/vect/bb-slp-pr95866.c: Adjust.
* gcc.dg/vect/bb-slp-subgroups-1.c: Adjust.
* gcc.dg/vect/bb-slp-subgroups-2.c: Adjust.
* gcc.dg/vect/bb-slp-subgroups-3.c: Adjust.
* gcc.dg/vect/fast-math-bb-slp-call-1.c: Adjust.
* gcc.dg/vect/no-tree-reassoc-bb-slp-12.c: Adjust.
* gcc.dg/vect/no-tree-sra-bb-slp-pr50730.c: Adjust.
* gfortran.dg/vect/pr62283-2.f: Adjust.
* gcc.target/i386/pr68961.c: Adjust.
* gcc.target/i386/pr84101.c: Adjust.
* gcc.dg/vect/bb-slp-pr81635-2.c: Adjust.
* gcc.dg/vect/bb-slp-pr81635-4.c: Adjust.
* gcc.dg/vect/fast-math-bb-slp-call-2.c: Adjust.
* gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c: Adjust.
* gcc.dg/vect/costmodel/x86_64/costmodel-vect-slp.c: Adjust.
* gcc.dg/vect/bb-slp-div-1.c: Adjust.
* gcc.dg/vect/bb-slp-pr90006.c: Adjust.
* g++.dg/vect/slp-pr50413.cc: Adjust.
Christophe Lyon [Tue, 6 Oct 2020 07:36:31 +0000 (07:36 +0000)]
arm: [MVE] Remove illegal intrinsics (PR target/96914)
A few MVE intrinsics had an unsigned variant implement while they are
supported by the hardware. This patch removes them:
__arm_vqrdmlashq_n_u8
__arm_vqrdmlahq_n_u8
__arm_vqdmlahq_n_u8
__arm_vqrdmlashq_n_u16
__arm_vqrdmlahq_n_u16
__arm_vqdmlahq_n_u16
__arm_vqrdmlashq_n_u32
__arm_vqrdmlahq_n_u32
__arm_vqdmlahq_n_u32
__arm_vmlaldavaxq_p_u32
__arm_vmlaldavaxq_p_u16
2020-10-08 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
PR target/96914
* config/arm/arm_mve.h (vqrdmlashq_n_u8, vqrdmlashq_n_u16)
(vqrdmlashq_n_u32, vqrdmlahq_n_u8, vqrdmlahq_n_u16)
(vqrdmlahq_n_u32, vqdmlahq_n_u8, vqdmlahq_n_u16, vqdmlahq_n_u32)
(vmlaldavaxq_p_u16, vmlaldavaxq_p_u32): Remove.
* config/arm/arm_mve_builtins.def (vqrdmlashq_n_u, vqrdmlahq_n_u)
(vqdmlahq_n_u, vmlaldavaxq_p_u): Remove.
* config/arm/unspecs.md (VQDMLAHQ_N_U, VQRDMLAHQ_N_U)
(VQRDMLASHQ_N_U)
(VMLALDAVAXQ_P_U): Remove unspecs.
* config/arm/iterators.md (VQDMLAHQ_N_U, VQRDMLAHQ_N_U)
(VQRDMLASHQ_N_U, VMLALDAVAXQ_P_U): Remove attributes.
(VQDMLAHQ_N, VQRDMLAHQ_N, VQRDMLASHQ_N, VMLALDAVAXQ_P): Remove
unsigned variants from iterators.
* config/arm/mve.md (mve_vqdmlahq_n_<supf><mode>)
(mve_vqrdmlahq_n_<supf><mode>)
(mve_vqrdmlashq_n_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>):
Update comment.
gcc/testsuite/
PR target/96914
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u16.c: Remove.
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u32.c: Remove.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_u16.c: Remove.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_u32.c: Remove.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_u8.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u16.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u32.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u8.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u16.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u32.c: Remove.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u8.c: Remove.
Christophe Lyon [Mon, 5 Oct 2020 13:11:07 +0000 (13:11 +0000)]
arm: [MVE[ Add vqdmlashq intrinsics (PR target/96914)
This patch adds:
vqdmlashq_m_n_s16
vqdmlashq_m_n_s32
vqdmlashq_m_n_s8
vqdmlashq_n_s16
vqdmlashq_n_s32
vqdmlashq_n_s8
2020-10-08 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
PR target/96914
* config/arm/arm_mve.h (vqdmlashq, vqdmlashq_m): Define.
* config/arm/arm_mve_builtins.def (vqdmlashq_n_s)
(vqdmlashq_m_n_s,): New.
* config/arm/unspecs.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New
unspecs.
* config/arm/iterators.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New
attributes.
(VQDMLASHQ_N): New iterator.
* config/arm/mve.md (mve_vqdmlashq_n_, mve_vqdmlashq_m_n_s): New
patterns.
gcc/testsuite/
PR target/96914
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: New test.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: New test.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: New test.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: New test.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: New test.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: New test.
Jakub Jelinek [Thu, 8 Oct 2020 09:56:15 +0000 (11:56 +0200)]
arm: Fix ICE on glibc compilation after my DIVMOD optimization [PR97322]
The arm target hook for divmod wasn't prepared to handle constants passed to
the function.
2020-10-08 Jakub Jelinek <jakub@redhat.com>
PR target/97322
* config/arm/arm.c (arm_expand_divmod_libfunc): Pass mode instead of
GET_MODE (op0) or GET_MODE (op1) to emit_library_call_value.
* gcc.dg/pr97322.c: New test.
Aldy Hernandez [Thu, 8 Oct 2020 09:41:00 +0000 (11:41 +0200)]
Fix PR97325.
gcc/ChangeLog:
PR tree-optimization/97325
* gimple-range.cc (gimple_ranger::range_of_builtin_call): Handle
negative numbers in __builtin_ffs and __builtin_popcount.
Aldy Hernandez [Thu, 8 Oct 2020 09:33:30 +0000 (11:33 +0200)]
Fix PR97315 (part 2 of 2)
gcc/ChangeLog:
PR tree-optimization/97315
* range-op.cc (value_range_with_overflow): Change any
non-overflow calculation in which both bounds are
overflow/underflow to be undefined.
gcc/testsuite/ChangeLog:
* gcc.dg/pr97315-2.c: New test.
Aldy Hernandez [Thu, 8 Oct 2020 09:15:23 +0000 (11:15 +0200)]
Fix PR97315 (part 1 of 2)
gcc/ChangeLog:
PR tree-optimization/97315
* gimple-ssa-evrp.c (hybrid_folder::choose_value): Removes the
trap and instead annotates the listing.
gcc/testsuite/ChangeLog:
* gcc.dg/pr97315-1.c: New test.
Jakub Jelinek [Thu, 8 Oct 2020 09:10:34 +0000 (11:10 +0200)]
openmp: Set cfun->calls_alloca when needed in OpenMP outlined regions [PR97294]
The following testcase FAILs, because we don't mark the child OpenMP function
as cfun->calls_alloca when it does call alloca. When optimizing, during DCE we
reset those flags and recompute them again, but with -O0 DCE is not performed.
Fixed by calling notice_special_calls when moving insns to the child function.
cfun->calls_alloca is normally set during gimplification and most of the
alloca calls omp-low.c does go through the gimplifier, but one spot didn't
and built the gcall directly, so that one needs to set calls_alloca too.
2020-10-08 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/97294
* tree-cfg.c (move_block_to_fn): Call notice_special_calls on
call stmts being moved into dest_cfun.
* omp-low.c (lower_rec_input_clauses): Set cfun->calls_alloca when
adding __builtin_alloca_with_align call without gimplification.
* gcc.dg/asan/pr97294.c: New test.
Tom de Vries [Thu, 8 Oct 2020 06:22:39 +0000 (08:22 +0200)]
[libgomp, nvptx] Report launch dimensions in GOMP_OFFLOAD_run
Using this patch, when using GOMP_DEBUG=1 and launching a kernel in
GOMP_OFFLOAD_run (used by the omp implementation), we see the kernel launch
dimensions:
...
GOMP_OFFLOAD_run: kernel main$_omp_fn$0: \
launch [(teams: 1), 1, 1] [(lanes: 32), (threads: 1), 1]
...
Build on x86_64-linux with nvptx accelerator, tested libgomp.
libgomp/ChangeLog:
2020-10-08 Tom de Vries <tdevries@suse.de>
PR libgomp/81802
* plugin/plugin-nvptx.c (GOMP_OFFLOAD_run): Report launch
dimensions.
Patrick Palka [Thu, 8 Oct 2020 04:05:41 +0000 (00:05 -0400)]
c++: ICE in dependent_type_p with constrained auto [PR97052]
This patch fixes an "unguarded" call to coerce_template_parms in
build_standard_check: processing_template_decl could be zero if we
get here during processing of the first 'auto' parameter of an
abbreviated function template, or if we're processing the type
constraint of a non-templated variable. In the testcase below, this
leads to an ICE when coerce_template_parms instantiates C's dependent
default template argument.
gcc/cp/ChangeLog:
PR c++/97052
* constraint.cc (build_type_constraint): Temporarily increment
processing_template_decl before calling build_concept_check.
* pt.c (make_constrained_placeholder_type): Likewise.
gcc/testsuite/ChangeLog:
PR c++/97052
* g++.dg/cpp2a/concepts-defarg2.C: New test.
Patrick Palka [Thu, 8 Oct 2020 04:05:36 +0000 (00:05 -0400)]
c++: Set the constraints of a class type sooner [PR96229]
In the testcase below, during processing (at parse time) of Y's base
class X<Y>, convert_template_argument calls is_compatible_template_arg
to check if the template argument Y is no more constrained than the
parameter P. But at this point we haven't yet set Y's constraints, so
get_normalized_constraints_from_decl yields NULL_TREE as the normal form
and caches this result into the normalized_map.
We set Y's constraints later in cp_parser_class_specifier_1 but the
stale normal form in the normalized_map remains. This ultimately causes
us to miss the constraint failure for Y<Z> because according to the
cached normal form, Y is not constrained.
This patch fixes this issue by moving up the call to
associate_classtype_constraints so that we set constraints before we
start processing a class's bases.
gcc/cp/ChangeLog:
PR c++/96229
* parser.c (cp_parser_class_specifier_1): Move call to
associate_classtype_constraints from here to ...
(cp_parser_class_head): ... here.
* pt.c (is_compatible_template_arg): Correct documentation to
say "argument is _no_ more constrained than the parameter".
gcc/testsuite/ChangeLog:
PR c++/96229
* g++.dg/cpp2a/concepts-class2.C: New test.
GCC Administrator [Thu, 8 Oct 2020 00:16:30 +0000 (00:16 +0000)]
Daily bump.
Jonathan Wakely [Wed, 7 Oct 2020 23:34:56 +0000 (00:34 +0100)]
libstdc++: Fix divide by zero in default template argument
libstdc++-v3/ChangeLog:
* include/bits/random.h (__detail::_Mod): Avoid divide by zero.
* testsuite/26_numerics/random/linear_congruential_engine/operators/call.cc:
New test.
Jonathan Wakely [Wed, 7 Oct 2020 23:05:53 +0000 (00:05 +0100)]
libstdc++: Fix non-reserved names in headers
My recent changes to std::exception_ptr moved some members to be inline
in the header but didn't replace the variable names with reserved names.
The "tmp" variable must be fixed. The "other" parameter is actually a
reserved name because of std::allocator<T>::rebind<U>::other but should
be fixed anyway.
There are also some bad uses of "ForwardIterator" in <ranges>.
There's also a "il" parameter in a std::seed_seq constructor in <random>
which is only reserved since C++14.
libstdc++-v3/ChangeLog:
* include/bits/random.h (seed_seq(initializer_list<T>)): Rename
parameter to use reserved name.
* include/bits/ranges_algo.h (shift_left, shift_right): Rename
template parameters to use reserved name.
* libsupc++/exception_ptr.h (exception_ptr): Likewise for
parameters and local variables.
* testsuite/17_intro/names.cc: Check "il". Do not check "d" and
"y" in C++20 mode.
Marek Polacek [Thu, 10 Sep 2020 21:27:43 +0000 (17:27 -0400)]
c++: Fix P0846 (ADL and function templates) in template [PR97010]
To quickly recap, P0846 says that a name is also considered to refer to
a template if it is an unqualified-id followed by a < and name lookup
finds either one or more functions or finds nothing.
In a template, when parsing a function call that has type-dependent
arguments, we can't perform ADL right away so we set KOENIG_LOOKUP_P in
the call to remember to do it when instantiating the call
(tsubst_copy_and_build/CALL_EXPR). When the called function is a
function template, we represent the call with a TEMPLATE_ID_EXPR;
usually the operand is an OVERLOAD.
In the P0846 case though, the operand can be an IDENTIFIER_NODE, when
name lookup found nothing when parsing the template name. But we
weren't handling this correctly in tsubst_copy_and_build. First
we need to pass the FUNCTION_P argument from <case TEMPLATE_ID_EXPR> to
<case IDENTIFIER_NODE>, otherwise we give a bogus error. And then in
<case CALL_EXPR> we need to perform ADL. The rest of the changes is to
give better errors when ADL didn't find anything.
gcc/cp/ChangeLog:
PR c++/97010
* pt.c (tsubst_copy_and_build) <case TEMPLATE_ID_EXPR>: Call
tsubst_copy_and_build explicitly instead of using the RECUR macro.
Handle a TEMPLATE_ID_EXPR with an IDENTIFIER_NODE as its operand.
<case CALL_EXPR>: Perform ADL for a TEMPLATE_ID_EXPR with an
IDENTIFIER_NODE as its operand.
gcc/testsuite/ChangeLog:
PR c++/97010
* g++.dg/cpp2a/fn-template21.C: New test.
* g++.dg/cpp2a/fn-template22.C: New test.
Clément Chigot [Thu, 24 Sep 2020 11:40:40 +0000 (13:40 +0200)]
libgo/configure: remove -fno-section-anchors for AIX
This option is no longer needed. There is no crash without it since
at least gcc-9.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/260157
Nikhil Benesch [Wed, 7 Oct 2020 05:14:49 +0000 (01:14 -0400)]
libgo: handle go1.10+ correctly in match.sh
match.sh was not correctly handling build constraints for Go versions
that have a two-digit suffix, like "go1.10".
The same issue will arise with Go 1.100, but that is a long ways off.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/260077
Aldy Hernandez [Wed, 7 Oct 2020 14:46:34 +0000 (16:46 +0200)]
Rename -fevrp-mode= to --param=evrp-mode=.
* common.opt (-fevrp-mode): Rename and move...
* params.opt (--param=evrp-mode): ...here.
* gimple-range.h (DEBUG_RANGE_CACHE): Use param_evrp_mode instead
of flag_evrp_mode.
* gimple-ssa-evrp.c (rvrp_folder): Same.
(hybrid_folder): Same.
(execute_early_vrp): Same.
Richard Biener [Wed, 7 Oct 2020 08:42:12 +0000 (10:42 +0200)]
tree-optimization/97307 - improve sinking of loads
This improves the heuristics finding a sink location for loads that does
not cross any store.
2020-10-07 Richard Biener <rguenther@suse.de>
PR tree-optimization/97307
* tree-ssa-sink.c (statement_sink_location): Change heuristic
for not skipping stores to look for virtual definitions
rather than uses.
* gcc.dg/tree-ssa/ssa-sink-17.c: New testcase.
* gcc.dg/vect/pr65947-3.c: XFAIL.
Patrick Palka [Wed, 7 Oct 2020 14:49:00 +0000 (10:49 -0400)]
c++: Distinguish alignof and __alignof__ in cp_tree_equal [PR97273]
cp_tree_equal currently considers alignof the same as __alignof__, but
these operators are semantically different ever since r8-7957. In the
testcase below, this causes the second static_assert to fail on targets
where alignof(double) != __alignof__(double) because the specialization
table (which uses cp_tree_equal as its equality predicate) conflates the
two dependent specializations integral_constant<__alignof__(T)> and
integral_constant<alignof(T)>.
This patch makes cp_tree_equal distinguish between these two operators
by inspecting the ALIGNOF_EXPR_STD_P flag.
gcc/cp/ChangeLog:
PR c++/88115
PR libstdc++/97273
* tree.c (cp_tree_equal) <case ALIGNOF_EXPR>: Return false if
ALIGNOF_EXPR_STD_P differ.
gcc/testsuite/ChangeLog:
PR c++/88115
PR libstdc++/97273
* g++.dg/template/alignof3.C: New test.
Andrew MacLeod [Tue, 6 Oct 2020 20:52:03 +0000 (16:52 -0400)]
Off by one final fix.
Allocate the memory in an approved portable way.
gcc/ChangeLog:
2020-10-06 Andrew MacLeod <amacleod@redhat.com>
* value-range.h (irange_allocator::allocate): Allocate in two hunks
instead of using the variably-sized trailing array approach.
Paul Thomas [Wed, 7 Oct 2020 13:59:10 +0000 (14:59 +0100)]
This patch fixes PR47469 - a trivial bit of tidying up.
2020-07-10 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/47469
* trans-expr.c (arrayfunc_assign_needs_temporary): Tidy detection
of pointer and allocatable functions.
David Malcolm [Tue, 6 Oct 2020 21:59:07 +0000 (17:59 -0400)]
analyzer: handle C++ argument numbers and "this" [PR97116]
gcc/analyzer/ChangeLog:
PR analyzer/97116
* sm-malloc.cc (method_p): New.
(describe_argument_index): New.
(inform_nonnull_attribute): Use describe_argument_index.
(possible_null_arg::describe_final_event): Likewise.
(null_arg::describe_final_event): Likewise.
gcc/testsuite/ChangeLog:
PR analyzer/97116
* g++.dg/analyzer/pr97116.C: New test.
David Malcolm [Tue, 6 Oct 2020 20:58:00 +0000 (16:58 -0400)]
Add -fdiagnostics-path-format=separate-events to -fdiagnostics-plain-output
The path-printing default of -fdiagnostics-path-format=inline-events
interacted poorly with -fdiagnostics-plain-output, so it makes most
sense to add -fdiagnostics-path-format=separate-events to
-fdiagnostics-plain-output.
Seen when adding an experimental analyzer plugin to gcc.dg/plugin.exp.
gcc/ChangeLog:
* doc/invoke.texi (-fdiagnostics-plain-output): Add
-fdiagnostics-path-format=separate-events to list of
options injected by -fdiagnostics-plain-output.
* opts-common.c (decode_cmdline_options_to_array): Likewise.
gcc/testsuite/ChangeLog:
* g++.dg/analyzer/analyzer.exp (DEFAULT_CXXFLAGS): Remove
-fdiagnostics-path-format=separate-events.
* gcc.dg/analyzer/analyzer.exp (DEFAULT_CFLAGS): Likewise.
* gcc.dg/plugin/diagnostic-path-format-default.c: Rename to...
* gcc.dg/plugin/diagnostic-path-format-plain.c: ...this. Remove
dg-options directive. Copy remainder of test from
diagnostic-path-format-separate-events.c.
* gcc.dg/plugin/diagnostic-test-paths-2.c: Add
-fdiagnostics-path-format=inline-events to options.
Fix expected output for location of conditional within "for" loop.
* gcc.dg/plugin/plugin.exp (plugin_test_list): Update for
renaming.
* gfortran.dg/analyzer/analyzer.exp (DEFAULT_FFLAGS): Remove
-fdiagnostics-path-format=separate-events.
Nathan Sidwell [Wed, 7 Oct 2020 12:46:24 +0000 (05:46 -0700)]
c++: block-scope externs get an alias [PR95677,PR31775,PR95677]
This patch improves block-scope extern handling by always injecting a
hidden copy into the enclosing namespace (or using a match already
there). This hidden copy will be revealed if the user explicitly
declares it later. We can get from the DECL_LOCAL_DECL_P local extern
to the alias via DECL_LOCAL_DECL_ALIAS. This fixes several bugs and
removes the kludgy per-function extern_decl_map. We only do this
pushing for non-dependent local externs -- dependent ones will be
pushed during instantiation.
User code that expected to be able to handle incompatible local
externs in different block-scopes will no longer work. That code is
ill-formed. (always was, despite what 31775 claimed). I had to
adjust a number of testcases that fell into this.
I tried using DECL_VALUE_EXPR, but that didn't work out. Due to
constexpr requirements we have to do the replacement very late (it
happens in the gimplifier). Consider:
extern int l[]; // #1
constexpr bool foo ()
{
extern int l[3]; // this does not complete the type of decl #1
constexpr int *p = &l[2]; // ok
return !p;
}
This requirement, coupled with our use of the common folding machinery
makes pr97306 hard to fix, as we end up with an expression containing
the two different decls for 'l', and only the c++ FE knows how to
reconcile those. I punted on this.
gcc/cp/
* cp-tree.h (struct language_function): Delete extern_decl_map.
(DECL_LOCAL_DECL_ALIAS): New.
* name-lookup.h (is_local_extern): Delete.
* name-lookup.c (set_local_extern_decl_linkage): Replace with ...
(push_local_extern_decl): ... this new function.
(do_pushdecl): Call new function after pushing new decl. Unhide
hidden non-functions.
(is_local_extern): Delete.
* decl.c (layout_var_decl): Do not allow VLA local externs.
* decl2.c (mark_used): Also mark DECL_LOCAL_DECL_ALIAS. Drop old
local-extern treatment.
* parser.c (cp_parser_oacc_declare): Deal with local extern aliases.
* pt.c (tsubst_expr): Adjust local extern instantiation.
* cp-gimplify.c (cp_genericize_r): Remap DECL_LOCAL_DECLs.
gcc/testsuite/
* g++.dg/cpp0x/lambda/lambda-sfinae1.C: Avoid ill-formed local extern
* g++.dg/init/pr42844.C: Add expected error.
* g++.dg/lookup/extern-redecl1.C: Likewise.
* g++.dg/lookup/koenig15.C: Avoid ill-formed.
* g++.dg/lto/pr95677.C: New.
* g++.dg/other/nested-extern-1.C: Correct expected behabviour.
* g++.dg/other/nested-extern-2.C: Likewise.
* g++.dg/other/nested-extern.cc: Split ...
* g++.dg/other/nested-extern-1.cc: ... here ...
* g++.dg/other/nested-extern-2.cc: ... here.
* g++.dg/template/scope5.C: Avoid ill-formed
* g++.old-deja/g++.law/missed-error2.C: Allow extension.
* g++.old-deja/g++.pt/crash3.C: Add expected error.
Martin Jambor [Wed, 7 Oct 2020 12:12:49 +0000 (14:12 +0200)]
ipa-prop: Fix multiple-target speculation resolution
As the FIXME which this patch removes states, the current code does
not work when a call with multiple speculative targets gets resolved
through parameter tracking during inlining - it feeds the inliner an
edge it has already dealt with. The patch makes the code which should
prevent it aware of the possibility that that speculation can have
more than one target now.
gcc/ChangeLog:
2020-09-30 Martin Jambor <mjambor@suse.cz>
PR ipa/96394
* ipa-prop.c (update_indirect_edges_after_inlining): Do not add
resolved speculation edges to vector of new direct edges even in
presence of multiple speculative direct edges for a single call.
gcc/testsuite/ChangeLog:
2020-09-30 Martin Jambor <mjambor@suse.cz>
PR ipa/96394
* gcc.dg/tree-prof/pr96394.c: New test.
Nathan Sidwell [Wed, 7 Oct 2020 12:02:34 +0000 (05:02 -0700)]
c++: Rename DECL_BUILTIN_P to DECL_UNDECLARED_BUILTIN_P
I realized I'd misnamed DECL_BUILTIN_P, it's only true of compiler
builtins unless and until the user declares them -- at that point
they're real decls, and will have a location in the user's source.
(BUILT_IN_FN and friends still work though). This renames them so
future-me is not confused as to why the predicate becomes false.
gcc/cp/
* cp-tree.h (DECL_BUILTIN_P): Rename to ...
(DECL_UNDECLARED_BUILTIN_P): ... here.
* decl.c (duplicate_decls): Adjust.
* name-lookup.c (anticipated_builtin_p): Adjust.
(do_nonmember_using_decl): Likewise.
libcc1/
* libcp1plugin.cc (supplement_binding): Rename
DECL_BUILTIN_P.
Nathan Sidwell [Wed, 7 Oct 2020 11:56:41 +0000 (04:56 -0700)]
c++: Adding exception specs can changed dependentness
Making an exception variant can cause a non-dependent function type to
become dependent (since c++17 eh-specs are part of the type). The
same is (possibly?) true for adding a late return type. Fixed thusly.
My upcoming local extern-decl changes have a test case that covers
this (which was how I found it).
gcc/cp/
* tree.c (build_cp_fntype_variant): Clear
TYPE_DEPENDENT_P_VALID if necessary.
Andrew Stubbs [Wed, 13 May 2020 15:24:12 +0000 (16:24 +0100)]
amdgcn: Use scalar instructions for addptrdi3
Allow addptr to use SPGRs as well as VGPRs for pointers. This ought to
prevent some unnecessary copying back and forth.
gcc/ChangeLog:
* config/gcn/gcn.md (unspec): Add UNSPEC_ADDPTR.
(addptrdi3): Add SGPR alternative.
Mark Wielaard [Fri, 18 Sep 2020 15:07:03 +0000 (17:07 +0200)]
Output filepath strings in .debug_line_str for DWARF5
DWARF5 has a new string table specially for file paths. .debug_line
file and dir tables reference strings in .debug_line_str. If a
.debug_line_str section is emitted then also place CU DIE file
names and comp dirs there.
gcc/ChangeLog:
* dwarf2out.c (add_filepath_AT_string): New function.
(asm_outputs_debug_line_str): Likewise.
(add_filename_attribute): Likewise.
(add_comp_dir_attribute): Call add_filepath_AT_string.
(gen_compile_unit_die): Call add_filename_attribute for name.
(init_sections_and_labels): Init debug_line_str_section when
asm_outputs_debug_line_str return true.
(dwarf2out_early_finish): Remove DW_AT_name and DW_AT_comp_dir
hack and call add_filename_attribute for the remap_debug_filename.
Jakub Jelinek [Wed, 7 Oct 2020 08:55:35 +0000 (10:55 +0200)]
debug: Pass --gdwarf-N to assembler if fixed gas is detected during configure
> > As for the test assembly, I'd say we should take
> > #define F void foo (void) {}
> > F
> > compile it with
> > gcc -S -O2 -g1 -dA -gno-as-loc-support -fno-merge-debug-strings
> > remove .cfi_* directives, remove the ret instruction, change @function
> > and @progbits to %function and %progbits, change .uleb128 to just .byte,
> > I think all the values should be small enough, maybe change .value to
> > .2byte and .long to .4byte (whatever is most portable across different
> > arches and gas versions), simplify (shorten) strings and adjust
> > sizes, and do something with the .quad directives, that is dependent on
> > the address size, perhaps just take those attributes out and adjust
> > .debug_abbrev? Finally, remove all comments (emit them in the first case
> > just to better understand the debug info).
>
> I'm afraid it is hard to avoid the .quad or .8byte.
> Here is a 64-bit address version that assembles fine by both x86_64 and
> aarch64 as.
> Unfortunately doesn't fail with broken gas versions with -gdwarf-2 without
> the nop, so we'll need at least a nop in there.
> Fortunately gcc/configure.ac already determines the right nop insn for the
> target, in $insn.
> So I guess what we want next is have the 32-bit version of this with .4byte
> instead of .8byte and just let's try to assemble both versions, first
> without -gdwarf-2 and the one that succeeds assemble again with -gdwarf-2
> and check for the duplicate .debug_line sections error.
Ok, here it is in patch form.
I've briefly tested it, with the older binutils I have around (no --gdwarf-N
support), with latest gas (--gdwarf-N that can be passed to as even when
compiling C/C++ etc. code and emitting .debug_line) and latest gas with Mark's fix
reverted (--gdwarf-N support, but can only pass it to as when assembling
user .s/.S files, not when compiling C/C++ etc.).
2020-10-07 Jakub Jelinek <jakub@redhat.com>
* configure.ac (HAVE_AS_GDWARF_5_DEBUG_FLAG,
HAVE_AS_WORKING_DWARF_4_FLAG): New tests.
* gcc.c (ASM_DEBUG_DWARF_OPTION): Define.
(ASM_DEBUG_SPEC): Use ASM_DEBUG_DWARF_OPTION instead of
"--gdwarf2". Use %{cond:opt1;:opt2} style.
(ASM_DEBUG_OPTION_DWARF_OPT): Define.
(ASM_DEBUG_OPTION_SPEC): Define.
(asm_debug_option): New variable.
(asm_options): Add "%(asm_debug_option)".
(static_specs): Add asm_debug_option entry.
(static_spec_functions): Add dwarf-version-gt.
(debug_level_greater_than_spec_func): New function.
* config/darwin.h (ASM_DEBUG_OPTION_SPEC): Define.
* config/darwin9.h (ASM_DEBUG_OPTION_SPEC): Redefine.
* config.in: Regenerated.
* configure: Regenerated.
Jakub Jelinek [Wed, 7 Oct 2020 08:52:47 +0000 (10:52 +0200)]
options: Avoid unused variable mask warning [PR97305]
> options-save.c: In function 'void cl_target_option_save(cl_target_option*, gcc_options*, gcc_options*)':
> options-save.c:8526:26: error: unused variable 'mask' [-Werror=unused-variable]
> 8526 | unsigned HOST_WIDE_INT mask = 0;
> | ^~~~
> options-save.c: In function 'void cl_target_option_restore(gcc_options*, gcc_options*, cl_target_option*)':
> options-save.c:8537:26: error: unused variable 'mask' [-Werror=unused-variable]
> 8537 | unsigned HOST_WIDE_INT mask;
> | ^~~~
Oops, missed that, sorry.
The following patch should fix that, tested on x86_64-linux make
options-save.c (same file as before) and -> ia64-linux cross make
options-save.o (no warning anymore, just the unwanted declarations gone).
2020-10-07 Jakub Jelinek <jakub@redhat.com>
PR bootstrap/97305
* optc-save-gen.awk: Don't declare mask variable if explicit_mask
array is not present.
Jakub Jelinek [Wed, 7 Oct 2020 08:49:37 +0000 (10:49 +0200)]
openmp: Improve composite simd vectorization
> > I was really hoping bbs 4 and 5 would be one loop (the one I set safelen
> > and force_vectorize etc. for) and that basic blocks 6 and 7 would be
> > together with that inner loop another loop, but apparently loop discovery
> > thinks it is just one loop.
> > Any ideas what I'm doing wrong or is there any way how to make it two loops
> > (that would also survive all the cfg cleanups until vectorization)?
>
> The early CFG looks like we have a common header with two latches
> so it boils down to how we disambiguate those in the end (we seem
> to unify the latches via a forwarder). IIRC OMP lowering builds
> loops itself, could it not do the appropriate disambiguation itself?
I realized I emit the same stmts on both paths (before goto doit; and before
falling through it), at least the MIN_EXPR and PLUS_EXPR, so by forcing
there an extra bb which does those two and having the "doit" label before
that the innermost loop doesn't have multiple latches anymore and so is
vectorized fine.
2020-10-07 Jakub Jelinek <jakub@redhat.com>
* omp-expand.c (expand_omp_simd): Don't emit MIN_EXPR and PLUS_EXPR
at the end of entry_bb and innermost init_bb, instead force arguments
for MIN_EXPR into temporaries in both cases and jump to a new bb that
performs MIN_EXPR and PLUS_EXPR.
* gcc.dg/gomp/simd-2.c: New test.
* gcc.dg/gomp/simd-3.c: New test.
Tom de Vries [Wed, 7 Oct 2020 05:22:43 +0000 (07:22 +0200)]
[tree-ssa-loop-ch] Add missing NULL test for dump_file
If we change gimple_can_duplicate_bb_p to return false instead of true, we run
into a segfault in ch_base::copy_headers due to using dump_file while it's
NULL:
...
if (!gimple_duplicate_sese_region (entry, exit, bbs, n_bbs, copied_bbs,
true))
{
fprintf (dump_file, "Duplication failed.\n");
continue;
}
...
Fix this by adding the missing dump_file != NULL test.
Tested by rebuilding lto1 and rerunning the failing test-case.
gcc/ChangeLog:
2020-10-07 Tom de Vries <tdevries@suse.de>
* tree-ssa-loop-ch.c (ch_base::copy_headers): Add missing NULL test
for dump_file.
GCC Administrator [Wed, 7 Oct 2020 00:16:35 +0000 (00:16 +0000)]
Daily bump.
Marek Polacek [Mon, 5 Oct 2020 21:48:19 +0000 (17:48 -0400)]
c++: typename in out-of-class member function definitions [PR97297]
I was notified that our P0634R3 (Down with typename) implementation has
a flaw: when we have an out-of-class member function definition, we
still required 'typename' for its parameters. For example here:
template <typename T> struct S {
int simple(T::type);
};
template <typename T>
int S<T>::simple(/* typename */T::type) { return 0; }
the 'typename' isn't necessary per [temp.res]/5.2.4. We have a qualified
name here ("S<T>::simple") so we know it's already been declared so we
can look it up to see if it's a function template or a variable
template.
In this case, the P0634R3 code in cp_parser_direct_declarator wasn't
looking into uninstantiated templates and didn't find the member
function 'simple' -- cp_parser_lookup_name returned a SCOPE_REF which
means that the qualifying scope was dependent. With this fix, we find
the BASELINK for 'simple', don't clear CP_PARSER_FLAGS_TYPENAME_OPTIONAL
from the flags, and the typename is implicitly assumed.
gcc/cp/ChangeLog:
PR c++/97297
* parser.c (cp_parser_direct_declarator): When checking if a
name is a function template declaration for the P0634R3 case,
look in uninstantiated templates too.
gcc/testsuite/ChangeLog:
PR c++/97297
* g++.dg/cpp2a/typename18.C: New test.
Tobias Burnus [Tue, 6 Oct 2020 21:34:21 +0000 (23:34 +0200)]
c-c++-common/goacc/declare-pr90861.c: Remove xfail
gcc/testsuite/ChangeLog
PR middle-end/90861
* c-c++-common/goacc/declare-pr90861.c: Remove xfail.
Nikhil Benesch [Mon, 5 Oct 2020 03:40:40 +0000 (23:40 -0400)]
compiler: avoid undefined behavior in Import::read
For some implementations of Stream, advancing the stream will invalidate
the previously-returned peek buffer. Copy the peek buffer before
advancing in Import::read to avoid this undefined behavior.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/259438
Andrew MacLeod [Tue, 6 Oct 2020 16:53:09 +0000 (12:53 -0400)]
Hybrid EVRP and testcases
Provide a hybrid EVRP pass which uses legacy EVRP and adds additonal
enhancements from the new ranger infrastructure.
A New option is also provided, -fevrp-mode=
And adjust testcases
gcc/ChangeLog:
2020-10-06 Andrew MacLeod <amacleod@redhat.com>
* flag-types.h (enum evrp_mode): New enumerated type EVRP_MODE_*.
* common.opt (fevrp-mode): New undocumented flag.
* gimple-ssa-evrp.c: Include gimple-range.h
(class rvrp_folder): EVRP folding using ranger exclusively.
(rvrp_folder::rvrp_folder): New.
(rvrp_folder::~rvrp_folder): New.
(rvrp_folder::value_of_expr): New. Use rangers value_of_expr.
(rvrp_folder::value_on_edge): New. Use rangers value_on_edge.
(rvrp_folder::value_of_Stmt): New. Use rangers value_of_stmt.
(rvrp_folder::fold_stmt): New. Call the simplifier.
(class hybrid_folder): EVRP folding using both engines.
(hybrid_folder::hybrid_folder): New.
(hybrid_folder::~hybrid_folder): New.
(hybrid_folder::fold_stmt): New. Simplify with one engne, then the
other.
(hybrid_folder::value_of_expr): New. Use both value routines.
(hybrid_folder::value_on_edge): New. Use both value routines.
(hybrid_folder::value_of_stmt): New. Use both value routines.
(hybrid_folder::choose_value): New. Choose between range_analzyer and
rangers values.
(execute_early_vrp): Choose a folder based on flag_evrp_mode.
* vr-values.c (simplify_using_ranges::fold_cond): Try range_of_stmt
first to see if it returns a value.
(simplify_using_ranges::simplify_switch_using_ranges): Return true if
any changes were made to the switch.
gcc/testsuite/ChangeLog:
2020-10-06 Andrew MacLeod <amacleod@redhat.com>
* gcc.dg/pr81192.c: Disable EVRP pass.
* gcc.dg/tree-ssa/pr77445-2.c: Ditto.
* gcc.dg/tree-ssa/ssa-dom-thread-6.c: Adjust.
* gcc.dg/tree-ssa/ssa-dom-thread-7.c: Ditto.
Andrew MacLeod [Tue, 6 Oct 2020 16:12:53 +0000 (12:12 -0400)]
Ranger classes.
Add the 8 ranger files and the Makefile changes to build it.
2020-10-06 Andrew MacLeod <amacleod@redhat.com>
* Makefile.in (OBJS): Add gimple-range*.o.
* gimple-range.h: New file.
* gimple-range.cc: New file.
* gimple-range-cache.h: New file.
* gimple-range-cache.cc: New file.
* gimple-range-edge.h: New file.
* gimple-range-edge.cc: New file.
* gimple-range-gori.h: New file.
* gimple-range-gori.cc: New file.
Tom de Vries [Tue, 6 Oct 2020 16:12:52 +0000 (18:12 +0200)]
[openacc, libgomp, testsuite] Xfail declare-5.f90
We're currently running into:
...
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
-DACC_MEM_SHARED=0 -foffload=nvptx-none -O0 execution test
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
-DACC_MEM_SHARED=0 -foffload=nvptx-none -O1 execution test
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
-DACC_MEM_SHARED=0 -foffload=nvptx-none -O2 execution test
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
-DACC_MEM_SHARED=0 -foffload=nvptx-none -O3 -fomit-frame-pointer \
-funroll-loops -fpeel-loops -ftracer -finline-functions execution test
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
-DACC_MEM_SHARED=0 -foffload=nvptx-none -O3 -g execution test
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
-DACC_MEM_SHARED=0 -foffload=nvptx-none -Os execution test
...
A PR was filed for this: PR92790 - "[OpenACC] declare device_resident -
Fortran common blocks not handled / libgomp.oacc-fortran/declare-5.f90 fails"
Xfail the fails.
Tested on x86_64-linux with nvptx accelerator.
libgomp/ChangeLog:
2020-10-06 Tom de Vries <tdevries@suse.de>
* testsuite/libgomp.oacc-fortran/declare-5.f90: Add xfail for PR92790.
Jonathan Wakely [Tue, 6 Oct 2020 15:55:06 +0000 (16:55 +0100)]
libstdc++: Inline std::exception_ptr members [PR 90295]
This inlines most members of std::exception_ptr so that all operations
on a null exception_ptr can be optimized away. This benefits code like
std::future and coroutines where an exception_ptr object is present to
cope with exceptional cases, but is usually not used and remains null.
Since those functions were previously non-inline we have to continue to
export them from the library, for objects that were compiled against the
old headers and expect to find definitions in the library.
In order to inline the copy constructor and destructor we need to export
the _M_addref() and _M_release() members that increment/decrement the
reference count when copying/destroying a non-null exception_ptr. The
copy ctor and dtor check for null and don't call _M_addref and
_M_release unless they need to. The checks for null pointers in
_M_addref and _M_release are still needed because old code might call
them without checking for null first. But we can use __builtin_expect to
predict that they are usually called for the non-null case.
libstdc++-v3/ChangeLog:
PR libstdc++/90295
* config/abi/pre/gnu.ver (CXXABI_1.3.13): New symbol version.
(exception_ptr::_M_addref(), exception_ptr::_M_release()):
Export symbols.
* libsupc++/eh_ptr.cc (exception_ptr::exception_ptr()):
Remove out-of-line definition.
(exception_ptr::exception_ptr(const exception_ptr&)):
Likewise.
(exception_ptr::~exception_ptr()): Likewise.
(exception_ptr::operator=(const exception_ptr&)):
Likewise.
(exception_ptr::swap(exception_ptr&)): Likewise.
(exception_ptr::_M_addref()): Add branch prediction.
* libsupc++/exception_ptr.h (exception_ptr::operator bool):
Add noexcept.
[!_GLIBCXX_EH_PTR_COMPAT] (operator==, operator!=): Define
inline as hidden friends. Remove declarations at namespace
scope.
(exception_ptr::exception_ptr()): Define inline.
(exception_ptr::exception_ptr(const exception_ptr&)):
Likewise.
(exception_ptr::~exception_ptr()): Likewise.
(exception_ptr::operator=(const exception_ptr&)):
Likewise.
(exception_ptr::swap(exception_ptr&)): Likewise.
* testsuite/util/testsuite_abi.cc: Add CXXABI_1.3.13.
* testsuite/18_support/exception_ptr/90295.cc: New test.
Dennis Zhang [Tue, 6 Oct 2020 15:53:46 +0000 (16:53 +0100)]
arm: Enable MVE SIMD modes for vectorization
This patch enables SIMD modes for MVE auto-vectorization.
In this patch, the integer and float MVE SIMD modes are returned by
arm_preferred_simd_mode (TARGET_VECTORIZE_PREFERRED_SIMD_MODE hook) when
MVE or MVE_FLOAT is enabled. Then the expanders for auto-vectorization
can be used for generating MVE SIMD code.
This patch also fixes bugs in MVE vreiterpretq_*.c tests which are
revealed by the enabled MVE SIMD modes.
The tests are for checking the MVE reinterpret intrinsics.
There are two functions in each of the tests. The two functions contain
the pattern of identical code so that they are folded in icf pass.
Because of icf, the instruction count only checks one function which is
8. However when the SIMD modes are enabled, the estimation of the code
size becomes smaller so that inlining is applied after icf, then the
instruction count becomes 16 which causes failure of the tests.
Because the icf is not the expected pattern to be tested but causes
above issues, -fno-ipa-icf is applied to the tests to avoid unstable
instruction count.
gcc/ChangeLog:
2020-10-05 Dennis Zhang <dennis.zhang@arm.com>
* config/arm/arm.c (arm_preferred_simd_mode): Enable MVE SIMD modes.
gcc/testsuite/ChangeLog:
2020-10-05 Dennis Zhang <dennis.zhang@arm.com>
* gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c: Use additional
option -fno-ipa-icf and change the instruction count from 8 to 16.
* gcc.target/arm/mve/intrinsics/vreinterpretq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vreinterpretq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vreinterpretq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vreinterpretq_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vreinterpretq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vreinterpretq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vreinterpretq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c: Likewise.
Tom de Vries [Tue, 6 Oct 2020 11:07:25 +0000 (13:07 +0200)]
[openacc] Fix acc declare for VLAs
Consider test-case test.c, with VLA A:
...
int main (void) {
int N = 1000;
int A[N];
#pragma acc declare copy(A)
return 0;
}
...
compiled using:
...
$ gcc test.c -fopenacc -S -fdump-tree-all
...
At original, we have:
...
#pragma acc declare map(tofrom:A);
...
but at gimple, we have a map (to:A.1), but not a map (from:A.1):
...
int[0:D.2074] * A.1;
{
int A[0:D.2074] [value-expr: *A.1];
saved_stack.2 = __builtin_stack_save ();
try
{
A.1 = __builtin_alloca_with_align (D.2078, 32);
#pragma omp target oacc_declare map(to:(*A.1) [len: D.2076])
}
finally
{
__builtin_stack_restore (saved_stack.2);
}
}
...
This is caused by the following incompatibility. When storing the desired
from clause in oacc_declare_returns, we use 'A.1' as the key:
...
10898 oacc_declare_returns->put (decl, c);
(gdb) call debug_generic_expr (decl)
A.1
(gdb) call debug_generic_expr (c)
map(from:(*A.1))
...
but when looking it up, we use 'A' as the key:
...
(gdb)
1471 tree *c = oacc_declare_returns->get (t);
(gdb) call debug_generic_expr (t)
A
...
Fix this by extracing the 'A.1' lookup key from 'A' using the decl-expr.
In addition, unshare the looked up value, to fix avoid running into
an "incorrect sharing of tree nodes" error.
Using these two fixes, we get our desired:
...
finally
{
+ #pragma omp target oacc_declare map(from:(*A.1))
__builtin_stack_restore (saved_stack.2);
}
...
Build on x86_64-linux with nvptx accelerator, tested libgomp.
gcc/ChangeLog:
2020-10-06 Tom de Vries <tdevries@suse.de>
PR middle-end/90861
* gimplify.c (gimplify_bind_expr): Handle lookup in
oacc_declare_returns using key with decl-expr.
libgomp/ChangeLog:
2020-10-06 Tom de Vries <tdevries@suse.de>
PR middle-end/90861
* testsuite/libgomp.oacc-c-c++-common/declare-vla.c: Remove xfail.
Martin Liska [Mon, 5 Oct 2020 16:03:08 +0000 (18:03 +0200)]
lto: fix LTO debug sections copying.
readelf -S prints:
There are 81999 section headers, starting at offset 0x1f488060:
Section Headers:
[Nr] Name Type Address Off Size ES Flg Lk Inf Al
[ 0] NULL
0000000000000000 000000 01404f 00 81998 0 0
[ 1] .group GROUP
0000000000000000 000040 000008 04 81995 105027 4
...
[81995] .symtab SYMTAB
0000000000000000 d5d9298 2db310 18 81997 105026 8
[81996] .symtab_shndx SYMTAB SECTION INDICES
0000000000000000 d8b45a8 079dd8 04 81995 0 4
[81997] .strtab STRTAB
0000000000000000 d92e380 80460c 00 0 0 1
...
Looking at the documentation:
Table 7–15 ELF sh_link and sh_info Interpretation
sh_type - sh_link
SHT_SYMTAB - The section header index of the associated string table.
SHT_SYMTAB_SHNDX - The section header index of the associated symbol table.
As seen, sh_link of a SHT_SYMTAB always points to a .strtab and readelf
confirms that.
So we need to use reverse mapping taken from
[81996] .symtab_shndx SYMTAB SECTION INDICES
0000000000000000 d8b45a8 079dd8 04 81995 0 4
where sh_link points to 81995.
libiberty/ChangeLog:
PR lto/97290
* simple-object-elf.c (simple_object_elf_copy_lto_debug_sections):
Use sh_link of a .symtab_shndx section.
Srinath Parvathaneni [Tue, 6 Oct 2020 13:58:13 +0000 (14:58 +0100)]
[PATCH][GCC] arm: Move iterators from mve.md to iterators.md to maintain consistency.
To maintain consistency with other Arm Architectures backend, iterators and iterator attributes are moved
from mve.md file to iterators.md. Also move enumerators for MVE unspecs from mve.md file to unspecs.md file.
gcc/ChangeLog:
2020-10-06 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/arm/iterators.md (MVE_types): Move mode iterator from mve.md to
iterators.md.
(MVE_VLD_ST): Likewise.
(MVE_0): Likewise.
(MVE_1): Likewise.
(MVE_3): Likewise.
(MVE_2): Likewise.
(MVE_5): Likewise.
(MVE_6): Likewise.
(MVE_CNVT): Move mode attribute iterator from mve.md to iterators.md.
(MVE_LANES): Likewise.
(MVE_constraint): Likewise.
(MVE_constraint1): Likewise.
(MVE_constraint2): Likewise.
(MVE_constraint3): Likewise.
(MVE_pred): Likewise.
(MVE_pred1): Likewise.
(MVE_pred2): Likewise.
(MVE_pred3): Likewise.
(MVE_B_ELEM): Likewise.
(MVE_H_ELEM): Likewise.
(V_sz_elem1): Likewise.
(V_extr_elem): Likewise.
(earlyclobber_32): Likewise.
(supf): Move int attribute from mve.md to iterators.md.
(mode1): Likewise.
(VCVTQ_TO_F): Move int iterator from mve.md to iterators.md.
(VMVNQ_N): Likewise.
(VREV64Q): Likewise.
(VCVTQ_FROM_F): Likewise.
(VREV16Q): Likewise.
(VCVTAQ): Likewise.
(VMVNQ): Likewise.
(VDUPQ_N): Likewise.
(VCLZQ): Likewise.
(VADDVQ): Likewise.
(VREV32Q): Likewise.
(VMOVLBQ): Likewise.
(VMOVLTQ): Likewise.
(VCVTPQ): Likewise.
(VCVTNQ): Likewise.
(VCVTMQ): Likewise.
(VADDLVQ): Likewise.
(VCTPQ): Likewise.
(VCTPQ_M): Likewise.
(VCVTQ_N_TO_F): Likewise.
(VCREATEQ): Likewise.
(VSHRQ_N): Likewise.
(VCVTQ_N_FROM_F): Likewise.
(VADDLVQ_P): Likewise.
(VCMPNEQ): Likewise.
(VSHLQ): Likewise.
(VABDQ): Likewise.
(VADDQ_N): Likewise.
(VADDVAQ): Likewise.
(VADDVQ_P): Likewise.
(VANDQ): Likewise.
(VBICQ): Likewise.
(VBRSRQ_N): Likewise.
(VCADDQ_ROT270): Likewise.
(VCADDQ_ROT90): Likewise.
(VCMPEQQ): Likewise.
(VCMPEQQ_N): Likewise.
(VCMPNEQ_N): Likewise.
(VEORQ): Likewise.
(VHADDQ): Likewise.
(VHADDQ_N): Likewise.
(VHSUBQ): Likewise.
(VHSUBQ_N): Likewise.
(VMAXQ): Likewise.
(VMAXVQ): Likewise.
(VMINQ): Likewise.
(VMINVQ): Likewise.
(VMLADAVQ): Likewise.
(VMULHQ): Likewise.
(VMULLBQ_INT): Likewise.
(VMULLTQ_INT): Likewise.
(VMULQ): Likewise.
(VMULQ_N): Likewise.
(VORNQ): Likewise.
(VORRQ): Likewise.
(VQADDQ): Likewise.
(VQADDQ_N): Likewise.
(VQRSHLQ): Likewise.
(VQRSHLQ_N): Likewise.
(VQSHLQ): Likewise.
(VQSHLQ_N): Likewise.
(VQSHLQ_R): Likewise.
(VQSUBQ): Likewise.
(VQSUBQ_N): Likewise.
(VRHADDQ): Likewise.
(VRMULHQ): Likewise.
(VRSHLQ): Likewise.
(VRSHLQ_N): Likewise.
(VRSHRQ_N): Likewise.
(VSHLQ_N): Likewise.
(VSHLQ_R): Likewise.
(VSUBQ): Likewise.
(VSUBQ_N): Likewise.
(VADDLVAQ): Likewise.
(VBICQ_N): Likewise.
(VMLALDAVQ): Likewise.
(VMLALDAVXQ): Likewise.
(VMOVNBQ): Likewise.
(VMOVNTQ): Likewise.
(VORRQ_N): Likewise.
(VQMOVNBQ): Likewise.
(VQMOVNTQ): Likewise.
(VSHLLBQ_N): Likewise.
(VSHLLTQ_N): Likewise.
(VRMLALDAVHQ): Likewise.
(VBICQ_M_N): Likewise.
(VCVTAQ_M): Likewise.
(VCVTQ_M_TO_F): Likewise.
(VQRSHRNBQ_N): Likewise.
(VABAVQ): Likewise.
(VSHLCQ): Likewise.
(VRMLALDAVHAQ): Likewise.
(VADDVAQ_P): Likewise.
(VCLZQ_M): Likewise.
(VCMPEQQ_M_N): Likewise.
(VCMPEQQ_M): Likewise.
(VCMPNEQ_M_N): Likewise.
(VCMPNEQ_M): Likewise.
(VDUPQ_M_N): Likewise.
(VMAXVQ_P): Likewise.
(VMINVQ_P): Likewise.
(VMLADAVAQ): Likewise.
(VMLADAVQ_P): Likewise.
(VMLAQ_N): Likewise.
(VMLASQ_N): Likewise.
(VMVNQ_M): Likewise.
(VPSELQ): Likewise.
(VQDMLAHQ_N): Likewise.
(VQRDMLAHQ_N): Likewise.
(VQRDMLASHQ_N): Likewise.
(VQRSHLQ_M_N): Likewise.
(VQSHLQ_M_R): Likewise.
(VREV64Q_M): Likewise.
(VRSHLQ_M_N): Likewise.
(VSHLQ_M_R): Likewise.
(VSLIQ_N): Likewise.
(VSRIQ_N): Likewise.
(VMLALDAVQ_P): Likewise.
(VQMOVNBQ_M): Likewise.
(VMOVLTQ_M): Likewise.
(VMOVNBQ_M): Likewise.
(VRSHRNTQ_N): Likewise.
(VORRQ_M_N): Likewise.
(VREV32Q_M): Likewise.
(VREV16Q_M): Likewise.
(VQRSHRNTQ_N): Likewise.
(VMOVNTQ_M): Likewise.
(VMOVLBQ_M): Likewise.
(VMLALDAVAQ): Likewise.
(VQSHRNBQ_N): Likewise.
(VSHRNBQ_N): Likewise.
(VRSHRNBQ_N): Likewise.
(VMLALDAVXQ_P): Likewise.
(VQMOVNTQ_M): Likewise.
(VMVNQ_M_N): Likewise.
(VQSHRNTQ_N): Likewise.
(VMLALDAVAXQ): Likewise.
(VSHRNTQ_N): Likewise.
(VCVTMQ_M): Likewise.
(VCVTNQ_M): Likewise.
(VCVTPQ_M): Likewise.
(VCVTQ_M_N_FROM_F): Likewise.
(VCVTQ_M_FROM_F): Likewise.
(VRMLALDAVHQ_P): Likewise.
(VADDLVAQ_P): Likewise.
(VABAVQ_P): Likewise.
(VSHLQ_M): Likewise.
(VSRIQ_M_N): Likewise.
(VSUBQ_M): Likewise.
(VCVTQ_M_N_TO_F): Likewise.
(VHSUBQ_M): Likewise.
(VSLIQ_M_N): Likewise.
(VRSHLQ_M): Likewise.
(VMINQ_M): Likewise.
(VMULLBQ_INT_M): Likewise.
(VMULHQ_M): Likewise.
(VMULQ_M): Likewise.
(VHSUBQ_M_N): Likewise.
(VHADDQ_M_N): Likewise.
(VORRQ_M): Likewise.
(VRMULHQ_M): Likewise.
(VQADDQ_M): Likewise.
(VRSHRQ_M_N): Likewise.
(VQSUBQ_M_N): Likewise.
(VADDQ_M): Likewise.
(VORNQ_M): Likewise.
(VRHADDQ_M): Likewise.
(VQSHLQ_M): Likewise.
(VANDQ_M): Likewise.
(VBICQ_M): Likewise.
(VSHLQ_M_N): Likewise.
(VCADDQ_ROT270_M): Likewise.
(VQRSHLQ_M): Likewise.
(VQADDQ_M_N): Likewise.
(VADDQ_M_N): Likewise.
(VMAXQ_M): Likewise.
(VQSUBQ_M): Likewise.
(VMLASQ_M_N): Likewise.
(VMLADAVAQ_P): Likewise.
(VBRSRQ_M_N): Likewise.
(VMULQ_M_N): Likewise.
(VCADDQ_ROT90_M): Likewise.
(VMULLTQ_INT_M): Likewise.
(VEORQ_M): Likewise.
(VSHRQ_M_N): Likewise.
(VSUBQ_M_N): Likewise.
(VHADDQ_M): Likewise.
(VABDQ_M): Likewise.
(VMLAQ_M_N): Likewise.
(VQSHLQ_M_N): Likewise.
(VMLALDAVAQ_P): Likewise.
(VMLALDAVAXQ_P): Likewise.
(VQRSHRNBQ_M_N): Likewise.
(VQRSHRNTQ_M_N): Likewise.
(VQSHRNBQ_M_N): Likewise.
(VQSHRNTQ_M_N): Likewise.
(VRSHRNBQ_M_N): Likewise.
(VRSHRNTQ_M_N): Likewise.
(VSHLLBQ_M_N): Likewise.
(VSHLLTQ_M_N): Likewise.
(VSHRNBQ_M_N): Likewise.
(VSHRNTQ_M_N): Likewise.
(VSTRWSBQ): Likewise.
(VSTRBSOQ): Likewise.
(VSTRBQ): Likewise.
(VLDRBGOQ): Likewise.
(VLDRBQ): Likewise.
(VLDRWGBQ): Likewise.
(VLD1Q): Likewise.
(VLDRHGOQ): Likewise.
(VLDRHGSOQ): Likewise.
(VLDRHQ): Likewise.
(VLDRWQ): Likewise.
(VLDRDGBQ): Likewise.
(VLDRDGOQ): Likewise.
(VLDRDGSOQ): Likewise.
(VLDRWGOQ): Likewise.
(VLDRWGSOQ): Likewise.
(VST1Q): Likewise.
(VSTRHSOQ): Likewise.
(VSTRHSSOQ): Likewise.
(VSTRHQ): Likewise.
(VSTRWQ): Likewise.
(VSTRDSBQ): Likewise.
(VSTRDSOQ): Likewise.
(VSTRDSSOQ): Likewise.
(VSTRWSOQ): Likewise.
(VSTRWSSOQ): Likewise.
(VSTRWSBWBQ): Likewise.
(VLDRWGBWBQ): Likewise.
(VSTRDSBWBQ): Likewise.
(VLDRDGBWBQ): Likewise.
(VADCIQ): Likewise.
(VADCIQ_M): Likewise.
(VSBCQ): Likewise.
(VSBCQ_M): Likewise.
(VSBCIQ): Likewise.
(VSBCIQ_M): Likewise.
(VADCQ): Likewise.
(VADCQ_M): Likewise.
(UQRSHLLQ): Likewise.
(SQRSHRLQ): Likewise.
(VSHLCQ_M): Likewise.
* config/arm/mve.md (MVE_types): Move mode iterator to iterators.md from mve.md.
(MVE_VLD_ST): Likewise.
(MVE_0): Likewise.
(MVE_1): Likewise.
(MVE_3): Likewise.
(MVE_2): Likewise.
(MVE_5): Likewise.
(MVE_6): Likewise.
(MVE_CNVT): Move mode attribute iterator to iterators.md from mve.md.
(MVE_LANES): Likewise.
(MVE_constraint): Likewise.
(MVE_constraint1): Likewise.
(MVE_constraint2): Likewise.
(MVE_constraint3): Likewise.
(MVE_pred): Likewise.
(MVE_pred1): Likewise.
(MVE_pred2): Likewise.
(MVE_pred3): Likewise.
(MVE_B_ELEM): Likewise.
(MVE_H_ELEM): Likewise.
(V_sz_elem1): Likewise.
(V_extr_elem): Likewise.
(earlyclobber_32): Likewise.
(supf): Move int attribute to iterators.md from mve.md.
(mode1): Likewise.
(VCVTQ_TO_F): Move int iterator to iterators.md from mve.md.
(VMVNQ_N): Likewise.
(VREV64Q): Likewise.
(VCVTQ_FROM_F): Likewise.
(VREV16Q): Likewise.
(VCVTAQ): Likewise.
(VMVNQ): Likewise.
(VDUPQ_N): Likewise.
(VCLZQ): Likewise.
(VADDVQ): Likewise.
(VREV32Q): Likewise.
(VMOVLBQ): Likewise.
(VMOVLTQ): Likewise.
(VCVTPQ): Likewise.
(VCVTNQ): Likewise.
(VCVTMQ): Likewise.
(VADDLVQ): Likewise.
(VCTPQ): Likewise.
(VCTPQ_M): Likewise.
(VCVTQ_N_TO_F): Likewise.
(VCREATEQ): Likewise.
(VSHRQ_N): Likewise.
(VCVTQ_N_FROM_F): Likewise.
(VADDLVQ_P): Likewise.
(VCMPNEQ): Likewise.
(VSHLQ): Likewise.
(VABDQ): Likewise.
(VADDQ_N): Likewise.
(VADDVAQ): Likewise.
(VADDVQ_P): Likewise.
(VANDQ): Likewise.
(VBICQ): Likewise.
(VBRSRQ_N): Likewise.
(VCADDQ_ROT270): Likewise.
(VCADDQ_ROT90): Likewise.
(VCMPEQQ): Likewise.
(VCMPEQQ_N): Likewise.
(VCMPNEQ_N): Likewise.
(VEORQ): Likewise.
(VHADDQ): Likewise.
(VHADDQ_N): Likewise.
(VHSUBQ): Likewise.
(VHSUBQ_N): Likewise.
(VMAXQ): Likewise.
(VMAXVQ): Likewise.
(VMINQ): Likewise.
(VMINVQ): Likewise.
(VMLADAVQ): Likewise.
(VMULHQ): Likewise.
(VMULLBQ_INT): Likewise.
(VMULLTQ_INT): Likewise.
(VMULQ): Likewise.
(VMULQ_N): Likewise.
(VORNQ): Likewise.
(VORRQ): Likewise.
(VQADDQ): Likewise.
(VQADDQ_N): Likewise.
(VQRSHLQ): Likewise.
(VQRSHLQ_N): Likewise.
(VQSHLQ): Likewise.
(VQSHLQ_N): Likewise.
(VQSHLQ_R): Likewise.
(VQSUBQ): Likewise.
(VQSUBQ_N): Likewise.
(VRHADDQ): Likewise.
(VRMULHQ): Likewise.
(VRSHLQ): Likewise.
(VRSHLQ_N): Likewise.
(VRSHRQ_N): Likewise.
(VSHLQ_N): Likewise.
(VSHLQ_R): Likewise.
(VSUBQ): Likewise.
(VSUBQ_N): Likewise.
(VADDLVAQ): Likewise.
(VBICQ_N): Likewise.
(VMLALDAVQ): Likewise.
(VMLALDAVXQ): Likewise.
(VMOVNBQ): Likewise.
(VMOVNTQ): Likewise.
(VORRQ_N): Likewise.
(VQMOVNBQ): Likewise.
(VQMOVNTQ): Likewise.
(VSHLLBQ_N): Likewise.
(VSHLLTQ_N): Likewise.
(VRMLALDAVHQ): Likewise.
(VBICQ_M_N): Likewise.
(VCVTAQ_M): Likewise.
(VCVTQ_M_TO_F): Likewise.
(VQRSHRNBQ_N): Likewise.
(VABAVQ): Likewise.
(VSHLCQ): Likewise.
(VRMLALDAVHAQ): Likewise.
(VADDVAQ_P): Likewise.
(VCLZQ_M): Likewise.
(VCMPEQQ_M_N): Likewise.
(VCMPEQQ_M): Likewise.
(VCMPNEQ_M_N): Likewise.
(VCMPNEQ_M): Likewise.
(VDUPQ_M_N): Likewise.
(VMAXVQ_P): Likewise.
(VMINVQ_P): Likewise.
(VMLADAVAQ): Likewise.
(VMLADAVQ_P): Likewise.
(VMLAQ_N): Likewise.
(VMLASQ_N): Likewise.
(VMVNQ_M): Likewise.
(VPSELQ): Likewise.
(VQDMLAHQ_N): Likewise.
(VQRDMLAHQ_N): Likewise.
(VQRDMLASHQ_N): Likewise.
(VQRSHLQ_M_N): Likewise.
(VQSHLQ_M_R): Likewise.
(VREV64Q_M): Likewise.
(VRSHLQ_M_N): Likewise.
(VSHLQ_M_R): Likewise.
(VSLIQ_N): Likewise.
(VSRIQ_N): Likewise.
(VMLALDAVQ_P): Likewise.
(VQMOVNBQ_M): Likewise.
(VMOVLTQ_M): Likewise.
(VMOVNBQ_M): Likewise.
(VRSHRNTQ_N): Likewise.
(VORRQ_M_N): Likewise.
(VREV32Q_M): Likewise.
(VREV16Q_M): Likewise.
(VQRSHRNTQ_N): Likewise.
(VMOVNTQ_M): Likewise.
(VMOVLBQ_M): Likewise.
(VMLALDAVAQ): Likewise.
(VQSHRNBQ_N): Likewise.
(VSHRNBQ_N): Likewise.
(VRSHRNBQ_N): Likewise.
(VMLALDAVXQ_P): Likewise.
(VQMOVNTQ_M): Likewise.
(VMVNQ_M_N): Likewise.
(VQSHRNTQ_N): Likewise.
(VMLALDAVAXQ): Likewise.
(VSHRNTQ_N): Likewise.
(VCVTMQ_M): Likewise.
(VCVTNQ_M): Likewise.
(VCVTPQ_M): Likewise.
(VCVTQ_M_N_FROM_F): Likewise.
(VCVTQ_M_FROM_F): Likewise.
(VRMLALDAVHQ_P): Likewise.
(VADDLVAQ_P): Likewise.
(VABAVQ_P): Likewise.
(VSHLQ_M): Likewise.
(VSRIQ_M_N): Likewise.
(VSUBQ_M): Likewise.
(VCVTQ_M_N_TO_F): Likewise.
(VHSUBQ_M): Likewise.
(VSLIQ_M_N): Likewise.
(VRSHLQ_M): Likewise.
(VMINQ_M): Likewise.
(VMULLBQ_INT_M): Likewise.
(VMULHQ_M): Likewise.
(VMULQ_M): Likewise.
(VHSUBQ_M_N): Likewise.
(VHADDQ_M_N): Likewise.
(VORRQ_M): Likewise.
(VRMULHQ_M): Likewise.
(VQADDQ_M): Likewise.
(VRSHRQ_M_N): Likewise.
(VQSUBQ_M_N): Likewise.
(VADDQ_M): Likewise.
(VORNQ_M): Likewise.
(VRHADDQ_M): Likewise.
(VQSHLQ_M): Likewise.
(VANDQ_M): Likewise.
(VBICQ_M): Likewise.
(VSHLQ_M_N): Likewise.
(VCADDQ_ROT270_M): Likewise.
(VQRSHLQ_M): Likewise.
(VQADDQ_M_N): Likewise.
(VADDQ_M_N): Likewise.
(VMAXQ_M): Likewise.
(VQSUBQ_M): Likewise.
(VMLASQ_M_N): Likewise.
(VMLADAVAQ_P): Likewise.
(VBRSRQ_M_N): Likewise.
(VMULQ_M_N): Likewise.
(VCADDQ_ROT90_M): Likewise.
(VMULLTQ_INT_M): Likewise.
(VEORQ_M): Likewise.
(VSHRQ_M_N): Likewise.
(VSUBQ_M_N): Likewise.
(VHADDQ_M): Likewise.
(VABDQ_M): Likewise.
(VMLAQ_M_N): Likewise.
(VQSHLQ_M_N): Likewise.
(VMLALDAVAQ_P): Likewise.
(VMLALDAVAXQ_P): Likewise.
(VQRSHRNBQ_M_N): Likewise.
(VQRSHRNTQ_M_N): Likewise.
(VQSHRNBQ_M_N): Likewise.
(VQSHRNTQ_M_N): Likewise.
(VRSHRNBQ_M_N): Likewise.
(VRSHRNTQ_M_N): Likewise.
(VSHLLBQ_M_N): Likewise.
(VSHLLTQ_M_N): Likewise.
(VSHRNBQ_M_N): Likewise.
(VSHRNTQ_M_N): Likewise.
(VSTRWSBQ): Likewise.
(VSTRBSOQ): Likewise.
(VSTRBQ): Likewise.
(VLDRBGOQ): Likewise.
(VLDRBQ): Likewise.
(VLDRWGBQ): Likewise.
(VLD1Q): Likewise.
(VLDRHGOQ): Likewise.
(VLDRHGSOQ): Likewise.
(VLDRHQ): Likewise.
(VLDRWQ): Likewise.
(VLDRDGBQ): Likewise.
(VLDRDGOQ): Likewise.
(VLDRDGSOQ): Likewise.
(VLDRWGOQ): Likewise.
(VLDRWGSOQ): Likewise.
(VST1Q): Likewise.
(VSTRHSOQ): Likewise.
(VSTRHSSOQ): Likewise.
(VSTRHQ): Likewise.
(VSTRWQ): Likewise.
(VSTRDSBQ): Likewise.
(VSTRDSOQ): Likewise.
(VSTRDSSOQ): Likewise.
(VSTRWSOQ): Likewise.
(VSTRWSSOQ): Likewise.
(VSTRWSBWBQ): Likewise.
(VLDRWGBWBQ): Likewise.
(VSTRDSBWBQ): Likewise.
(VLDRDGBWBQ): Likewise.
(VADCIQ): Likewise.
(VADCIQ_M): Likewise.
(VSBCQ): Likewise.
(VSBCQ_M): Likewise.
(VSBCIQ): Likewise.
(VSBCIQ_M): Likewise.
(VADCQ): Likewise.
(VADCQ_M): Likewise.
(UQRSHLLQ): Likewise.
(SQRSHRLQ): Likewise.
(VSHLCQ_M): Likewise.
(define_c_enum "unspec"): Move MVE enumerator to unspecs.md from mve.md.
* config/arm/unspecs.md (define_c_enum "unspec"): Move MVE enumerator from
mve.md to unspecs.md.
Martin Liska [Tue, 6 Oct 2020 09:18:55 +0000 (11:18 +0200)]
dbgcnt: print list after compilation
gcc/ChangeLog:
* common.opt: Remove -fdbg-cnt-list from deferred options.
* dbgcnt.c (dbg_cnt_set_limit_by_index): Make a copy
to original_limits.
(dbg_cnt_list_all_counters): Print also current counter value
and print to stderr.
* opts-global.c (handle_common_deferred_options): Do not handle
-fdbg-cnt-list.
* opts.c (common_handle_option): Likewise.
* toplev.c (finalize): Handle it after compilation here.
Martin Liska [Tue, 6 Oct 2020 08:49:47 +0000 (10:49 +0200)]
dbgcnt: report upper limit when lower == upper
gcc/ChangeLog:
* dbgcnt.c (dbg_cnt): Report also upper limit.
Tobias Burnus [Tue, 6 Oct 2020 09:49:34 +0000 (11:49 +0200)]
configure: Fix in-tree building of GMP on BSD [PR97302]
ChangeLog:
PR target/97302
* configure.ac: Only set with_gmp to /usr/local
if not building in tree.
* configure: Regenerate.
Tom de Vries [Sun, 4 Oct 2020 10:01:34 +0000 (12:01 +0200)]
[ftracer] Add caching of can_duplicate_bb_p
The fix "[omp, ftracer] Don't duplicate blocks in SIMT region" adds iteration
over insns in ignore_bb_p, which makes it more expensive.
Counteract this by piggybacking the computation of can_duplicate_bb_p onto
count_insns, which is called at the start of ftracer.
Bootstrapped and reg-tested on x86_64-linux.
gcc/ChangeLog:
2020-10-05 Tom de Vries <tdevries@suse.de>
* tracer.c (count_insns): Rename to ...
(analyze_bb): ... this.
(cache_can_duplicate_bb_p, cached_can_duplicate_bb_p): New function.
(ignore_bb_p): Use cached_can_duplicate_bb_p.
(tail_duplicate): Call cache_can_duplicate_bb_p.
Tom de Vries [Sun, 4 Oct 2020 11:23:37 +0000 (13:23 +0200)]
[ftracer] Factor out can_duplicate_bb_p
Factor out can_duplicate_bb_p out of ignore_bb_p.
Also factor out can_duplicate_insn_p and can_duplicate_bb_no_insn_iter_p to
expose the parts of can_duplicate_bb_p that are per-bb and per-insn.
Bootstrapped and reg-tested on x86_64-linux.
gcc/ChangeLog:
2020-10-05 Tom de Vries <tdevries@suse.de>
* tracer.c (can_duplicate_insn_p, can_duplicate_bb_no_insn_iter_p)
(can_duplicate_bb_p): New function, factored out of ...
(ignore_bb_p): ... here.
Jonathan Wakely [Tue, 6 Oct 2020 08:41:16 +0000 (09:41 +0100)]
libstdc++: Avoid CTAD for std::ranges::join_view [LWG 3474]
In commit
ef275d1f2083f8a1fa1b59a3cd07fd3e8431023e I implemented the
wrong resolution of LWG 3474. This removes the deduction guide and
alters the views::join factory to create the right type explicitly.
libstdc++-v3/ChangeLog:
* include/std/ranges (join_view): Remove deduction guide.
(views::join): Add explicit template argument list to prevent
deducing the wrong type.
* testsuite/std/ranges/adaptors/join.cc: Move test for LWG 3474
here, from ...
* testsuite/std/ranges/adaptors/join_lwg3474.cc: Removed.
Jakub Jelinek [Tue, 6 Oct 2020 08:32:22 +0000 (10:32 +0200)]
divmod: Match and expand DIVMOD even in some cases of constant divisor [PR97282]
As written in the comment, tree-ssa-math-opts.c wouldn't create a DIVMOD
ifn call for division + modulo by constant for the fear that during
expansion we could generate better code for those cases.
If the divisoris a power of two, that is certainly the case always,
but otherwise expand_divmod can punt in many cases, e.g. if the division
type's precision is above HOST_BITS_PER_WIDE_INT, we don't even call
choose_multiplier, because it works on HOST_WIDE_INTs (true, something
we should fix eventually now that we have wide_ints), or if pre/post shift
is larger than BITS_PER_WORD.
So, the following patch recognizes DIVMOD with constant last argument even
when it is unclear if expand_divmod will be able to optimize it, and then
during DIVMOD expansion if the divisor is constant attempts to expand it as
division + modulo and if they actually don't contain any libcalls or
division/modulo, they are kept as is, otherwise that sequence is thrown away
and divmod optab or libcall is used.
2020-10-06 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/97282
* tree-ssa-math-opts.c (divmod_candidate_p): Don't return false for
constant op2 if it is not a power of two and the type has precision
larger than HOST_BITS_PER_WIDE_INT or BITS_PER_WORD.
* internal-fn.c (contains_call_div_mod): New function.
(expand_DIVMOD): If last argument is a constant, try to expand it as
TRUNC_DIV_EXPR followed by TRUNC_MOD_EXPR, but if the sequence
contains any calls or {,U}{DIV,MOD} rtxes, throw it away and use
divmod optab or divmod libfunc.
* gcc.target/i386/pr97282.c: New test.
Aldy Hernandez [Tue, 6 Oct 2020 06:21:56 +0000 (08:21 +0200)]
Fix off-by-one storage problem in irange_allocator.
gcc/ChangeLog:
* value-range.h (irange_allocator::allocate): Increase
newir storage by one.
Jakub Jelinek [Tue, 6 Oct 2020 07:25:00 +0000 (09:25 +0200)]
openmp: Fix ICE in omp_discover_declare_target_tgt_fn_r
This ICEs because node->alias_target is (not yet) a FUNCTION_DECL, but
IDENTIFIER_NODE.
I guess we should retry the discovery before LTO streaming out, the reason
to do it this early is that it can affect the gimplification and omp lowering.
2020-10-06 Jakub Jelinek <jakub@redhat.com>
PR middle-end/97289
* omp-offload.c (omp_discover_declare_target_tgt_fn_r): Only follow
node->alias_target if it is a FUNCTION_DECL.
* c-c++-common/gomp/pr97289.c: New test.
Joe Ramsay [Tue, 6 Oct 2020 06:33:52 +0000 (07:33 +0100)]
arm: Add +nomve and +nomve.fp options to -mcpu=cortex-m55
This patch rearranges feature bits for MVE and FP to implement the
following flags for -mcpu=cortex-m55.
- +nomve: equivalent to armv8.1-m.main+fp.dp+dsp.
- +nomve.fp: equivalent to armv8.1-m.main+mve+fp.dp (+dsp is implied by +mve).
- +nofp: equivalent to armv8.1-m.main+mve (+dsp is implied by +mve).
- +nodsp: equivalent to armv8.1-m.main+fp.dp.
Combinations of the above:
- +nomve+nofp: equivalent to armv8.1-m.main+dsp.
- +nodsp+nofp: equivalent to armv8.1-m.main.
Due to MVE and FP sharing vfp_base, some new syntax was required in the CPU
description to implement the concept of 'implied bits'. These are non-named
features added to the ISA late, depending on whether one or more features which
depend on them are present. This means vfp_base can be present when only one of
MVE and FP is removed, but absent when both are removed.
gcc/ChangeLog:
2020-07-31 Joe Ramsay <joe.ramsay@arm.com>
* config/arm/arm-cpus.in:
(ALL_FPU_INTERNAL): Remove vfp_base.
(VFPv2): Remove vfp_base.
(MVE): Remove vfp_base.
(vfp_base): Redefine as implied bit dependent on MVE or FP
(cortex-m55): Add flags to disable MVE, MVE FP, FP and DSP extensions.
* config/arm/arm.c (arm_configure_build_target): Add implied bits to ISA.
* config/arm/parsecpu.awk:
(gen_isa): Print implied bits and their dependencies to ISA header.
(gen_data): Add parsing for implied feature bits.
gcc/testsuite/ChangeLog:
* gcc.target/arm/cortex-m55-nodsp-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nodsp-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nofp-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nofp-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nomve-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nomve-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c: New test.
* gcc.target/arm/multilib.exp: Add tests for -mcpu=cortex-m55.
Andreas Krebbel [Tue, 6 Oct 2020 05:56:51 +0000 (07:56 +0200)]
IBM Z: Doc: Add z15/arch13 to the list of -march/-mtune options
gcc/ChangeLog:
* doc/invoke.texi: Add z15/arch13 to the list of documented
-march/-mtune options.
Nikhil Benesch [Sun, 4 Oct 2020 06:03:36 +0000 (02:03 -0400)]
gofrontend: correct file reading logic in Stream_from_file
The implementation of Stream_from_file mishandled several cases:
* It reversed the check for whether bytes were already available in
the peek buffer.
* It considered positive return values from lseek to be an error, when
only a -1 return value indicates an error.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/259437
GCC Administrator [Tue, 6 Oct 2020 00:16:25 +0000 (00:16 +0000)]
Daily bump.
Jonathan Wakely [Mon, 5 Oct 2020 23:05:11 +0000 (00:05 +0100)]
libstdc++: Reduce uses of std::numeric_limits
This avoids unnecessary instantiations of std::numeric_limits or
inclusion of <limits> when a more lightweight alternative would work.
Some uses can be replaced with __gnu_cxx::__int_traits and some can just
use size_t(-1) directly where SIZE_MAX is needed.
libstdc++-v3/ChangeLog:
* include/bits/regex.h: Use __int_traits<int> instead of
std::numeric_limits<int>.
* include/bits/uniform_int_dist.h: Use __int_traits<T>::__max
instead of std::numeric_limits<T>::max().
* include/bits/hashtable_policy.h: Use size_t(-1) instead of
std::numeric_limits<size_t>::max().
* include/std/regex: Include <ext/numeric_traits.h>.
* include/std/string_view: Use typedef for __int_traits<int>.
* src/c++11/hashtable_c++0x.cc: Use size_t(-1) instead of
std::numeric_limits<size_t>::max().
* testsuite/std/ranges/iota/96042.cc: Include <limits>.
* testsuite/std/ranges/iota/difference_type.cc: Likewise.
* testsuite/std/ranges/subrange/96042.cc: Likewise.
Marek Polacek [Mon, 5 Oct 2020 22:06:19 +0000 (18:06 -0400)]
c++: Fix typo in NON_UNION_CLASS_TYPE_P.
gcc/cp/ChangeLog:
* cp-tree.h (NON_UNION_CLASS_TYPE_P): Fix typo in a comment.
Jonathan Wakely [Mon, 5 Oct 2020 21:45:27 +0000 (22:45 +0100)]
libstdc++: Minor header cleanup in <numeric>
When adding new features to <numeric> I included the required headers
adjacent to the new code. This cleans it up by moving all the includes
to the start of the file.
libstdc++-v3/ChangeLog:
* include/std/numeric: Move all #include directives to the top
of the header.
* testsuite/26_numerics/gcd/gcd_neg.cc: Adjust dg-error line
numbers.
* testsuite/26_numerics/lcm/lcm_neg.cc: Likewise.
Aldy Hernandez [Mon, 5 Oct 2020 15:36:13 +0000 (17:36 +0200)]
Cleanup legacy_union and legacy intersect in value_range.
These are cleanups so that multi-range union/intersect doesn't
have to deal with legacy code. Instead, these should be done in
legacy mode.
gcc/ChangeLog:
* value-range.cc (irange::legacy_intersect): Only handle
legacy ranges.
(irange::legacy_union): Same.
(irange::union_): When unioning legacy with non-legacy,
first convert to legacy and do everything in legacy mode.
(irange::intersect): Same, but for intersect.
* range-op.cc (range_tests): Adjust for above changes.
Aldy Hernandez [Mon, 5 Oct 2020 15:08:11 +0000 (17:08 +0200)]
Import various range-op fixes from ranger branch.
This patch imports three fixes from the ranger branch:
1. Fold division by zero into varying instead of undefined.
This provides compatibility with existing stuff on trunk.
2. Solver changes for lshift.
This should not affect anything on trunk, as it only involves
the GORI solver which is yet to be contributed.
3. Preserve existing behavior for ABS([-MIN,-MIN]).
This is actually unrepresentable, but trunk has traditionally
treated this as [-MIN,-MIN] so this patch just syncs range-ops
with the rest of trunk.
gcc/ChangeLog:
* range-op.cc (operator_div::wi_fold): Return varying for
division by zero.
(class operator_rshift): Move class up.
(operator_abs::wi_fold): Return [-MIN,-MIN] for ABS([-MIN,-MIN]).
(operator_tests): Adjust tests.
Jakub Jelinek [Mon, 5 Oct 2020 16:33:17 +0000 (18:33 +0200)]
support TARGET_MEM_REF in C/C++ error pretty-printing [PR97197]
> See my comment above for Martins attempts to improve things. I don't
> really want to try decide what to do with those late diagnostic IL
> printing but my commit was blamed for showing target-mem-ref unsupported.
>
> I don't have much time to spend to think what to best print and what not,
> but yes, printing only the MEM_REF part is certainly imprecise.
Here is an updated version of the patch that prints TARGET_MEM_REF the way
it should be printed - as C representation of what it actually means.
Of course it would be better to have the original expressions, but with the
late diagnostics we no longer have them.
2020-10-05 Richard Biener <rguenther@suse.de>
Jakub Jelinek <jakub@redhat.com>
PR c++/97197
gcc/cp/
* error.c (dump_expr): Handle TARGET_MEM_REF.
gcc/c-family/
* c-pretty-print.c: Include langhooks.h.
(c_pretty_printer::postfix_expression): Handle TARGET_MEM_REF as
expression.
(c_pretty_printer::expression): Handle TARGET_MEM_REF as
unary_expression.
(c_pretty_printer::unary_expression): Handle TARGET_MEM_REF.
Jonathan Wakely [Mon, 5 Oct 2020 14:16:58 +0000 (15:16 +0100)]
libstdc++: Make allocators throw bad_array_new_length on overflow [LWG 3190]
std::allocator and std::pmr::polymorphic_allocator should throw
std::bad_array_new_length from their allocate member functions if the
number of bytes required cannot be represented in std::size_t.
libstdc++-v3/ChangeLog:
* config/abi/pre/gnu.ver: Add new symbol.
* include/bits/functexcept.h (__throw_bad_array_new_length):
Declare new function.
* include/ext/malloc_allocator.h (malloc_allocator::allocate):
Throw bad_array_new_length for impossible sizes (LWG 3190).
* include/ext/new_allocator.h (new_allocator::allocate):
Likewise.
* include/std/memory_resource (polymorphic_allocator::allocate)
(polymorphic_allocator::allocate_object): Use new function,
__throw_bad_array_new_length.
* src/c++11/functexcept.cc (__throw_bad_array_new_length):
Define.
* testsuite/20_util/allocator/lwg3190.cc: New test.
Tom de Vries [Mon, 5 Oct 2020 12:26:04 +0000 (14:26 +0200)]
[omp, ftracer] Ignore IFN_GOMP_SIMT_XCHG_* in ignore_bb_p
As IFN_GOMP_SIMT_XCHG_* are part of the group marked by
IFN_GOMP_SIMT_ENTER_ALLOC/IFN_GOMP_SIMT_EXIT, handle them conservatively
in ignore_bb_p.
Build on x86_64-linux with nvptx accelerator, tested with libgomp.
gcc/ChangeLog:
2020-10-05 Tom de Vries <tdevries@suse.de>
* tracer.c (ignore_bb_p): Ignore GOMP_SIMT_XCHG_*.
Nathan Sidwell [Mon, 5 Oct 2020 13:36:38 +0000 (06:36 -0700)]
c++: Make spell corrections consistent
My change to namespace-scope spell corrections ignored the issue that
different targets might have different builtins, and therefore perturb
iteration order. This fixes it by using an intermediate array of
identifier, which we sort before considering.
gcc/cp/
* name-lookup.c (maybe_add_fuzzy_decl): New.
(maybe_add_fuzzy_binding): New.
(consider_binding_level): Use intermediate sortable vector for
namespace bindings.
gcc/testsuite/
* c-c++-common/spellcheck-reserved.c: Restore diagnostic.
Alex Coplan [Mon, 5 Oct 2020 12:45:24 +0000 (13:45 +0100)]
arm: Add missing part number for Neoverse V1
This patch adds vendor and part numbers which were missing from the
initial entry for Neoverse V1 in AArch32 GCC.
gcc/ChangeLog:
* config/arm/arm-cpus.in (neoverse-v1): Add missing vendor and
part numbers.
Tom de Vries [Mon, 5 Oct 2020 12:03:34 +0000 (14:03 +0200)]
[omp, ftracer] Remove incorrect suggestion in ignore_bb_p
In commit
ab3f4b27abe "[omp, ftracer] Don't duplicate blocks in SIMT region" I
added a comment in ignore_bb_p suggesting a reordering of SIMT_VOTE_ANY and
SIMT_EXIT, which is not possible since VOTE_ANY may have data dependencies to
storage that is deallocated by SIMT_EXIT.
I've now opened a PR (PR97291) to describe the problem the reordering was
intended to fix.
Remove the incorrect suggestion.
gcc/ChangeLog:
2020-10-05 Tom de Vries <tdevries@suse.de>
* tracer.c (ignore_bb_p): Remove incorrect suggestion.
projects / platform / upstream / gcc.git / log