Dan Gohman [Fri, 20 May 2022 22:16:10 +0000 (15:16 -0700)]
[WebAssembly] Strip TLS when "atomics" is not enabled
With
f3b4f99007cdcb3306484c9a39d31addc20aaa69, the exclusive source of
truth for whether threads are supported is the -matomics flag.
Accordingly, strip TLS flags when -matomic is not specified, even if
bulk-memory is specified and it would theoretically be supportable.
This allows the backend to compile TLS variables when -mbulk-memory is
enabled but threads are not enabled.
Differential Revision: https://reviews.llvm.org/D125730
Jim Ingham [Fri, 20 May 2022 22:14:26 +0000 (15:14 -0700)]
Convert the test file for TestIgnoredExceptions.py to the mach_vm API.
The previous version of this test uses mprotect, and that seemed to be
flakey on older systems. I converted the test to use the underlying
mach_vm API's. The test only runs on Darwin anyway, so this is not a
real limitation, and I'm hoping the lower level API's work more
consistently.
Alex Brachet [Fri, 20 May 2022 21:39:16 +0000 (21:39 +0000)]
[lld-macho] Stop crash when emitting personalities with -dead_strip
The <internal> symbol was tripping an assertion in getVA() because it
was not marked as used. Per the comment above that symbols creation,
dead stripping has already occurred so marking this symbol as used is
accurate.
Fixes https://github.com/llvm/llvm-project/issues/55565
Differential revision: https://reviews.llvm.org/D126072
Bixia Zheng [Thu, 19 May 2022 22:18:50 +0000 (15:18 -0700)]
[mlir][sparse] Support more complex operations.
Add complex operations abs, neg, sin, log1p, sub and div.
Add test cases.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D126027
Shilei Tian [Fri, 20 May 2022 21:25:14 +0000 (17:25 -0400)]
[NVPTX] Enable AtomicExpandPass for NVPTX
This patch enables `AtomicExpandPass` for NVPTX.
Depend on D125652.
Reviewed By: tra
Differential Revision: https://reviews.llvm.org/D125639
Shilei Tian [Fri, 20 May 2022 21:23:34 +0000 (17:23 -0400)]
[LLVM] Add a check if should cast atomic operations to integer type
Currently for atomic load, store, and rmw instructions, as long as the
operand is floating-point value, they are casted to integer. Nowadays many
targets can actually support part of atomic operations with floating-point
operands. For example, NVPTX supports atomic load and store of floating-point
values. This patch adds a series interface functions `shouldCastAtomicXXXInIR`,
and the default implementations are same as what we currently do. Later for
targets can have their specialization.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D125652
Mitch Phillips [Fri, 20 May 2022 21:21:58 +0000 (14:21 -0700)]
PPC+TSan whack-a-mole, round 3.
More details in https://reviews.llvm.org/D110552.
Last try until I revert the whole shenanigans.
Jonas Devlieghere [Fri, 20 May 2022 21:04:09 +0000 (14:04 -0700)]
[lldb] Fix spurious assertion in PrintCommandOutput
When the string passed to PrintCommandOutput doesn't end with a newline,
`written` will exceed `size` and result in an lldbassert.
After
8e776bb660dda6c51ce7ca6cea641db1f47aa9cf we don't really need
written anymore and we can check whether `str` is empty instead. This
patch simplifies the code and removes the assert that's no longer
relevant.
Differential revision: https://reviews.llvm.org/D126081
Will Hawkins [Fri, 20 May 2022 20:50:42 +0000 (13:50 -0700)]
[lldb] Consider binary as module of last resort
When setting an address breakpoint using a non-section address in lldb
before having ever run the program, the binary itself is not considered
a module. As a result, the breakpoint is unresolved (and never gets
resolved subsequently).
This patch changes that behavior: as a last resort, the binary is
considered as a module when resolving a non-section address breakpoint.
Differential revision: https://reviews.llvm.org/D124731
Mitch Phillips [Fri, 20 May 2022 20:56:25 +0000 (13:56 -0700)]
Add 'ppc' as a target (for both 32- and 64-bit ppc).
Needed for a TSan test that won't pass on PPC. Relevant information is
in https://reviews.llvm.org/D110552.
Michael Kruse [Thu, 19 May 2022 21:52:58 +0000 (16:52 -0500)]
[OpenMP] Fix partial unrolling off-by-one.
Even though the comment description is ".unroll_inner.iv < NumIterations", the code emitted a BO_LE ('<=') operator for the inner loop that is to be unrolled. This lead to one additional copy of the body code in a partially unrolled. It only manifests when the unrolled loop is consumed by another loop-associated construct. Fix by using the BO_LT operator instead.
The condition for the outer loop and the corresponding code for tiling correctly used BO_LT already.
Fixes #55236
Aaron Ballman [Fri, 20 May 2022 20:03:20 +0000 (16:03 -0400)]
Add a page to track C defect report status
We currently have a page for tracking defects against the C++ standard,
but we don't have the same information for the C standard. This starts
us down the path of being able to track that in a way our users can see.
There are *a lot* of entries marked as "Unknown". As we validate
Clang's behavior for a given DR by adding a test case for it, we can
slowly begin to improve this page over time.
This page is now linked from the existing C status page, which was
updated slightly as a result of these changes as well.
Note, unlike with the C++ defect report page, this content is not auto-
generated from a source document and is not automatically updated from
test comments. It may be worthwhile to automate the updates based on
our test coverage, but that can happen later.
Mitch Phillips [Fri, 20 May 2022 20:06:44 +0000 (13:06 -0700)]
Mark new TSan test as unsupported on PPC.
Notably fails under PPC. For now, just exclude it. More details in the
original Phabricator review, https://reviews.llvm.org/D110552.
Balazs Benics [Fri, 20 May 2022 19:41:25 +0000 (21:41 +0200)]
[clang-tidy] modernize-deprecated-headers should ignore system headers
The end-user has no way of 'fixing' bugs in the system library anyway.
Let's suppress these as well.
Reviewed By: LegalizeAdulthood
Differential Revision: https://reviews.llvm.org/D125770
Balazs Benics [Fri, 20 May 2022 19:41:25 +0000 (21:41 +0200)]
[clang-tidy] Introduce the WarnIntoHeaders option to modernize-deprecated-headers
Unfortunately, we must restrict the checker to warn for deprecated headers
only if the header is included directly from a c++ source file.
For header files, we cannot know if the project has a C source file
that also directly/indirectly includes the offending header file
otherwise. Thus, it's better to be on the safe side and suppress those
reports.
One can opt-in the old behavior, emitting diagnostics into header files,
if one explicitly sets the WarnIntoHeaders=true, in which case nothing
will be changed.
Reviewed By: LegalizeAdulthood
Differential Revision: https://reviews.llvm.org/D125769
Joseph Huber [Fri, 20 May 2022 19:37:55 +0000 (15:37 -0400)]
[Libomptarget] Add branch prediction intrinsic to state check
Summary:
We usually used the `OMP_LIKELY` and `OMP_UNLIKELY` macros to add branch
prediction intrinsics to help the optimizer ignore unlikely loops. This
wasn't applied to this one loop so add that in.
Balazs Benics [Fri, 20 May 2022 19:12:39 +0000 (21:12 +0200)]
Reland "[clang-tidy] modernize-deprecated-headers check should respect extern "C" blocks""
This partially reverts commit
e8cae487022c2216182ae1ec24f248f287a614b7.
Changes since that commit:
- Use `SourceManager::isBeforeInTranslationUnit` instead of the fancy
decomposed decl logarithmic search.
- Add a test for including a system header containing a deprecated
include.
- Add `REQUIRES: system-linux` clause to the test.
Reviewed By: LegalizeAdulthood, whisperity
Differential Revision: https://reviews.llvm.org/D125209
Zequan Wu [Mon, 16 May 2022 20:01:28 +0000 (13:01 -0700)]
[CodeView] Combine variable def ranges that are continuous.
It saves about 1.13% size for chrome.dll.pdb on chrome official build.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D125721
Bill Wendling [Fri, 20 May 2022 19:02:26 +0000 (12:02 -0700)]
[AArch64] Use proper instruction mnemonics for FPRs
The FPR128 regs need MOVIv2d_ns and SVE regs need DUP_ZI_D.
Differential Revision: https://reviews.llvm.org/D126083
Alexander Shaposhnikov [Fri, 20 May 2022 18:39:21 +0000 (18:39 +0000)]
Recommit "[ConstantRange] Improve the implementation of binaryOr"
This recommits https://reviews.llvm.org/rG6990e7477d24ff585ae86549f5280f0be65422a6
as the problematic test has been updated updated in
https://reviews.llvm.org/rG3bd112c720dc614a59e3f34ebf9b45075037bfa0.
Jim Ingham [Fri, 20 May 2022 18:36:55 +0000 (11:36 -0700)]
Add some diagnostics to diagnose bot-only failures for TestIgnoredExceptions.py
The test for commit
bff4673b41781ec5bff6b96b52cf321d2271726c is failing on the
GreenDragon bot but none of us can repro the failure locally. Adding some logging
to the test failure to help diagnose the issue.
Sam McCall [Fri, 20 May 2022 18:29:47 +0000 (20:29 +0200)]
Avoid uninitialized Diag.ID (which we pass but never read)
Mitch Phillips [Fri, 20 May 2022 18:25:29 +0000 (11:25 -0700)]
Fix up fuzzing test on Windows.
3bd112c720dc fixed the fuzzing test on Linux, which, after
https://reviews.llvm.org/D125933, has one less branch. Turns out, on
Windows, that it still has the extra branch. I'm guessing that's because
exit() isn't known to be noreturn on Windows or something.
Either way, just make the test more tolerant.
Adrian Prantl [Fri, 20 May 2022 18:24:24 +0000 (11:24 -0700)]
Adapt C++ std::string dataformatter for D125496
https://reviews.llvm.org/D125496 changed the layout of std::string
without updating the LLDB dataformatter. This patch adds code to
recognize the new format.
Differential Revision: https://reviews.llvm.org/D126080
Mitch Phillips [Fri, 20 May 2022 17:59:29 +0000 (10:59 -0700)]
Update fuzzing test to comply with new optimisation.
https://reviews.llvm.org/D125933 improved some of LLVM's handling of
binary ORs, which meant we have one less conditional branch, because the
'if (Size > 5 && Data[5] == 'R')' and 'if (bits == 63)' branches are now
correctly folded.
Douglas Yung [Fri, 20 May 2022 17:21:24 +0000 (10:21 -0700)]
Revert "[ConstantRange] Improve the implementation of binaryOr"
This reverts commit
6990e7477d24ff585ae86549f5280f0be65422a6.
This change was causing the test compiler-rt/test/fuzzer/merge_two_step.test to fail on
our internal bot as well as other build bots such as https://lab.llvm.org/buildbot/#/builders/179/builds/3712.
Craig Topper [Fri, 20 May 2022 17:23:12 +0000 (10:23 -0700)]
[InstructionSimplify] Remove multiple 'break' after 'return'. NFC
Philip Reames [Fri, 20 May 2022 17:05:55 +0000 (10:05 -0700)]
[RISCV] Add initial test coverage for LSR
Establish the most basic possible test coverage for LSR transformation on RISCV.
Original patch by eopXD (D123458), modified by me to cleanup/simplify tests.
Nico Weber [Fri, 20 May 2022 17:13:37 +0000 (13:13 -0400)]
[gn build] (manually) port
480dcdc8975d8 (llvm-ifs OptTable)
Christopher Bate [Fri, 20 May 2022 16:44:31 +0000 (10:44 -0600)]
[mlir] Add missing NVGPU link dependency to VectorToGPU
The missing link dependency caused build failures in some
configurations.
Jonas Devlieghere [Fri, 20 May 2022 16:27:44 +0000 (09:27 -0700)]
[lldb] Set correct register number for cpsr (GENERIC_REGNUM_FLAGS)
Report the correct register number (GENERIC_REGNUM_FLAGS) for cpsr. This
fixes TestLldbGdbServer.py on Apple Silicon.
Differential revision: https://reviews.llvm.org/D126076
Craig Topper [Fri, 20 May 2022 04:19:12 +0000 (21:19 -0700)]
[TypePromotion] Fix another case for sext vs zext in promoted constant.
If the SafeWrap operation is a subtract, we negated the constant
to treat the subtract as an addition. The sext was based on the
operation being addition. So we really need to do (neg (sext (neg C)))
when promoting the constant. This is equivalent to (sext C) for
every value of C except the min signed value. For min signed value
we need to do (zext C) instead.
Fixes PR55490.
Differential Revision: https://reviews.llvm.org/D125653
Qiongsi Wu [Fri, 20 May 2022 14:12:14 +0000 (10:12 -0400)]
[clang] Fixing arm-common, windows only and openmp header install targets
https://reviews.llvm.org/D123498 contains a few errors resulting in incorrect target contents or mismatched target/list names. This patch fixes all the known errors.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D126002
Jay Foad [Thu, 19 May 2022 16:46:54 +0000 (17:46 +0100)]
[AMDGPU] Mark SMEM cache invalidations as not reading memory
This brings the MachineInstrs in line with the corresponding intrinsics
which have side effects but do not access memory. It also matches how
BUF cache invalidation instructions are defined.
The lit test changes are just because the machine scheduler previously
treated them like loads, and added an artificial scheduling edge from
them to the exit SU, which caused them to be scheduled earlier.
Differential Revision: https://reviews.llvm.org/D126074
Dmitri Gribenko [Fri, 20 May 2022 15:45:45 +0000 (17:45 +0200)]
Use the public clang::Builtin API in the unit test
Dmitri Gribenko [Fri, 20 May 2022 16:08:29 +0000 (18:08 +0200)]
Adjust BUILD files for [ifs] Switch to using OptTable
Dmitri Gribenko [Fri, 20 May 2022 16:03:20 +0000 (18:03 +0200)]
Adjust BUILD files for [MLIR][GPU] Add NvGpu mma.sync path to the VectorToGPU pass
Aart Bik [Fri, 20 May 2022 02:33:33 +0000 (19:33 -0700)]
[mlir][sparse] add support for complex zero/one building
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D126039
David Goldman [Thu, 28 Apr 2022 19:13:21 +0000 (15:13 -0400)]
[clangd][ObjC] Filter ObjC method completions on the remaining selector
Previously, clangd would filter completions only on the first part of
the selector (first typed chunk) instead of all remaining selector
fragments (all typed chunks).
Differential Revision: https://reviews.llvm.org/D124637
Christopher Bate [Tue, 17 May 2022 23:54:29 +0000 (17:54 -0600)]
[MLIR][GPU] Add NvGpu mma.sync path to the VectorToGPU pass
This changes adds the option to lower to NvGpu dialect ops during the
VectorToGPU convsersion pass. Because this transformation reuses
existing VectorToGPU logic, a seperate VectorToNvGpu conversion pass is
not created. The option `use-nvgpu` is added to the VectorToGPU pass.
When this is true, the pass will attempt to convert slices rooted at
`vector.contract` operations into `nvgpu.mma.sync` ops, and
`vector.transfer_read` ops are converted to either `nvgpu.ldmatrix` or
one or more `vector.load` operations. The specific data loaded will
depend on the thread id within a subgroup (warp). These index
calculations depend on data type and shape of the MMA op
according to the downstream PTX specification. The code for supporting
these details is separated into `NvGpuSupport.cpp|h`.
Differential Revision: https://reviews.llvm.org/D122940
Alex Brachet [Fri, 20 May 2022 15:28:18 +0000 (15:28 +0000)]
[ifs] Switch to using OptTable
Differential revision: https://reviews.llvm.org/D125658
Nabeel Omer [Fri, 20 May 2022 14:24:09 +0000 (15:24 +0100)]
[X86] Add tests for FREM
Introduces basic test coverage for frem on x86.
Split off from https://reviews.llvm.org/D125988
Differential Revision: https://reviews.llvm.org/D126055
Jonas Devlieghere [Fri, 20 May 2022 15:24:42 +0000 (08:24 -0700)]
[lldb] Disable scripted_crashlog_json.test on Apple Silicon
Disable scripted_crashlog_json.test on Apple Silicon until Ismail has
bandwidth to investigate.
rdar://
93655633
Jay Foad [Fri, 20 May 2022 12:23:53 +0000 (13:23 +0100)]
[AMDGPU] Handle mandatory literals in isOperandLegal
Extend SIInstrInfo::isOperandLegal to enforce a limit on the number of
literal operands for all VALU instructions, not just VOP3. In particular
it now handles VOP2 instructions with a mandatory literal operand like
V_FMAAK_F32.
Differential Revision: https://reviews.llvm.org/D126064
Jay Foad [Fri, 20 May 2022 12:06:03 +0000 (13:06 +0100)]
[AMDGPU] Add verification for mandatory literals
Extend the literal operand checking in SIInstrInfo::verifyInstruction to
check VOP2 instructions like V_FMAAK_F32 which have a mandatory literal
operand. The rule is that src0 can also be a literal, but only if it is
the same literal value.
AMDGPUAsmParser::validateConstantBusLimitations already handles this
correctly.
Differential Revision: https://reviews.llvm.org/D126063
Dmitri Gribenko [Fri, 20 May 2022 15:11:18 +0000 (17:11 +0200)]
Fix an unused variable warning in no-asserts build mode
Nikolas Klauser [Thu, 19 May 2022 11:10:37 +0000 (13:10 +0200)]
[libc++] Use _LIBCPP_ASSERT by default for _PSTL_ASSERTions
Reviewed By: ldionne, #libc
Spies: jwakely, rodgert, libcxx-commits
Differential Revision: https://reviews.llvm.org/D125634
Guillaume Chatelet [Fri, 20 May 2022 14:37:17 +0000 (14:37 +0000)]
Revert "[libc] Apply no-builtin everywhere, remove unnecessary flags"
This reverts commit
94d6dd90576637fa0eb2c40ca92320ad4c1a6942.
Sam McCall [Fri, 20 May 2022 13:09:53 +0000 (15:09 +0200)]
[clangd] Provide links to clang-tidy and include-cleaner diagnostic docs
LSP supports Diagnostic.codeInformation since 3.16.
In VSCode, this turns the code (e.g. "unused-includes" or "bugprone-foo") into
a clickable link that opens the docs in a web browser.
Differential Revision: https://reviews.llvm.org/D126065
Tobias Hieta [Fri, 20 May 2022 14:11:02 +0000 (16:11 +0200)]
[clang-format] Don't break lines after pragma region
We have autogenerated pragma regions in our code
which where awkwardly broken up like this:
```
#pragma region foo(bar : hello)
```
becomes
```
#pragma region foo(bar \
: hello)
```
This fixes the problem by adding region as a keyword
and handling it the same way as pragma mark
Reviewed By: curdeius
Differential Revision: https://reviews.llvm.org/D125961
Balazs Benics [Fri, 20 May 2022 14:06:46 +0000 (16:06 +0200)]
[analyzer][NFC] Remove the unused LocAsInteger::getPersistentLoc()
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D125920
Stephen Long [Fri, 20 May 2022 13:41:37 +0000 (06:41 -0700)]
[clang] Honor __attribute__((no_builtin("foo"))) on functions
Support for `__attribute__((no_builtin("foo")))` was added in https://reviews.llvm.org/D68028,
but builtins were still being used even when the attribute was placed on a function.
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D124701
Louis Dionne [Wed, 18 May 2022 17:17:14 +0000 (13:17 -0400)]
[libc++] Improve error messages for disabled modes
We should not surface CMake-level options like LIBCXX_ENABLE_FILESYSTEM
to our users, since they don't know what it means. Instead, use a slightly
more general wording.
Also, add an error in <ios> to improve the quality of errors for people
trying to use <iostream> when localization is disabled.
Differential Revision: https://reviews.llvm.org/D125910
Louis Dionne [Thu, 19 May 2022 15:16:37 +0000 (11:16 -0400)]
[libunwind] Introduce a cmake-bridge.cfg.in file to reduce test config duplication
Differential Revision: https://reviews.llvm.org/D125981
Louis Dionne [Fri, 20 May 2022 13:35:44 +0000 (09:35 -0400)]
[libc++abi] Add missing XFAIL on test
Erich Keane [Fri, 20 May 2022 13:20:13 +0000 (06:20 -0700)]
Fix test from df2a4e to work with 32 bit windows targets.
32 Bit windows includes attribute 'thiscall' on member functions as a
default calling convention. This test was not written in a way that
works with that, so added wildcards so it is tolerant of it.
J. Ryan Stinnett [Mon, 9 May 2022 14:45:56 +0000 (15:45 +0100)]
[DebugInfo][NFC] Add instr-ref documentation, migration guide
This used to be D102158, but all the code it describes got re-written, so I
figured I'd take another shot at documenting the new instruction referencing
variable locations, this time from a higher level. Happily there's no longer any
need to describe LiveDebugValues in any detail seeing how it's all SSA-based
now.
Probably the most important part is the explanation of what targets need to do
to support instruction referencing. The list is small, mostly because there's
nothing especially complicated that targets need to do: just instrument their
target-specific optimisations and implement the stack spill/restore recognition
target hooks.
This is a small amount of text (which is a virtue), I'm extremely happy to
expand on anything.
Differential Revision: https://reviews.llvm.org/D113586
Co-authored-by: Jeremy Morse <jeremy.morse@sony.com>
Sanjay Patel [Fri, 20 May 2022 13:07:21 +0000 (09:07 -0400)]
[InstCombine] add use check to fold of bitwise logic with cast ops
This was shown as a potential regression in D126040.
Sanjay Patel [Fri, 20 May 2022 13:01:41 +0000 (09:01 -0400)]
[InstCombine] add casted bitwise logic tests to show missing use check; NFC
While here, update the auto-generated checks to also check
the match the function parameters - there was a potential
miscompile that would go unnoticed with the more lenient
check lines.
Alexey Bataev [Wed, 4 Aug 2021 17:58:37 +0000 (10:58 -0700)]
[SLP]Do not emit extract elements for insertelements users, replace with shuffles directly.
SLP vectorizer emits extracts for externally used vectorized scalars and
estimates the cost for each such extract. But in many cases these
scalars are input for insertelement instructions, forming buildvector,
and instead of extractelement/insertelement pair we can emit/cost
estimate shuffle(s) cost and generate series of shuffles, which can be
further optimized.
Tested using test-suite (+SPEC2017), the tests passed, SLP was able to
generate/vectorize more instructions in many cases and it allowed to reduce
number of re-vectorization attempts (where we could try to vectorize
buildector insertelements again and again).
Differential Revision: https://reviews.llvm.org/D107966
Alexey Bataev [Fri, 20 May 2022 12:31:03 +0000 (05:31 -0700)]
[SLP][NFC]Use SmallPtrSet to avoid n*m complexity, NFC.
Haojian Wu [Mon, 16 May 2022 12:46:09 +0000 (14:46 +0200)]
[clangd] Support UnresolvedUsingTypeLoc AST node in FindTarget.
to make features like hover, go-to-def work when the cursor is on the
UnresolvedUsingTypeLoc.
Differential Revision: https://reviews.llvm.org/D125684
Rahul Anand R [Fri, 20 May 2022 12:41:32 +0000 (13:41 +0100)]
[AArch64] Generate AND in place of CSEL for predicated CTTZ
This patch implements a for a target specific optimization that replaces
the cmp and csel from cttz with an and mask.
Recommitted with a fix for truncated value sizes.
Differential Revision: https://reviews.llvm.org/D123782
Fraser Cormack [Thu, 19 May 2022 10:03:36 +0000 (11:03 +0100)]
[RISCV] Fix logic for determining RVV stack padding
We must add padding when using SP or BP to access stack objects.
Checking whether we're missing FP is not sufficient as stack realignment
uses SP too. The test in D125962 explains the specific issue in more
detail.
Split from D125787.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D125964
Fraser Cormack [Thu, 19 May 2022 09:58:17 +0000 (10:58 +0100)]
[RISCV] Add a test showing overlapping stack offsets with RVV
This test (and its forthcoming fix) was split off from D125787. It shows
that the logic we use to determine when we need to add extra RVV padding
is insufficient.
In this example, we may have a situation involving dynamic stack
alignment -- but no variable-sized objects -- where we have no FP but
must still use SP to index objects. In this case we also need the
extra RVV padding, otherwise objects may overlap. Specifically, the test
shows that the RVV vector object may clobber the lowest callee-save.
|------------------------------| -- <-- Incoming SP
| 4-byte callee-save (ra) |
|------------------------------| -- <-- SP + VLENB*2 + 60
| 4-byte callee-save (s0) |
|------------------------------| -- <-- SP + VLENB*2 + 56 --
| 4-byte callee-save (s9) | |
|------------------------------| -- <-- SP + VLENB*2 + 52 | RVV object(!!)
| VLENB*2 RVV object | |
|------------------------------| -- <-- SP + 56 --
| 4-byte local object |
|------------------------------| -- <-- SP + 32
| Dead area |
|------------------------------| -- <-- InSP - 2*VLENB - 64
| Possibly-zero realignment |
|------------------------------| -- <-- SP (realigned to 32)
This diagram should help show that when SP==InSP -- e.g., when the incoming SP
is 32-byte aligned, subtracting 2*VLENB+64 may keep it that way -- the RVV
object clobbers the spill of s9.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D125962
Kristof Beyls [Fri, 20 May 2022 12:00:53 +0000 (14:00 +0200)]
Minutes for pauth sync-ups have moved to Discourse.
Jay Foad [Fri, 20 May 2022 11:19:59 +0000 (12:19 +0100)]
[AMDGPU] Add a test case for an SIFoldOperands bug
Alexey Katranov [Fri, 20 May 2022 09:03:54 +0000 (11:03 +0200)]
tsan: add lock free stack pattern test
Add a set of tests that iterate over possible combinations of
memory orders for lock free stack implementation.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D110552
Luo, Yuanke [Fri, 20 May 2022 10:26:13 +0000 (18:26 +0800)]
[X86][AMX][NFC] Refactor X86LowerAMXCast.cpp
Change static function to X86LowerAMXCast member function.
Differential Revision: https://reviews.llvm.org/D126058
Dmitry Preobrazhensky [Fri, 20 May 2022 10:58:54 +0000 (13:58 +0300)]
[AMDGPU][MC][GFX8+] Correct SMEM offset parsing
Differential Revision: https://reviews.llvm.org/D125907
Alex Zinenko [Thu, 19 May 2022 14:13:51 +0000 (16:13 +0200)]
[mlir] do not elide dialect prefix for ops with dots in the name
For the hypothetical "a.b.c" op printed within a region that declares "a" as
the default dialect, MLIR would currently elide the "a." prefix and only print
"b.c". However, this becomes ambiguous while parsing as "b.c" may be exist as
the "c" op in the "b" dialect. If it does not, the parsing currently fails. Do
not elide the default dialect if the op name contains further dots to avoid the
ambiguity.
See https://discourse.llvm.org/t/dropping-dialect-prefix-for-ops-with-multiple-dots-in-the-name/62562
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D125975
David Green [Fri, 20 May 2022 10:00:34 +0000 (11:00 +0100)]
[ARM] Cost modelling for MVE vector fptoi_sat
Building on top of D125665, this adds MVE costs for fptosi.sat and
fptoui.sat, providing MVE is available and the types are legal.
Differential Revision: https://reviews.llvm.org/D125666
Caroline Concatto [Thu, 12 May 2022 12:19:50 +0000 (13:19 +0100)]
[AArch64][SME]Tied up ZA operand for accumulate instructions
This patch updates SMEInstrFormats.td to tie up ZA operand for instructions
that accumulate their results into ZA or use part of ZA as input.
Depends on: D125534
Differential Revision: https://reviews.llvm.org/D125537
Caroline Concatto [Fri, 13 May 2022 10:04:08 +0000 (11:04 +0100)]
[AArch64][SME][NFC] Add implicit operands for SME instructions in the disassembly.
This patch simplifies the switch statement in getInstruction to add
implicit operands (register ZA and Immediate equal to zero)
in the SME operands when disassembly.
The register ZA and the zero immediate can be added by checking the operand
in MCInstDesc.
Differential Revision: https://reviews.llvm.org/D125534
Daniil Dudkin [Fri, 20 May 2022 09:11:36 +0000 (12:11 +0300)]
[flang] Fix use-associated false-positive error
For the program provided as the test case flang fired the following
error:
error: Semantic errors in main.f90
error: 'foo' is not a procedure
This change fixes the error by postponing handling of `UseErrorDetails`
from `CharacterizeProcedure` to a later stage.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D125791
Florian Hahn [Fri, 20 May 2022 08:58:40 +0000 (09:58 +0100)]
[LV] Do not LoopSimplify/LCSSA after generating main vector loop.
At the moment LV runs LoopSimplify and reconstructs LCSSA form after
generating the main vector loop and before generating the epilogue
vector loop.
In practice, this adds a new exit block for the scalar loop because the
middle block now also branches to the original exit block of the scalar
loop. It also requires adding a new LCSSA phi in the newly created exit
block.
This complicates things when modeling exit values in VPlan, because we
would need to update the VPlan for the epilogue loop to update the newly
created LCSSA phi node.
But none of that should be necessary, as all analysis requiring
loop-simplify form is already done at this point and LCSSA form of the
original loop is not broken.
Reviewed By: bmahjour
Differential Revision: https://reviews.llvm.org/D125810
Zi Xuan Wu [Fri, 20 May 2022 08:54:23 +0000 (16:54 +0800)]
[NFC][test] Fix the line num of expected-error for CSKY at builtin-alloca-with-align.c
David Green [Fri, 20 May 2022 08:31:00 +0000 (09:31 +0100)]
[AArch64] Fix the generation of BE Nops
Big endian Nops were being generated as d5 03 20 1f fnmadd s21, s30,
s0, s0, getting the bytes of the NOP in the wrong order. This switches
the bytes to not be dependant on the endianness.
Differential Revision: https://reviews.llvm.org/D125980
Jon Chesterfield [Fri, 20 May 2022 07:50:36 +0000 (08:50 +0100)]
[amdgpu] Add amdgpu_kernel calling conv attribute to clang
Allows emitting define amdgpu_kernel void @func() IR from C or C++.
This replaces the current workflow which is to write a stub in opencl that
calls an external C function implemented in C++ combined through llvm-link.
Calling the resulting function still requires a manual implementation of the
ABI from the host side. The primary application is for more rapid debugging
of the amdgpu backend by permuting a C or C++ test file instead of manually
updating an IR file.
Implementation closely follows D54425. Non-amd reviewers from there.
Reviewed By: yaxunl
Differential Revision: https://reviews.llvm.org/D125970
Serge Pavlov [Sun, 15 May 2022 15:35:46 +0000 (22:35 +0700)]
Make CompoundStmtBitfields::NumStmts not a bit-field
Number of statements in CompoundStmt is kept in a bit-field of the common
part of Stmt. The field has 24 bits for the number. To allocate a new
bit field (as attempted in https://reviews.llvm.org/D123952), this
number must be reduced, maximal number of statements in a compound
statement becomes smaller. It can result in compilation errors of some
programs.
With this change the number of statements is kept in a field of type
'unsigned int' rather than in bit-field. To make room in CompoundStmtBitfields
LBraceLoc is moved to fields of CompoundStmt.
Differential Revision: https://reviews.llvm.org/D125635
Peixin-Qiao [Fri, 20 May 2022 07:16:03 +0000 (15:16 +0800)]
[flang][OpenMP] Fix the types of worksharing-loop variables
The types of lower bound, upper bound, and step are converted into the
type of the loop variable if necessary. OpenMP runtime requires 32-bit
or 64-bit loop variables. OpenMP loop iteration variable cannot have
more than 64 bits size and will be narrowed.
This patch is part of upstreaming code from the fir-dev branch of
https://github.com/flang-compiler/f18-llvm-project. (#1256)
Co-authored-by: kiranchandramohan <kiranchandramohan@gmail.com>
Reviewed By: kiranchandramohan, shraiysh
Differential Revision: https://reviews.llvm.org/D125740
jacquesguan [Wed, 27 Apr 2022 07:20:31 +0000 (07:20 +0000)]
[RISCV] Add VL patterns for vector widening floating-point fused multiply-add instructions.
This patch adds VL patterns for vector widening floating-point fused multiply-add instructions to support fixed length vector type.
Differential Revision: https://reviews.llvm.org/D124505
eopXD [Fri, 20 May 2022 06:23:34 +0000 (23:23 -0700)]
[RISCV][NFC] Remove `*=` operator for LMULType
LMULType always manipulate on Log2LMUL, let all manipulations go
through LMULType::MulLog2LMUL.
Reviewed By: khchen
Differential Revision: https://reviews.llvm.org/D126042
Ivan Kosarev [Fri, 20 May 2022 04:55:36 +0000 (05:55 +0100)]
[MIR] Provide location of extra instruction operand when diagnosing it.
Also resolves misspelled FileCheck directives caught with D125604.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D125965
Jonas Devlieghere [Thu, 19 May 2022 20:38:18 +0000 (13:38 -0700)]
[lldb] Update test_software_breakpoint_set_and_remove_work for AS
On Apple Silicon the platform arch is arm64 rather than AArch64.
Jonas Devlieghere [Thu, 19 May 2022 20:07:20 +0000 (13:07 -0700)]
[lldb] Fix 'ptsname_r' is only available on macOS 10.13.4 or newer
A deployment target less than 10.13.4 causes an error saying that
'ptsname_r' is only available on macOS 10.13.4 or newer. The current
logic only checks if the symbol is available and doesn't account for the
deployment target. This patch fixes that by adding an availability
check.
Differential revision: https://reviews.llvm.org/D125995
Philip Reames [Fri, 20 May 2022 03:59:26 +0000 (20:59 -0700)]
[RISCV] Add test showing codegen for unaligned loads and stores of scalar types
Julian Lettner [Fri, 20 May 2022 00:46:42 +0000 (17:46 -0700)]
[ASan] Add sleep_before_init flag
Also do a little bit of refactoring instead of just copy&paste.
Differential Revision: https://reviews.llvm.org/D126037
Chenbing Zheng [Fri, 20 May 2022 01:56:33 +0000 (09:56 +0800)]
[InstCombine] [NFC] Use a pattern matcher for ExtractElementInst
Reviewed By: RKSimon, rampitec
Differential Revision: https://reviews.llvm.org/D125857
Vitaly Buka [Fri, 20 May 2022 02:22:02 +0000 (19:22 -0700)]
[lit] Fix setup of sanitizer environment
Not all options were propageted into tests.
Reviewed By: ychen
Differential Revision: https://reviews.llvm.org/D122869
jacquesguan [Thu, 19 May 2022 09:25:22 +0000 (09:25 +0000)]
[mlir][Arithmetic] fold overlapping negf.
This patch folds negf(negf(x)) to x.
Differential Revision: https://reviews.llvm.org/D125955
Bill Wendling [Thu, 19 May 2022 23:57:40 +0000 (16:57 -0700)]
[AArch64] Add support for -fzero-call-used-regs
Support the "-fzero-call-used-regs" option on AArch64. This involves much less
specialized code than the X86 version. Most of the checks can be done with
TableGen.
Reviewed By: nickdesaulniers, MaskRay
Differential Revision: https://reviews.llvm.org/D124836
wren romano [Thu, 19 May 2022 23:00:39 +0000 (16:00 -0700)]
[mlir][sparse] Adding x-macros for OverheadType
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D126026
Sam McCall [Thu, 19 May 2022 08:01:44 +0000 (10:01 +0200)]
[Serialization] Delta encode locations in expansion sloc entries
This is a 1.9% reduction in PCH size in my measurements.
In abbreviated records, VBR6 seems to be slightl better than VBR8 for locations
that may be delta-encoded (i.e. not the first)
Differential Revision: https://reviews.llvm.org/D125952
Alex Brachet [Thu, 19 May 2022 22:57:59 +0000 (22:57 +0000)]
[bazel][libc] Fix bazel build
Differential revision: https://reviews.llvm.org/D126028
wren romano [Thu, 19 May 2022 22:01:23 +0000 (15:01 -0700)]
[mlir][sparse] Factored out a "FATAL" macro for unrecoverable assertion failure
Depends On D126019
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D126022
Bill Wendling [Thu, 19 May 2022 20:45:43 +0000 (13:45 -0700)]
[TableGen] Add generation of argument register lists
There are cases, like with -fzero-call-used-regs, where we need to know
which registers can be used by a certain calling convention. This change
generates a list of registers used by each calling convention defined in
*CallingConv.td.
Calling conventions that use registers conditioned on Swift have those
registers placed in a separate list. This allows us to be flexible about
whether to use the Swift registers or not.
Reviewed By: nickdesaulniers
Differential Revision: https://reviews.llvm.org/D125421
Bill Wendling [Thu, 19 May 2022 22:16:08 +0000 (15:16 -0700)]
Revert "[TableGen] Add generation of argument register lists"
There are build bot failures.
This reverts commit
3fa1b6557d08a148ef853c2a761f1c43e09fef5e.
wren romano [Thu, 19 May 2022 21:04:35 +0000 (14:04 -0700)]
[mlir][sparse] Simplifying closure
By closing over the `rank` itself rather than `this`, we save a method call on each iteration. A minor optimization, but one that adds up.
Depends On D126016
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D126019
wren romano [Thu, 19 May 2022 20:47:36 +0000 (13:47 -0700)]
[mlir][sparse] Using the name "dimSizes" more consistently
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D126016