Prashant Kumar [Thu, 1 Dec 2022 16:27:33 +0000 (16:27 +0000)]
Replacing `is` with `==` for the dtype check.
>>> a = np.ndarray([1,1]).astype(np.half)
>>> a
array([[0.007812]], dtype=float16)
>>> a.dtype
dtype('float16')
>>> a.dtype == np.half
True
>>> a.dtype == np.float16
True
>>> a.dtype is np.float16
False
Checking with `is` leads to inconsistency in checking.
Reviewed By: silvas
Differential Revision: https://reviews.llvm.org/D139121
Matt Arsenault [Thu, 1 Dec 2022 23:07:47 +0000 (18:07 -0500)]
AMDGPU: Fix broken attribute usage in test
Matt Arsenault [Fri, 2 Dec 2022 02:14:49 +0000 (21:14 -0500)]
AMDGPU: Convert some stack tests to opaque pointers
Manish Gupta [Wed, 30 Nov 2022 04:36:40 +0000 (20:36 -0800)]
[mlir][nvgpu] Fix affine maps computing indices for LdMatrixOp srcMemref
This patch fixes and simplifies the ldmatrix affine map arithmetic by
abstracting the affine expressions in terms of pitch-linear layout
(strided and contiguous dimensions). Then it applies the maps for
strided and contiguous dimensions in row-major and col-major.
LdMatrixOp collaboratively (32 threads in a warp) load tiles
(8 row x 128b col) of data. It can load either x1, x2, x4 tiles.
Additionally, it can transpose at 16-bit granularity when moving
data from the Shared Memory to registers.
This patch fixes affine map:
(laneid -> coordinate index a thread points in a tile).
- Loading x4 tiles needs all 32 lanes T0-31 point to a contiguous
chunk of 128b. The issue was exposed when running this case.
- Loading x2 tiles and x1 needs T0-15 threads and T0-7 threads points
to contiguous chunk of 128b. The patch is NFC for these cases.
Differential Revision: https://reviews.llvm.org/D138978
David Blaikie [Fri, 2 Dec 2022 02:08:36 +0000 (02:08 +0000)]
Add void cast for preprocessor-conditionall-unused loop variable
Fixing -Wunused -Werror build on Android.
Vasileios Porpodas [Mon, 28 Nov 2022 22:50:32 +0000 (14:50 -0800)]
[NFC] Cleanup: Replaces BB->getInstList().erase() with BB->erase().
This is part of a series of cleanup patches towards making BasicBlock::getInstList() private.
Differential Revision: https://reviews.llvm.org/D139143
Matt Arsenault [Fri, 2 Dec 2022 02:01:58 +0000 (21:01 -0500)]
AMDGPU: Update some wait tests to opaque pointers
The script mangled the constantexprs in waitcnt-looptest.ll, so fixed
those manually.
Vasileios Porpodas [Mon, 28 Nov 2022 22:49:34 +0000 (14:49 -0800)]
[IR][NFC] Adds BasicBlock::erase().
Currently the only way to do this is to work with the instruction list directly.
This is part of a series of cleanup patches towards making BasicBlock::getInstList() private.
Differential Revision: https://reviews.llvm.org/D139142
Nemanja Ivanovic [Fri, 2 Dec 2022 01:32:31 +0000 (19:32 -0600)]
[NFC][PowerPC] More descriptive debug messages for rr to ri conversion
Adrian Prantl [Fri, 2 Dec 2022 00:20:26 +0000 (16:20 -0800)]
Improve error logging when xcrun fails to execute successfully
Because Host::RunShellCommand runs commands through $SHELL there is an
opportunity for this to fail spectacularly on systems that use custom
shells with odd behaviors. This patch makes these situations easier to
debug by at least logging the result of the failed xcrun invocation.
It also doesn't run xcrun through a shell any more.
rdar://
102389438
Differential Revision: https://reviews.llvm.org/D138060
Krzysztof Parzyszek [Fri, 2 Dec 2022 00:18:32 +0000 (16:18 -0800)]
TargetLowering: convert Optional to std::optional
Maíra Canal [Thu, 1 Dec 2022 23:55:58 +0000 (15:55 -0800)]
[clang-format] Don't move comments if AlignTrailingComments: Leave
For comments that start after a new line, currently, the comments are
being indented. This happens because the OriginalWhitespaceRange
considers newlines on the range. Therefore, when AlignTrailingComments:
Kind: Leave, deduct the number of newlines before the token to calculate
the number of spaces for trailing comments.
Fixes #59203.
Differential Revision: https://reviews.llvm.org/D139029
Dhruva Chakrabarti [Thu, 1 Dec 2022 19:06:58 +0000 (11:06 -0800)]
[OpenMP] [OMPT] [3/8] Implemented callback registration in libomptarget
The purpose of this patch is to have tool-provided callbacks registered
in libomptarget. The overall design document is in
https://rice.app.box.com/s/pf3gix2hs4d4o1aatwir1set05xmjljc
Defined a class OmptDeviceCallbacksTy that will be used by libomptarget
and a plugin for callbacks registered by a tool. Once the callbacks are
registered in libomp, a lookup function is passed to libomptarget that is
used to retrieve the callbacks and register them in libomptarget.
Patch from John Mellor-Crummey <johnmc@rice.edu>
(With contributions from Dhruva Chakrabarti <Dhruva.Chakrabarti@amd.com>)
Reviewed By: jplehr
Differential Revision: https://reviews.llvm.org/D123974
Mircea Trofin [Thu, 1 Dec 2022 00:42:09 +0000 (16:42 -0800)]
[mlgo][nfc] Virtualize Logger implementation
This is in preparation for dropping the dependency on protobuf. This
first step allows us to subsequently introduce the non-protobuf
implementation behind a flag. After that we can update the training side
to ingest the new format, after which we can drop the protobuf
implementation and de-virtualize everything.
Differential Revision: https://reviews.llvm.org/D139062
Fangrui Song [Thu, 1 Dec 2022 22:36:05 +0000 (22:36 +0000)]
Threading: Convert Optional to std::optional
dthorn: Relanding after fix-forward.
Kazu Hirata [Thu, 1 Dec 2022 23:48:03 +0000 (15:48 -0800)]
[BOLT] Fix a build error
This patch fixes:
bolt/lib/Profile/DataAggregator.cpp:264:66: error: no viable
conversion from 'Optional<llvm::StringRef>[3]' to
'ArrayRef<std::optional<StringRef>>'
Daniel Thornburgh [Thu, 1 Dec 2022 23:42:25 +0000 (15:42 -0800)]
Revert "Threading: Convert Optional to std::optional"
This reverts commit
5e50b8089aee249d77542ea858d956568ec6581f.
This commit breaks the build for BOLT:
bolt/lib/Profile/DataAggregator.cpp:264:66: error: no viable
conversion from 'Optional<StringRef>[3]' to
'ArrayRef<std::optional<StringRef>>'
Siva Chandra Reddy [Thu, 1 Dec 2022 23:34:41 +0000 (23:34 +0000)]
[libc][Obvious] Fix the build after
e748db0f7f0971dc258c6631ae1fb0a38cfdf9dd.
That changed some parts of the Support API to use std::optional instead
of llvm::Optional. This patch updates the libc uses to the new API.
Vasileios Porpodas [Mon, 28 Nov 2022 22:45:59 +0000 (14:45 -0800)]
[NFC] Cleanup: Replaces BB->getInstList().splice() with BB->splice().
This is part of a series of cleanup patches towards making BasicBlock::getInstList() private.
Differential Revision: https://reviews.llvm.org/D138979
Krzysztof Parzyszek [Thu, 1 Dec 2022 23:23:53 +0000 (15:23 -0800)]
MemoryLocation: convert Optional to std::optional
Michael Maitland [Thu, 1 Dec 2022 23:12:33 +0000 (15:12 -0800)]
[DomTree] Add docstring for `dominates(const Instruction*, const BasicBlock*)`. NFC
Differential Revision: https://reviews.llvm.org/D139150
Mircea Trofin [Thu, 1 Dec 2022 23:02:24 +0000 (15:02 -0800)]
[NFC] Fix dbgs() statement in ControlHeightReduction
Matt Arsenault [Thu, 1 Dec 2022 22:58:38 +0000 (17:58 -0500)]
clangd: Try to fix build with std::optional
Should have been in
e748db0f7f0971dc258c6631ae1fb0a38cfdf9dd, but the
build option is well hidden.
Ryan Prichard [Thu, 1 Dec 2022 22:48:20 +0000 (14:48 -0800)]
[libc++] Fix 64-bit file creation for Bionic and Windows
Bionic didn't add fopen64 until API 24, but there's no meaningful
distinction between them with Bionic, so just use fopen instead.
On Windows, use _chsize_s instead of _chsize. _chsize uses a 32-bit
`long` size argument, while _chsize_s uses __int64 instead.
Factor out utils::{off64_t, fopen64, ftruncate64} for use within the
create_file function.
Reviewed By: ldionne, #libc, mstorsjo
Differential Revision: https://reviews.llvm.org/D137132
Fangrui Song [Thu, 1 Dec 2022 22:36:05 +0000 (22:36 +0000)]
Threading: Convert Optional to std::optional
Fangrui Song [Thu, 1 Dec 2022 22:26:33 +0000 (22:26 +0000)]
Fangrui Song [Thu, 1 Dec 2022 22:18:34 +0000 (22:18 +0000)]
Fangrui Song [Thu, 1 Dec 2022 22:15:41 +0000 (22:15 +0000)]
[X86][MC] Remove "in directive" from diagnostics
Fangrui Song [Thu, 1 Dec 2022 22:08:21 +0000 (22:08 +0000)]
[LoongArch] Fix tests after comment change
Fangrui Song [Thu, 1 Dec 2022 22:04:27 +0000 (22:04 +0000)]
[MC][AsmParser] Remove "in directive" from diagnostics
This part is not useful (all the custom parsing deals with directives) and does
not appear in the majority of diagnostics.
While updating diagnostics, change "unexpected token" to more useful
diagnostics, e.g. "expected comma", "expected end of directive".
Peiming Liu [Thu, 1 Dec 2022 21:23:52 +0000 (21:23 +0000)]
[mlir][sparse] add getPointerType/getIndexType to SparseTensorEncodingAttr.
add new interfaces to SparseTensorEncodingAttr to construct the pointer/index types based on pointer/index bitwidth.
Reviewed By: aartbik, wrengr
Differential Revision: https://reviews.llvm.org/D139141
Matt Arsenault [Thu, 1 Dec 2022 19:47:29 +0000 (14:47 -0500)]
Support: Convert Program APIs to std::optional
Vasileios Porpodas [Mon, 28 Nov 2022 22:44:51 +0000 (14:44 -0800)]
[IR][NFC] Adds BasicBlock::splice().
Currently the only way to do this is to work with the instruction list directly.
This is part of a series of cleanup patches towards making BasicBlock::getInstList() private.
Differential Revision: https://reviews.llvm.org/D138977
Fangrui Song [Thu, 1 Dec 2022 21:44:03 +0000 (21:44 +0000)]
[AArch64] Remove following .inst/after directive from AsmParser diagnostics
The part of the diagnostic is not useful because the instruction line is
printed. The new style follows generic code.
Paul Robinson [Thu, 1 Dec 2022 21:41:10 +0000 (13:41 -0800)]
[AVR] Convert test to check 'target=avr.*'
Part of the project to eliminate special handling for triples in lit
expressions.
Paul Robinson [Thu, 1 Dec 2022 21:39:48 +0000 (13:39 -0800)]
[AVR] Test XPASSes, remove the XFAIL
I built llvm with default triple avr-- and this test XPASSed
so it seems safe enough.
Erich Keane [Thu, 1 Dec 2022 21:37:19 +0000 (13:37 -0800)]
Remove some trailing WS from the release notes
Ties Stuij [Thu, 1 Dec 2022 20:52:18 +0000 (20:52 +0000)]
[compiler-rt] support armv4t
The main thing that needed changing was excluding functionality that
isn't supported on armv4t. So excluding Arm specific builtin assembly files.
In the process some files were renamed and the source was annotated where
appropriate, so it's a bit easier to follow what group of files are meant for
what purpose.
Reviewed By: peter.smith, nickdesaulniers
Differential Revision: https://reviews.llvm.org/D138725
bixia1 [Wed, 30 Nov 2022 16:50:36 +0000 (08:50 -0800)]
[mlir][sparse] Put the implementation for the insertion operation to subroutines.
Previously, we generated inlined implementation for insert operation and
observed MLIR compile time increase due to the size of the main routine. We now
put the insert operation implementation in subroutines and leave the inlining
decision to the MLIR compiler.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D138957
Dave Lee [Wed, 30 Nov 2022 00:35:36 +0000 (16:35 -0800)]
[lldb] Enable use of dummy target from dwim-print
Allow `dwim-print` to evaluate expressions using the dummy target if no real
target exists.
This adds some parity to `expression`. With this, both of the following work:
```
lldb -o 'expr 1+2'
lldb -o 'dwim-print 1+2'
```
Differential Revision: https://reviews.llvm.org/D138960
Maryam Moghadas [Wed, 23 Nov 2022 18:37:15 +0000 (12:37 -0600)]
[PowerPC] Implement xscmpeqqp, xscmpgeqp, xscmpgtqp instructions
This patch adds 3 Power10 VSX Scalar compare for quad precision
instructions including xscmpeqqp, xscmpgeqp, xscmpgtqp
Reviewed By: amyk
Differential Revision: https://reviews.llvm.org/D138592
Alex Richardson [Thu, 1 Dec 2022 19:37:56 +0000 (19:37 +0000)]
[clang] Avoid duplicating ProgramAddressSpace in TargetInfo. NFCI
This value was added to clang/Basic in D111566, but is only used during
codegen, where we can use the LLVM IR DataLayout instead. I noticed this
because the downstream CHERI targets would have to also set this value
for AArch64/RISC-V/MIPS. Instead of duplicating more information between
LLVM IR and Clang, this patch moves getTargetAddressSpace(QualType T) to
CodeGenTypes, where we can consult the DataLayout.
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D138296
Bjorn Pettersson [Thu, 1 Dec 2022 20:00:24 +0000 (21:00 +0100)]
[test] Switch to use -passes syntax in various test cases
Alexander Shaposhnikov [Thu, 1 Dec 2022 20:22:06 +0000 (20:22 +0000)]
[Support][MathExtras] Add variadic SaturatingAdd
Add variadic SaturatingAdd.
Test plan: ninja check-llvm-unit check-all
Differential revision: https://reviews.llvm.org/D139036
Paul Robinson [Thu, 1 Dec 2022 20:18:31 +0000 (12:18 -0800)]
[XCore] Convert tests to check 'target=xcore.*'
Part of the project to eliminate special handling for triples in lit
expressions.
Roman Lebedev [Thu, 1 Dec 2022 20:16:52 +0000 (23:16 +0300)]
[NFC][SROA] A few more tests for D138238
Eli Friedman [Thu, 1 Dec 2022 20:06:31 +0000 (12:06 -0800)]
[AArch64] Make opcode switch in tryARM64PackedUnwind comprehensive.
I don't think compiler-generated code could actually be affected by
this, but better to be thorough.
Differential Revision: https://reviews.llvm.org/D139048
Sanjay Patel [Thu, 1 Dec 2022 19:17:07 +0000 (14:17 -0500)]
[InstCombine] canonicalize trunc + insert as bitcast + shuffle, part 2
This enhances the base fold from part 1 to allow mapping a
right-shift to an insert index.
Example of translating a middle chunk of the scalar to vector
for either endian:
https://alive2.llvm.org/ce/z/fRXCOZ
This only allows creating an identity shuffle (with optional
shortening/lengthening) because that is considered the safe
baseline for any target (can be inverted if needed). If we
tried this fold with target-specific costs/legality, then we
could do the transform more generally.
Differential Revision: https://reviews.llvm.org/D138873
Sanjay Patel [Thu, 1 Dec 2022 12:59:48 +0000 (07:59 -0500)]
[InstCombine] improve efficiency of bool logic; NFC
As noted in issue #59266, the logic reduction could be
beyond the capabilities of an optimizing compiler, and
the code with ternary op is easier to read either way.
Krzysztof Parzyszek [Thu, 1 Dec 2022 19:21:53 +0000 (11:21 -0800)]
[Hexagon] Check if vector is empty before calling back()
Paul Robinson [Thu, 1 Dec 2022 19:40:53 +0000 (11:40 -0800)]
[Sparc] Convert tests to check 'target=sparc.*'
Part of the project to eliminate special handling for triples in lit
expressions.
Matt Arsenault [Wed, 30 Nov 2022 03:17:14 +0000 (22:17 -0500)]
Intrinsics: Make is_fpclass and arithmetic_fence speculatable
Matt Arsenault [Tue, 29 Nov 2022 14:06:39 +0000 (09:06 -0500)]
llvm-reduce: Fix tsan failures
There's a data race on the UninterestingChunks set. The code seems to
be operating on the assumption that all the tasks completed, so ensure
the unused results do complete. This started showing up about 50% of
the time when running operands-skip-parallel.ll after the recent
switch to use DenseSet; previously it failed much less frequently with
std::set.
We should introduce a mechanism to early terminate unused
results. Alternatively, I've been thinking about ways to to make the
reduction order smarter. I frequently have tests that take multiple
minutes to compile and hit the failure. It may be helpful to see which
chunks took the least time and prefer those over just taking the first
result.
Paul Robinson [Thu, 1 Dec 2022 19:36:33 +0000 (11:36 -0800)]
[Sparc] Remove an XFAIL
I built llvm with default triple sparc-sun-solaris2 and this test
XPASSed so it seems safe enough.
Craig Topper [Thu, 1 Dec 2022 19:09:38 +0000 (11:09 -0800)]
[RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints.
These instructions requires both register operands to be compressible
so I've only applied the hint if we already have a GPRC physical register
assigned for the other register operand.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D139079
Diego Caballero [Thu, 1 Dec 2022 18:43:18 +0000 (18:43 +0000)]
[mlir][NFC] Generalize `getPermutedPosition`
Small change to support projected permutations in the
`getPermutedPosition` utility. Renamed to `getResultPosition`.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D138946
Mitch Phillips [Thu, 1 Dec 2022 18:50:28 +0000 (10:50 -0800)]
Add assembler plumbing for sanitize_memtag
Extends the Asm reader/writer to support reading and writing the
'.memtag' directive (including allowing it on internal global
variables). Also add some extra tooling support, including objdump and
yaml2obj/obj2yaml.
Test that the sanitize_memtag IR attribute produces the expected asm
directive.
Uses the new Aarch64 MemtagABI specification
(https://github.com/ARM-software/abi-aa/blob/main/memtagabielf64/memtagabielf64.rst)
to identify symbols as tagged in object files. This is done using a
R_AARCH64_NONE relocation that identifies each tagged symbol, and these
relocations are tagged in a special SHT_AARCH64_MEMTAG_GLOBALS_STATIC
section. This signals to the linker that the global variable should be
tagged.
Reviewed By: fmayer, MaskRay, peter.smith
Differential Revision: https://reviews.llvm.org/D128958
Paul Robinson [Thu, 1 Dec 2022 18:49:23 +0000 (10:49 -0800)]
[AMDGPU] Convert test to check 'target=r600.*'
Part of the project to eliminate special handling for triples in lit
expressions.
Philip Reames [Thu, 1 Dec 2022 18:37:44 +0000 (10:37 -0800)]
[RISCV] Incorporate LMUL into costs for arithmetic and shuffles
This reuses the routine implemented in 0e6f0b7 to implement several existing TODOs. Many of the operations scale linearly with LMUL; this change represents that in the cost model.
Differential Revision: https://reviews.llvm.org/D139039
ZHU Zijia [Thu, 1 Dec 2022 18:41:04 +0000 (02:41 +0800)]
[CodeGen] Fix restore blocks' BasicBlock information in branch relaxation
In branch relaxation pass, restore blocks are created and placed before
the jump destination if indirect branches are required. For example:
foo
sd s11, 0(sp)
jump .restore, s11
bar
bar
bar
j .dest
.restore:
ld s11, 0(sp)
.dest:
baz
The BasicBlock information of the restore MachineBasicBlock should be
identical to the dest MachineBasicBlock.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D131863
ZHU Zijia [Thu, 1 Dec 2022 18:39:14 +0000 (02:39 +0800)]
[CodeGen][test] Pre-commit test for D131863
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D131862
Krzysztof Parzyszek [Thu, 1 Dec 2022 16:00:11 +0000 (08:00 -0800)]
[Hexagon] Punt on GEPs with different base types in vector alignment
Slava Zakharin [Thu, 1 Dec 2022 17:35:59 +0000 (09:35 -0800)]
Revert "[flang] Use proper attributes for runtime calls with 'i1' arguments/returns."
This reverts commit
d5b0de35bdd9a3f4d4a093e7938b06add34678eb.
Jonas Paulsson [Thu, 1 Dec 2022 18:29:24 +0000 (13:29 -0500)]
Revert "[CodeGen] Add new pass for late cleanup of redundant definitions."
Temporarily revert and fix buildbot failure.
This reverts commit
6d12599fd4134c1da63198c74a25490d28c733f6.
Jonas Paulsson [Wed, 6 Apr 2022 15:47:00 +0000 (17:47 +0200)]
[CodeGen] Add new pass for late cleanup of redundant definitions.
A new pass MachineLateInstrsCleanup is added to be run after PEI.
This is a simple pass that removes redundant and identical instructions
whenever found by scanning the MF once while keeping track of register
definitions in a map. These instructions are typically immediate loads
resulting from rematerialization, and address loads emitted by target in
eliminateFrameInde().
This is enabled by default, but a target could easily disable it by means of
'disablePass(&MachineLateInstrsCleanupID);'.
This late cleanup is naturally not "optimal" in removing instructions as it
is done by looking at phys-regs, but still quite effective. It would be
desirable to improve other parts of CodeGen and avoid these redundant
instructions in the first place, but there are no ideas for this yet.
Differential Revision: https://reviews.llvm.org/D123394
Reviewed By: RKSimon, foad, craig.topper, arsenm, asb
Roman Lebedev [Thu, 1 Dec 2022 18:12:31 +0000 (21:12 +0300)]
[NFC] Port an assortment of tests that invoke SROA to new pass manager
Vlad Serebrennikov [Thu, 1 Dec 2022 18:10:28 +0000 (21:10 +0300)]
[clang] Add test for CWG36
Reviewed By: #clang-language-wg, aaron.ballman, erichkeane
Differential Revision: https://reviews.llvm.org/D138822
Dave Lee [Tue, 29 Nov 2022 00:15:41 +0000 (16:15 -0800)]
[lldb] Remove timer from Module::GetNumCompileUnits
`GetNumCompileUnits` has fast execution, and is high firing. Fast and frequent functions are not good candidates for timers. In a recent profile, `GetNumCompileUnits` was called >>10k times with an average duration of 1 microsecond.
Differential Revision: https://reviews.llvm.org/D138878
Shafik Yaghmour [Thu, 1 Dec 2022 17:38:13 +0000 (09:38 -0800)]
[Clang] Adjust assert from Sema::BuildCXXTypeConstructExpr
Currently Sema::BuildCXXTypeConstructExpr asserts that list initialization must
mean we have an InitListExpr as well. We have several cases of valid code the
result in CXXTemporaryObjectExpr in the AST instead for list initialization.
Commit 1ae689c seems to indicate that this is not unexpected, although may be a
design issue
This fixes:
https://github.com/llvm/llvm-project/issues/58302
https://github.com/llvm/llvm-project/issues/58753
https://github.com/llvm/llvm-project/issues/59100
Differential Revision: https://reviews.llvm.org/D138947
Paul Robinson [Thu, 1 Dec 2022 17:00:04 +0000 (09:00 -0800)]
[NVPTX] Convert tests to check 'target=nvptx.*'
Part of the project to eliminate special handling for triples in lit
expressions.
Jez Ng [Thu, 1 Dec 2022 17:01:07 +0000 (12:01 -0500)]
[lld-macho] Private label aliases to weak symbols should not retain section data
If we have two files with the same weak symbol like so:
```
ltmp0:
_weak:
<contents>
```
and
```
ltmp1:
_weak:
<contents>
```
Linking them together should leave only one copy of `<contents>`, not
two. Previously, we would keep around both copies because of the
private-label `ltmp<N>` symbols (i.e. symbols that start with `l`) -- we
would not coalesce those, so we would treat them as retaining the
contents.
This matters for more than just size -- we are depending upon this
behavior internally for emitting a certain file format. This file
format's header is repeated in each object file, but we want it to
appear just once in our output.
Why can't we not emit those aliases to `_weak`, or reference the
`ltmp<N>` symbols instead of `_weak`? Well, MC actually adds `ltmp<N>`
symbols as part of the assembly-to-binary translation step. So any
codegen at the clang level can't access them.
All that said... this solution is actually kind of hacky. Here, we avoid
creating the private-label symbols at parse time. This is acceptable
since we never emit those symbols in our output. However, in ld64, any
aliasing temporary symbols (ignored or otherwise) won't retain coalesced
data. But implementing this is harder -- we would have to create those
symbols first (so we can emit their names later), but we would have to
ensure the linker correctly shuffles them around when their aliasees get
coalesced.
Additionally, ld64 treats these temporary symbols as functionally
equivalent to the weak symbols themselves -- that is, it will emit weak
binds when those non-weak temporary aliases are referenced. We have
imitated this behavior for private-label symbols, but implementing it for
local aliases in general seems substantially more difficult. I'm not
sure if any programs actually depend on this behavior though, so maybe
it's a moot point.
Finally, ld64 does all this regardless of whether
`.subsections_via_symbols` is specified. We don't. But again, given how
rare the lack of that directive is (I've only seen it from hand-written
assembly inputs), I don't think we need to worry about it.
Reviewed By: #lld-macho, oontvoo
Differential Revision: https://reviews.llvm.org/D139069
Florian Hahn [Thu, 1 Dec 2022 17:01:07 +0000 (17:01 +0000)]
[ConstraintElim] Use collectOffset result for chained gep support.
This slightly simplifies the code and addresses a correctness issue
where the index scaling for the precondition was not considered
properly.
Thanks to @nikic for pointing that out in D137840.
Jean Perier [Thu, 1 Dec 2022 16:58:20 +0000 (17:58 +0100)]
[flang] hlfir.associate and hlfir.end_associate codegen
Add hlfir.associate and hlfir.end_associate codegen.
To properly allow reusing the bufferized expression storage for the
newly created variable, bufferization of hlfir.expr has to be updated
so that hlfir.expr are translated to a variable and a boolean to
indicate if the variable storage needs to be freed after the expression
was used. That way the responsibility to free the bufferized expression
can be passed to the variable user, and applied in the
hlfir.end_associate.
Right now, not of the bufferized expression are heap allocated, so
generating the conditional freemem in hlfir.end_associate is left as
a TODO for when it can be tested.
Differential Revision: https://reviews.llvm.org/D139020
Alex Richardson [Mon, 21 Nov 2022 14:43:21 +0000 (14:43 +0000)]
[DirectX] Fix shared libraries build
I just tried to build all experimental targets and noticed that DirectX did
not build with -DBUILD_SHARED_LIBS=ON.
Differential Revision: https://reviews.llvm.org/D138431
Florian Hahn [Thu, 1 Dec 2022 16:51:40 +0000 (16:51 +0000)]
[ConstraintElim] Add chained GEP tests with multiple indices/diff types.
Extend test coverage for chained GEPs.
Jean Perier [Thu, 1 Dec 2022 16:49:29 +0000 (17:49 +0100)]
[flang] Lower power to HLFIR
Differential Revision: https://reviews.llvm.org/D139117
Jean Perier [Thu, 1 Dec 2022 16:39:36 +0000 (17:39 +0100)]
[flang] Lower add, mul, div, and sub to HLFIR
Only lower operations when the operands are scalar for now.
Differential Revision: https://reviews.llvm.org/D139108
Nicolai Hähnle [Thu, 1 Dec 2022 12:40:13 +0000 (13:40 +0100)]
Add update_any_test_checks.py convenience utility
Given a list of test files, this utility will run (optionally in
parallel) the corresponding update_*_test_checks tool for all given
tests that have automatically generated assertions.
Differential Revision: https://reviews.llvm.org/D139100
Guillaume Chatelet [Thu, 1 Dec 2022 16:19:56 +0000 (16:19 +0000)]
[lld][NFC] rename ELF alignment into addralign
Jakub Kuderski [Thu, 1 Dec 2022 14:14:52 +0000 (09:14 -0500)]
[mlir][spirv] Fix integer dot prod capabilities
Allow the integer dot product cabailities to be used in SPIR-V <1.6 when
the SPV_KHR_integer_dot_product extension is available.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D139063
Tomas Matheson [Thu, 1 Dec 2022 15:53:25 +0000 (15:53 +0000)]
[AArch64] Add missing #include
Tomas Matheson [Fri, 18 Nov 2022 11:20:05 +0000 (11:20 +0000)]
[AArch64] Improve TargetParser API
Re-land with constexpr StringRef::substr():
The TargetParser depends heavily on a collection of macros and enums to tie
together information about architectures, CPUs and extensions. Over time this
has led to some pretty awkward API choices. For example, recently a custom
operator-- has been added to the enum, which effectively turns iteration into
a graph traversal and makes the ordering of the macro calls in the header
significant. More generally there is a lot of string <-> enum conversion
going on. I think this shows the extent to which the current data structures
are constraining us, and the need for a rethink.
Key changes:
- Get rid of Arch enum, which is used to bind fields together. Instead of
passing around ArchKind, use the named ArchInfo objects directly or via
references.
- The list of all known ArchInfo becomes an array of pointers.
- ArchKind::operator-- is replaced with ArchInfo::implies(), which defines
which architectures are predecessors to each other. This allows features
from predecessor architectures to be added in a more intuitive way.
- Free functions of the form f(ArchKind) are converted to ArchInfo::f(). Some
functions become unnecessary and are deleted.
- Version number and profile are added to the ArchInfo. This makes comparison
of architectures easier and moves a couple of functions out of clang and
into AArch64TargetParser.
- clang::AArch64TargetInfo ArchInfo is initialised to Armv8a not INVALID.
- AArch64::ArchProfile which is distinct from ARM::ArchProfile
- Give things sensible names and add some comments.
Differential Revision: https://reviews.llvm.org/D138792
Phoebe Wang [Thu, 1 Dec 2022 14:31:51 +0000 (22:31 +0800)]
[X86][FP16] Do not combine fminnum/fmaxnum for FP16 emulation
Under the emulation situation, we lack native fmin/fmax instruction support.
Fixes #59258
Reviewed By: skan, spatel
Differential Revision: https://reviews.llvm.org/D139078
Oleksandr "Alex" Zinenko [Thu, 1 Dec 2022 15:22:24 +0000 (16:22 +0100)]
[mlir] use correct markdown headers in TensorOps.td
The `====` underline is for h1, we actually need h4. This makes TOC look bad.
Paul Robinson [Thu, 1 Dec 2022 15:20:35 +0000 (07:20 -0800)]
[PS4/PS5] Canonicalize tests to use 'target=.*-(ps4|ps5)'
This allows grepping for ps4 or ps5 to continue to work.
Sander de Smalen [Thu, 1 Dec 2022 11:00:41 +0000 (11:00 +0000)]
Reland "[AArch64][SME]: Generate streaming-compatible code for ld2-alloca."
Phabricator review for this patch was D138791
Sander de Smalen [Thu, 1 Dec 2022 14:38:01 +0000 (14:38 +0000)]
Reland "[AArch64][SME]: Add precursory tests for D138791"
This reverts commit
06846596eb1768eea06778a5b6da31145e84e461.
Lorenzo Chelini [Thu, 1 Dec 2022 14:44:03 +0000 (15:44 +0100)]
Revert "[MLIR] Introduce constraint attributes for DenseArrayAttr"
This reverts commit
dd0de4dca92cd6affafb47f788b64e99187168f1.
Build on mlir-windows fails:
Step 6 (build-check-mlir-build-only) failure: build (failure)
C:\buildbot\mlir-x64-windows-ninja\build\tools\mlir\test\lib\Dialect\Test\TestOps.cpp.inc(928): error C2220: the following warning is treated as an error
C:\buildbot\mlir-x64-windows-ninja\build\tools\mlir\test\lib\Dialect\Test\TestOps.cpp.inc(928): warning C4804: '>': unsafe use of type 'bool' in operation
C:\buildbot\mlir-x64-windows-ninja\build\tools\mlir\test\lib\Dialect\Test\TestOps.cpp.inc(7419): warning C4804: '>': unsafe use of type 'bool' in operation
Lorenzo Chelini [Thu, 1 Dec 2022 14:31:16 +0000 (15:31 +0100)]
[MLIR][Transform] Fix top-level comment (NFC)
Valentin Clement [Thu, 1 Dec 2022 14:25:05 +0000 (15:25 +0100)]
[flang][NFC] Remove debugging line in convert op
This line should not have made it to the final patch.
Vlad Serebrennikov [Thu, 1 Dec 2022 14:09:28 +0000 (17:09 +0300)]
[clang] Add test for CWG360
P1787: "CWG360 is resolved by applying access control to using-declarations."
[[ http://eel.is/c++draft/class.access#general-4.sentence-3 | class.access.general#4 ]]: "When a using-declarator is named, access control is applied to it, not to the declarations that replace it."
Reviewed By: #clang-language-wg, aaron.ballman
Differential Revision: https://reviews.llvm.org/D139090
Lorenzo Chelini [Tue, 29 Nov 2022 13:51:34 +0000 (14:51 +0100)]
[MLIR][Tensor] Add canonicalization for UnpackOp
pack(unpack(x)) -> x
Reviewed By: hanchung
Differential Revision: https://reviews.llvm.org/D138917
Lorenzo Chelini [Tue, 29 Nov 2022 18:45:37 +0000 (19:45 +0100)]
[MLIR] Introduce constraint attributes for DenseArrayAttr
- `DenseArrayStrictlyPositive` all elements are required to be > 0.
Returns true if the range is empty.
- `DenseArrayNonNegative` all elements are required to be >= 0. Returns
true if the range is empty.
Both constraints will simplify verifier logic as we move from using `I64ArrayAttr` to `DenseI64ArrayAttr`.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D138988
Simon Pilgrim [Thu, 1 Dec 2022 13:41:36 +0000 (13:41 +0000)]
[X86] Remove unnecessary RDRAND overrides from znver1/znver2 model
Reported by D138359 - the overrides matched the base class schedule definition (its been flagged as WriteMicrocoded instead of WriteSystem but the models define both the same)
Anton Sidorenko [Thu, 20 Oct 2022 15:07:43 +0000 (18:07 +0300)]
[MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV
To check reassociation correctness for RISCV, we must ensure that the root and
it's sibling have equal rounding modes (for floating point instructions).
`hasReassociableSibling` is a good place to make additional target-dependend
checks.
This patch allows us to enable default machine combiner mechanism to gather
reassociation candidates on RISCV.
Differential Revision: https://reviews.llvm.org/D138302
Valentin Clement [Thu, 1 Dec 2022 13:25:04 +0000 (14:25 +0100)]
[flang] Avoid verifier error when emboxing trivial type to unlimited polymorphic entity
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D138989
Tomas Matheson [Thu, 1 Dec 2022 13:06:54 +0000 (13:06 +0000)]
Revert "[AArch64] Improve TargetParser API"
Buildbots unhappy about constexpr function.
This reverts commit
450de8008bb0ccb5dfc9dd69b6f5b434158772bd.
Tomas Matheson [Fri, 18 Nov 2022 11:20:05 +0000 (11:20 +0000)]
[AArch64] Improve TargetParser API
The TargetParser depends heavily on a collection of macros and enums to tie
together information about architectures, CPUs and extensions. Over time this
has led to some pretty awkward API choices. For example, recently a custom
operator-- has been added to the enum, which effectively turns iteration into
a graph traversal and makes the ordering of the macro calls in the header
significant. More generally there is a lot of string <-> enum conversion
going on. I think this shows the extent to which the current data structures
are constraining us, and the need for a rethink.
Key changes:
- Get rid of Arch enum, which is used to bind fields together. Instead of
passing around ArchKind, use the named ArchInfo objects directly or via
references.
- The list of all known ArchInfo becomes an array of pointers.
- ArchKind::operator-- is replaced with ArchInfo::implies(), which defines
which architectures are predecessors to each other. This allows features
from predecessor architectures to be added in a more intuitive way.
- Free functions of the form f(ArchKind) are converted to ArchInfo::f(). Some
functions become unnecessary and are deleted.
- Version number and profile are added to the ArchInfo. This makes comparison
of architectures easier and moves a couple of functions out of clang and
into AArch64TargetParser.
- clang::AArch64TargetInfo ArchInfo is initialised to Armv8a not INVALID.
- AArch64::ArchProfile which is distinct from ARM::ArchProfile
- Give things sensible names and add some comments.
Differential Revision: https://reviews.llvm.org/D138792
Tomas Matheson [Fri, 18 Nov 2022 13:05:11 +0000 (13:05 +0000)]
[AArch64TargetParser] getArchFeatures -> getArchFeature
Differential Revision: https://reviews.llvm.org/D138753
Tomas Matheson [Sat, 26 Nov 2022 13:44:36 +0000 (13:44 +0000)]
[AArch64] Remove unused fields from CPUs in TargetParser
Differential Revision: https://reviews.llvm.org/D138754