platform/upstream/llvm.git
3 years ago[lldb] [Process/FreeBSDRemote] Access GPR via reginfo offsets
Michał Górny [Tue, 10 Nov 2020 22:58:36 +0000 (23:58 +0100)]
[lldb] [Process/FreeBSDRemote] Access GPR via reginfo offsets

Read and write registers from m_gpr using offsets from RegisterInfo
rather than explicit switch-case.  This eliminates a lot of redundant
code, and avoids mistakes such as type mismatches seen recently (wrt
segment registers).  The same logic will be extended to other register
sets in the future.

Make m_gpr an uint8_t std::array to ease accesses.  Ideally, we could
avoid including <machine/reg.h> entirely in the future and instead
get the correct GPR size from Utility/RegisterContextFreeBSD_* somehow.

While at it, modify register set logic to use an explicit enum with
llvm::Optional<>, making the code cleaner and at the same time enabling
compiler warnings for unhandled sets.

Since now we're fully relying on 'struct GPR' defined
in Utility/RegisterContextFreeBSD_* being entirely in sync with
the system structure, add unit tests to verify the field offsets
and sizes.

Differential Revision: https://reviews.llvm.org/D91216

3 years ago[mlir][Linalg] Add support for tileAndDistribute on tensors.
Nicolas Vasilache [Mon, 16 Nov 2020 10:40:24 +0000 (10:40 +0000)]
[mlir][Linalg] Add support for tileAndDistribute on tensors.

scf.parallel is currently not a good fit for tiling on tensors.
Instead provide a path to parallelism directly through scf.for.
For now, this transformation ignores the distribution scheme and always does a block-cyclic mapping (where block is the tile size).

Differential revision: https://reviews.llvm.org/D90475

3 years ago[VE] Add pfchv intrinsic instructions
Kazushi (Jam) Marukawa [Fri, 13 Nov 2020 09:57:53 +0000 (18:57 +0900)]
[VE] Add pfchv intrinsic instructions

Add pfchv intrinsic instructions and a regression test.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91522

3 years ago[sanitizer] Fix StackDepotPrint testing
Vitaly Buka [Mon, 16 Nov 2020 11:05:50 +0000 (03:05 -0800)]
[sanitizer] Fix StackDepotPrint testing

Make test order agnostic as it can change with platform.

3 years ago[LoopFlatten] Fold variable into assert. NFC.
Benjamin Kramer [Mon, 16 Nov 2020 10:51:39 +0000 (11:51 +0100)]
[LoopFlatten] Fold variable into assert. NFC.

3 years ago[IRGen] Add !annotation metadata for auto-init stores.
Florian Hahn [Mon, 16 Nov 2020 10:25:49 +0000 (10:25 +0000)]
[IRGen] Add !annotation metadata for auto-init stores.

This patch updates Clang's IRGen to add !annotation nodes with an
"auto-init" annotation to all stores for auto-initialization.

As discussed in 'RFC: Combining Annotation Metadata and Remarks'
(http://lists.llvm.org/pipermail/llvm-dev/2020-November/146393.html)
this allows using optimization remarks to track down where auto-init
code was inserted (and not removed by optimizations).

There are a few cases in the tests where !annotation gets dropped by
optimizations. Those optimizations will be updated in subsequent
patches.

This patch is based on a patch by Francis Visoiu Mistrih.

Reviewed By: thegameg, paquette

Differential Revision: https://reviews.llvm.org/D91417

3 years ago[LoopFlatten] Widen the IV
Sjoerd Meijer [Mon, 9 Nov 2020 17:32:25 +0000 (17:32 +0000)]
[LoopFlatten] Widen the IV

Widen the IV to the widest available and legal integer type, which makes this
transformations always safe so that we can skip overflow checks.

Motivation is to let this pass trigger on 64-bit targets too, and this is the
last patch in a serie to achieve this: D90402 moves pass LoopFlatten to just
before IndVarSimplify so that IVs are not already widened, D90421 factors out
widening from IndVarSimplify into Utils/SimplifyIndVar so that we can also use
it in LoopFlatten.

Differential Revision: https://reviews.llvm.org/D90640

3 years ago[ARM] Cortex-M7 schedule
David Penry [Mon, 16 Nov 2020 10:16:07 +0000 (10:16 +0000)]
[ARM] Cortex-M7 schedule

This patch adds the SchedMachineModel for Cortex-M7. It
also adds test cases for the scheduling information.

Details of the pipeline and descriptions are in comments
in file ARMScheduleM7.td included in this patch.

Differential Revision: https://reviews.llvm.org/D91355

3 years ago[lld] Use %t file in test
Mikhail Goncharov [Mon, 16 Nov 2020 09:37:55 +0000 (10:37 +0100)]
[lld] Use %t file in test

Otherwise it fails in some setups when creation of "out.wasm" is not possible.

Differential Revision: https://reviews.llvm.org/D91521

3 years ago[OpenMP][Tool] Add Archer option to disable data race analysis for sequential part
Joachim Protze [Mon, 2 Nov 2020 15:34:46 +0000 (16:34 +0100)]
[OpenMP][Tool] Add Archer option to disable data race analysis for sequential part

This introduces the new `ARCHER_OPTIONS` flag `ignore_serial=0|1` to disable
analysis and logging of memory accesses in the sequential part of the OpenMP
application.

In the sequential part of an OpenMP program no data race is possible, unless
there is non-OpenMP concurrency (such as pthreads, MPI, ...). For the latter
reason, this is not active by default.

Besides reducing the runtime overhead for the sequential part of the program,
this reduces the memory overhead for sequential initialization. In combination
with `flush_shadow=1` this can allow analysis of applications, which run close
to the limit of available memory, but only access smaller parts of shared
memory during each OpenMP parallel region.

A problem for this approach is that Archer only gets active, when the OpenMP
runtime gets initialized, which might be after serial initialization of the
application. In such case, it helps to call for example `omp_get_max_threads()`
at the beginning of main.

Differential Revision: https://reviews.llvm.org/D90473

3 years ago[RISCV] Use a macro to simplify getTargetNodeName
Fraser Cormack [Fri, 13 Nov 2020 12:24:13 +0000 (12:24 +0000)]
[RISCV] Use a macro to simplify getTargetNodeName

Similar to the X86 and AMDGPU targets, this uses a macro to cut down on
repetitive and error-prone code when converting RISCVISD node names to
strings in getTargetNodeName.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D91414

3 years ago[VE] Change variable capitalization
Kazushi (Jam) Marukawa [Mon, 16 Nov 2020 09:24:52 +0000 (18:24 +0900)]
[VE] Change variable capitalization

Change dl to DL in VEFrameLowering.cpp.  And clean some comments.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91490

3 years ago[VP][NFC] Rename to HANDLE_VP_TO_OPC
Simon Moll [Mon, 16 Nov 2020 08:47:18 +0000 (09:47 +0100)]
[VP][NFC] Rename to HANDLE_VP_TO_OPC

Use the less surprising shorthand OPC instead of OC.

3 years ago[clang][cli] Add support for options with two flags for controlling the same field.
Jan Svoboda [Fri, 13 Nov 2020 13:17:54 +0000 (14:17 +0100)]
[clang][cli] Add support for options with two flags for controlling the same field.

This enables automatically parsing and generating CC1 arguments for options where two flags control the same field, e.g. -fexperimental-new-pass-manager and -fno-experimental new pass manager.

Reviewed By: Bigcheese, dexonsmith

Original patch by Daniel Grumberg.

Differential Revision: https://reviews.llvm.org/D83071

3 years ago[MCJIT] Profile the code generated by MCJIT engine using Intel VTune profiler
Lang Hames [Mon, 16 Nov 2020 08:22:20 +0000 (19:22 +1100)]
[MCJIT] Profile the code generated by MCJIT engine using Intel VTune profiler

Patch by Elena Kovanova. Thanks Elena!

Problem:

LLVM already has a feature to profile the JIT-compiled code with VTune. This is
done using Intel JIT Profiling API (https://github.com/intel/ittapi). Function
information is captured by VTune as soon as the function is JIT-compiled. We
tried to use the same approach to report the function information generated by
the MCJIT engine – read parsing the debug information for in-memory ELF module
and report it using JIT API. As the results, we figured out that it did not work
properly for the following cases: inline functions, the functions located in
multiple source files, the functions having several bodies (address ranges).

Solution:

To overcome limitations described above, we have introduced new APIs as a part
of Intel ITT APIs to report the entire in-memory ELF module to be further
processed as regular ELF binaries with debug information.

This patch

1. Switches LLVM to open source version of Intel ITT/JIT APIs
(https://github.com/intel/ittapi) to keep it always up to date.

2. Adds support of profiling the code generated by MCJIT engine using Intel
VTune profiler

Another separate patch will get rid of obsolete Intel ITT APIs stuff, having
LLVM already switched to https://github.com/intel/ittapi.

Differential Revision: https://reviews.llvm.org/D86435

3 years ago[VE] LVLGen sets VL before vector insts
Simon Moll [Mon, 16 Nov 2020 08:19:14 +0000 (09:19 +0100)]
[VE] LVLGen sets VL before vector insts

The VE backend represents vector instructions with an explicit 'i32'
vector length operand.  In the VE ISA, the vector length is always read
from the VL hardware register.  The LVLGen pass inserts 'lvl'
instructions as necessary to set VL to the right value before each
vector instruction.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D91416

3 years agoRecommit "[NFC] Move code between functions as a preparation step for further improve...
Max Kazantsev [Mon, 16 Nov 2020 06:41:13 +0000 (13:41 +0700)]
Recommit "[NFC] Move code between functions as a preparation step for further improvement"

The bug should be fixed now.

3 years ago[JumpThreading] Call eraseBlock when folding a conditional branch
Kazu Hirata [Mon, 16 Nov 2020 06:29:30 +0000 (22:29 -0800)]
[JumpThreading] Call eraseBlock when folding a conditional branch

This patch teaches the jump threading pass to call BPI->eraseBlock
when it folds a conditional branch.

Without this patch, BranchProbabilityInfo could end up with stale edge
probabilities for the basic block containing the conditional branch --
one edge probability with less than 1.0 and the other for a removed
edge.

This patch is one of the steps before we can safely re-apply D91017.

Differential Revision: https://reviews.llvm.org/D91511

3 years ago[IR] Use llvm::is_contained in BasicBlock::removePredecessor (NFC)
Kazu Hirata [Mon, 16 Nov 2020 05:15:31 +0000 (21:15 -0800)]
[IR] Use llvm::is_contained in BasicBlock::removePredecessor (NFC)

3 years ago[Loop Fusion] Use pred_empty and succ_empty (NFC)
Kazu Hirata [Mon, 16 Nov 2020 04:32:57 +0000 (20:32 -0800)]
[Loop Fusion] Use pred_empty and succ_empty (NFC)

3 years ago[ADCE] Use succ_empty (NFC)
Kazu Hirata [Mon, 16 Nov 2020 03:52:59 +0000 (19:52 -0800)]
[ADCE] Use succ_empty (NFC)

3 years ago[NFC][Test] Add test coverage for IEEE Long Double on Power8
QingShan Zhang [Mon, 16 Nov 2020 03:44:36 +0000 (03:44 +0000)]
[NFC][Test] Add test coverage for IEEE Long Double on Power8

3 years ago[BranchProbabilityInfo] Use predecessors(BB) and successors(BB) (NFC)
Kazu Hirata [Mon, 16 Nov 2020 03:26:38 +0000 (19:26 -0800)]
[BranchProbabilityInfo] Use predecessors(BB) and successors(BB) (NFC)

3 years ago[TRE] Use successors(BB) (NFC)
Kazu Hirata [Mon, 16 Nov 2020 03:12:49 +0000 (19:12 -0800)]
[TRE] Use successors(BB) (NFC)

3 years ago[X86] Fix crash with i64 bitreverse on 32-bit targets with XOP.
Craig Topper [Mon, 16 Nov 2020 02:16:34 +0000 (18:16 -0800)]
[X86] Fix crash with i64 bitreverse on 32-bit targets with XOP.

We unconditionally marked i64 as Custom, but did not install a
handler in ReplaceNodeResults when i64 isn't legal type. This
leads to ReplaceNodeResults asserting.

We have two options to fix this. Only mark i64 as Custom on
64-bit targets and let it expand to two i32 bitreverses which
each need a VPPERM. Or the other option is to add the Custom
handling to ReplaceNodeResults. This is what I went with.

3 years ago[SanitizerCoverage] Use llvm::all_of (NFC)
Kazu Hirata [Mon, 16 Nov 2020 03:01:20 +0000 (19:01 -0800)]
[SanitizerCoverage] Use llvm::all_of (NFC)

3 years ago[IRCE] Use the same min runtime iteration threshold for BPI and BFI checks
Serguei Katkov [Tue, 10 Nov 2020 04:30:56 +0000 (11:30 +0700)]
[IRCE] Use the same min runtime iteration threshold for BPI and BFI checks

In the last change to IRCE the BPI is ignored if BFI is present, however
BFI and BPI have a different thresholds. Specifically BPI approach checks only
latch exit probability so it is expected if the loop has only one exit block (latch)
the behavior with BFI and BPI should be the same,

BPI approach by default uses threshold 10, so it considers the loop with estimated
number of iterations less then 10 should not be considered for IRCE optimization.
BFI approach uses the default value 3 and this is inconsistent.

The CL modifies the code to use the same threshold for both approaches..

The test is updated due to it has two side-exits (except latch) and each of them has a
probability 1/16, so BFI estimates the number of runtime iteration is about to 7
(1/16 + 1/16 + some for latch) and test fails.

Reviewers: mkazantsev, ebrevnov
Reviewed By: mkazantsev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D91230

3 years ago[CodeGen][X86] Remove unused trivial check-prefixes from all CodeGen/X86 directory.
Wang, Pengfei [Mon, 16 Nov 2020 01:44:06 +0000 (09:44 +0800)]
[CodeGen][X86] Remove unused trivial check-prefixes from all CodeGen/X86 directory.

I had manually removed unused prefixes from CodeGen/X86 directory for more than 100 tests.
I checked the change history for each of them at the beginning, and then I mainly focused on the format since I found all of the unused prefixes were result from either insensible copy or residuum after functional update.
I think it's OK to remove the remaining X86 tests by script now. I wrote a rough script which works for me in most tests. I put it in llvm/utils temporarily for review and hope it may help other components owners.
The tests in this patch are all generated by the tool and checked by update tool for the autogenerated tests. I skimmed them and checked about 30 tests and didn't find any unexpected changes.

Reviewed By: mtrofin, MaskRay

Differential Revision: https://reviews.llvm.org/D91496

3 years agoPR48169: Fix crash generating debug info for class non-type template
Richard Smith [Mon, 16 Nov 2020 01:40:57 +0000 (17:40 -0800)]
PR48169: Fix crash generating debug info for class non-type template
parameters.

It appears that LLVM isn't able to generate a DW_AT_const_value for a
constant of class type, but if it could, we'd match GCC's debug info in
this case, and in the interim we no longer crash.

3 years ago[InstCombine] reduce code for flip of masked bit; NFC
Sanjay Patel [Sun, 15 Nov 2020 20:43:34 +0000 (15:43 -0500)]
[InstCombine] reduce code for flip of masked bit; NFC

There are 1-2 potential follow-up NFC commits to reduce
this further on the way to generalizing this for vectors.

The operand replacing path should be dead code because demanded
bits handles that more generally (D91415).

3 years ago[InstCombine] add multi-use demanded bits fold for add with low-bit mask
Sanjay Patel [Sun, 15 Nov 2020 20:08:41 +0000 (15:08 -0500)]
[InstCombine] add multi-use demanded bits fold for add with low-bit mask

I noticed an add example like the one from D91343, so here's a similar patch.
The logic is based on existing code for the single-use demanded bits fold.
But I only matched a constant instead of using compute known bits on the
operands because that was the motivating patterni that I noticed.

I think this will allow removing a special-case (but incomplete) dedicated
fold within visitAnd(), but I need to untangle the existing code to be sure.

https://rise4fun.com/Alive/V6fP

  Name: add with low mask
  Pre: (C1 & (-1 u>> countLeadingZeros(C2))) == 0
  %a = add i8 %x, C1
  %r = and i8 %a, C2
  =>
  %r = and i8 %x, C2

Differential Revision: https://reviews.llvm.org/D91415

3 years ago[InstCombine] add vector tests for multi-use demanded bits; NFC
Sanjay Patel [Sun, 15 Nov 2020 19:57:01 +0000 (14:57 -0500)]
[InstCombine] add vector tests for multi-use demanded bits; NFC

See D91415.

3 years ago[OpenMP] Fix building for windows after adding omp_calloc
Martin Storsjö [Sat, 14 Nov 2020 07:33:36 +0000 (09:33 +0200)]
[OpenMP] Fix building for windows after adding omp_calloc

Differential Revision: https://reviews.llvm.org/D91478

3 years ago[AA] Add missing AAQI parameter
Nikita Popov [Sun, 15 Nov 2020 19:29:53 +0000 (20:29 +0100)]
[AA] Add missing AAQI parameter

This alias() call did not pass on the AAQueryInfo.

3 years ago[MemorySSA] Add pointer decrement loop clobber test case.
Florian Hahn [Sun, 15 Nov 2020 17:59:02 +0000 (17:59 +0000)]
[MemorySSA] Add pointer decrement loop clobber test case.

3 years ago[NFC, Refactor] Modernize the TypeSpecifierWidth enum (Specifiers.h) to a scoped...
faisalv [Sun, 15 Nov 2020 17:13:57 +0000 (11:13 -0600)]
[NFC, Refactor] Modernize the TypeSpecifierWidth enum (Specifiers.h) to a scoped enum

Reviewed here: https://reviews.llvm.org/D91409 by Aaron.
Highlights of the review:
  - avoid an underlying type for enums
  - avoid enum bit fields (MSVC packing anomalies) and favor static_casts to unsigned bit-fields

Patch by Thorsten Schuett <schuett@gmail.com> w some minor fixes in SemaType.cpp where a couple asserts had to be repaired to deal with lack of implicit coversion to int.

Thanks Thorsten!

3 years agoConsistent spelling in diagnostics: {l,r}value instead of {l,r}-value
Aaron Puchert [Sun, 15 Nov 2020 17:02:09 +0000 (18:02 +0100)]
Consistent spelling in diagnostics: {l,r}value instead of {l,r}-value

As Richard Smith pointed out in the review of D90123, both the C and C++
standard call it lvalue and rvalue, so let's stick to the same spelling
in Clang.

3 years ago[Sema] Improve notes for value category mismatch in overloading
Aaron Puchert [Sun, 15 Nov 2020 15:11:23 +0000 (16:11 +0100)]
[Sema] Improve notes for value category mismatch in overloading

When an overloaded member function has a ref-qualifier, like:

class X {
    void f() &&;
    void f(int) &;
};

we would print strange notes when the ref-qualifier doesn't fit the value
category:

X x;
x.f();
X().f(0);

would both print a note "no known conversion from 'X' to 'X' for object
argument" on their relevant overload instead of pointing out the
mismatch in value category.

At first I thought the solution is easy: just use the FailureKind member
of the BadConversionSequence struct. But it turns out that we weren't
properly setting this for function arguments. So I went through
TryReferenceInit to make sure we're doing that right, and found a number
of notes in the existing tests that improved as well.

Fixes PR47791.

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D90123

3 years ago[gcc] Fix -Wempty-body warning. NFC.
Marek Kurdej [Sun, 15 Nov 2020 15:17:52 +0000 (16:17 +0100)]
[gcc] Fix -Wempty-body warning. NFC.

3 years ago[VPlan] Use VPValue def for VPWidenGEPRecipe.
Florian Hahn [Sun, 15 Nov 2020 14:57:47 +0000 (14:57 +0000)]
[VPlan] Use VPValue def for VPWidenGEPRecipe.

This patch turns VPWidenGEPRecipe into a VPValue and uses it
during VPlan construction and codegeneration instead of the plain IR
reference where possible.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D84683

3 years ago[TableGen] Improve a couple of descriptions in the command guide
Paul C. Anagnostopoulos [Sat, 14 Nov 2020 21:11:15 +0000 (16:11 -0500)]
[TableGen] Improve a couple of descriptions in the command guide

Differential Revision: https://reviews.llvm.org/D91484

3 years agoFix temporary file name on Windows
Yaxun (Sam) Liu [Fri, 13 Nov 2020 14:43:35 +0000 (09:43 -0500)]
Fix temporary file name on Windows

Bound arch may contain ':', which is invalid in Windows file names.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D91421

3 years ago[Sema] Use isa<> instead of dyn_cast<> as pointer is never dereferenced. NFCI.
Simon Pilgrim [Sun, 15 Nov 2020 12:56:32 +0000 (12:56 +0000)]
[Sema] Use isa<> instead of dyn_cast<> as pointer is never dereferenced. NFCI.

We are only checking for the class type. Fixes Wshadow warnings.

3 years ago[mlir] NFC: tiny fix in comment.
Christian Sigg [Fri, 13 Nov 2020 16:22:41 +0000 (17:22 +0100)]
[mlir] NFC: tiny fix in comment.

Reviewed By: ftynse, mehdi_amini

Differential Revision: https://reviews.llvm.org/D91430

3 years agoRevert "[SCEV] Factor out part of wrap flag detection logic [NFC-ish]"
Nikita Popov [Sun, 15 Nov 2020 09:19:44 +0000 (10:19 +0100)]
Revert "[SCEV] Factor out part of wrap flag detection logic [NFC-ish]"

This reverts commit 1ec6e1eb8a084bffae8a40236eb9925d8026dd07.

This change causes a significant compile-time regression:
https://llvm-compile-time-tracker.com/compare.php?from=dd0b8b94d0796bd895cc998dd163b4fbebceb0b8&to=1ec6e1eb8a084bffae8a40236eb9925d8026dd07&stat=instructions

I assume that this is due to the non-NFC part of the change, which
now performs expensive nowrap inference even for nowrap flags that
are not used by the particular code.

3 years ago[sanitizer] Fix setup of android-thread-properties-api
Vitaly Buka [Sun, 15 Nov 2020 07:22:57 +0000 (23:22 -0800)]
[sanitizer] Fix setup of android-thread-properties-api

3 years ago[SCEV] Factor out part of wrap flag detection logic [NFC-ish]
Philip Reames [Sun, 15 Nov 2020 03:15:46 +0000 (19:15 -0800)]
[SCEV] Factor out part of wrap flag detection logic [NFC-ish]

In an effort to make code around flag determination more readable, and (possibly) prepare for a follow up change, factor out some of the flag detection logic.  In the process, reduce the number of locations we mutate wrap flags by a couple.

Note that this isn't NFC.  The old code tried for NSW xor (NUW || NW).  This is, two different paths computed different sets of wrap flags.  The new code will try for all three.  The result is that some expressions end up with a few extra flags set.

3 years ago[sanitizer] Add timeouts for adb calls
Vitaly Buka [Sun, 15 Nov 2020 02:43:24 +0000 (18:43 -0800)]
[sanitizer] Add timeouts for adb calls

3 years ago[DCE] Port -redundant-dbg-inst-elim to NPM
Arthur Eubanks [Sat, 14 Nov 2020 07:40:33 +0000 (23:40 -0800)]
[DCE] Port -redundant-dbg-inst-elim to NPM

This is used to test RemoveRedundantDbgInstrs(), which is used by other
passes.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D91477

3 years agoAdd forgotten in 888d06d file.
Vassil Vassilev [Sat, 14 Nov 2020 21:32:23 +0000 (21:32 +0000)]
Add forgotten in 888d06d file.

3 years agoMove the test compiler setup in a common place. NFCI
Vassil Vassilev [Sat, 14 Nov 2020 21:29:18 +0000 (21:29 +0000)]
Move the test compiler setup in a common place. NFCI

This patch reduces the copy paste in the unittest/CodeGen folder by moving the
common compiler setup phase in a header file.

Differential revision: https://reviews.llvm.org/D91061

3 years agoRecommit "[VPlan] Use VPValue def for VPWidenSelectRecipe."
Florian Hahn [Fri, 13 Nov 2020 14:15:53 +0000 (14:15 +0000)]
Recommit "[VPlan] Use VPValue def for VPWidenSelectRecipe."

This reverts the revert commit c8d73d939fa4fda9c87b3979225d02d63062bd68.

It includes a fix for cases where we missed inserting VPValues
for some selects, which should fix PR48142.

3 years ago[mlir] Add passes to passes.md to cleanup empty tabs on website index
Jacques Pienaar [Sat, 14 Nov 2020 19:25:24 +0000 (11:25 -0800)]
[mlir] Add passes to passes.md to cleanup empty tabs on website index

3 years ago[AArch64] Remove unused check prefixes. NFC
David Green [Sat, 14 Nov 2020 18:30:17 +0000 (18:30 +0000)]
[AArch64] Remove unused check prefixes. NFC

3 years ago[mlir][shape] Make attr-dict placement consistent
Jacques Pienaar [Sat, 14 Nov 2020 18:29:01 +0000 (10:29 -0800)]
[mlir][shape] Make attr-dict placement consistent

Also follows what we do in std ops too and move it before :.

3 years ago[Driver][test] Fix cc1-spawnprocess.c
Fangrui Song [Sat, 14 Nov 2020 17:53:34 +0000 (09:53 -0800)]
[Driver][test] Fix cc1-spawnprocess.c

3 years ago[TableGen] Fix missing braces in if statement
Paul C. Anagnostopoulos [Sat, 14 Nov 2020 17:37:48 +0000 (12:37 -0500)]
[TableGen] Fix missing braces in if statement

3 years agoFix build (`ninja check` without running `ninja` first)
Mehdi Amini [Sat, 14 Nov 2020 16:57:28 +0000 (16:57 +0000)]
Fix build (`ninja check` without running `ninja` first)

9218ff50f9 removed the BUILD.txt file, and as a subtle side-effect
libLLVMFrontendOpenACC wasn't a dependency of `ninja check` anymore.
However llvm-config requires all components to be built, and the
relevant test is broken when libLLVMFrontendOpenACC isn't built.

Unittest for libLLVMFrontendOpenACC are pending, but this addition
should fix some bots in the meantime.

3 years ago[llvm][NFC] Remove unnecessary vector creation in Annotations
Nathan James [Sat, 14 Nov 2020 15:55:09 +0000 (15:55 +0000)]
[llvm][NFC] Remove unnecessary vector creation in Annotations

3 years ago[BasicAA] Remove unnecessary size limitation
Nikita Popov [Sat, 14 Nov 2020 15:48:41 +0000 (16:48 +0100)]
[BasicAA] Remove unnecessary size limitation

We're dropping a common offset from both GEPs here. It's not
necessary for the access sizes to be the same as well.

3 years ago[ARM] Remove more unused check prefixes, NFC
David Green [Sat, 14 Nov 2020 15:37:53 +0000 (15:37 +0000)]
[ARM] Remove more unused check prefixes, NFC

3 years agoFix build after 54f9ee334
Nico Weber [Sat, 14 Nov 2020 15:23:22 +0000 (10:23 -0500)]
Fix build after 54f9ee334

3 years ago[gn build] (manually) merge e51631ca4cf
Nico Weber [Sat, 14 Nov 2020 15:12:01 +0000 (10:12 -0500)]
[gn build] (manually) merge e51631ca4cf

3 years ago[TableGen] Add frontend/backend phase timing capability.
Paul C. Anagnostopoulos [Thu, 22 Oct 2020 06:58:49 +0000 (02:58 -0400)]
[TableGen] Add frontend/backend phase timing capability.

Describe in the BackEnd Developer's Guide. Instrument a few backends.

Remove an old unused timing facility. Add a null backend for timing
the parser.

Differential Revision: https://reviews.llvm.org/D91388

3 years ago[NFC] Small refactor to CompilationDatabase
Nathan James [Sat, 14 Nov 2020 14:03:35 +0000 (14:03 +0000)]
[NFC] Small refactor to CompilationDatabase

3 years ago[CostModel] make default size cost for libcalls small (again)
Sanjay Patel [Sat, 14 Nov 2020 13:04:14 +0000 (08:04 -0500)]
[CostModel] make default size cost for libcalls small (again)

This was changed recently with D90554 / f7eac51b9b3f
...because we had a regression testing blindspot for intrinsics
that are expected to be lowered to libcalls.

In general, we want the *size* cost for a scalar call to be cheap
even if the other costs are expensive - we expect it to just be
a branch with some optional stack manipulation.

It is likely that we will want to carve out some
exceptions/overrides to this rule as follow-up patches for
calls that have some general and/or target-specific difference
to the expected lowering.

This was noticed as a regression in unrolling, so we have a test
for that now along with a couple of direct cost model tests.

If the assumed scalarization costs for the oversized vector
calls are not realistic, that would be another follow-up
refinement of the cost models.

3 years ago[CostModel] add tests for math library calls; NFC
Sanjay Patel [Fri, 13 Nov 2020 23:01:39 +0000 (18:01 -0500)]
[CostModel] add tests for math library calls; NFC

3 years ago[Coroutines] Make sure that async coroutine context size is a multiple of the alignme...
Arnold Schwaighofer [Sat, 14 Nov 2020 01:57:22 +0000 (17:57 -0800)]
[Coroutines] Make sure that async coroutine context size is a multiple of the alignment requirement

This simplifies the code the allocator has to executed

Differential Revision: https://reviews.llvm.org/D91471

3 years ago[git-clang-format] Process CUDA header files
mydeveloperday [Sat, 14 Nov 2020 12:37:52 +0000 (12:37 +0000)]
[git-clang-format] Process CUDA header files

Clang supports compiling CUDA source files,
CUDA header files may contain CUDA specific code
that is why they have special extension, which
can be recognized by nvcc (CUDA compiler driver)
as CUDA source file.
Format them by default as well.

Reviewed By: MyDeveloperDay

Patch By: tomilov

Differential Revision: https://reviews.llvm.org/D90780

3 years ago[TableGen] Clean up more .td files
Paul C. Anagnostopoulos [Fri, 13 Nov 2020 15:31:53 +0000 (10:31 -0500)]
[TableGen] Clean up more .td files

Differential Revision: https://reviews.llvm.org/D91431

3 years agoRevert "clang-misexpect: Profile Guided Validation of Performance Annotations in...
Roman Lebedev [Sat, 14 Nov 2020 06:44:14 +0000 (09:44 +0300)]
Revert "clang-misexpect: Profile Guided Validation of Performance Annotations in LLVM"

See discussion in https://bugs.llvm.org/show_bug.cgi?id=45073 / https://reviews.llvm.org/D66324#2334485
the implementation is known-broken for certain inputs,
the bugreport was up for a significant amount of timer,
and there has been no activity to address it.
Therefore, just completely rip out all of misexpect handling.

I suspect, fixing it requires redesigning the internals of MD_misexpect.
Should anyone commit to fixing the implementation problem,
starting from clean slate may be better anyways.

This reverts commit 7bdad08429411e7d0ecd58cd696b1efe3cff309e,
and some of it's follow-ups, that don't stand on their own.

3 years ago[sanitizer] Fix Android API level parsing on arm
Vitaly Buka [Sat, 14 Nov 2020 09:52:44 +0000 (01:52 -0800)]
[sanitizer] Fix Android API level parsing on arm

3 years agoMake -fintegrated-cc1 work with cc1as
Fangrui Song [Sat, 14 Nov 2020 09:16:16 +0000 (01:16 -0800)]
Make -fintegrated-cc1 work with cc1as

Tested 0.018s faster on my machine.

3 years ago[sanitizer] Fix test on arm 32bit
Vitaly Buka [Sat, 14 Nov 2020 08:02:29 +0000 (00:02 -0800)]
[sanitizer] Fix test on arm 32bit

Make test values suitable for PC alignment arithmetic used
in StackTrace::Print().

3 years ago[RISCV] Add test cases for fsrw/fslw that don't sign extend the result. NFC
Craig Topper [Sat, 14 Nov 2020 07:29:05 +0000 (23:29 -0800)]
[RISCV] Add test cases for fsrw/fslw that don't sign extend the result. NFC

These currently fail to select fsrw/fslw.

3 years ago[test] Fix const-addr-no-neg-offset.ll under NPM
Arthur Eubanks [Sat, 14 Nov 2020 07:29:36 +0000 (23:29 -0800)]
[test] Fix const-addr-no-neg-offset.ll under NPM

3 years ago[scudo/standalone] Fix leak in ThreadedGlobalQuarantine test
Roland McGrath [Sat, 14 Nov 2020 06:22:54 +0000 (22:22 -0800)]
[scudo/standalone] Fix leak in ThreadedGlobalQuarantine test

This unit test code was using malloc without a corresponding free.
When the system malloc is not being overridden by the code under
test, it might an asan/lsan allocator that notices leaks.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D91472

3 years ago[clang-tidy] Fix crash in bugprone-redundant-branch-condition on ExprWithCleanups
Zinovy Nis [Sun, 8 Nov 2020 18:01:45 +0000 (21:01 +0300)]
[clang-tidy] Fix crash in bugprone-redundant-branch-condition on ExprWithCleanups

Bug: https://bugs.llvm.org/show_bug.cgi?id=48008

Differential Revision: https://reviews.llvm.org/D91037

3 years agoRevert "Switch libLLVMFrontendOpenACC to be a regular CMake library and not a "compon...
Mehdi Amini [Sat, 14 Nov 2020 04:14:05 +0000 (04:14 +0000)]
Revert "Switch libLLVMFrontendOpenACC to be a regular CMake library and not a "component""

This reverts commit e7ed27653292b2ec545e87204031282b4b237754.

Build is broken with  -DLLVM_LINK_LLVM_DYLIB=ON

3 years ago[lldb] Mark command-process-connect as unsupported on Windows
Jonas Devlieghere [Sat, 14 Nov 2020 04:01:18 +0000 (20:01 -0800)]
[lldb] Mark command-process-connect as unsupported on Windows

Windows doesn't support remote connections.

3 years ago[mlir] refactor common idiom into AffineMap method
Aart Bik [Sat, 14 Nov 2020 02:11:47 +0000 (18:11 -0800)]
[mlir] refactor common idiom into AffineMap method

motivated by a refactoring in the new sparse code (yet to be merged), this avoids some lengthy code dup

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D91465

3 years agoSwitch libLLVMFrontendOpenACC to be a regular CMake library and not a "component"
Mehdi Amini [Sat, 14 Nov 2020 02:18:18 +0000 (02:18 +0000)]
Switch libLLVMFrontendOpenACC to be a regular CMake library and not a "component"

This library is only used in Flang at the moment and not tested withing LLVM.
Having it as a component is breaking llvm-config:

  $ bin/llvm-config --shared-mode
  llvm-config: error: component libraries and shared library

  llvm-config: error: missing: [...]/lib/libLLVMFrontendOpenACC.a

This will reverted when unit-tests are provided for it.

Reviewed By: clementval

Differential Revision: https://reviews.llvm.org/D91470

3 years ago[lldb] Make `process connect` behave the same in sync and async mode.
Jonas Devlieghere [Sat, 14 Nov 2020 01:30:34 +0000 (17:30 -0800)]
[lldb] Make `process connect` behave the same in sync and async mode.

I think the check for whether the process is connected is totally bogus
in the first place, but on the off-chance that's it's not, we should
behave the same in synchronous and asynchronous mode.

3 years agoAdd an assertion in SmallVector::push_back()
Mehdi Amini [Fri, 13 Nov 2020 22:37:25 +0000 (22:37 +0000)]
Add an assertion in SmallVector::push_back()

This assertion ensures the input value isn't part of the vector when
growing is required. In such cases the vector will grow and the input
value is invalidated before being read from.

This found 14 failed Tests.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D84293

3 years agoReplace sequences of v.push_back(v[i]); v.erase(&v[i]); with std::rotate (NFC)
Mehdi Amini [Sat, 14 Nov 2020 00:46:30 +0000 (00:46 +0000)]
Replace sequences of v.push_back(v[i]); v.erase(&v[i]); with std::rotate (NFC)

The code has a few sequence that looked like:

    Ops.push_back(Ops[0]);
    Ops.erase(Ops.begin());

And are equivalent to:

    std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end());

The latter has the advantage of never reallocating the vector, which
would be a bug in the original code as push_back would read from the
memory it deallocated.

3 years ago[mlir] Make linalg-bufferize run on FuncOp
Sean Silva [Fri, 13 Nov 2020 23:27:29 +0000 (15:27 -0800)]
[mlir] Make linalg-bufferize run on FuncOp

That way, it runs in parallel across functions.

3 years ago[flang] Fix "EQ" comparison of arrays
Peter Steinfeld [Fri, 13 Nov 2020 17:31:41 +0000 (09:31 -0800)]
[flang] Fix "EQ" comparison of arrays

When comparing arrays whose shapes do not conform, the contant folding
code ran into problems trying to get the value of an extent that did not
exist.  There were actually two problems.  First, the routine
"CheckConformance()" was returning "true" when the compiler was unable
to get the extent of an array.  Second, the function
"ApplyElementwise()" was calling "CheckConformance()" prior to folding
the elements of two arrays, but it was ignoring the return value.

Differential Revision: https://reviews.llvm.org/D91440

3 years ago[MemProf][NewPM] Make memprof passes required
Arthur Eubanks [Thu, 12 Nov 2020 21:40:03 +0000 (13:40 -0800)]
[MemProf][NewPM] Make memprof passes required

Just like other sanitizers.
Fixes check-memprof under NPM.

Reviewed By: leonardchan

Differential Revision: https://reviews.llvm.org/D91389

3 years ago[AMDGPU] Mark sin/cos load folding as modifying the function.
Stanislav Mekhanoshin [Fri, 13 Nov 2020 22:33:43 +0000 (14:33 -0800)]
[AMDGPU] Mark sin/cos load folding as modifying the function.

When the load value is folded into the sin/cos operation, the
AMDGPU library calls simplifier could still mark the function
as unmodified. Instead ensure if there is an early return,
return whether the load was folded into the sin/cos call.

Authored by MJDSys

Differential Revision: https://reviews.llvm.org/D91401

3 years agoFrontend: Remove unused parameter from ASTUnit::LoadFromCompilerInvocationAction...
Duncan P. N. Exon Smith [Sun, 8 Nov 2020 01:44:09 +0000 (20:44 -0500)]
Frontend: Remove unused parameter from ASTUnit::LoadFromCompilerInvocationAction, NFC

Drop `IncludeBriefCommentsInCodeCompletion` since it is always `false`.

Differential Revision: https://reviews.llvm.org/D91295

3 years ago[WebAssembly] Move GlobalTLSAddress handling to WebAssemblyISelLowering. NFC
Sam Clegg [Fri, 13 Nov 2020 05:43:57 +0000 (21:43 -0800)]
[WebAssembly] Move GlobalTLSAddress handling to WebAssemblyISelLowering. NFC

I'm not why it was added to DAGToDAG oringally but it seems
to make sense alongside the non-TLS version:  LowerGlobalAddress

Differential Revision: https://reviews.llvm.org/D91432

3 years ago[CMake] Explicity set up RPATH for the runtime libs on Win to ARM Linux cross builds.
Vladimir Vereschaka [Fri, 13 Nov 2020 22:21:27 +0000 (14:21 -0800)]
[CMake] Explicity set up RPATH for the runtime libs on Win to ARM Linux cross builds.

Since RPATH initialization was disabled for the runtime libraries to
avoid overwriting RPATH unconditionally we need to explicity set up it
for the Win to Arm Linux cross builds.

See some details here: https://reviews.llvm.org/D91099

3 years ago[ORC] Fix missing return value.
Lang Hames [Fri, 13 Nov 2020 21:26:06 +0000 (08:26 +1100)]
[ORC] Fix missing return value.

3 years ago[LoopUnroll] add test for full unroll that is sensitive to cost-model; NFC
Sanjay Patel [Fri, 13 Nov 2020 21:05:07 +0000 (16:05 -0500)]
[LoopUnroll] add test for full unroll that is sensitive to cost-model; NFC

See discussion in D90554.

3 years ago[ObjC][ARC] Add and use a function which finds and returns the single
Akira Hatanaka [Fri, 13 Nov 2020 18:40:40 +0000 (10:40 -0800)]
[ObjC][ARC] Add and use a function which finds and returns the single
dependency. NFC

Use findSingleDependency in place of FindDependencies and stop passing a
set of Instructions around. Modify FindDependencies to return a boolean
flag which indicates whether the dependencies it has found are all
valid.

3 years agoMove variable declarations to functions in which they are used. NFC
Akira Hatanaka [Fri, 13 Nov 2020 17:56:12 +0000 (09:56 -0800)]
Move variable declarations to functions in which they are used. NFC

3 years ago[GlobalISel] Add convenience matchers for nots and all-ones constants
Jessica Paquette [Fri, 13 Nov 2020 19:28:55 +0000 (11:28 -0800)]
[GlobalISel] Add convenience matchers for nots and all-ones constants

Add a convenience matcher which handles

```
G_XOR %not_reg, -1
```

And a convenience matcher which returns true if an integer constant is
all-ones.

Differential Revision: https://reviews.llvm.org/D91459

3 years ago[DFSan][NewPM] Handle dfsan under NPM
Arthur Eubanks [Thu, 12 Nov 2020 21:19:04 +0000 (13:19 -0800)]
[DFSan][NewPM] Handle dfsan under NPM

Make it required. Since it's a module pass, optnone won't test it, so
extend the clang test to also use opt-bisect now that it's supported.

14/16 check-dfsan tests failed with NPM enabled, now all pass.

Reviewed By: leonardchan

Differential Revision: https://reviews.llvm.org/D91385

3 years ago[KnownBits] Combine abs() implementations
Nikita Popov [Fri, 13 Nov 2020 21:17:26 +0000 (22:17 +0100)]
[KnownBits] Combine abs() implementations

ValueTracking was using a more powerful abs() implementation. Roll
it into KnownBits::abs(). Also add an exhaustive test for abs(),
in both the poisoning and non-poisoning variants.

3 years agoSerialization: Merge three diagnostics to simplify ASTReader::getInputFile, NFC
Duncan P. N. Exon Smith [Thu, 12 Nov 2020 17:53:49 +0000 (12:53 -0500)]
Serialization: Merge three diagnostics to simplify ASTReader::getInputFile, NFC

Clean up the logic for `err_fe_{pch,module,ast}_file_modified` to use a
`select` like other ASTReader diagnostics. There should be no
functionality change here, just a cleanup.

Differential Revision: https://reviews.llvm.org/D91367