Kenneth Graunke [Thu, 8 Dec 2022 04:20:12 +0000 (20:20 -0800)]
intel: Drop compressed_multisample_layout_mask from the compiler keys
The compiler looks at this key field to determine whether to perform
an MCS fetch for a txf_ms or samples_identical texture message, if a
nir_tex_src_ms_mcs_intel source wasn't provided. If it isn't set,
it instead uses constant 0 (nothing is compressed).
All of the drivers (iris, crocus, anv, hasvk) unconditionally set this
to ~0 because we don't want to pay for costly shader recompiles (which
can cause nasty stuttering). Most textures are compressed anyway, and
the hardware ignores the l2dms MCS parameter if MCS is disabled.
The only user was BLORP, which sets the key field based on whether the
texture's aux usage has MCS. But if it has MCS, it also does the MCS
fetch itself and supplies it directly. Otherwise, it relies on the
compiler to fill in the 0 value. But it could easily just provide the
0 value itself in that case and not rely on the compiler at all.
With that fixed, we can just drop the key fields entirely. We leave
them as padding for now to avoid repacking structures; we won't need
to after the next commits anyway.
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20223>
Jianxun Zhang [Fri, 11 Nov 2022 22:40:40 +0000 (14:40 -0800)]
intel/common: use format struct in aux mapping
Refactor aux mapping with the new format struct and helpers.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20167>
Jianxun Zhang [Fri, 11 Nov 2022 22:51:04 +0000 (14:51 -0800)]
intel/common: initialize format of aux mapping on GFX12
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20167>
Jianxun Zhang [Thu, 8 Dec 2022 01:55:57 +0000 (17:55 -0800)]
intel/common: fix style of some comments in intel_aux_map.h
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20167>
Jianxun Zhang [Fri, 11 Nov 2022 20:34:46 +0000 (12:34 -0800)]
intel/common: Add a new struct to describe AUX mapping format
The new struct and some helper functions are for further
refactoring.
Reworks:
* Jordan: Refactor code around aux format array
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20167>
Jianxun Zhang [Wed, 9 Nov 2022 22:27:36 +0000 (14:27 -0800)]
intel/common: Add an enum of formats of AUX mapping
The new enum allows us to support multiple formats in the future.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20167>
Lionel Landwerlin [Thu, 8 Dec 2022 13:08:30 +0000 (15:08 +0200)]
intel: add MTL performance metrics
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20228>
Väinö Mäkelä [Fri, 18 Nov 2022 06:56:46 +0000 (08:56 +0200)]
hasvk: Allow aliasing with modifiers for WSI images
Ignore ALIAS_BIT when format comes from WSI because
we have the ability to bind the MEMORY_BINDING_PRIVATE
from the other WSI image.
This commit is the same as
f350b78b but for hasvk.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19840>
Gert Wollny [Thu, 8 Dec 2022 11:14:29 +0000 (12:14 +0100)]
r600/sfn: implement GDS op channel mask evaluation
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Thu, 8 Dec 2022 10:44:56 +0000 (11:44 +0100)]
r600/sfn: allocate pinned registers as SSA
Don't allocate the helper_invocation register as pinned, because it is
not an SSA value.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Thu, 8 Dec 2022 10:40:23 +0000 (11:40 +0100)]
r600/sfn: nir_op_vec results don't need channel pinning
This will be handled by the op that uses the vector
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Thu, 8 Dec 2022 10:39:01 +0000 (11:39 +0100)]
r600/sfn: implement TF allowed channel mask override
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Thu, 8 Dec 2022 09:13:39 +0000 (10:13 +0100)]
r600/sfn: clean up TF emission in TCS
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Wed, 7 Dec 2022 17:16:57 +0000 (18:16 +0100)]
r600/sfn: Cleanup copy-prop into vec4 source values
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Tue, 6 Dec 2022 20:30:48 +0000 (21:30 +0100)]
r600/sfn: scheduler allow more lookahead on ALU instr
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Tue, 6 Dec 2022 09:30:36 +0000 (10:30 +0100)]
r600/sfn: Make use of variable length DOT
This frees some alu slots for better group scheduling.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Tue, 6 Dec 2022 09:09:19 +0000 (10:09 +0100)]
r600/sfn: Don't require assignemnt in same block to copy-propagate
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Tue, 6 Dec 2022 07:16:54 +0000 (08:16 +0100)]
r600/sfn: No need to pin LDS dests to chan
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Mon, 5 Dec 2022 16:08:31 +0000 (17:08 +0100)]
r600/sfn: allow copy propagation to LDS read dest
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Mon, 5 Dec 2022 16:03:45 +0000 (17:03 +0100)]
r600/sfn: allow more copy-propagate with dest chan fixed.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Gert Wollny [Mon, 5 Dec 2022 15:29:27 +0000 (16:29 +0100)]
r600/sfn: Allow copy prop into GDS sources values
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20205>
Tapani Pälli [Thu, 8 Dec 2022 07:59:11 +0000 (09:59 +0200)]
anv: emit sample mask state independent of fragment stage
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7861
Fixes:
9f6af43743d ("anv: dynamic multisample sample mask")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20221>
Samuel Pitoiset [Wed, 7 Dec 2022 16:03:50 +0000 (17:03 +0100)]
radv: fix re-emitting the RB+ state when dynamic color write mask change
Found by inspection.
Fixes:
a92d1d13c5d ("radv: add support for dynamic color write mask")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20204>
Konstantin Seurer [Sat, 19 Nov 2022 11:35:18 +0000 (12:35 +0100)]
radv/rt: Discard metadata after lowering intersection shaders
We inserted some enstructions and control flow. Therefore, metadata is
not valid anymore.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19866>
Konstantin Seurer [Wed, 9 Nov 2022 20:22:50 +0000 (21:22 +0100)]
radv/rt: Lower hit attributes to registers
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19866>
Konstantin Seurer [Wed, 7 Dec 2022 15:20:22 +0000 (16:20 +0100)]
radv/rt: Move load_hit_attrib_amd to the top
Make sure to load hit attributes before a trace_ray call can overwrite them.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19866>
Konstantin Seurer [Thu, 10 Nov 2022 19:51:54 +0000 (20:51 +0100)]
nir: Add intrinsics for hit attribute io
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19866>
Konstantin Seurer [Wed, 9 Nov 2022 16:44:21 +0000 (17:44 +0100)]
nir/split_vars: Handle ray hit attributes
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19866>
Konstantin Seurer [Wed, 7 Dec 2022 15:24:52 +0000 (16:24 +0100)]
radv: Add nir_foreach_variable_with_modes to .clang-format
Yet another loop macro.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19866>
Emma Anholt [Wed, 30 Nov 2022 23:56:17 +0000 (15:56 -0800)]
egl: Drop backwards compat for missing __DRI_ATTRIB_*_SHIFT.
The only implementation supports it.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20171>
Emma Anholt [Wed, 30 Nov 2022 23:46:38 +0000 (15:46 -0800)]
gbm: Don't look up the DRI2_FENCE extension.
It's optional, and nothing references it.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20171>
Emma Anholt [Wed, 30 Nov 2022 23:43:59 +0000 (15:43 -0800)]
egl: Replace sRGB support check with a pscreen query.
This drops the remaining use of rendererQuery from EGL.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20171>
Emma Anholt [Wed, 30 Nov 2022 23:27:55 +0000 (15:27 -0800)]
egl: Move common eglCreateContext() error checks from backends to core.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20171>
Emma Anholt [Wed, 30 Nov 2022 23:23:56 +0000 (15:23 -0800)]
egl: Replace the robustness DRI2 ext check with a pipe cap query.
This means that swkms will now report it with llvmpipe. drisw reported it
with llvmpipe, and it appears to have been an oversight that got
refactored into an obvious "if !swkms" check later.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20171>
Emma Anholt [Wed, 30 Nov 2022 23:18:49 +0000 (15:18 -0800)]
egl: Remove silly robustness support checks.
The EGL frontend checks for the extension's presence before allowing the
user to set these values.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20171>
Brian Paul [Wed, 7 Dec 2022 21:56:02 +0000 (14:56 -0700)]
gallivm: s/unsigned/enum util_format_type/ in lp_build_sample_common()
Use the actual type here for easier debugging.
Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20233>
Brian Paul [Wed, 7 Dec 2022 21:49:11 +0000 (14:49 -0700)]
gallivm: fix incorrect type for undefined texcoords
Texcoords may be 1-5 components in length. We initialize the
unused components with an LLVMGetUndef(). But we were using
an int vec type rather than a float vec type.
This eventually led to a failed assertion in lp_build_clamp()
where 'a' was a vec of int[8] but 'min' and 'max' were float[8]
in a trace of the game Tom Clancy's Splinter Cell: Blacklist.
The game seems to have a bug where a texture sampler mistakenly has
shadow comparison turned on, but the shader's tex sample instructions
are sampling a 2D R8G8B8A8_UNORM texture. The instruction has a
2-component texcoord so when we do the sampler comparison operation
we're using the undefined 5th coordinate component.
Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20233>
Boyuan Zhang [Thu, 8 Dec 2022 14:46:40 +0000 (09:46 -0500)]
radeonsi: disable av1 decode for navi24
Disable AV1 decode for Navi24 since hardware doesn't support.
fixed: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7855
cc: mesa-stable
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20230>
Brian Paul [Wed, 7 Dec 2022 20:26:55 +0000 (13:26 -0700)]
gallivm: misc clean-ups in lp_bld_nir.c
Use switch instead of if/else. Add some braces. 80-column wrapping, etc.
Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20211>
Brian Paul [Mon, 21 Nov 2022 21:34:36 +0000 (14:34 -0700)]
llvmpipe: misc clean-ups in lp_scene.c
Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20211>
Brian Paul [Mon, 21 Nov 2022 21:34:09 +0000 (14:34 -0700)]
llvmpipe: misc clean-ups in lp_rast.c
Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20211>
Brian Paul [Tue, 1 Nov 2022 01:23:44 +0000 (19:23 -0600)]
gallivm: minor clean-ups in lp_bld_quad.c
Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20211>
Brian Paul [Fri, 28 Oct 2022 16:46:07 +0000 (10:46 -0600)]
gallivm: asst. clean-ups in lp_bld_sample_soa.c
Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20211>
Brian Paul [Fri, 28 Oct 2022 16:14:27 +0000 (10:14 -0600)]
gallivm: clean-ups in lp_bld_sample.c
Formatting/whitespace fixes. Add const qualifiers, move var decls, etc.
Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20211>
Marek Olšák [Tue, 18 Oct 2022 05:37:10 +0000 (01:37 -0400)]
mesa: fix typos in gl_array_attrib comments
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19783>
Marek Olšák [Tue, 8 Nov 2022 01:10:38 +0000 (20:10 -0500)]
mesa: use the format table for double attrib format translation too
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19783>
Marek Olšák [Tue, 8 Nov 2022 00:55:20 +0000 (19:55 -0500)]
mesa: add a format table for GL_BGRA vertex format translation too
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19783>
Marek Olšák [Tue, 8 Nov 2022 00:33:32 +0000 (19:33 -0500)]
mesa: add more cases to the gallium vertex_formats table
The way we convert gltype to the index changed to handle more enums.
The reason why (gltype & 0x3f) works is because of how the enums are
defined.
Also change the type to uint8_t. We only need the low 7 bits of
the pipe format enum.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19783>
Marek Olšák [Wed, 19 Oct 2022 22:21:47 +0000 (18:21 -0400)]
st/mesa: move setting draw_needs_minmax_index into st_update_array_templ
This removes several parameters from setup_array that become unused.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19783>
Marek Olšák [Mon, 7 Nov 2022 21:58:22 +0000 (16:58 -0500)]
st/mesa: simplify st_setup_current parameters
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19783>
Marek Olšák [Tue, 8 Nov 2022 02:18:33 +0000 (21:18 -0500)]
st/mesa: optimize uploading zero-stride vertex attribs
Instead of memcpy into a temporary array and then upload from that,
upload into a buffer directly.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19783>
Marek Olšák [Mon, 7 Nov 2022 23:53:22 +0000 (18:53 -0500)]
st/mesa: remove alignment code from st_setup_current
I was the one who added this code and it doesn't seem useful.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19783>
David Heidelberg [Thu, 8 Dec 2022 17:25:00 +0000 (18:25 +0100)]
ci: fix missing line after adding austraincoder's farm killswitch
Accidentally dropped.
Fixes:
ff928d9567a5 ("ci: Allow disabling the whole of austriancoder's farm")
Reported-by: Ana Guerrero Lopez <anagl@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Ana Guerrero Lopez <anagl@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20236>
Jordan Justen [Wed, 7 Dec 2022 20:49:21 +0000 (12:49 -0800)]
intel/genxml: Add genX_rt_pack.h
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20225>
Lionel Landwerlin [Thu, 8 Dec 2022 14:12:24 +0000 (16:12 +0200)]
intel/fs: add a saturation propagation test
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20206>
Oleksii Bozhenko [Wed, 7 Dec 2022 17:27:45 +0000 (19:27 +0200)]
brw: fix saturate propagation region overlap range
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/commit/
947c828d5cbffe9640ac63103a6223112eeff27f
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7691
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Oleksii Bozhenko <oleksii.bozhenko@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20206>
Tapani Pälli [Tue, 6 Dec 2022 16:11:10 +0000 (18:11 +0200)]
intel/fs: implement Wa_14017989577
The first instruction of any kernel should have non-zero emask. This
restriction needs to be obeyed to avoid GPU hangs.
Patch adds a function to insert dummy mov as first instruction
to make sure this requirement is fulfilled.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20194>
Chia-I Wu [Thu, 8 Dec 2022 04:04:55 +0000 (20:04 -0800)]
freedreno: fix compute shared_size underflow
It caused ~5% of perf regression for some gfxbench benchmarks.
Fixes:
b8d10d9e87a ("gallium: split up req_local_mem")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20219>
Ruijing Dong [Fri, 2 Dec 2022 21:11:52 +0000 (16:11 -0500)]
radeonsi/vcn: av1 film_grain output fix
use film grain surface as the output instead of target,
which should be kept for DPB process.
fixed: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6903
CC: 22.3
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20139>
Ruijing Dong [Fri, 2 Dec 2022 21:09:42 +0000 (16:09 -0500)]
frontends/va: pass in film_grain_target as new output
In av1 film grain case, to use the film_grain_target
as the output, instead of target buffer, which is kept
as the input for DPB processing in film_grain output
scenario.
CC: 22.3
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20139>
Ruijing Dong [Fri, 2 Dec 2022 21:04:18 +0000 (16:04 -0500)]
frontneds/va: use current_display_picture from VA for film grain
use the interface defined in vaapi for av1 film grain's output
https://github.com/intel/libva/blob/master/va/va_dec_av1.h#L296-L304
CC: 22.3
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20139>
Ruijing Dong [Fri, 2 Dec 2022 21:02:12 +0000 (16:02 -0500)]
frontends/omx: initialize film_grain_target
set film_grain_target to NULL, and not using it
in omx path.
CC: 22.3
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20139>
Ruijing Dong [Fri, 2 Dec 2022 20:58:24 +0000 (15:58 -0500)]
gallium: add film_grain_target into av1 dec desc
In vaapi, film_grain output will need to direct into
other output surface instead of the current render_target.
CC: 22.3
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20139>
Max Lee [Wed, 12 Oct 2022 03:41:12 +0000 (14:41 +1100)]
drm-shim: add __readlink_chk as readlink with overflow check
As per Linux Standard Base Core Specification 4.0, __readlink_chk
display value of a symbolic link, with buffer overflow checking.
if size > buflen, abort() is called.
Signed-off-by: Max Lee <endlesspring@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19045>
Matt Coster [Mon, 28 Nov 2022 15:04:17 +0000 (15:04 +0000)]
pvr: Check depth/stencil attachment is tile-aligned
The hardware requires depth/stencil attachments to be size-aligned to
the zls tile size (as defined by rogue_get_zls_tile_size_xy()).
In practice however, this is a tiny edge case. The restriction only
applies during some operations, and any attachment larger than the tile
size will be twiddled and over-allocated into alignment beforehand.
This commit also adds the mentioned rogue_get_zls_tile_size_xy()
function. These values differ from the regular tile_size_{x,y} feature
values in some cases. Instead of including them as features as well, we
compute them directly.
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20160>
Matt Coster [Fri, 2 Dec 2022 11:58:48 +0000 (11:58 +0000)]
pvr: Account for other depth formats in pvr_frag_state_stream_init()
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20160>
Matt Coster [Mon, 28 Nov 2022 15:00:03 +0000 (15:00 +0000)]
pvr: Add stencil support in render job setup
The implementation here assumes separate depth and stencil attachments
are not possible, as they are in Vulkan without VK_KHR_dynamic_rendering
and before core 1.3.
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20160>
Christian Gmeiner [Fri, 7 Oct 2022 11:31:22 +0000 (13:31 +0200)]
ci: Allow disabling the whole of austriancoder's farm
Add a global-level variable that allows disabling all jobs that would
have gone to my lab, to be used in case of outages.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18997>
Samuel Pitoiset [Thu, 8 Dec 2022 12:55:34 +0000 (13:55 +0100)]
radv,aco: move radv_ps_epilog_key to the graphics pipeline key
To avoid redundant structs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20199>
Samuel Pitoiset [Thu, 8 Dec 2022 12:55:09 +0000 (13:55 +0100)]
radv: fix PS epilogs with RADV_PERFTEST=pswave32
This option is rarely or even never used but it was broken. While we
are at it, remove radv_ps_epilog_key::wave32 because the wave size
can only be changed globally for PS.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20199>
Samuel Pitoiset [Thu, 8 Dec 2022 12:54:42 +0000 (13:54 +0100)]
radv,aco: use 8-bit for color_is_int{8,10} everywhere
Do not need 32-bits because there is only up to 8 MRTs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20199>
Samuel Pitoiset [Thu, 8 Dec 2022 12:54:21 +0000 (13:54 +0100)]
radv,aco: rename color output related fields for consistency
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20199>
Matt Coster [Fri, 18 Nov 2022 16:20:18 +0000 (16:20 +0000)]
pvr: Extract common code from pvr_CmdDispatch{,Indirect}
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20159>
Matt Coster [Fri, 18 Nov 2022 16:04:05 +0000 (16:04 +0000)]
pvr: Track max_shared_regs for compute jobs
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20159>
Matt Coster [Fri, 18 Nov 2022 15:57:07 +0000 (15:57 +0000)]
pvr: Refactor pvr_compute_pipeline and pvr_compute_pipeline_shader
This brings the two structs more into line with their graphics
counterparts, and removes the extra member access previously required
to access almost all members of pvr_compute_pipeline.
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20159>
Tatsuyuki Ishi [Fri, 2 Dec 2022 08:00:10 +0000 (17:00 +0900)]
aco: Migrate RA to use std::optional
The use of std::optional simplifies expressions and would be useful for some
upcoming RA tweaks.
C++17 has been available since the merge of rusticl and should be safe to use as
far as packaging is concerned.
A few style choices are:
- Testing for emptiness uses implicit bool conversion.
- Constructing an empty value uses {}.
- Constructing a filled value uses the implicit conversion constructor.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20125>
Martin Roukala (né Peres) [Wed, 7 Dec 2022 15:06:57 +0000 (17:06 +0200)]
ci/valve-infra: use a new version of the mesa trigger
This new version of the container will re-try up to 3 times to download
the job bucket, rather than failing directly. If the issue persists,
the job will still succeed, but not all artifacts will be present...
Fixes: #7809
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20203>
Kenneth Graunke [Wed, 7 Dec 2022 20:00:33 +0000 (12:00 -0800)]
intel/compiler: Set NoMask on cr0 access for float controls mode
This is trying to clear a bit in the control register. However, it's
executing with whatever channel mask happens to be active. Typically
this is the one at the start of the program, so at least some channels
will be active. Typically the first channel will be active due to
packed dispatch, but that's not always guaranteed. Without NoMask,
the float controls writes may randomly not happen.
Recent GPUs also seem to have a hang issue when the first instruction in
the shader doesn't have any active channels. Having an instruction with
NoMask at the start of the program works around the issue. See HSD bug
14017989577. In our case, the float controls preamble was breaking that
restriction every time, causing us to run into this problem frequently.
Thanks to Tapani Pälli for finding this hang issue, and Francisco
Jerez and Lionel Landwerlin for helping pinpoint this issue during
review of a workaround patch in !20194.
Fixes GPU hangs in Elder Scrolls Online, Witcher 3, and likely more.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7639
Fixes:
9da56ffc522 ("i965/fs: add emit_shader_float_controls_execution_mode() and aux functions")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20214>
Gert Wollny [Mon, 14 Nov 2022 12:52:53 +0000 (13:52 +0100)]
virgl: lower FMA and MULADD
On the host we emit this as separate ops anyway, so avoid
wired optimizations in the guest that might introduce
difficult to optimize dependencies.
v2: update trace expectations - some minor accuracy changes
are to be expected when fma is handled differently
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20182>
Timothy Arceri [Thu, 3 Nov 2022 01:59:20 +0000 (12:59 +1100)]
glsl: dont create temps for builtin function inputs
It's not valid to be copying input variables to temps when
inlining atomic memory, interpolateAt functions, etc. We got away
with this previously because tree grafting would clean up the
mess but we shouldn't depend on an optimisation to clean up
invalid IR. Also I hope to remove tree grafting in a follow up
merge request.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19890>
Timothy Arceri [Mon, 7 Nov 2022 01:00:02 +0000 (12:00 +1100)]
glsl: use ir_rvalue_visitor for function inlining
This allows us to drop some duplicate code that is already in the
ir_rvalue_visitor. It also allows us to better replace rvalues
and handle swizzle in the following patch without having to add
even more duplicate code.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19890>
Yiwei Zhang [Tue, 6 Dec 2022 22:03:02 +0000 (14:03 -0800)]
venus: scrub ignored fields for descriptor writes for push descriptor
Fixes:
933ca11f1a4 ("venus: implement vkCmdPushDescriptorSetWithTemplateKHR")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Dawn Han <dawnhan@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20191>
Iván Briano [Wed, 7 Dec 2022 20:30:36 +0000 (12:30 -0800)]
vulkan: VkPolygonMode has a bit more than two values
Fixes:
9d0ed9cbcc0 ("vulkan: Add more dynamic rasterizer state")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20212>
Väinö Mäkelä [Sat, 29 Oct 2022 07:59:56 +0000 (10:59 +0300)]
hasvk: Report correct multisampling limits on gfx7
Some limits reported by hasvk were too high, which caused CTS tests to
fail.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19393>
Bas Nieuwenhuizen [Sun, 13 Nov 2022 18:15:28 +0000 (18:15 +0000)]
aco: Add s_delay_alu support for GFX11+
Roughly copied from LLVM. This facilitates better ALU usage by
switching between waves when there is an ALU stall, which isn't
automatic anymore on GFX11.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19743>
Bas Nieuwenhuizen [Mon, 14 Nov 2022 18:58:32 +0000 (18:58 +0000)]
aco: Add helper to get cycle info for an instruction.
For use in s_delay_alu tracking
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19743>
Bas Nieuwenhuizen [Mon, 14 Nov 2022 18:57:08 +0000 (18:57 +0000)]
aco: Add isTrans helper.
For the s_delay_alu tracking.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19743>
Samuel Pitoiset [Tue, 22 Nov 2022 09:12:06 +0000 (10:12 +0100)]
radv: mark extendedDynamicState3SampleLocationsEnable as not required by Zink
Only dynamic blend equation support is still required.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>
Samuel Pitoiset [Tue, 22 Nov 2022 07:56:09 +0000 (08:56 +0100)]
radv: advertise extendedDynamicState3LineRasterizationMode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>
Samuel Pitoiset [Tue, 22 Nov 2022 08:07:25 +0000 (09:07 +0100)]
radv: add support for dynamic line rasterization mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>
Samuel Pitoiset [Mon, 7 Nov 2022 22:36:20 +0000 (23:36 +0100)]
radv: advertise extendedDynamicState3RasterizationSamples
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>
Samuel Pitoiset [Mon, 21 Nov 2022 07:23:28 +0000 (08:23 +0100)]
radv: add support for dynamic rasterization samples
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>
Samuel Pitoiset [Mon, 21 Nov 2022 16:37:54 +0000 (17:37 +0100)]
radv: store the number of color/ds samples to the rendering state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>
Mihai Preda [Mon, 5 Dec 2022 14:44:04 +0000 (16:44 +0200)]
nir: fix digit order in print_bitset()
Also fix the leading curly for the new function definitions.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>
Mihai Preda [Wed, 30 Nov 2022 09:45:07 +0000 (11:45 +0200)]
nir: print shader_info bools with the value
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>
Mihai Preda [Wed, 23 Nov 2022 20:12:24 +0000 (22:12 +0200)]
nir: print shader_info inputs/outputs as bit ranges
e.g.
inputs_read: 15-17
outputs_written: 0,32
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>
Mihai Preda [Wed, 23 Nov 2022 12:47:23 +0000 (14:47 +0200)]
radeonsi: add AMD_DEBUG=elements for printing vertex elements
in si_create_vertex_elements()
This information is useful in debugging shader inputs/outputs
Sample output:
AMD_DEBUG=elements ./bin/arb_vertex_attrib_64bit-overlapping-locations shader -auto
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 16, divisor 0
elements[1]: offset 16, buffer_index 0, dual_slot 0, format 16, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 104, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 105, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 106, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 107, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 16, divisor 0
elements[1]: offset 16, buffer_index 0, dual_slot 0, format 16, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 104, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 105, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 106, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 107, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 107, divisor 0
elements[1]: offset 16, buffer_index 0, dual_slot 1, format 107, divisor 0
elements[2]: offset 32, buffer_index 0, dual_slot 1, format 105, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 107, divisor 0
elements[1]: offset 40, buffer_index 0, dual_slot 1, format 107, divisor 0
elements[2]: offset 56, buffer_index 0, dual_slot 1, format 105, divisor 0
elements[0]: offset 0, buffer_index 0, dual_slot 0, format 107, divisor 0
elements[1]: offset 64, buffer_index 0, dual_slot 1, format 107, divisor 0
elements[2]: offset 80, buffer_index 0, dual_slot 1, format 105, divisor 0
PIGLIT: {"result": "pass" }
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>
Mihai Preda [Mon, 14 Nov 2022 17:58:13 +0000 (19:58 +0200)]
util: minor refactor _mesa_sha1_print()
should not change the output; avoids an additional printf()
for the separator.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>
Mihai Preda [Mon, 14 Nov 2022 17:52:37 +0000 (19:52 +0200)]
nir: print_shader_info(): brief output
Make the shader_info printing less verbose by skipping the fields that
are likely not used (being zero).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>
Mihai Preda [Mon, 7 Nov 2022 11:30:39 +0000 (13:30 +0200)]
nir: print_shader_info: print stage-specific shader info
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>
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