Arnd Bergmann [Fri, 25 Feb 2022 16:06:48 +0000 (17:06 +0100)]
Merge tag 'v5.18-rockchip-drivers-1' of git://git./linux/kernel/git/mmind/linux-rockchip into arm/dt
Compatible for the rk3568-usb2phy-grf.
* tag 'v5.18-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: soc: rockchip: add rk3568-usb2phy-grf
Link: https://lore.kernel.org/r/9977257.a15B8eIVjX@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:17:39 +0000 (16:17 +0100)]
Merge tag 'at91-dt-5.18' of git://git./linux/kernel/git/at91/linux into arm/dt
AT91 & LAN966 DT #1 for 5.18:
- lan966x basic DT and associated evaluation board pcb8291 (2-ports)
- documentation for an upcoming Kontron switch board featuring a LAN9668
- one fix for an old bug we have with PMECC on sama5d2 in some corner
cases
- sama7g5 and its EK: crypto, CAN and DVFS operating points
* tag 'at91-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama7g5: add opps
ARM: dts: at91: sama7g5ek: set regulator voltages for standby state
ARM: dts: at91: fix low limit for CPU regulator
ARM: dts: at91: sama7g5: Enable can0 and can1 support in sama7g5-ek
ARM: dts: at91: sama7g5: Add can controllers of sama7g5
ARM: dts: at91: sama7g5: Add crypto nodes
ARM: dts: at91: Use the generic "crypto" node name for the crypto IPs
ARM: dts: at91: remove status = "okay" from soc specific dtsi
ARM: dts: at91: sama5d2: Fix PMERRLOC resource size
dt-bindings: arm: at91: add Kontron's new KSwitches
ARM: dts: add DT for lan966 SoC and 2-port board pcb8291
Link: https://lore.kernel.org/r/20220225110735.18080-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:17:04 +0000 (16:17 +0100)]
Merge tag 'renesas-arm-dt-for-v5.18-tag3' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18 (take three)
- Pin control support for the R-Car S4-8 SoC on the Spider development
board.
* tag 'renesas-arm-dt-for-v5.18-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: spider: Complete SCIF3 description
arm64: dts: renesas: r8a779f0: Add pinctrl device node
Link: https://lore.kernel.org/r/cover.1645795643.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:14:30 +0000 (16:14 +0100)]
Merge tag 'renesas-arm-dt-for-v5.18-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18 (take two)
- Document the use of the renesas-soc IRC channel,
- Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: dts: renesas: Align GPIO hog names with dtschema
arm64: dts: renesas: Align GPIO hog names with dtschema
arm64: dts: renesas: rzg2lc-smarc-som: Enable watchdog
ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 60s timeout
ARM: dts: r9a06g032: Add the watchdog nodes
dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
arm64: dts: renesas: spider-cpu: Enable watchdog timer
arm64: dts: renesas: r8a779f0: Add RWDT node
MAINTAINERS: Specify IRC channel for Renesas ARM64 port
MAINTAINERS: Specify IRC channel for Renesas ARM32 port
arm64: dts: renesas: ulcb-kf: fix wrong comment
Link: https://lore.kernel.org/r/cover.1645784466.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:13:49 +0000 (16:13 +0100)]
Merge tag 'v5.18-rockchip-dts32-1' of git://git./linux/kernel/git/mmind/linux-rockchip into arm/dt
Remove an unneeded status property from the crypto-node
on rk3288.
* tag 'v5.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: remove status from rk3288 crypto node
Link: https://lore.kernel.org/r/19595245.eudUkVceaq@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:12:52 +0000 (16:12 +0100)]
Merge tag 'v5.18-rockchip-dts64-1' of git://git./linux/kernel/git/mmind/linux-rockchip into arm/dt
New boards: Pine64 PineNote ereader tablet and Bananapi-R2-Pro (both rk356x)
New peripherals for the rk356x-family (pdm-audio, gpu, another i2s, usb2)
A lot of additions to Quartz-A (connector-header, gpu, sdmmc1, io-domains,
usb2) and rk3568-evb1-v10 (rk809-audio, cpu-regulator, gpu, tsadc, led,
usb2, touchscreen).
Fixes for the pwm-regulators, that used wrong names for their supplies
as well adapting the cros-ec pwm nodes to a changed binding (going via
the pwm tree).
And as sort of misc-changes, defined the logic-regulator on rk3399-puma
as well as enabled the mali-gpu on the rk3399-firefly.
* tag 'v5.18-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (28 commits)
arm64: dts: rockchip: align Google CROS EC PWM node name with dtschema
arm64: dts: rockchip: enable rk809 audio codec on the rk3568 evb1-v10
arm64: dts: rockchip: set vdd_gpu regulator on rk3568-evb1-v10 to always on
arm64: dts: rockchip: add the vdd_cpu regulator to rk3568-evb1-v10
arm64: dts: rockchip: enable work led on rk3568-evb1-v10
arm64: dts: rockchip: fix supplies for pwm regulators
arm64: dts: rockchip: define vdd_log on rk3399-puma
arm64: dts: rockchip: Add Pine64 PineNote board
arm64: dts: rockchip: Add pdm node to rk356x
dt-bindings: arm: rockchip: Add Pine64 PineNote board
arm64: dts: rockchip: enable the tsadc on rk3568-evb1-v10
arm64: dts: rockchip: enable the gpu on rk3568-evb1-v10
arm64: dts: rockchip: enable the gpu on quartz64-a
arm64: dts: rockchip: add cooling map and trip points for gpu to rk356x
arm64: dts: rockchip: add gpu node to rk356x
arm64: dts: rockchip: add usb2 support to rk3568-evb1-v10
arm64: dts: rockchip: rename and sort the rk356x usb2 phy handles
arm64: dts: rockchip: add the i2s3_2ch node to rk356x
arm64: dts: rockchip: Add Bananapi R2 Pro
dt-bindings: rockchip: Add BananaPi R2 Pro Board
...
Link: https://lore.kernel.org/r/6456947.djgVdjDsCv@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:11:31 +0000 (16:11 +0100)]
Merge tag 'sunxi-dt-for-5.18-1' of git://git./linux/kernel/git/sunxi/linux into arm/dt
Usual round of DT patches for the 5.18 merge window, with:
- DT fixes
- ethernet0 alias for Nanopi NEO
- r_uart node for H3/H5
- eMMC and bluetooth nodes for Nanopi NEO air
- updated maintainers for Allwinner SoCs
- new board: A20-Marsboard
* tag 'sunxi-dt-for-5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
MAINTAINERS: Update Allwinner SoCs maintainers
ARM: dts: sun8i-h3: Drop args in 'thermal-sensors'
ARM: dts: sun8i: v3s: Move the csi1 block to follow address order
ARM: dts: sun8i: Add ethernet0 alias in Nanopi NEO's device tree
dt-bindings: arm: sunxi: add haoyu,a20-marsboard
ARM: dts: sun7i: Add A20-Marsboard
ARM: dts: sunxi: h3/h5: add r_uart node
ARM: dts: nanopi-neo-air: Add eMMC and bluetooth
Link: https://lore.kernel.org/r/YhgMJ0AqaHopzaW3@kista.localdomain
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:10:52 +0000 (16:10 +0100)]
Merge tag 'omap-for-v5.18/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.18
Devicetree changes for omaps for v5.18:
- The devicetree node naming for pdu001 RTC name gets corrected
- For logicpd-torpedo baseboard, isp1763 USB controller gets added
- New board variant for SanCloud BBE Extended WiFi gets added
* tag 'omap-for-v5.18/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-sancloud-bbe-extended-wifi: New devicetree
ARM: dts: logicpd-torpedo: Add isp1763 support to baseboard
ARM: dts: am334x: pdu001: Use correct node name for RTC
Link: https://lore.kernel.org/r/pull-1645606669-127734@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:09:24 +0000 (16:09 +0100)]
Merge tag 'juno-update-5.18' of git://git./linux/kernel/git/sudeep.holla/linux into arm/dt
Arm Juno update for v5.18
Just a single update adding long waited support for SCMI firmware variant
as separate devicetrees. I wanted to deal with this differences in the
firmware interface within the bootloader for long time. But with variety
of bootloaders (u-boot, UEFI, ..etc) and need to add SCMI and SCPI
support for sake of discovery with discrepancies in shared memory layout,
it turned out difficult.
So, finally we are adding it as separate files so that we don't break
support for older SCPI firmware interface.
* tag 'juno-update-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Add separate SCMI variants
arm64: dts: juno: Remove GICv2m dma-range
Link: https://lore.kernel.org/r/20220222201812.3338619-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:06:56 +0000 (16:06 +0100)]
Merge tag 'imx-dt64-5.18' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree change for 5.18:
- New support for a number of i.MX8M Mini based boards: Protonic PRT8MM,
emCON-MX8M Mini, Toradex Verdin, Gateworks GW7903.
- A series from Adam Ford to enable GPC, USB and display support for
i.MX8M Nano.
- Enable G1 and G2 video decoder devices for i.MX8MM and i.MX8MQ.
- Enable PCIe support on imx8mm-beacon, tqma8mqml, imx8mm-evk,
imx8mq-evk and imx8mm-venice board.
- A series from Hugo Villeneuve to add PCA6416 interrupt controller
configuration, GPIO line names and i2C5 support for imx8mp-evk board.
- Correct I2C3 pad-ctrl and add internal display support for mnt-reform2
board.
- Improve fsl-ls1028a-qds overlay support by dropping syntax hard coding
and using overlay target for build.
- Add overlay support for serial modes and imx219 rpi v2 camera on
Gateworks imx8mm-venice devices.
- A set of patches from Teresa Remmet to update phyCORE-i.MX8MP SoM
device tree, including drive strength updates of different interfaces
and PMIC configuration changes.
- Device additions on various boards and some small random changes.
* tag 'imx-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (50 commits)
arm64: dts: imx8mp-phycore-som: Set usdhc root clock for eMMC
arm64: dts: imx8mp-phycore-som: LDO5 needs to be enabled instead of LDO4
arm64: dts: imx8mp-phycore-som: Set VDD_ARM run and standby voltage
arm64: dts: imx8mp-phycore-som: Update WDOG muxing
arm64: dts: imx8mp-phycore-som: Reduce drive strength for fec tx lines
arm64: dts: imx8mp-phycore-som: Adapt eMMC drive strength
arm64: dts: imx8mp-phycore-som: Set minimum output impedance for eth phy
arm64: dts: imx8mm-venice-gw72xx-0x: add dt overlay for imx219 rpi v2 camera
arm64: dts: imx8mm-venice-gw73xx-0x: add dt overlay for imx219 rpi v2 camera
arm64: dts: imx8mm-venice-gw72xx-0x: add dt overlays for serial modes
arm64: dts: imx8mm-venice-gw73xx-0x: add dt overlays for serial modes
arm64: dts: imx: Add i.mx8mm Gateworks gw7903 dts support
arm64: dts: ls1028a: add efuse node
arm64: dts: imx8mp-evk: add support for I2C5
arm64: dts: imx8mp-evk: add PCA6416 gpio line names
arm64: dts: imx8qm: added more serial alias to dts
arm64: dts: imx8qm: add compatible string for usdhc3
arm64: dts: imx8mq-evk: Add second PCIe port support
arm64: dts: imx8mm-beacon: Enable PCIe
arm64: dts: freescale: add initial support for verdin imx8m mini
...
Link: https://lore.kernel.org/r/20220222075226.160187-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:05:54 +0000 (16:05 +0100)]
Merge tag 'imx-dt-5.18' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm device tree change for 5.18:
- A series from Alexander Stein to update imx6qdl based TQMA6 and MBA6
devices, adding I2C bus recovery, marking GPIO buttons as wakeup
source etc.
- A set of maintenance patches from Oleksij Rempel adding display,
CAN termination and thermal support for i.MX6 based boards from
Plymovent, Protonic and from Kverneland.
- A couple of patches from Thierry Reding to correct i.MX28 RTC
compatbile, and rename RTC device nodes for i.MX SoCs.
- Update i.MX7 device tree to use audio_mclk_post_div clock instead of
audio_mclk_root_clk, and move PCIe out of AIPS3 bus.
- A couple of patches on imx6qdl-phytec to support PMIC MFD subdevices.
- Add pinctrl header support for i.MXRT1050 SoC.
- Other small and random changes.
* tag 'imx-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (22 commits)
ARM: dts: imx6qp-sabresd: Enable PCIe support
ARM: dts: imx6dl: plym2m, prtvt7, victgo: add thermal zones and hwmon
ARM: dts: imx6dl: plym2m, prtvt7, victgo: make use of new resistive-adc-touch driver
ARM: dts: imx6qdl-vicut1: add CAN termination support
ARM: dts: imx6dl-prtvt7: Add missing tvp5150 video decoder node
ARM: dts: imx6dl-prtvt7: Add display and panel nodes
ARM: dts: imx6qdl-mba6: Move pinmux to regulator node
ARM: dts: imx6qdl: tqma6: Remove obsolete comment
ARM: dts: imx6qdl: tqma6: Mark gpio-buttons as wakeup-source
ARM: dts: imx6qdl: tqma6: Add i2c bus recovery
ARM: dts: imx6qdl-mba6: Move rtc alias to common location
ARM: dts: imx7: Move PCIe out of AIPS3
ARM: dts: imx: Add missing LVDS decoder on M53Menlo
ARM: dts: imx6qdl-phytec: handle unneeded MFD-subdevices correctly
ARM: dts: imx6qdl-phytec: add missing pmic MFD subdevices
ARM: dts: imx7: Use audio_mclk_post_div instead audio_mclk_root_clk
ARM: dts: imx28: reparent gpmi clock to ref_gpmi
ARM: dts: imxrt1050-pinfunc: Add pinctrl binding header
ARM: dts: imx6sx-udoo-neo: Add HDMI support
ARM: dts: imx6qdl-dhcom-pdk2: Include missing headers
...
Link: https://lore.kernel.org/r/20220222075226.160187-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:04:11 +0000 (16:04 +0100)]
Merge tag 'imx-bindings-5.18' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX dt-bindings change for 5.18:
- New board compatible for Protonic PRT8MM, Toradex Verdin-imx8mm,
emCON-MX8M Mini, i.MX8MM GW7903.
- A series of patches from Lucas Stach adding support for i.MX8M VPU
and HSIO blk-ctrl power domains.
* tag 'imx-bindings-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: imx: add imx8mm gw7903 support
dt-bindings: soc: add binding for i.MX8MP HSIO blk-ctrl
dt-bindings: power: imx8mp: add defines for HSIO blk-ctrl domains
dt-bindings: power: add defines for i.MX8MP power domain
dt-bindings: arm: fsl: add toradex,verdin-imx8mm et al.
dt-bindings: arm: Add emtrion hardware emCON-MX8M Mini
dt-bindings: arm: imx: add Protonic PRT8MM board compatible
dt-bindings: soc: add binding for i.MX8MQ VPU blk-ctrl
dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains
Link: https://lore.kernel.org/r/20220222075226.160187-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 15:02:02 +0000 (16:02 +0100)]
Merge tag 'amlogic-arm64-dt-for-v5.18' of git://git./linux/kernel/git/amlogic/linux into arm/dt
Amlogic ARM64 DT changes for v5.18:
- New Boards:
- Amediatek X96-AIR (Amlogic S905X3)
- CYX A95XF3-AIR (Amlogic S905X3)
- Haochuangy H96-Max (Amlogic S905X3)
- Amlogic AQ222 (Amlogic S4)
- OSMC Vero 4K+ (Amlogic S905D)
- Initial support for Amlogic S4
- Support for uart_ao_b & pwm_f on G12 SoCs
* tag 'amlogic-arm64-dt-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: meson: add support for OSMC Vero 4K+
dt-bindings: arm: amlogic: add Vero 4K+ bindings
dt-bindings: vendor-prefixes: add osmc prefix
arm64: dts: meson-g12-common: add uart_ao_b pins muxing
arm64: dts: meson-g12-common: add more pwm_f options
arm64: dts: add support for S4 based Amlogic AQ222
arm64: dts: meson: add initial device-tree for H96-Max
dt-bindings: arm: amlogic: add H96-Max bindings
dt-bindings: vendor-prefixes: add haochuangyi prefix
arm64: dts: meson: add initial device-trees for A95XF3-AIR
dt-bindings: arm: amlogic: add A95XF3-AIR bindings
dt-bindings: vendor-prefixes: add cyx prefix
arm64: dts: meson: add initial device-trees for X96-AIR
dt-bindings: arm: amlogic: add X96-AIR bindings
arm64: dts: meson: add common SM1 ac2xx dtsi
arm64: dts: meson-sm1: add spdifin and pdifout nodes
dt-bindings: arm: amlogic: add S4 based AQ222 bindings
Link: https://lore.kernel.org/r/a7cd9937-d441-3e1f-9709-8e80cc8814f1@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:59:09 +0000 (15:59 +0100)]
Merge tag 'nuvoton-5.18-devicetree' of git://git./linux/kernel/git/joel/bmc into arm/dt
Nuvoton device tree updates for 5.18
* Additions to wpcm450 following the upstremaing of the pinctrl/gpio
driver for this platform
* Match more of the platform in MAINTAINERS
* tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
MAINTAINERS: ARM/WPCM450: Add 'W:' line with wiki
ARM: dts: wpcm450: Add pinmux information to UART0
ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons
ARM: dts: wpcm450: Add pin functions
ARM: dts: wpcm450: Add pinctrl and GPIO nodes
ARM: dts: wpcm450: Add global control registers (GCR) node
MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture
dt-bindings: arm/npcm: Add binding for global control registers (GCR)
Link: https://lore.kernel.org/r/CACPK8XdjF6dG04hR+iMpUP8=LSJi5x-hRivgCGDaY7o_461eJw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:51:12 +0000 (15:51 +0100)]
Merge branch 'mstar-dt-next' of https://github.com/linux-chenxing/linux into arm/dt
* 'mstar-dt-next' of https://github.com/linux-chenxing/linux:
ARM: mstar: Extend opp_table for infinity2m
ARM: mstar: Add OPP table for infinity3
ARM: mstar: Add OPP table for infinity
ARM: mstar: Link cpupll to second core
ARM: mstar: Link cpupll to cpu
ARM: mstar: Add cpupll to base dtsi
dt-bindings: clk: mstar msc313 cpupll binding description
ARM: dts: mstar: Add board for 100ask DongShanPiOne
dt-bindings: arm: mstar: Add compatible for 100ask DongShanPiOne
dt-bindings: vendor-prefixes: Add prefix for 100ask
ARM: dts: mstar: Add a dts for Miyoo Mini
dt-bindings: arm: mstar: Add compatible for Miyoo Mini
dt-bindings: vendor-prefixes: Add prefix for Miyoo
ARM: dts: mstar: Add the Wireless Tag IDO-SBC2D06-V1B-22W
dt-bindings: add vendor prefix for Wireless Tag
ARM: dts: mstar: Set gpio compatible for ssd20xd
Link: https://lore.kernel.org/r/20220216193131.59794-1-romain.perier@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:38:56 +0000 (15:38 +0100)]
Merge tag 'sti-dt-for-v5.18-round1' of git://git./linux/kernel/git/pchotard/sti into arm/dt
STi DT update:
- various DT fixes to avoid warnings when build with W=1
- DT clean-up
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:35:07 +0000 (15:35 +0100)]
Merge tag 'ixp4xx-dts-v5.18' of git://git./linux/kernel/git/linusw/linux-nomadik into arm/dt
IXP4xx patches for the v5.18 kernel cycle:
- Fix up the WG302 to support the v1 version (also tested)
- Fix up the syscon size
- Drop the alias for UART1 in GW7001
* tag 'ixp4xx-dts-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Drop serial 1 alias on GW7001
ARM: dts: ixp42x: Expand syscon register range
ARM: dts: ixp4xx: Fix up the Netgear WG302 device tree
Link: https://lore.kernel.org/r/CACRpkdaMk+XECwhXJYeiF8SMU6cQsj_dk8gGMoPE3zAURAPqTw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:33:17 +0000 (15:33 +0100)]
Merge tag 'ux500-dts-v5.18-1' of git://git./linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates for the v5.18 kernel cycle:
- Add battery thermal zones so we can monitor the battery temperature
- Enable charging options on AB8505
- Fix up all the AB8500 and AB8505 nodes in accordance with the new
schema.
- Fix the mounting matrix for the Janice phone.
* tag 'ux500-dts-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Correct Janice accel mount matrix
ARM: dts: ux500: Update AB850[05] nodes
ARM: dts: AB8505: Enable charging options
ARM: dts: ux500: Add battery thermal zones and NTCs
Link: https://lore.kernel.org/r/CACRpkdaDcEqtSnWzRBnBHVweh2n=Dj3meHG9LND+K0Czb9ORGg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:30:42 +0000 (15:30 +0100)]
Merge tag 'renesas-dt-bindings-for-v5.18-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.18
- Document support for the new RZ/V2L SoC and the RZ/V2L SMARC EVK
board.
* tag 'renesas-dt-bindings-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: power: renesas,rzg2l-sysc: Document RZ/V2L SoC
dt-bindings: arm: renesas: Document Renesas RZ/V2L SoC on SMARC EVK
Link: https://lore.kernel.org/r/cover.1644587209.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:23:11 +0000 (15:23 +0100)]
Merge tag 'renesas-arm-dt-for-v5.18-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18
- External interrupt (INTC-EX) support for the R-Car V3U SoC,
- Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
RZ/V2L SMARC EVK development boards,
- Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
and Condor development boards,
- NAND support for the RZ/N1D SoC,
- DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
- LVDS support for the R-Car M3-W+ SoC,
- HDMI output and 9-axis sensor support for the Kingfisher (ULCB
extension) board,
- MAX96712 GMSL serializer support for the Falcon development board,
- MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits)
arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
arm64: dts: renesas: rzg2lc-smarc-som: Enable eMMC on SMARC platform
arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK
arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC
dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
arm64: dts: renesas: ulcb/ulcb-kf: switch to use audio-graph-card2 for sound
arm64: dts: renesas: rcar-gen3: Add MOST devices
arm64: dts: renesas: Miscellaneous whitespace fixes
arm64: dts: renesas: falcon-csi-dsi: Add and connect MAX96712
arm64: dts: renesas: ulcb-kf: Add 9-asix sensor device
arm64: dts: renesas: ulcb-kf: Add KF HDMI output
arm64: dts: renesas: r8a77961: Add lvds0 device node
arm64: dts: renesas: r8a779f0: Add sys-dmac nodes
ARM: dts: r9a06g032: Describe the NAND controller
arm64: dts: renesas: Add GMSL cameras .dtsi
...
Link: https://lore.kernel.org/r/cover.1644587200.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:21:48 +0000 (15:21 +0100)]
Merge tag 'samsung-dt-pinctrl-5.18' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung pinctrl DTS and driver changes for v5.18
Conversion of Samsung pinctrl bindings to dtschema followed up with
alignment of DTS files to the dtschema.
The entire work consists of three parts but everything should be merged
at once to avoid dtschema check errors:
1. Samsung pinctrl driver change necessary to accept new DTS (driver
depends on node names and this has to be adjusted because of dtschema).
2. Conversion to dtschema which brings requirement of different naming
of the GPIO nodes.
3. DTS commits depending on driver (1) above, which convert all GPIO pin
bank names to new naming, required by dtschema.
This also includes few cleanups around DTS which are here to avoid
any merge conflicts.
The Samsung pinctrl driver changes are backwards compatible. However
the DTS changes (renaming nodes) could cause problems in out-of-tree or
other project implementations of the driver.
* tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits)
arm64: dts: exynos: use dedicated wake-up pinctrl compatible in ExynosAutov9
ARM: dts: s5pv210: align pinctrl with dtschema
ARM: dts: s3c64xx: align pinctrl with dtschema
ARM: dts: s3c24xx: align pinctrl with dtschema
arm64: dts: exynos: align pinctrl with dtschema in ExynosAutov9
arm64: dts: exynos: align pinctrl with dtschema in Exynos7
arm64: dts: exynos: align pinctrl with dtschema in Exynos5433
ARM: dts: exynos: align pinctrl with dtschema in Exynos542x/5800
ARM: dts: exynos: align pinctrl with dtschema in Exynos5410
ARM: dts: exynos: align pinctrl with dtschema in Exynos5260
ARM: dts: exynos: align pinctrl with dtschema in Exynos5250
ARM: dts: exynos: align pinctrl with dtschema in Exynos4412
ARM: dts: exynos: align pinctrl with dtschema in Exynos4210
ARM: dts: exynos: align pinctrl with dtschema in Exynos3250
ARM: dts: s3c64xx: drop unneeded pinctrl wake-up interrupt mapping
ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pi
ARM: dts: exynos: override pins by label in Peach Pi
ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pit
ARM: dts: exynos: override pins by label in Peach Pit
ARM: dts: exynos: simplify PMIC DVS pin configuration in Odroid XU
...
Link: https://lore.kernel.org/r/20220129115352.13274-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:19:06 +0000 (15:19 +0100)]
Merge tag 'socfpga_dts_update_for_v5.18_part1' of git://git./linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA dts updates for v5.18, part 1
- Cleanup of Altera/Intel ARMv7 and ARMv8 DTS and bindings
* tag 'socfpga_dts_update_for_v5.18_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: (22 commits)
ARM: dts: socfpga: cyclone5: align regulator node with dtschema
ARM: dts: socfpga: arria10: align regulator node with dtschema
arm64: dts: agilex: align pl330 node name with dtschema
arm64: dts: stratix10: align pl330 node name with dtschema
arm64: dts: intel: socfpga_agilex_socdk: align LED node names with dtschema
arm64: dts: agilex: align mmc node names with dtschema
arm64: dts: agilex: add board compatible for N5X DK
arm64: dts: agilex: add board compatible for SoCFPGA DK
arm64: dts: stratix10: align regulator node names with dtschema
arm64: dts: stratix10: align mmc node names with dtschema
arm64: dts: stratix10: move ARM timer out of SoC node
arm64: dts: stratix10: add board compatible for SoCFPGA DK
ARM: dts: arria10: add board compatible for SoCFPGA DK
ARM: dts: arria10: add board compatible for Mercury AA1
ARM: dts: arria5: add board compatible for SoCFPGA DK
dt-bindings: clock: intel,stratix10: convert to dtschema
dt-bindings: intel: document Agilex based board compatibles
dt-bindings: altera: document Stratix 10 based board compatibles
dt-bindings: altera: document VT compatibles
dt-bindings: altera: document Arria 10 based board compatibles
...
Link: https://lore.kernel.org/r/20220211112556.98940-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:15:05 +0000 (15:15 +0100)]
Merge tag 'samsung-dt64-5.18' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.18
1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
- Add necessary clock controller inputs on Exynos7.
- Add USB DWC3 supplies.
- Drop old syscon phandle on Exynos5433.
3. Add initial Exynos850 support and WinLink E850-96 board using it.
* tag 'samsung-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: adjust USB DRD clocks with dtschema in Exynos7
arm64: dts: exynos: drop unneeded syscon phandle in Exynos5433 LPASS
arm64: dts: exynos: align pl330 node name with dtschema
arm64: dts: exynos: Add initial E850-96 board support
arm64: dts: exynos: Add initial Exynos850 SoC support
arm64: dts: exynos: add USB DWC3 supplies to Espresso board
arm64: dts: exynos: add necessary clock inputs in Exynos7
arm64: dts: exynos: Align MAX77843 nodes with dtschema on TM2
Link: https://lore.kernel.org/r/20220209145226.184375-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:13:51 +0000 (15:13 +0100)]
Merge tag 'samsung-dt-5.18' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.18
1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
- Add necessary clock controller inputs on Exynos5260.
- Drop unsupported regulators on Odroid XU.
- Add USB DWC3 supplies.
- Drop old thermal properties from Exynos4210.
3. Add support for Samsung Chagall WiFi (Exynos5420, Samsung Galaxy Tab
S 10.5", SM-T800 ) and a similar Samsung Klimt WiFi (Samsung Galaxy
Tab S 8.4").
4. Add battery to Samsung P4Nnote (Exynos4412, Samsung Galaxy Note
10.1).
* tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (22 commits)
ARM: dts: exynos: use generic node name for LPDDR3 timings in Odroid
ARM: dts: exynos: add charger and battery to p4note
ARM: dts: exynos: update dma node name with dtschema
ARM: dts: exynos: use define for TMU clock on Exynos4412
ARM: dts: exynos: drop old thermal properties from Exynos4210
ARM: dts: exynos: add fake USB DWC3 supplies to SMDK5410
ARM: dts: exynos: add USB DWC3 supplies to SMDK5420
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pi
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pit
ARM: dts: exynos: add USB DWC3 supplies to ArndaleOcta
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Spring
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Snow
ARM: dts: exynos: add USB DWC3 supplies to SMDK5250
ARM: dts: exynos: add USB DWC3 supplies to Arndale
ARM: dts: exynos: Add support for Samsung Klimt WiFi
dt-bindings: arm: samsung: document Klimt WiFi board binding
ARM: dts: exynos: Add support for Samsung Chagall WiFi
dt-bindings: arm: samsung: document Chagall WiFi board binding
ARM: dts: exynos: drop unsupported MAX77802 regulators on Odroid XU
ARM: dts: exynos: add necessary clock controller inputs in Exynos5260
...
Link: https://lore.kernel.org/r/20220209145226.184375-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Feb 2022 14:12:11 +0000 (15:12 +0100)]
Merge tag 'tesla-dt64-5.18' of git://git./linux/kernel/git/krzk/linux into arm/dt
Tesla FSD ARM64 changes for v5.18
Add Tesla FSD SoC ARM64 platform: bindings, DTSI+DTS, maintainer's entry
and defconfig change. This brings and enables this new platform.
This includes clock controller bindings (header files with clock IDs)
which are shared also with Tesla FSD SoC clock controller pull request.
* tag 'tesla-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: fsd: Add SPI device nodes
arm64: defconfig: Enable Tesla FSD SoC
arm64: dts: fsd: Add initial pinctrl support
arm64: dts: fsd: Add initial device tree support
dt-bindings: clock: Document FSD CMU bindings
dt-bindings: clock: Add bindings definitions for FSD CMU blocks
dt-bindings: arm: add Tesla FSD ARM SoC
dt-bindings: add vendor prefix for Tesla
Link: https://lore.kernel.org/r/20220204154112.133723-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Geert Uytterhoeven [Mon, 21 Feb 2022 15:48:54 +0000 (16:48 +0100)]
arm64: dts: renesas: spider: Complete SCIF3 description
Complete the description of the serial console by adding RTS/CTS, the
external clock crystal, and pin control.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/8e5701ca2a5f5925918217ab79e8489535339e7b.1645458249.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:48:53 +0000 (16:48 +0100)]
arm64: dts: renesas: r8a779f0: Add pinctrl device node
Add a device node for the Pin Function Controller on the Renesas R-Car
S4-8 (R8A779F0) SoC.
Note that the register block does not include registers for banks 4-7,
as they can only be accessed from the Control Domain.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/cf4d261ba1253879e117f1598b9f47798cbda635.1645458249.git.geert+renesas@glider.be
Claudiu Beznea [Thu, 13 Jan 2022 14:48:58 +0000 (16:48 +0200)]
ARM: dts: at91: sama7g5: add opps
Add OPPs for SAMA7G5 along with clock for CPU.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-9-claudiu.beznea@microchip.com
Claudiu Beznea [Thu, 13 Jan 2022 14:48:57 +0000 (16:48 +0200)]
ARM: dts: at91: sama7g5ek: set regulator voltages for standby state
Set regulator voltages for standby state to avoid wrong behavior of
system while in standby. The CPU voltage has been chosen as being the
one corresponding to OPP=600MHz. Next commit will set the 600MHz OPP
as the suspend OPP.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-8-claudiu.beznea@microchip.com
Claudiu Beznea [Thu, 13 Jan 2022 14:48:56 +0000 (16:48 +0200)]
ARM: dts: at91: fix low limit for CPU regulator
Fix low limit for CPU regulator. Otherwise setting voltages lower than
1.125V will not be allowed (CPUFreq will not be allowed to set proper
voltages on proper frequencies).
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-7-claudiu.beznea@microchip.com
Hari Prasath [Tue, 22 Feb 2022 11:39:24 +0000 (17:09 +0530)]
ARM: dts: at91: sama7g5: Enable can0 and can1 support in sama7g5-ek
Enable the can0 and can1 controllers in sama7g5-ek board along with
its pin mux settings.
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220222113924.25799-3-Hari.PrasathGE@microchip.com
Hari Prasath [Tue, 22 Feb 2022 11:39:23 +0000 (17:09 +0530)]
ARM: dts: at91: sama7g5: Add can controllers of sama7g5
Add support for all the six CAN controllers of sama7g5.The internal SRAM of 128KB
is split among the CAN controllers for the message RAM elements leaving a small
portion reserved for power management. The SRAM split up is as below.
Lower 64K:
PM 13K
can-0 17K
can-1 17K
can-2 17K
Higher 64K:
can-3 17K
can-4 17K
can-5 17K
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220222113924.25799-2-Hari.PrasathGE@microchip.com
Tudor Ambarus [Tue, 8 Feb 2022 10:56:46 +0000 (12:56 +0200)]
ARM: dts: at91: sama7g5: Add crypto nodes
Describe and enable the AES, SHA and TDES crypto IPs. Tested with the
extra run-time self tests of the registered crypto algorithms.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220208105646.226623-1-tudor.ambarus@microchip.com
Tudor Ambarus [Tue, 8 Feb 2022 11:12:25 +0000 (13:12 +0200)]
ARM: dts: at91: Use the generic "crypto" node name for the crypto IPs
The DT specification recommeds that:
"The name of a node should be somewhat generic, reflecting the function of
the device and not its precise programming model. If appropriate, the name
should be one of the following choices:"
"crypto" being the recommendation for the crypto nodes. Follow the DT
recommendation and use the generic "crypto" node name for the at91 crypto
IPs. While at this, add labels to the crypto nodes where they missed, for
easier reference purposes.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220208111225.234685-1-tudor.ambarus@microchip.com
Claudiu Beznea [Mon, 7 Feb 2022 11:15:23 +0000 (13:15 +0200)]
ARM: dts: at91: remove status = "okay" from soc specific dtsi
Remove status = "okay" from SoC specific dtsi as this is the default
state.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220207111523.575474-1-claudiu.beznea@microchip.com
Tudor Ambarus [Tue, 11 Jan 2022 13:23:01 +0000 (15:23 +0200)]
ARM: dts: at91: sama5d2: Fix PMERRLOC resource size
PMERRLOC resource size was set to 0x100, which resulted in HSMC_ERRLOCx
register being truncated to offset x = 21, causing error correction to
fail if more than 22 bit errors and if 24 or 32 bit error correction
was supported.
Fixes:
d9c41bf30cf8 ("ARM: dts: at91: Declare EBI/NAND controllers")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: <stable@vger.kernel.org> # 4.13.x
Acked-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220111132301.906712-1-tudor.ambarus@microchip.com
Michael Walle [Thu, 10 Feb 2022 13:18:17 +0000 (14:18 +0100)]
dt-bindings: arm: at91: add Kontron's new KSwitches
The Kontron KSwitch D10 MMT series ethernet switches features a LAN9668
SoC with either 8 copper ports or 6 copper port and two SFP cages.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220210131817.484922-1-michael@walle.cc
Jernej Skrabec [Sun, 20 Feb 2022 21:07:14 +0000 (22:07 +0100)]
MAINTAINERS: Update Allwinner SoCs maintainers
Maxime is stepping down as a maintainer, I'll take more active role and
Samuel joined the team.
Maxime, thank you for your effort! Samuel, welcome!
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20220220210714.2484019-1-jernej.skrabec@gmail.com
Kavyasree Kotagiri [Mon, 21 Feb 2022 08:08:58 +0000 (13:38 +0530)]
ARM: dts: add DT for lan966 SoC and 2-port board pcb8291
This patch adds basic DT for Microchip lan966x SoC and associated board
pcb8291(2-port EVB). Adds peripherals required to allow booting: Interrupt
Controller, Clock, Generic ARMv7 Timers, Synopsys Timer, Flexcoms, GPIOs.
Also adds other peripherals like crypto(AES/SHA), DMA, Watchdog Timer, TRNG
and MCAN0.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220221080858.14233-1-kavyasree.kotagiri@microchip.com
Geert Uytterhoeven [Thu, 24 Feb 2022 12:33:09 +0000 (13:33 +0100)]
ARM: dts: renesas: Align GPIO hog names with dtschema
Dtschema expects GPIO hogs to end with a "hog" suffix.
Also, the convention for node names is to use hyphens, not underscores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/972d982024cbb04dcf29b2a0ac6beaf41e66c363.1645705927.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 24 Feb 2022 12:33:40 +0000 (13:33 +0100)]
arm64: dts: renesas: Align GPIO hog names with dtschema
Dtschema expects GPIO hogs to end with a "hog" suffix.
Also, the convention for node names is to use hyphens, not underscores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/baee4b9980576ffbab24122fce7147c9cbc2ea59.1645705998.git.geert+renesas@glider.be
Biju Das [Wed, 23 Feb 2022 16:58:13 +0000 (16:58 +0000)]
arm64: dts: renesas: rzg2lc-smarc-som: Enable watchdog
Enable watchdog{0, 1, 2} interfaces on RZ/G2LC SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220223165813.24833-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Jean-Jacques Hiblot [Mon, 21 Feb 2022 09:50:30 +0000 (10:50 +0100)]
ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 60s timeout
60s is a sensible default value.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Link: https://lore.kernel.org/r/20220221095032.95054-5-jjhiblot@traphandler.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Jean-Jacques Hiblot [Mon, 21 Feb 2022 09:50:29 +0000 (10:50 +0100)]
ARM: dts: r9a06g032: Add the watchdog nodes
This SoC includes 2 watchdog controllers (one per A7 core).
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Link: https://lore.kernel.org/r/20220221095032.95054-4-jjhiblot@traphandler.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Jean-Jacques Hiblot [Mon, 21 Feb 2022 09:50:27 +0000 (10:50 +0100)]
dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
This clock is actually the REF_SYNC_D8 clock.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220221095032.95054-2-jjhiblot@traphandler.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Krzysztof Kozlowski [Mon, 14 Feb 2022 08:19:16 +0000 (09:19 +0100)]
arm64: dts: rockchip: align Google CROS EC PWM node name with dtschema
dtschema expects PWM node name to be a generic "pwm". This also matches
Devicetree specification requirements about generic node names.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20220214081916.162014-5-krzysztof.kozlowski@canonical.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Michael Riesch [Tue, 22 Feb 2022 17:50:04 +0000 (18:50 +0100)]
arm64: dts: rockchip: enable rk809 audio codec on the rk3568 evb1-v10
Enable the Rockchip RK809 audio codec on the Rockchip RK3568
EVB1-V10. This requires the VCCIO_ACODEC voltage regulator to be set
to always on.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220222175004.1308990-2-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Michael Riesch [Wed, 23 Feb 2022 11:20:08 +0000 (12:20 +0100)]
arm64: dts: rockchip: set vdd_gpu regulator on rk3568-evb1-v10 to always on
As discussed in [0], the Rockchip power domain driver does not consider
the external supplies (such as VDD_GPU on the RK3568 EVB1). In the scope of
this discussion it has been pointed out that turning this voltage on/off
on the fly is not explicitly supported. This patch follows the other RK356x
boards by example and sets the vdd_gpu regulator to always on.
[0] https://lore.kernel.org/linux-rockchip/
20211217130919.3035788-1-s.hauer@pengutronix.de/
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220223112008.1316132-1-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Michael Riesch [Wed, 23 Feb 2022 16:20:54 +0000 (17:20 +0100)]
arm64: dts: rockchip: add the vdd_cpu regulator to rk3568-evb1-v10
The TCS4525 voltage regulator provides the vdd_cpu on the Rockchip
RK3568 EVB1. Add the device tree node and connect it to the CPU
nodes.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220223162054.1626257-1-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Michael Riesch [Tue, 22 Feb 2022 17:50:03 +0000 (18:50 +0100)]
arm64: dts: rockchip: enable work led on rk3568-evb1-v10
Enable the blue work LED on the Rockchip RK3568 EVB1-V10.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220222175004.1308990-1-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Geert Uytterhoeven [Tue, 18 Jan 2022 17:09:05 +0000 (18:09 +0100)]
arm64: dts: renesas: spider-cpu: Enable watchdog timer
Enable the watchdog timer on the Spider board.
Extracted from a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/b36b2bb5770e10d906571721a3d73ca205b6f56e.1642525158.git.geert+renesas@glider.be
Geert Uytterhoeven [Tue, 18 Jan 2022 17:09:04 +0000 (18:09 +0100)]
arm64: dts: renesas: r8a779f0: Add RWDT node
Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas
R-Car S4-8 (R8A779F0) SoC.
Extracted from a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/556a7f41bdadceecbe8b59b79ac7e9f592ca17a2.1642525158.git.geert+renesas@glider.be
Richard Zhu [Mon, 21 Feb 2022 06:33:56 +0000 (14:33 +0800)]
ARM: dts: imx6qp-sabresd: Enable PCIe support
In the i.MX6QP sabresd board(sch-28857) design, one external oscillator
is powered up by vgen3 and used as the PCIe reference clock source by
the endpoint device.
If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would
has to be in bypass mode, and ENET clocks would be messed up.
To keep things simple, let RC use the internal PLL as reference clock
and set vgen3 always on to enable the external oscillator for endpoint
device on i.MX6QP sabresd board.
NOTE: This reference clock setup is used to pass the GEN2 TX compliance
tests, and isn't recommended as a setup in the end-user design.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Robin Murphy [Thu, 17 Feb 2022 19:11:03 +0000 (19:11 +0000)]
arm64: dts: juno: Add separate SCMI variants
While Juno's SCP firmware initially spoke the SCPI protocol, binary
releases since 2018, and the newer open-source codebase, only speak SCMI
and thus aren't particularly compatibile with the DTs we currently have
upstream. Add a parallel set of variant DTs for boards with up-to-date
firmware, replacing the SCPI parts with their new SCMI equivalents.
Link: https://lore.kernel.org/r/f3516815104f951a05fc0f799681f77d7968f6ac.1645125063.git.robin.murphy@arm.com
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Sergey Shtylyov [Thu, 10 Feb 2022 17:59:57 +0000 (20:59 +0300)]
MAINTAINERS: Specify IRC channel for Renesas ARM64 port
The Renesas ARM ports do have their own IRC channel #renesas-soc (initially
created on Freenode, then moved to Liberta.Chat). Hopefully, adding it to
this file will attract more people... :-)
Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/6c08e98f-c7bb-9d95-5032-69022e43e39b@omp.ru
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sergey Shtylyov [Thu, 10 Feb 2022 17:58:12 +0000 (20:58 +0300)]
MAINTAINERS: Specify IRC channel for Renesas ARM32 port
The Renesas ARM ports do have their own IRC channel #renesas-soc (initially
created on Freenode, then moved to Liberta.Chat). Hopefully, adding it to
this file will attract more people... :-)
Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/2f108f63-0cf7-cc4c-462e-ec63736234cf@omp.ru
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Nikita Yushchenko [Wed, 16 Feb 2022 18:10:04 +0000 (21:10 +0300)]
arm64: dts: renesas: ulcb-kf: fix wrong comment
Fix comment referencing salvator board, likely a copy-paste leftover.
ulcb-kf.dtsi has nothing to do with salvator.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Fixes:
80c07701d5918928 ("arm64: dts: renesas: ulcb-kf: add pcm3168 sound codec")
Link: https://lore.kernel.org/r/20220216181003.114049-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Christian Hewitt [Fri, 11 Feb 2022 10:53:11 +0000 (10:53 +0000)]
arm64: dts: meson: add support for OSMC Vero 4K+
The OSMC Vero 4K+ device is based on the Amlogic S905D (P230)
reference design with the following specifications:
- 2GB DDR4 RAM
- 16GB eMMC
- HDMI 2.1 video
- S/PDIF optical output
- AV output
- 10/100/1000 Ethernet
- AP6255 Wireless (802.11 a/b/g/n/ac, BT 4.2)
- 2x USB 2.0 ports (1x OTG)
- IR receiver (internal)
- IR extender port (external)
- 1x micro SD card slot
- 1x Power LED (red)
- 1x Reset button (in AV jack)
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Tested-by: Chad Wagner <wagnerch42@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220211105311.30320-4-christianshewitt@gmail.com
Christian Hewitt [Fri, 11 Feb 2022 10:53:10 +0000 (10:53 +0000)]
dt-bindings: arm: amlogic: add Vero 4K+ bindings
Add the board binding for the OSMC Vero 4K+ STB device
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220211105311.30320-3-christianshewitt@gmail.com
Christian Hewitt [Fri, 11 Feb 2022 10:53:09 +0000 (10:53 +0000)]
dt-bindings: vendor-prefixes: add osmc prefix
Open Source Media Centre (Sam Nazarko Trading Ltd.) are a manufacturer
of Linux Set-Top Box devices.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220211105311.30320-2-christianshewitt@gmail.com
Jonas Kuenstler [Fri, 18 Feb 2022 12:04:58 +0000 (13:04 +0100)]
arm64: dts: imx8mp-phycore-som: Set usdhc root clock for eMMC
Set the usdhc root clock to 400MHz to be able to support
HS400/HS400ES modes for eMMC on phyCORE-i.MX8MP SoM.
Signed-off-by: Jonas Kuenstler <j.kuenstler@phytec.de>
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Teresa Remmet [Fri, 18 Feb 2022 12:04:57 +0000 (13:04 +0100)]
arm64: dts: imx8mp-phycore-som: LDO5 needs to be enabled instead of LDO4
LDO4 is not connected so disable it. And LDO5 is used for VSEL of
the NVCC_SD2 SD-Card bus. Having it disabled seems not to have an
impact on the functionality. We enable it, as it is used.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Teresa Remmet [Fri, 18 Feb 2022 12:04:56 +0000 (13:04 +0100)]
arm64: dts: imx8mp-phycore-som: Set VDD_ARM run and standby voltage
Add bindings for VDD_ARM (BUCK2) run and standby voltage.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Teresa Remmet [Fri, 18 Feb 2022 12:04:55 +0000 (13:04 +0100)]
arm64: dts: imx8mp-phycore-som: Update WDOG muxing
To be able to trigger a reset also from an external source we
need to configure the WDOG pin as open drain.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Teresa Remmet [Fri, 18 Feb 2022 12:04:54 +0000 (13:04 +0100)]
arm64: dts: imx8mp-phycore-som: Reduce drive strength for fec tx lines
Reduce drive strength on fec tx lines for signal quality improvements.
Measurements showed that TD0 and TD1 require X4 and the other lines
X2 for optimized settings.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Teresa Remmet [Fri, 18 Feb 2022 12:04:53 +0000 (13:04 +0100)]
arm64: dts: imx8mp-phycore-som: Adapt eMMC drive strength
Set eMMC drive strength for USDHC3_DATA lines (200Mhz)
to X4 for signal improvement.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Teresa Remmet [Fri, 18 Feb 2022 12:04:52 +0000 (13:04 +0100)]
arm64: dts: imx8mp-phycore-som: Set minimum output impedance for eth phy
To fit spec requirements set minimum output impedance for dp83867
ethernet phy.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Mon, 14 Feb 2022 23:14:24 +0000 (15:14 -0800)]
arm64: dts: imx8mm-venice-gw72xx-0x: add dt overlay for imx219 rpi v2 camera
Add support for the RaspberryPi Camera v2 which is an IMX219 8MP module:
- https://datasheets.raspberrypi.com/camera/camera-v2-schematics.pdf
- has its own on-board 24MHz osc so no clock required from baseboard
- pin 11 enables 1.8V and 2.8V LDO which is connected to
GW73xx MIPI_GPIO4 (IMX8MM GPIO1_IO1) so we use this as a gpio
Support is added via a device-tree overlay.
The IMX219 supports RAW8/RAW10 image formats.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Mon, 14 Feb 2022 23:14:23 +0000 (15:14 -0800)]
arm64: dts: imx8mm-venice-gw73xx-0x: add dt overlay for imx219 rpi v2 camera
Add support for the RaspberryPi Camera v2 which is an IMX219 8MP module:
- https://datasheets.raspberrypi.com/camera/camera-v2-schematics.pdf
- has its own on-board 24MHz osc so no clock required from baseboard
- pin 11 enables 1.8V and 2.8V LDO which is connected to
GW73xx MIPI_GPIO4 (IMX8MM GPIO1_IO1) so we use this as a gpio
controlled regulator enable.
Support is added via a device-tree overlay.
The IMX219 supports RAW8/RAW10 image formats.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Mon, 14 Feb 2022 23:14:22 +0000 (15:14 -0800)]
arm64: dts: imx8mm-venice-gw72xx-0x: add dt overlays for serial modes
The imx8mm-venice-gw72xx-0x som+baseboard combination has a multi-protocol
RS-232/RS-485/RS-422 transceiver to an off-board connector which
can be configured in a number of ways via UART and GPIO configuration.
The default configuration per the imx8mm-venice-gw72xx-0x dts is for
UART2 TX/RX and UART4 TX/RX to be available as RS-232:
J15.1 UART2 TX out
J15.2 UART2 RX in
J15.3 UART4 TX out
J15.4 UART4 RX in
J15.5 GND
Add dt overlays to allow additional the modes of operation:
rs232-rts (UART2 RS-232 with RTS/CTS hardware flow control)
J15.1 TX out
J15.2 RX in
J15.3 RTS out
J15.4 CTS in
J15.5 GND
rs485 (UART2 RS-485 half duplex)
J15.1 TXRX-
J15.2 N/C
J15.3 TXRX+
J15.4 N/C
J15.5 GND
rs422 (UART2 RS-422 full duplex)
J15.1 TX-
J15.2 RX+
J15.3 TX+
J15.4 RX-
J15.5 GND
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Mon, 14 Feb 2022 23:14:21 +0000 (15:14 -0800)]
arm64: dts: imx8mm-venice-gw73xx-0x: add dt overlays for serial modes
The imx8mm-venice-gw73xx-0x som+baseboard combination has a multi-protocol
RS-232/RS-485/RS-422 transceiver to an off-board connector which
can be configured in a number of ways via UART and GPIO configuration.
The default configuration per the imx8mm-venice-gw73xx-0x dts is for
UART2 TX/RX and UART4 TX/RX to be available as RS-232:
J15.1 UART2 TX out
J15.2 UART2 RX in
J15.3 UART4 TX out
J15.4 UART4 RX in
J15.5 GND
Add dt overlays to allow additional the modes of operation:
rs232-rts (UART2 RS-232 with RTS/CTS hardware flow control)
J15.1 TX out
J15.2 RX in
J15.3 RTS out
J15.4 CTS in
J15.5 GND
rs485 (UART2 RS-485 half duplex)
J15.1 TXRX-
J15.2 N/C
J15.3 TXRX+
J15.4 N/C
J15.5 GND
rs422 (UART2 RS-422 full duplex)
J15.1 TX-
J15.2 RX+
J15.3 TX+
J15.4 RX-
J15.5 GND
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Fri, 11 Feb 2022 19:04:17 +0000 (11:04 -0800)]
dt-bindings: arm: imx: add imx8mm gw7903 support
The GW7903 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD connector with UHS support
- LIS2DE12 3-axis accelerometer
- Gateworks System Controller
- IMX8M FEC
- software selectable RS232/RS485/RS422 serial transceiver
- PMIC
- 2x off-board bi-directional opto-isolated digital I/O
- 1x M.2 A-E Key Socket and 1x MiniPCIe socket with USB2.0 and PCIe
(resistor loading to route PCIe/USB2 between M.2 and MiniPCIe socket)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Fri, 11 Feb 2022 19:04:18 +0000 (11:04 -0800)]
arm64: dts: imx: Add i.mx8mm Gateworks gw7903 dts support
The GW7903 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD connector with UHS support
- LIS2DE12 3-axis accelerometer
- Gateworks System Controller
- IMX8M FEC
- software selectable RS232/RS485/RS422 serial transceiver
- PMIC
- 2x off-board bi-directional opto-isolated digital I/O
- 1x M.2 A-E Key Socket and 1x MiniPCIe socket with USB2.0 and PCIe
(resistor loading to route PCIe/USB2 between M.2 and MiniPCIe socket)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Michael Walle [Mon, 14 Feb 2022 11:55:29 +0000 (12:55 +0100)]
arm64: dts: ls1028a: add efuse node
Layerscape SoCs contain a Security Fuse Processor which is basically a
efuse controller. Add the node, so userspace can read the efuses.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Hugo Villeneuve [Fri, 11 Feb 2022 15:38:43 +0000 (10:38 -0500)]
arm64: dts: imx8mp-evk: add support for I2C5
Add support for i2c5, which is used to access the
external I2C bus on connector J22 of the imx8mp-evk.
Limit the speed to 100kHz since this is an external I2C bus.
Disabled by default, since it is shared with the CAN1 bus.
To enable i2c5, you need to disable the CAN1 function, enable the i2c5
function and also configure the CAN1/I2C5_SEL GPIO to HIGH to
select i2c5 instead of CAN1. This can be done by defining a gpio-hog
inside the pca6416 node, in your board device tree, like in this example:
&flexcan1 {
status = "disabled";
};
&i2c5 {
status = "okay";
};
&pca6416 {
can1-i2c5-sel-hog {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "can1-i2c5-sel";
};
};
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Hugo Villeneuve [Fri, 11 Feb 2022 15:38:17 +0000 (10:38 -0500)]
arm64: dts: imx8mp-evk: add PCA6416 gpio line names
Add gpio-line-names for the various GPIO's connected to the PCA6416
I/O expander on the imx8mp EVK.
This helps when using the new gpiod interface to find the GPIOs by name.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Oliver Graute [Wed, 9 Feb 2022 15:50:55 +0000 (16:50 +0100)]
arm64: dts: imx8qm: added more serial alias to dts
Add more serial alias to imx8qm.dtsi file
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Oliver Graute [Wed, 9 Feb 2022 15:42:23 +0000 (16:42 +0100)]
arm64: dts: imx8qm: add compatible string for usdhc3
add compatible string for usdhc3
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Jonathan Neuschäfer [Fri, 18 Feb 2022 16:08:34 +0000 (17:08 +0100)]
MAINTAINERS: ARM/WPCM450: Add 'W:' line with wiki
The wiki is a useful source of 3rd-party information about the SoC,
mostly hardware documentation.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220218160834.320200-1-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Heiko Stuebner [Mon, 27 Dec 2021 23:45:29 +0000 (00:45 +0100)]
arm64: dts: rockchip: fix supplies for pwm regulators
The supply-name for pwm-regualators is "pwm", so the property
needs to be pwm-supply, not vin-supply as in a number of boards.
In all cases changed here, the supplying regulator is always
an always-on fixed-regulator, so there will be no functional
change and only a change in the regulator hirarchy, as can be seen
for example in the regulator-summary.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20211227234529.1970281-2-heiko@sntech.de
Heiko Stuebner [Mon, 27 Dec 2021 23:45:28 +0000 (00:45 +0100)]
arm64: dts: rockchip: define vdd_log on rk3399-puma
vdd_log supplied a lot of the logic parts of the soc and is
supplied through pwm2.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20211227234529.1970281-1-heiko@sntech.de
Paul Barker [Wed, 16 Feb 2022 10:24:30 +0000 (10:24 +0000)]
ARM: dts: am335x-sancloud-bbe-extended-wifi: New devicetree
Add support for the SanCloud BBE Extended WiFi board which shares common
hardware with other BBE varients. Compared to the vanilla BBE, this
particular model:
* adds a WiFi+Bluetooth module connected via SDIO and UART.
* drops the HDMI encoder, barometer and accelerometer.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Adam Ford [Thu, 10 Feb 2022 13:10:28 +0000 (07:10 -0600)]
ARM: dts: logicpd-torpedo: Add isp1763 support to baseboard
The baseboard has an ISP1763 USB controller acting as a host.
Since the pinmuxing for the corresponding IRQ is different
between OMAP35 and DM37, the pinmux has been placed in the
kit-level files, while the common code is placed into the
baseboard file.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Thierry Reding [Mon, 20 Dec 2021 13:41:39 +0000 (14:41 +0100)]
ARM: dts: am334x: pdu001: Use correct node name for RTC
RTC devices should be named "rtc" according to the standard RTC device
tree schema.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Romain Perier [Tue, 30 Nov 2021 17:54:49 +0000 (18:54 +0100)]
ARM: mstar: Extend opp_table for infinity2m
infinity2m are running up to 1.2Ghz, this extends opp_table with the
corresponding frequencies and enable operating-points table for cpu1
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Daniel Palmer [Tue, 23 Feb 2021 06:18:29 +0000 (15:18 +0900)]
ARM: mstar: Add OPP table for infinity3
The infinity3 has a slightly higher max frequency
compared to the infinity so extend the OPP table.
Co-authored-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Daniel Palmer [Tue, 23 Feb 2021 06:18:28 +0000 (15:18 +0900)]
ARM: mstar: Add OPP table for infinity
Add an OPP table for the inifinity chips so
that cpu frequency scaling can happen.
Co-authored-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Daniel Palmer [Tue, 23 Feb 2021 06:18:27 +0000 (15:18 +0900)]
ARM: mstar: Link cpupll to second core
The second core also sources it's clock from the CPU PLL.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Daniel Palmer [Tue, 23 Feb 2021 06:18:26 +0000 (15:18 +0900)]
ARM: mstar: Link cpupll to cpu
The CPU clock is sourced from the CPU PLL.
Link cpupll to the cpu so that frequency scaling can happen.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Daniel Palmer [Tue, 23 Feb 2021 06:18:25 +0000 (15:18 +0900)]
ARM: mstar: Add cpupll to base dtsi
All MStar/SigmaStar ARMv7 SoCs have the CPU PLL at the same
place so add it to the base dtsi.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Daniel Palmer [Tue, 23 Feb 2021 06:18:23 +0000 (15:18 +0900)]
dt-bindings: clk: mstar msc313 cpupll binding description
Add a binding description for the MStar/SigmaStar CPU PLL block.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Alain Volmat [Fri, 11 Feb 2022 18:16:14 +0000 (19:16 +0100)]
ARM: dts: sti: move usb picophy nodes out of soc in stih418.dtsi
Move the usb2_picophy1 and usb2_picophy2 nodes out of the soc section.
Since they are controlled via syscfg, there is no reg property needed,
which is required when having the node within the soc section.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Alain Volmat [Fri, 11 Feb 2022 18:16:13 +0000 (19:16 +0100)]
ARM: dts: sti: move usb picophy nodes out of soc in stih410.dtsi
Move the usb2_picophy1 and usb2_picophy2 nodes out of the soc section.
Since they are controlled via syscfg, there is no reg property needed,
which is required when having the node within the soc section.
Modification is done within stih410.dtsi and within related board
dts files (stih410-b2120.dts, stih410-b2260.dts).
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Alain Volmat [Fri, 11 Feb 2022 18:16:12 +0000 (19:16 +0100)]
ARM: dts: sti: remove delta node from stih410.dtsi
The delta0 node within stih410.dtsi is identical to the
one already written within stih407-family.dtsi and included
within stih410.dtsi.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Alain Volmat [Fri, 11 Feb 2022 18:16:11 +0000 (19:16 +0100)]
ARM: dts: sti: move some nodes out of the soc section in stih407-family.dtsi
Move all nodes without reg property out of the soc section of
stih407-family.dtsi and DT including stih407-family.dtsi.
This avoid to set a <0> reg property.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Alain Volmat [Fri, 11 Feb 2022 18:16:10 +0000 (19:16 +0100)]
ARM: dts: sti: ensure unique unit-address in stih418-clock
Move quadfs and a9-mux clocks nodes into clockgen nodes so
that they can get the reg property from the parent node and
ensure only one node has the address.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Alain Volmat [Fri, 11 Feb 2022 18:16:09 +0000 (19:16 +0100)]
ARM: dts: sti: ensure unique unit-address in stih410-clock
Move quadfs and a9-mux clocks nodes into clockgen nodes so
that they can get the reg property from the parent node and
ensure only one node has the address.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Alain Volmat [Fri, 11 Feb 2022 18:16:08 +0000 (19:16 +0100)]
ARM: dts: sti: ensure unique unit-address in stih407-clock
Move quadfs and a9-mux clocks nodes into clockgen nodes so
that they can get the reg property from the parent node and
ensure only one node has the address.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Johan Jonker [Sun, 13 Feb 2022 21:23:19 +0000 (22:23 +0100)]
ARM: dts: rockchip: remove status from rk3288 crypto node
A node that is not disabled is standard already "okay",
so remove status from rk3288 crypto node.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220213212319.8448-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Jonathan Neuschäfer [Sat, 29 Jan 2022 11:52:28 +0000 (12:52 +0100)]
ARM: dts: wpcm450: Add pinmux information to UART0
UART0 always uses the same pins, so lets add the pinctrl information to
the common devicetree for WPCM450.
UART1 has different connection options, so I'm not adding the pinctrl
properties there.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220129115228.2257310-10-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>