Ian Romanick [Wed, 2 Nov 2022 01:12:43 +0000 (18:12 -0700)]
spirv: Use nir_type_convert instead of nir_type_conversion_op
In a future commit, nit_type_conversion_op won't be able to handle i2b
(and in a much later commit f2b), so switch many users to the fully
featured function.
No shader-db or fossil-db changes on any Intel platform.
v2: Use the actual bit size of the source to determine the conversion
op. With mediump, the "planned" bit size and the actual bit size might
be different. Fixes many, many Vulkan CTS assertion failures on any
platform that sets mediump_16bit_alu (e.g., Freedreno).
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Wed, 2 Nov 2022 01:12:19 +0000 (18:12 -0700)]
nir: Use nir_type_convert instead of nir_type_conversion_op
In a future commit, nit_type_conversion_op won't be able to handle i2b
(and in a much later commit f2b), so switch many users to the fully
featured function.
No shader-db or fossil-db changes on any Intel platform.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Wed, 2 Nov 2022 01:11:54 +0000 (18:11 -0700)]
glsl: Use nir_type_convert instead of nir_type_conversion_op
In a future commit, nit_type_conversion_op won't be able to handle i2b
(and in a much later commit f2b), so switch many users to the fully
featured function.
In gl_nir_lower_packed_varyings, all of the type conversions are between
int32 and uint32 types. In NIR, those are just moves, so elide them.
No shader-db or fossil-db changes on any Intel platform.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Tue, 1 Nov 2022 23:38:26 +0000 (16:38 -0700)]
nir/builder: Add rounding mode parameter to nir_type_convert
Later changes will use this.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Tue, 8 Nov 2022 21:53:25 +0000 (13:53 -0800)]
glsl_to_nir: Fix NIR bit-size of ir_triop_bitfield_extract and ir_quadop_bitfield_insert
Previously these would return result->bit_size of 32 even though the
type might have been int16_t or uint16_t. This prevents many assertion
failures in "glsl: Use nir_type_convert instead of
nir_type_conversion_op" on zink.
Fixes: 5e922fbc160 ("glsl_to_nir: fix bitfield_extract with 16-bit operands")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Tue, 22 Feb 2022 23:43:14 +0000 (15:43 -0800)]
microsoft/compiler: Simplify nir_intrinsic_load_front_face handling
It is invalid to have Boolean variables as either shader inputs or
outputs, so there is no point to try to lower them in general. The only
use for this was some two-phase lowering of
nir_intrinsic_load_front_face that could be done in a single phase.
Create the SYSTEM_VALUE_FRONT_FACE as a uint and compare it with zero at
the same time.
No shader-db or fossil-db changes on any Intel platform.
v2: Remove dxil_nir_lower_bool_input from dxil_nir.h and drop it from
the other caller in the spirv_to_dxil codepath. Noticed by Jesse. Fix
setting bit size when loading SYSTEM_VALUE_FRONT_FACE. Caught by CI.
v3: Use nir_ine_imm. Change type of gl_FrontFacing GS output in
d3d12_nir_passes from Boolean to integer. Both suggested by Jesse.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Tue, 15 Feb 2022 23:29:42 +0000 (15:29 -0800)]
nir/builder: Emit x != 0 for nir_i2b
There are a lot of optimizations in opt_algebraic that match ('ine', a,
0), but there are almost none that match i2b. Instead of adding a huge
pile of additional patterns (including variation that include both ine
and i2b), just emit a != 0 instead of i2b(a).
I think that the changes to the unit tests weaken them slightly, but
perhaps that's okay?
No shader-db changes on any Intel platform. The GLSL paths use other
means to generate i2b operations, but the SPIR-V paths use nir_i2b.
Presumably since
4676b3d3dd9 (nir: Use nir_test_mask instead of
i2b(iand)), no fossil-db changes either.
v2: Use nir_ine_imm. Suggested by Jesse.
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Tue, 15 Feb 2022 23:24:49 +0000 (15:24 -0800)]
nir: Use nir_i2b wrapper everywhere instead of using nir_i2b1 directly
No shader-db or fossil-db changes on any Intel platform.
v2: Add missed i2b1 in ir3_nir_opt_preamble.c.
v3: Add missed i2b1 in ac_nir_lower_ngg.c.
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Tue, 15 Feb 2022 19:02:07 +0000 (11:02 -0800)]
nir/algebraic: Optimize some b2i involved in masking operations
v2: Remove the ineg from the b2i in the ior pattern. Suggested by
Jason.
All Ivy Bridge and newer Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs:
19914441 ->
19914369 (<.01%)
instructions in affected programs: 63507 -> 63435 (-0.11%)
helped: 24 / HURT: 0
total cycles in shared programs:
853869766 ->
853851470 (<.01%)
cycles in affected programs:
10551542 ->
10533246 (-0.17%)
helped: 24 / HURT: 0
All Intel platforms had similar results. (Ice Lake shown)
Instructions in all programs:
141163061 ->
141092683 (-0.0%)
Instructions helped: 14103
Instructions hurt: 55
Cycles in all programs:
9132376195 ->
9133183045 (+0.0%)
Cycles helped: 13775
Cycles hurt: 380
Spills in all programs: 18286 -> 18284 (-0.0%)
Spills helped: 1
Fills in all programs: 30647 -> 30643 (-0.0%)
Fills helped: 1
Gained: 133
Lost: 130
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Tue, 8 May 2018 16:53:17 +0000 (09:53 -0700)]
nir/algebraic: Eliminate unary op on src of integer comparison w/ zero
This helps because it enables cmod propagation to do more.
The removed patterns involving b2i will be handled by other existing
patterns after the unary operations are removed.
All Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs:
19914458 ->
19914441 (<.01%)
instructions in affected programs: 5456 -> 5439 (-0.31%)
helped: 17 / HURT: 0
total cycles in shared programs:
855302118 ->
853869766 (-0.17%)
cycles in affected programs:
327354347 ->
325921995 (-0.44%)
helped: 291 / HURT: 81
All Intel platforms had similar results. (Ice Lake shown)
Instructions in all programs:
141205979 ->
141205961 (-0.0%)
Instructions helped: 4
Instructions hurt: 3
SENDs in all programs:
7466919 ->
7466913 (-0.0%)
SENDs helped: 1
Cycles in all programs:
9133387327 ->
9133384475 (-0.0%)
Cycles helped: 3
Cycles hurt: 12
In the shader that was helped for sends, it appears that a NIR pass that
moves code out of loops was able to move 3 send operations outside a
loop after this change. I did not investigate further.
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Tue, 15 Feb 2022 23:32:00 +0000 (15:32 -0800)]
nir/algebraic: Simplify min and max of b2i
This prevents ~400 shader-db regresssions and a handful of fossil-db
regressions after i2b is always lowered.
All Ivy Bridge and newer Intel platforms had similar results. (Ice Lake shown)
total cycles in shared programs:
855301494 ->
855302118 (<.01%)
cycles in affected programs: 52787 -> 53411 (1.18%)
helped: 4 / HURT: 5
All Intel platforms had similar results. (Ice Lake shown)
Instructions in all programs:
141206055 ->
141205979 (-0.0%)
Instructions helped: 14
Cycles in all programs:
9133376616 ->
9133387327 (+0.0%)
Cycles helped: 13
Cycles hurt: 3
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Tue, 15 Feb 2022 17:24:14 +0000 (09:24 -0800)]
nir/algebraic: Reassociate some iand to eliminate an operation
No shader-db changes on any Intel platform.
All of the helped shaders were presumably regressed by
4676b3d3dd9 (nir:
Use nir_test_mask instead of i2b(iand)).
v2: Add some comments explaining why specific replacements are used. In
the umin pattern, only markup the first usage of 'b' in the source
pattern.
Tiger Lake, Ice Lake, and Skylake had similar results. (Ice Lake shown)
Instructions in all programs:
141384970 ->
141200966 (-0.1%)
Instructions helped: 45842
Cycles in all programs:
9133648977 ->
9133282672 (-0.0%)
Cycles helped: 26812
Cycles hurt: 6025
Gained: 23
Lost: 135
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Tue, 15 Feb 2022 17:19:25 +0000 (09:19 -0800)]
nir/algebraic: Remove redundant i2b(b2i(x)) patterns
A loop below already adds all the permutations... including the 1-bit
version that isn't included in this group.
No shader-db or fossil-db changes on any Intel platform.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Tested-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Thu, 15 Jul 2021 02:48:11 +0000 (19:48 -0700)]
nir/algebraic: Remove redundant i2b(-x) pattern
The exact same pattern appears later (around line 1323).
No shader-db or fossil-db changes on any Intel platform.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Tested-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Ian Romanick [Sat, 19 Feb 2022 00:59:03 +0000 (16:59 -0800)]
nir/algebraic: Catch some kinds of copy-and-paste bugs in algebraic patterns
A later commit adds a pattern
(('umin', ('iand', a, '#b(is_pos_power_of_two)'),
('iand', c, '#b(is_pos_power_of_two)')),
('iand', ('iand', a, b), ('iand', c, b))),
When I originally made that pattern, I copied and pasted the search to
the replacement as
(('umin', ('iand', a, '#b(is_pos_power_of_two)'),
('iand', c, '#b(is_pos_power_of_two)')),
('iand', ('iand', a, '#b(is_pos_power_of_two)'),
('iand', c, '#b(is_pos_power_of_two)'))),
The caused the variables in the replacement to be marked is_constant,
and that resulted in an assertion failure deep inside nir_search.
src/compiler/nir/nir_search.c:530: construct_value: Assertion `!var->is_constant' failed.
These extra validation rules catch this kind of error at compile time
rather than at run time.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Tested-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
Yonggang Luo [Fri, 9 Dec 2022 20:11:32 +0000 (04:11 +0800)]
gallium/pp: typedef and use pp_st_invalidate_state_func to avoid cast
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20042>
Yonggang Luo [Fri, 9 Dec 2022 20:10:36 +0000 (04:10 +0800)]
gallium/hud: typedef and use hud_st_invalidate_state_func to avoid cast
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20042>
Nanley Chery [Mon, 21 Nov 2022 21:58:12 +0000 (13:58 -0800)]
intel: Allow CCS_E on R11G11B10_FLOAT for TGL+
We now support blorp_copy with this format.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19937>
Nanley Chery [Tue, 22 Nov 2022 17:26:27 +0000 (09:26 -0800)]
intel/isl: Bump format_info entries from 100 to 110
The new format support is only tested on Ice Lake and onward. Makes the
next patch clearer.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19937>
Nanley Chery [Thu, 17 Nov 2022 21:48:16 +0000 (13:48 -0800)]
intel/isl: Lessen CCS_E-compatibility checks for TGL+
Tiger Lake and onward allow drivers to specify a compression format
independently from the surface format. So, even if the surface format
changes, hardware is still able to determine how to access the CCS.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19937>
Nanley Chery [Mon, 21 Nov 2022 21:37:30 +0000 (13:37 -0800)]
intel: Hook up RENDER_SURFACE_STATE::DecompressInL3
The sampler's decompressor seems to lack support for some types of
format re-interpretation. Use the more capable decompressor for these
cases. This will be needed to avoid regressing piglit's
arb_texture_view-rendering-formats in later commits.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19937>
Eric Engestrom [Tue, 13 Dec 2022 13:51:13 +0000 (13:51 +0000)]
v3dv: skip some invalid tests
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20305>
Iago López Galeiras [Tue, 13 Dec 2022 17:51:25 +0000 (18:51 +0100)]
asahi: unbind samplers and fix sampler_count if state is NULL
When states is NULL, unbind samplers (to avoid dangling pointers) and
set sampler_count to the highest non-null samplers[] entry instead of
setting it to 0.
This is ported from a similar fix in panfrost:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20285
Signed-off-by: Iago López Galeiras <iaguis@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20306>
Konstantin Seurer [Mon, 12 Dec 2022 19:26:28 +0000 (20:26 +0100)]
radv/rt: Handle no-null shader flags
If those flags are set, we can assume that idx is not 0.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20286>
Marek Olšák [Wed, 7 Dec 2022 09:29:59 +0000 (04:29 -0500)]
nir: validate that store_buffer_amd doesn't use a non-trivial writemask
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
Marek Olšák [Mon, 7 Nov 2022 00:21:54 +0000 (19:21 -0500)]
ac/llvm: implement ACCESS_USE_FORMAT_AMD as buffer_load/store_format
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
Marek Olšák [Mon, 7 Nov 2022 00:15:01 +0000 (19:15 -0500)]
ac/llvm: unify load_buffer_amd and store_buffer_amd code
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
Marek Olšák [Mon, 7 Nov 2022 00:09:27 +0000 (19:09 -0500)]
nir: add ACCESS_USES_FORMAT_AMD for typed buffer opcodes
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
Marek Olšák [Sun, 6 Nov 2022 23:55:46 +0000 (18:55 -0500)]
nir: replace IS_SWIZZLED flag with ACCESS_IS_SWIZZLED_AMD
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
Marek Olšák [Sun, 6 Nov 2022 23:44:50 +0000 (18:44 -0500)]
nir: remove redundant SLC_AMD in favor of ACCESS_STREAM_CACHE_POLICY
ACCESS_STREAM_CACHE_POLICY was added to map to SLC for AMD.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
Marek Olšák [Fri, 28 Oct 2022 12:32:02 +0000 (08:32 -0400)]
nir: add nir_texop_sampler_descriptor_amd
We'll use it to query the min/mag filter in the shader.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
Lionel Landwerlin [Sat, 19 Nov 2022 23:10:15 +0000 (01:10 +0200)]
anv: move functions around to plan for generated draws
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Lionel Landwerlin [Thu, 17 Mar 2022 12:24:01 +0000 (14:24 +0200)]
genxml: add gen12/12.5 CS prefetch disable bits
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Lionel Landwerlin [Wed, 16 Mar 2022 12:26:27 +0000 (14:26 +0200)]
anv: move draw command helpers to their own file
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Lionel Landwerlin [Sat, 26 Feb 2022 11:31:01 +0000 (13:31 +0200)]
anv: move total_batch_size to anv_batch
We'll want 2 batches :
* the main one
* another to contain dispatch commands to generate stuff in the
main batch
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Lionel Landwerlin [Sat, 26 Feb 2022 19:58:35 +0000 (21:58 +0200)]
anv: add helper to get current address of a batch
And allow the function to get the very first address in the batch.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Lionel Landwerlin [Sat, 26 Feb 2022 11:07:18 +0000 (13:07 +0200)]
anv: add a utility function to ensure command buffer space
Ensuring the space is contiguous.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Lionel Landwerlin [Sat, 26 Feb 2022 20:00:50 +0000 (22:00 +0200)]
anv: document utrace field
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Jason Ekstrand [Sun, 15 Dec 2019 00:00:56 +0000 (18:00 -0600)]
anv: Use extended parameters on Gen11+
Gen11 added a nifty feature where we have three custom system-generated
values called extended parameters that we can set to any 32-bit values
we want. These work just like vertex and instance ID and are controlled
in the pipeline by the 3DSTATE_SGVS_2 packet. They are provided to the
draw call either by extra DWORDs on the end of 3DSTATE_PRIMITIVE or by
storing values to more state registers.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Jason Ekstrand [Sun, 15 Dec 2019 05:10:44 +0000 (23:10 -0600)]
intel/blorp: Emit a dummy 3DSTATE_VF_SGVS_2
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Jason Ekstrand [Sun, 15 Dec 2019 01:24:58 +0000 (19:24 -0600)]
intel/genxml: Add 3DPRIMITIVE_EXTENDED opcodes on Gen11+
On Gen11 and above, the 3DPRIMITIVE command takes an optional additional
three DWORDs of data as "extended parameters". These extended
parameters only exist in the packet if "Extended Parameters Present" is
set. Because our packing code doesn't handle variable-length commands
well, this commit adds a second version of the command which isn't real
but is just a copy of 3DPRIMITIVE with the additional dwords where the
"Extended Parameters Present" defaults to true and "DWord Length" is
adjusted by 3 as needed. The 3DPRIMITIVE command is then the gen4-9
version which still works fine but doesn't have the new parameters.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Jason Ekstrand [Sat, 14 Dec 2019 23:46:29 +0000 (17:46 -0600)]
intel/genxml: Make some fields Booleans
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Lionel Landwerlin [Wed, 30 Nov 2022 16:52:24 +0000 (18:52 +0200)]
anv/utrace: only record the emitted pipecontrol flags
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Lionel Landwerlin [Wed, 30 Nov 2022 16:50:32 +0000 (18:50 +0200)]
intel/ds: trace a couple of more pipe control flags
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
Marek Olšák [Tue, 13 Dec 2022 03:17:26 +0000 (22:17 -0500)]
cso: fix a regression from draw_vbo rework
Fixes: c9b13a93385 - cso: remove cso_draw_vbo from all draws, call the driver or u_vbuf directly
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20288>
Aleksey Komarov [Mon, 12 Dec 2022 16:32:32 +0000 (19:32 +0300)]
panfrost: fix sampler_count and unbind samplers in bind_sampler_states
1. Old approach did not support unbind (set to NULL) samplers because
it only copied memory if sampler is not empty. New approach checks
if sampler is empty - it will set NULL.
2. Old approach just set sampler_count to 0 if sampler is empty.
That's wrong and we need to find highest non-null samplers[] entry.
It was done in new approach.
3. Gallium dosc says:
```
NOTE: at this time, start is always zero ...
This may change in the future.
```
It's better to take into consideration start parameter in new approach.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20285>
Lionel Landwerlin [Mon, 12 Dec 2022 13:32:22 +0000 (15:32 +0200)]
anv: disable Wa_1806565034 when robustImageAccess is enabled
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5711
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7859
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20280>
Lionel Landwerlin [Mon, 12 Dec 2022 13:31:41 +0000 (15:31 +0200)]
intel/fs: make Wa_1806565034 conditional to non robust access
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20280>
Lionel Landwerlin [Mon, 12 Dec 2022 13:30:40 +0000 (15:30 +0200)]
isl: make Wa_1806565034 conditional to non robust access
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20280>
Sathishkumar S [Fri, 2 Dec 2022 14:16:48 +0000 (19:46 +0530)]
frontends/va: fix crash during grayscale rendering
crash is observed as format is assumed to be yuv and buffer plane
order is undefined for monochrome. luma only format is not to be
considered yuv format. It has to be rendered with rgb=rrr.
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20165>
Sathishkumar S [Fri, 2 Dec 2022 06:31:03 +0000 (12:01 +0530)]
radeonsi/vcn: fix regression in yuv422 jpeg decode
- yuv422 decode was blocked in
12acee17fad5, enable it back.
- nv12 yuv422 and grayscale decode is supported on all versions.
- JPEG2 and higher versions supports 444p decode.
- add l8_unorm to supported formats, can be used for grayscale.
Fixes: 12acee17fad5 (frontends/va: reallocate surface for yuv400/yuv444 picture)
v2: indent the switch case correctly (Thong Thai)
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20165>
Samuel Pitoiset [Mon, 12 Dec 2022 13:13:46 +0000 (14:13 +0100)]
radv: do not remove the PointSize built-in for polygon mode as points
Determine if it can be removed when generating the graphics pipeline
key because of dynamic states.
Fixes new CTS dEQP-VK.rasterization.polygon_as_large_points.* and also
spec@!opengl 1.1@polygon-offset with Zink/RADV.
Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20073>
Marcin Ślusarz [Mon, 14 Nov 2022 10:32:53 +0000 (11:32 +0100)]
intel/compiler/mesh: extract emit_urb_direct_vec4_write
No functional changes.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
Marcin Ślusarz [Fri, 2 Dec 2022 13:47:19 +0000 (14:47 +0100)]
intel/compiler: optimize away local_inv_index and local_inv_id if workgroup size is 1
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
Marcin Ślusarz [Fri, 2 Dec 2022 09:47:00 +0000 (10:47 +0100)]
intel/compiler: split lower_cs_intrinsics_convert_block
No functional changes.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
Marcin Ślusarz [Wed, 9 Nov 2022 16:03:13 +0000 (17:03 +0100)]
intel/compiler/mesh: extract shared code for offset adjustment
No functional changes.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
Marcin Ślusarz [Mon, 28 Nov 2022 16:26:56 +0000 (17:26 +0100)]
anv: simplify EXT_mesh_shader lowering
No functional changes.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
Marcin Ślusarz [Wed, 9 Nov 2022 15:46:27 +0000 (16:46 +0100)]
anv,intel/compiler/mesh: drop lowering of gl_Primitive*IndicesEXT
Until U888X index format lands this change shouldn't have any impact on performance.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
车扬 [Tue, 13 Dec 2022 02:23:45 +0000 (10:23 +0800)]
intel: fix the wrong function name
pipe not create_vertex_elements fuction
Signed-off-by: cheyang <cheyang@bytedance.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20291>
Lionel Landwerlin [Wed, 7 Dec 2022 21:33:41 +0000 (23:33 +0200)]
anv: fixup descriptor copies
I did not properly understood that we cannot access the views written
to the descriptor sets because they might have been destroyed after
the write operation and the copy operation is allowed to copy what is
invalid data. The shader just can't access it.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 03e1e19246 ("anv: Refactor descriptor copy")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20222>
Gert Wollny [Mon, 12 Dec 2022 15:58:38 +0000 (16:58 +0100)]
r600: Lower all bitfield ops on pre-EG
Fixes: 4dff3ff005b47befd3e4a903b08d5b4bdbef6ae3
nir/opt_algebraic: Optimize open coded bfm.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20283>
Gert Wollny [Mon, 12 Dec 2022 13:02:03 +0000 (14:02 +0100)]
r600/sfn: Use variable length DOT on Evergreen and Cayman
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20283>
Gert Wollny [Mon, 12 Dec 2022 12:56:16 +0000 (13:56 +0100)]
r600/sfn: prepare alu split for use of variable length dot
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20283>
Gert Wollny [Mon, 12 Dec 2022 12:44:01 +0000 (13:44 +0100)]
r600/sfn: check used channels when evaluating allowed mask
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7878
v2: Fix ws in comment (iorn10)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20283>
Martin Roukala (né Peres) [Mon, 12 Dec 2022 10:29:26 +0000 (12:29 +0200)]
ci/test-vk: uprev vkd3d
This commit uprevs vkd3d, which flags
test_primitive_restart_list_topology_stream_output as being a flake on
RADV / NAVI21.
Suggested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20278>
Qiang Yu [Wed, 30 Nov 2022 09:57:37 +0000 (17:57 +0800)]
ac/nir: add ac_nir_lower_legacy_gs
For legacy (non-NGG) GS to lower outputs to memory stores and add
shader query when required.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
Qiang Yu [Wed, 30 Nov 2022 08:49:11 +0000 (16:49 +0800)]
ac/nir: move ngg_gs_shader_query to a common function
To be shared by NGG GS and legacy GS. Legacy GS need this when
GFX10 which mix use NGG and legacy GS. For example when streamout
is enabled, it uses legacy GS, otherwise uses NGG GS. So legacy
GS also need to update query emulation which is a sum of NGG and
legacy GS results.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
Qiang Yu [Mon, 5 Dec 2022 11:03:15 +0000 (19:03 +0800)]
nir,ac/llvm,radv: add stream id index to nir_load_ring_gsvs_amd
For used by legacy GS to store output to different ring according
to stream id.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
Qiang Yu [Fri, 9 Dec 2022 02:32:48 +0000 (10:32 +0800)]
ac/llvm,radv,radeonsi: pass instruction to intrinsic_load abi
For simple intrinsic which also need other fields to translate
to LLVM like stream_id.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
Qiang Yu [Sun, 27 Nov 2022 04:25:26 +0000 (12:25 +0800)]
nir: add nir_load_ring_gs2vs_offset_amd
Used by legacy GS output lowering.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
Qiang Yu [Wed, 30 Nov 2022 13:43:59 +0000 (21:43 +0800)]
ac/nir,radeonsi: replace llvm ngg gs invocation query with nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20156>
Qiang Yu [Wed, 30 Nov 2022 10:12:39 +0000 (18:12 +0800)]
nir,radv,radeonsi: add nir_atomic_add_gs_invocation_count_amd
For shader query emulation.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20156>
Emma Anholt [Thu, 10 Nov 2022 21:06:58 +0000 (13:06 -0800)]
freedreno/registers: Add some docs for PM4 events.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19733>
Emma Anholt [Thu, 10 Nov 2022 19:35:46 +0000 (11:35 -0800)]
doc/freedreno: Add a bunch of docs of the hardware and drivers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19733>
Emma Anholt [Thu, 10 Nov 2022 19:36:01 +0000 (11:36 -0800)]
freedreno: Clarify that CACHE_FLUSH is pre-5xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19733>
Emma Anholt [Mon, 14 Nov 2022 21:22:53 +0000 (13:22 -0800)]
ci/docs: Always expose the built docs.
When testing my docs changes outside of an MR, there was no way to look at
the result.
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19733>
Peng Huang [Sun, 11 Dec 2022 21:07:06 +0000 (16:07 -0500)]
intel: Fix crashes for importing drm buffer
image_aspect_to_binding() converts aspect to index by subrracting
VK_IMAGE_ASPECT_MEMORY_PLANE_0_BIT_EXT, however these enum values
are bitfields, not consecutive numbers, so comparing and subtracting
them won't work.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20269>
Iván Briano [Tue, 6 Sep 2022 22:28:26 +0000 (15:28 -0700)]
hasvk: pipelineStageCreationFeedbackCount is allowed to be 0
Fixes: 6601e5d6fc6 ("anv: implement VK_EXT_pipeline_creation_feedback")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20216>
Jan Palus [Thu, 1 Dec 2022 17:32:53 +0000 (18:32 +0100)]
vdpau: allow building vdpau st with virgl only
Fixes: 6b5aecb1955 ("virgl: add support for hardware video acceleration")
Signed-off-by: Jan Palus <jpalus@fastmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20108>
Timothy Arceri [Mon, 12 Dec 2022 02:06:54 +0000 (13:06 +1100)]
glsl: fix function inlining for images
Here we skip replacing parameters with their actual values for
images as glsl_to_nir() expects them to be copied to temps first.
Tree grafting has a similiar rule to avoid this happening also.
Fixes: 8d10a6835f32 ("glsl: dont create temps for builtin function inputs")
Tested-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20274>
Bas Nieuwenhuizen [Mon, 12 Dec 2022 01:29:34 +0000 (02:29 +0100)]
radv: Improved export conflict bug workaround.
Based on
f129db911bd ("radeonsi/gfx11: use a better workaround for the export conflict bug")
which claims better performance.
I couldn't be bothered to do the refactor to check the sample count with
dynamic sample counts, so this is just conservative there.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20273>
Marek Olšák [Wed, 23 Nov 2022 10:08:07 +0000 (05:08 -0500)]
mesa: move the _mesa_set_varying_vp_inputs call to where the state changes
This removes the _mesa_update_vao_state() call from all glDraw* functions
where it was executed unconditionally.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Tue, 22 Nov 2022 11:57:43 +0000 (06:57 -0500)]
mesa: move _DrawVAOEnabledAttribs determination into st_update_array
This can just be computed where it's used.
Now the non-glDraw paths like glRasterPos, glBegin/End, and the slow
display list path have to save and restore _VPModeInputFilter, which
is the only field that's different from the glDraw* path.
_VPModeInputFilter is a bitmask of VP inputs that might have to be bound.
The only difference with glBegin/End and the slow display list path is
that they also add VERT_BIT_MAT_ALL to the bitmask, whereas the glDraw* path
doesn't have that.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Tue, 22 Nov 2022 09:37:31 +0000 (04:37 -0500)]
mesa: inline _mesa_draw_array_bits & _mesa_draw_current_bits
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Tue, 22 Nov 2022 09:34:04 +0000 (04:34 -0500)]
mesa: don't AND with VERT_BIT_ALL because it's ~0u
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Tue, 22 Nov 2022 09:30:46 +0000 (04:30 -0500)]
mesa: simplify VBO state flagging in _mesa_update_vao_state
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Tue, 22 Nov 2022 09:25:42 +0000 (04:25 -0500)]
mesa: remove VAO::NewVertexBuffers/Elements, set the dirty flags directly
These intermediate dirty flags are unnecessary now.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Mon, 21 Nov 2022 13:24:17 +0000 (08:24 -0500)]
mesa: move calling _mesa_update_vao_derived_arrays into st_update_array
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Mon, 21 Nov 2022 13:20:24 +0000 (08:20 -0500)]
mesa: remove the NewVAO flag, set directly what we need to set
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Mon, 21 Nov 2022 13:03:23 +0000 (08:03 -0500)]
st/mesa: move st_atom.c contents into st_context.c
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Mon, 21 Nov 2022 12:59:14 +0000 (07:59 -0500)]
st/mesa: inline st_validate_state and remove redundant checking in callers
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Mon, 21 Nov 2022 12:47:59 +0000 (07:47 -0500)]
st/mesa: remove the switch from st_validate_state by passing state mask directly
Instead of passing the enum that represents which states should be updated
to st_validate_state, pass the state bitmask to st_validate_state directly.
This removes the switch statement over the enums.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Mon, 21 Nov 2022 12:37:45 +0000 (07:37 -0500)]
st/mesa: remove st_context::dirty, use gl_context::NewDirtyState instead
We stored the same state in 2 different variables, and then we OR'd them.
This changes the st_validate_state logic slightly, but should be identical.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Mon, 21 Nov 2022 12:15:03 +0000 (07:15 -0500)]
mesa: remove per_vertex_edgeflags parameter from DrawGalliumVertexState
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Mon, 21 Nov 2022 09:53:39 +0000 (04:53 -0500)]
mesa: completely rewrite the edge flag state update logic
This removes the edge flag logic from st_validate_state, which was always
executed and added overhead there. Now it's done only when needed.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Fri, 18 Nov 2022 23:59:46 +0000 (18:59 -0500)]
mesa: don't call _mesa_set_varying_vp_inputs in set_vertex_processing_mode
It's redundant because it's always called in _mesa_update_draw_vao.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Fri, 18 Nov 2022 23:43:19 +0000 (18:43 -0500)]
mesa: don't call _mesa_update_vao_derived_arrays for dynamic VAOs
This just moves the exit into the caller. There is nothing else in
_mesa_update_vao_derived_arrays that dynamic VAOs care about.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Fri, 18 Nov 2022 23:38:39 +0000 (18:38 -0500)]
mesa: merge 2 switch statements into one in _mesa_get_derived_vao_masks
_mesa_vao_enable_to_vp_inputs has a switch statement and we call it twice.
Let's inline it.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Fri, 18 Nov 2022 23:18:33 +0000 (18:18 -0500)]
mesa: remove derived _EffEnabled* fields and compute them at their only use
We were passing the fields to their only use and used them only once,
so let's just compute them there.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
Marek Olšák [Fri, 18 Nov 2022 23:06:55 +0000 (18:06 -0500)]
mesa: merge _mesa_draw_(user_array,nonzero_divisor)_bits into one helper
preparation for the next change
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19953>
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