Stephen Warren [Wed, 20 Dec 2017 01:30:34 +0000 (18:30 -0700)]
ARM: tegra: don't use CONFIG_SPL_TEXT_BASE when no SPL
64-bit Tegra don't use SPL, and soon won't define CONFIG_SPL_TEXT_BASE
when building. Fix the binman .dts file so that it doesn't use undefined
values.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Peng Fan [Tue, 2 Jan 2018 08:51:22 +0000 (16:51 +0800)]
mmc: fsl_esdhc: Fix eMMC 1.8v setting issue
Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init,
then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has
already set VSELECT to 1.8v before running the u-boot. This reset in
USDHC driver causes a short 2.2v pulse on CMD pin.
Fix this issue by not reset VSELECT to 0 when 1.8v flag is set.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Fri, 22 Dec 2017 17:27:14 +0000 (12:27 -0500)]
power: Rearrange code to guard power command with CONFIG_SPL_BUILD guard
In order to discard this code when unused in SPL we need to guard the
command with a check for CONFIG_SPL_BUILD and we rearrange the code
slightly to make this cleaner.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Christopher Spinrath [Tue, 9 Jan 2018 21:01:36 +0000 (22:01 +0100)]
ARM: imx: cm_fx6: env: try to determine dtb to use
Some distributions like Fedora expect U-Boot to select a proper
devicetree. Since there are several variants of the cm-fx6 module
featuring different SoC variants and the module can be paired with
several baseboards, it is not viable to hardcode a filename.
Instead, follow the lead of other i.MX6 based devices and try to
determine the devicetree to use with the help of the board name
and the SoC variant exported by the board code, before calling the
distro bootcommand.
For now, only for the Utilite Pro a proper devicetree filename is
known but further variants of the Utilite Computer or other devices
based on the cm-fx6 module may be added in the future.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Christopher Spinrath [Tue, 9 Jan 2018 21:01:35 +0000 (22:01 +0100)]
ARM: imx: cm_fx6: export board and soc info to env
Like many other i.MX6 based boards, there are multiple variants of
the cm-fx6 module featuring different SoC variants. Furthermore, the
module can be paired with multiple baseboards.
At the same time modern distribution like Fedora require U-Boot to
select a proper devicetree which depends on the SoC variant and the
baseboard.
Thus, export the SoC variant and the actual board to the environment
following the conventions of other i.MX6 devices (e.g. the NXP boards)
such that the environment can select a devicetree file to load.
For now, we only know for sure that the cm-fx6 module and the SB-fx6m
baseboard amount to a Utilite Computer variant (depending on the SoC).
Further combinations may be added in the future; e.g. CompuLab's
evaluation board once someone can verify the identification string
stored in its eeprom.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Koen Vandeputte [Thu, 4 Jan 2018 13:54:34 +0000 (14:54 +0100)]
drivers: pci: imx: fix enumeration logic error
By default, the subordinate is set equally to the secondary bus (1) when
the RC boots, and does not alter afterwards.
This means that theoretically, the highest bus reachable downstream is
bus 1.
Force the PCIe RC subordinate to 0xff, otherwise no downstream
devices will be detected behind bus 1 if the booting OS does not allow
enumerating a higher busnr than the subordinate value of the primary
bus.
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Fabio Estevam [Wed, 3 Jan 2018 14:55:36 +0000 (12:55 -0200)]
mx6memcal: spl: Disambiguate the error message
Currently mmdc_do_dqs_calibration() and mmdc_do_write_level_calibration()
show the same error message, which is confusing for debugging.
Disambiguate the mmdc_do_dqs_calibration() error message.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam [Wed, 3 Jan 2018 14:55:35 +0000 (12:55 -0200)]
mx6memcal: spl: Also take i.MX6ULL into account
i.MX6ULL also does not support 64-bit DDR bus, so add it to the
check logic.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam [Wed, 3 Jan 2018 14:55:34 +0000 (12:55 -0200)]
mx6memcal: Fix the UART ports for mx6sabresd/auto boards
mx6sabresd board uses the following pins for console:
PAD_CSI0_DAT10__UART1_TX_DATA
PAD_CSI0_DAT11__UART1_RX_DATA
,so put it in the same config option as wandboard.
mx6sabreauto board uses the following pins for console:
PAD_KEY_COL0__UART4_TX_DATA
PAD_KEY_ROW0__UART4_RX_DATA
So do not mention sabreauto board as part of the UART1_SD3_DAT6_7 option.
The config option for sabreauto can be added later when needed.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tom Rini [Wed, 3 Jan 2018 14:19:17 +0000 (09:19 -0500)]
toradex: imx6: Rework PF0100 fuse programming commands to not be in SPL
The code for programming the OTP fuses on the PMIC PF0100 can only be
used in full U-Boot, so do not build / link it into SPL.
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Tom Rini [Wed, 3 Jan 2018 14:16:29 +0000 (09:16 -0500)]
imx: ventana: Rework CONFIG_CMD_GSC code to not be included in SPL
The command can only be used from full U-Boot, so do not build it into
SPL.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tom Rini [Wed, 3 Jan 2018 14:15:22 +0000 (09:15 -0500)]
imx: ventana: Rework CONFIG_CMD_EECONFIG code to not be included in SPL
The command can only be used from full U-Boot, so do not build it into
SPL.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tom Rini [Wed, 3 Jan 2018 13:52:39 +0000 (08:52 -0500)]
arm: imx: Rework i.MX specific commands to be excluded from SPL
The "clocks" and "bootaux" commands are only usable in full U-Boot, not
SPL, so do not link them inside of SPL. Rework a little of the bootaux
related code to make use of __weak and declare parts of it static as
it's local to the file.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Eran Matityahu [Wed, 3 Jan 2018 10:56:24 +0000 (12:56 +0200)]
imx7: spl: Add support for MMC3, SD3 and NAND boot devices
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Eran Matityahu [Wed, 3 Jan 2018 10:53:08 +0000 (12:53 +0200)]
imx7: spl: Use SPL boot device MMC1 for all of the SOCs MMC/SD boot devices
Use only one SPL MMC device, similarly to the iMX6 code
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Peng Fan [Wed, 3 Jan 2018 00:52:03 +0000 (08:52 +0800)]
imx: mx6ull-14x14-evk: enable DM QSPI driver
To support QSPI DM driver
- Add spi0 alias for qspi node. Which is used for bus number 0.
- Modify the n25q256a@0 compatible property to "spi-flash".
- Modify spi4 (gpio_spi) node to spi5
- Define DM SPI/QSPI related config to enable QSPI
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 3 Jan 2018 00:52:02 +0000 (08:52 +0800)]
spi: fsl_qspi: support i.MX6UL/6ULLL/7D
The QSPI module on i.MX7D is modified from i.MX6SX. The module used on
i.MX6UL/6ULL is reused from i.MX7D. They share same tx buffer size.
The endianness is not set at qspi driver initialization. So if we don't
boot from QSPI, we will get wrong endianness when accessing from AHB
address directly.
Add the compatible entry for 6ul/7d.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Tue, 2 Jan 2018 00:51:45 +0000 (22:51 -0200)]
mx6: ddr: Do not access MMDC_P1_BASE_ADDR on i.MX6ULL
i.MX6ULL also does not have a MMDC_P1_BASE_ADDR, so do not try to
access it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <ssbabic@denx.de>
Peng Fan [Tue, 2 Jan 2018 10:27:29 +0000 (18:27 +0800)]
pci: imx: request gpio before use
Before use GPIO, we need to request gpio first. Free gpio after use.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <ssbabic@denx.de>
Peng Fan [Tue, 2 Jan 2018 01:32:10 +0000 (09:32 +0800)]
imx: mx6sxsabresd: enlarge ENV offset
The u-boot-dtb.imx size is about 519KB, so 8 * 64KB conflicts
with u-boot-dtb.imx. Enlarge the offset to 14 * 64KB to fix it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Tue, 2 Jan 2018 01:32:09 +0000 (09:32 +0800)]
imx: mx6sxsabresd: config wdog pinmux
Because kernel set WDOG_B mux before pad with the common pinctrl
framwork now and wdog reset will be triggered once set WDOG_B mux
with default pad setting, we set pad setting here to workaround this.
Since imx_iomux_v3_setup_pad also set mux before pad setting, we set
as GPIO mux firstly here to workaround it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Tue, 2 Jan 2018 01:32:08 +0000 (09:32 +0800)]
imx: mx6sxsabresd: Enable DM driver
Enable I2C/MMC/GPIO/REGUALTOR/PMIC/USB DM drivers.
There are some dependency, such as when DM MMC enabled, USB compile error.
Also the i.MX I2C MMC DM driver does not support legacy GPIO interface.
So enable them all together.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Tue, 2 Jan 2018 01:32:06 +0000 (09:32 +0800)]
board: freescale: common: add pfuze dm code
Add pfuze dm code, this code could be enabled with CONFIG_DM_PMIC_PFUZE100.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Tue, 2 Jan 2018 01:32:05 +0000 (09:32 +0800)]
ARM: imx: Enable dts for i.MX6SX-SDB
Enable DTS and OF_CONTROL for i.MX6SX-SDB.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Tue, 2 Jan 2018 01:32:04 +0000 (09:32 +0800)]
ARM: imx: Introduce dts for i.MX6SX-SDB
Introduce dts from Kernel commit
commit
71ee203389f7cb1c("Merge tag 'scsi-fixes' of
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Tue, 2 Jan 2018 07:51:20 +0000 (15:51 +0800)]
misc: mxc_ocotp: check fuse word before programming on i.MX7ULP
On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to
write once, because they use ECC mode. Multiple writes may damage
the ECC value and cause a wrong fuse value decoded when reading.
This patch adds a checking before the fuse word programming, only
can write when the word value is 0.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Stefano Babic [Wed, 3 Jan 2018 15:11:56 +0000 (16:11 +0100)]
mx6: Support SKS-Kinkel sksimx6 Board
Board has 1GB RAM and boots from SD Card
U-Boot SPL 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54)
BT_FUSE_SEL already fused, will do nothing
Trying to boot from MMC1
U-Boot 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54 +0100)
CPU: Freescale i.MX6DL rev1.2 996 MHz (running at 792 MHz)
CPU: Commercial temperature grade (0C to 95C) at 40C
Reset cause: POR
I2C: ready
DRAM: 1 GiB
MMC: FSL_SDHC: 0
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Rick Chen [Fri, 12 Jan 2018 06:57:09 +0000 (14:57 +0800)]
travis.yml: Support RISC-V
Enable travis-ci support with a link having built.
Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 26 Dec 2017 05:55:59 +0000 (13:55 +0800)]
riscv: doc: Add relative doc to describe RISC-V
Add documents to describe NX25 and AE250.
Also update other documents for RISC-V.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 26 Dec 2017 05:55:58 +0000 (13:55 +0800)]
riscv: Modify generic codes to support RISC-V
Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rick Chen [Tue, 26 Dec 2017 05:55:57 +0000 (13:55 +0800)]
riscv: Support standalone
Run hello_world successfully.
U-Boot 2018.01-rc2-00033-gb265b91-dirty (Dec 22 2017 - 13:54:21 +0800)
DRAM: 1 GiB
MMC: mmc@
f0e00000: 0
SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
In: serial@
f0300000
Out: serial@
f0300000
Err: serial@
f0300000
Net:
Warning: mac@
e0100000 (eth0) using random MAC address - 0a:47:9b:f8:b4:f2
eth0: mac@
e0100000
RISC-V # mmc rescan
RISC-V # fatls mmc 0:1
318907 u-boot-ae250-64.bin
1252 hello_world_ae250_32.bin
328787 u-boot-ae250-32.bin
3 file(s), 0 dir(s)
RISC-V # fatload mmc 0:1 0x600000 hello_world_ae250_32.bin
reading hello_world_ae250_32.bin
1252 bytes read in 23 ms (52.7 KiB/s)
RISC-V # go 0x600000
Example expects ABI version 9
Actual U-Boot ABI version 9
Hello World
argc = 1
argv[0] = "0x600000"
argv[1] = "$B@"
Hit any key to exit ...
RISC-V #
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 26 Dec 2017 05:55:56 +0000 (13:55 +0800)]
riscv: tools: Prelink u-boot
Add prelink-riscv to arrange .rela.dyn and .rela.got
in compile time. So that u-boot can be directly
executed without fixup.
Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 26 Dec 2017 05:55:55 +0000 (13:55 +0800)]
riscv: defconfig: Add nx25-ae250 defconfig to support RISC-V
Add nx25-ae250 default configuration for RISC-V
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 26 Dec 2017 05:55:54 +0000 (13:55 +0800)]
riscv: configs: Add nx25-ae250.h to support RISC-V
Add nx25-ae250 board configuartion options for RISC-V
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 26 Dec 2017 05:55:53 +0000 (13:55 +0800)]
riscv: board: Add nx25-ae250 to support RISC-V
Add nx25-ae250 board to do platform initializations.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 26 Dec 2017 05:55:52 +0000 (13:55 +0800)]
riscv: Add Kconfig to support RISC-V
Add Kconfig and makefile for RISC-V
Also modify MAINTAINERS for it.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
Rick Chen [Tue, 26 Dec 2017 05:55:51 +0000 (13:55 +0800)]
riscv: nx25: include: Add header files to support RISC-V
Add header files for RISC-V.
Cache, ptregs, data type and other definitions are included.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 26 Dec 2017 05:55:50 +0000 (13:55 +0800)]
riscv: nx25: dts: Add AE250 dts to support RISC-V
AE250 is the Soc using NX25 cpu core base on RISC-V arch.
Details please see the doc/README.ae250.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 26 Dec 2017 05:55:49 +0000 (13:55 +0800)]
riscv: nx25: lib: Add relative lib funcs to support RISC-V
Add makefile, interrupts.c and boot.c,... functions
to support RISC-V arch.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
Rick Chen [Tue, 26 Dec 2017 05:55:48 +0000 (13:55 +0800)]
riscv: cpu: Add nx25 to support RISC-V
Add Andes nx25 cpu core (called AndesStar V5) to support RISC-V arch
Verifications:
1. startup and relocation ok.
2. boot from rom or ram both ok.
2. timer driver ok.
3. uart driver ok
4. mmc driver ok
5. spi driver ok.
6. 32/64 bit both ok.
Detail verification message please see doc/README.ae250.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:36 +0000 (15:23 +0100)]
mmc: remove hc_wp_grp_size from struct mmc if not needed
hc_wp_grp_size is needed only if hardware partitionning is used.
On ARM removing it saves about 30 bytes of code space.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:35 +0000 (15:23 +0100)]
mmc: don't read the size of eMMC enhanced user data area in SPL
This information is only used by the "mmc info" command.
On ARM removing this information from SPL saves about 140 of code space.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:34 +0000 (15:23 +0100)]
mmc: compile out erase and write mmc commands if write operations are not enabled
Also remove erase_grp_size and write_bl_len from struct mmc as they are
not used anymore. On ARM, removing them saves about 100 bytes of code
space in SPL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:33 +0000 (15:23 +0100)]
mmc: read ssr only if MMC write support is enabled
The content of ssr is useful only for erase operations.
on ARM, removing sd_read_ssr() saves around 300 bytes.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:32 +0000 (15:23 +0100)]
mmc: add a Kconfig option to enable the support for MMC write operations
This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code
needed only if write support is required.
The option is added for u-boot and for SPL
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:31 +0000 (15:23 +0100)]
mmc: reworked version lookup in mmc_startup_v4
Using a table versus a switch() structure saves a bit of space
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:30 +0000 (15:23 +0100)]
mmc: compile out more code if support for UHS and HS200 is not enabled
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:29 +0000 (15:23 +0100)]
mmc: atmel: when sending a data command, use the provided block size
struct mmc_data contains the block size to use for the data transfer.
Use this information instead of using the default value or the block length
information stored in struct mmc.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 4 Jan 2018 14:23:28 +0000 (15:23 +0100)]
common: do not compile common fastboot code when building the SPL
This is not required as fastboot can't be started from SPL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tom Rini [Sun, 17 Dec 2017 04:01:22 +0000 (23:01 -0500)]
am335x_hs_evm: Trim options in SPL to reduce binary size
The am335x_hs_evm runs into size constraint problems at times with
various toolchains as changes come in due to the config have a large
number of options in SPL (to showcase what is possible) while also
having rather constrained binary limits. Gain some of this room back by
lowering the loglevel, disabling HW partition support and switching over
to the tiny FIT image support.
Cc: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
I'd really appreciate a run-time test of this patch if at all possible
as I'm a little worried about TINY_FIT being incompatible with all of
the security options. Thanks!
Jean-Jacques Hiblot [Thu, 14 Dec 2017 10:47:14 +0000 (11:47 +0100)]
dm: mmc: sandbox: Update SD card emulation
The SDcard initialization procedure does a few more things than it did earlier:
* switch the bus width even for 1-bit bus width
* check that speed has been properly set (in resp[4] of SD_CMD_SWITCH_FUNC)
Update the SD simulator to handle those requests gracefully.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:44:04 +0000 (17:44 +0100)]
configs: omapl138_lcdk: decrease the loglevel to reduce the size of the SPL
The changes in the MMC stack have increased its footprint up to the point
were its breaks the generation of the SPL for this platform.
Fix this by reducing the loglevel.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Peter Howard <phoward@gme.net.au>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:44:03 +0000 (17:44 +0100)]
configs: openrd: removed support for eMMC hardware partitioning
builds are broken because the size of the binary exceeds the limit.
Make some space by removing support for hardware partitioning as those
boards don't have any eMMC.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:44:02 +0000 (17:44 +0100)]
mmc: make optional the support for eMMC hardware partitioning
Not all boards have an eMMC and not all users have a need for this.
Allow to compile it out. By default it is still included.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:44:01 +0000 (17:44 +0100)]
mmc: make UHS and HS200 optional
Supporting USH and HS200 increases the code size as it brings in IO voltage
control, tuning and fatter data structures.
Use Kconfig configuration to select which of those features should be
built in.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:44:00 +0000 (17:44 +0100)]
mmc: convert most of printf() to pr_err() and pr_warn()
This allows to compile out the log message by tweaking the LOGLEVEL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:59 +0000 (17:43 +0100)]
mmc: don't use malloc_cache_aligned()
Not using this function reduces the size of the binary. It's replaces by
a standard malloc() and the alignment requirement is handled by an
intermediate buffer on the stack.
Also make sure that the allocated buffer is freed in case of error.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:58 +0000 (17:43 +0100)]
mmc: fix for old MMCs (below version 4)
The ext_csd is allocated only for MMC above version 4. The compare will
crash or fail for older MMCs.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:57 +0000 (17:43 +0100)]
mmc: all hosts support 1-bit bus width and legacy timings
Make sure that those basic capabilities are advertised by the host.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:56 +0000 (17:43 +0100)]
mmc: Fixed a problem with old sd or mmc that do not support High speed
As the legacy modes were not added to the list of supported modes, old
cards that do not support other modes could not be used.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:55 +0000 (17:43 +0100)]
dm: mmc: update mmc_of_parse()
* convert to livetree API
* don't fail because of an invalid bus-width, instead default to 1-bit.
* recognize 1.2v DDR and 1.2v HS200 flags
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 30 Nov 2017 16:43:54 +0000 (17:43 +0100)]
mmc: dump card and host capabilities if debug is enabled
This is a useful information while debugging the initialization process or
performance issues.
Also dump this information with the other mmc info if the verbose option
is selected
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jaehoon Chung [Mon, 27 Nov 2017 09:42:05 +0000 (18:42 +0900)]
mmc: meson_gx_mmc: fix the complie error
mmc_set_clock() is changed.
This patch is for fixing complie error.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:13 +0000 (16:30 +0200)]
dm: mmc: Add a library function to parse generic dt binding
Add a new function to parse host controller dt node and
set mmc_config. This function can be used by mmc controller
drivers to set the generic mmc_config.
This function can be extended to set other UHS mode caps
once UHS mode support is added.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:12 +0000 (16:30 +0200)]
mmc: add a library function to send tuning command
HS200/SDR104 requires tuning command to be sent to the card.
Add a simple function to send tuning command and to read and
compare the received data with the tuning block pattern.
This function can be used by platform driver to perform DLL
tuning.
This patch is similar to
commit
996903de92f0 ("mmc: core: add core-level function for
sending tuning commands") added in linux kernel.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:11 +0000 (16:30 +0200)]
mmc: use the right voltage level for MMC DDR and HS200 modes
HS200 only supports 1.2v and 1.8v signal voltages. DDR52 supports 3.3v/1.8v
or 1.2v signal voltages.
Select the lowest voltage available when using those modes.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:10 +0000 (16:30 +0200)]
mmc: Retry some MMC cmds on failure
With certain SD cards like Kingston 8GB/16GB UHS card, it is seen that
MMC_CMD_ALL_SEND_CID cmd fails on first attempt, but succeeds
subsequently. Therefore, retry MMC_CMD_ALL_SEND_CID cmd a few time
as done in Linux kernel.
Similarly, it is seen that MMC_CMD_SET_BLOCKLEN may fail on first
attempt, therefore retry this cmd a few times as done in kernel.
To make it clear that those are optionnal workarounds, a new Kconfig
option 'MMC_QUIRKS' is added (enabled by default).
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:09 +0000 (16:30 +0200)]
mmc: Change mode when switching to a boot partition
Boot partitions do not support HS200. Changing to a lower performance mode
is required to access them.
mmc_select_mode_and_width() and sd_select_mode_and_width() are modified to
make it easier to call them outside of the initialization context.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:08 +0000 (16:30 +0200)]
mmc: disable UHS modes if Vcc cannot be switched on and off
If a power cycle cannot be done on Vcc, it is safer not to try the UHS
modes because we wouldn't be able to recover from an error occurring
during the UHS initialization.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:07 +0000 (16:30 +0200)]
mmc: Add support for UHS modes
Add UHS modes to the list of supported modes, get the UHS capabilites of
the SDcard and implement the procedure to switch the voltage (UHS modes
use 1v8 IO lines)
During the voltage switch procedure, DAT0 is used by the card to signal
when it's ready. The optional card_busy() callback can be used to get this
information from the host driver.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:06 +0000 (16:30 +0200)]
mmc: add HS200 support in MMC core
Add HS200 to the list of supported modes and introduce tuning in the MMC
startup process.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:05 +0000 (16:30 +0200)]
mmc: Add a execute_tuning() callback to the mmc operations.
Tuning is a mandatory step in the initialization of SDR104 and HS200 modes.
This callback execute the tuning process.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:04 +0000 (16:30 +0200)]
mmc: disable the mmc clock during power off
There is no point in having the mmc clock enabled during
power off. Disable the mmc clock. This is similar to how it's
programmed in Linux Kernel.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:03 +0000 (16:30 +0200)]
mmc: add a new mmc parameter to disable mmc clock
mmc clock has to be disabled in certain cases like during
the voltage switch sequence. Modify mmc_set_clock function
to take disable as an argument that signifies if the
clock has to be enabled or disabled.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:02 +0000 (16:30 +0200)]
mmc: add power cyle support in mmc core
mmc/sd specification requires vdd to be disabled for 1 ms
and then enabled again during power cycle. Add a
function in mmc core to perform power cycle and set
the io signal to it's initial state.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:30:01 +0000 (16:30 +0200)]
mmc: Add a new callback function to perform the 74 clocks cycle sequence
Add a new callback function *send_init_stream* which start a sequence of
at least 74 clock cycles.
The mmc core uses *mmc_send_init_stream* in order to invoke the callback
function. This will be used during power cycle where the specification
requires such a sequence after power up.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:30:00 +0000 (16:30 +0200)]
mmc: Enable signal voltage to be selected from mmc core
Add a new function *mmc_set_signal_voltage* in mmc core
which can be used during mmc initialization to select the
signal voltage. Platform driver should use the set_ios
callback function to select the signal voltage.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:29:59 +0000 (16:29 +0200)]
mmc: make mmc_set_ios() return status
set_ios callback has a return value of 'int' but the mmc_set_ios()
function ignore this. Modify mmc_set_ios() and the callers of mmc_set_ios() to
to return the error status.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:58 +0000 (16:29 +0200)]
mmc: refactor MMC startup to make it easier to support new modes
The MMC startup process currently handles 4 modes. To make it easier to
add support for more modes, let's make the process more generic and use a
list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:57 +0000 (16:29 +0200)]
mmc: refactor SD startup to make it easier to support new modes
The SDcard startup process currently handles only 2 modes. To make it
easier to add support for more modes, let's make the process more generic
and use a list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:56 +0000 (16:29 +0200)]
cmd: mmc: display the mode name and current bus speed in the mmc info
Display the mode name when the user execute 'mmc info'. Also instead of
displaying tran_speed, display the actual bus speed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:55 +0000 (16:29 +0200)]
mmc: use mmc modes to select the correct bus speed
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:54 +0000 (16:29 +0200)]
mmc: Add a function to dump the mmc capabilities
This adds a simple helper function to display information (bus width and
mode) based on a capability mask. Useful for debug.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:53 +0000 (16:29 +0200)]
mmc: introduce mmc modes
no functionnal changes.
In order to add the support for the high speed SD and MMC modes, it is
useful to track this information.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:52 +0000 (16:29 +0200)]
mmc: add a function to read and test the ext csd (mmc >= 4)
This will be reused later in the selection of high speed and ddr modes.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:51 +0000 (16:29 +0200)]
mmc: make ext_csd part of struct mmc
The ext csd is used for comparison many times. Keep a reference content
of the ext csd in the struct mmc to avoid reading multiple times
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:50 +0000 (16:29 +0200)]
mmc: move the MMC startup for version above v4.0 in a separate function
no functionnal change. This is only to further reduce the size o
mmc_startup().
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:49 +0000 (16:29 +0200)]
mmc: split mmc_startup()
No functionnal change here. The function is really big and can be split.
The part related to bus configuration are put in 2 separate functions: one
for MMC and one for SD.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:29:48 +0000 (16:29 +0200)]
mmc: dm: get the IO-line and main voltage regulators from the dts
Get a reference to the regulator devices from the dts and store them
in the struct mmc for later use.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Heinrich Schuchardt [Fri, 10 Nov 2017 20:13:34 +0000 (21:13 +0100)]
mmc: sdhci: do not compare pointer to 0
data is defined as struct mmc_data *data.
So it should not be compared to 0.
Problem identified with Coccinelle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Jorge Ramirez-Ortiz [Thu, 2 Nov 2017 14:10:21 +0000 (15:10 +0100)]
mmc: sdhci: don't clear SDHCI_INT_STATUS register during CMD_INHIBIT
Fixes emmc initialization regression on the db410c platform.
Clearing this register while SDHCI_PRESENT_STATE reports
SDHCI_CMD_INHIBIT leads to undefined behaviour on the db410c.
When commit 7dde50 was merged (mmc: sdhci: Wait for SDHCI_INT_DATA_END
when transferring), SDHCI transfers transitioned to wait for bit
SDHCI_INT_DATA_END before flagging transfers done.
Without this patch, the db410 platform fails to initialize its eMMC
due to all of its transfers timing out (SDHCI_INT_DATA_END is never
raised after all the blocks have been transferred).
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Felix Brack [Wed, 11 Oct 2017 15:05:28 +0000 (17:05 +0200)]
mmc: sanitize includes for DM i2c
This patch fixes some warnings when building boards that do not define
DM_I2C_COMPAT i.e. boards that entirely rely on the new i2c layer.
Signed-off-by: Felix Brack <fb@ltec.ch>
Suniel Mahesh [Thu, 5 Oct 2017 06:18:56 +0000 (11:48 +0530)]
drivers: mmc: Avoid memory leak in case of failure
priv pointer should be freed before returning with an error value
from exynos_dwmci_get_config().
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Raghu Bharadwaj <raghu@techveda.org>
Suniel Mahesh [Thu, 5 Oct 2017 06:02:00 +0000 (11:32 +0530)]
drivers: mmc: Change buffer type in ALLOC_CACHE_ALIGN_BUFFER macro
__be32_to_cpu() accepts argument of type __be32. This patch changes
type of the buffer in ALLOC_CACHE_ALIGN_BUFFER macro to __be32, which
is then passed to __be32_to_cpu().
This prevents sparse build warnings.
drivers/mmc/mmc.c: warning: cast to restricted __be32
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Karthik Tummala <karthik@techveda.org>
Tom Rini [Thu, 11 Jan 2018 19:14:19 +0000 (14:14 -0500)]
Merge git://git.denx.de/u-boot-sunxi
Jagan Teki [Wed, 10 Jan 2018 08:50:06 +0000 (14:20 +0530)]
configs: sun50i: Enable eMMC on a64-olinuxino
a64-olinuxino has 8GiB eMMC, enable it.
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Thu, 11 Jan 2018 18:43:36 +0000 (13:43 -0500)]
Merge git://git.denx.de/u-boot-video
Tom Rini [Thu, 11 Jan 2018 16:18:49 +0000 (11:18 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Thu, 11 Jan 2018 16:18:41 +0000 (11:18 -0500)]
Merge git://git.denx.de/u-boot-socfpga
Tom Rini [Thu, 11 Jan 2018 16:18:29 +0000 (11:18 -0500)]
Merge git://git.denx.de/u-boot-usb