panfrost: Remove unnecessary bifrost_compiler deps

These dependencies are not necessarily portbale, but bifrost_compiler itself is.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12003>

meson: Build panfrost with tools=panfrost

...even if neither GL or VK drivers are being built. Useful for building the
standalone compiler on non-Linux systems.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12003>

gallivm: fix FTBFS on i386 with LLVM >= 13, StackAlignmentOverride is gone

Use the newly added wrapper lp_set_module_stack_alignment_override() to
achieve the same end result.

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Closes: mesa/mesa#4906
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11940>

gallivm: add new wrapper around Module::setOverrideStackAlignment()

We need it in the next commit to replace setting the stack alignment on
i386 with LLVM >= 13 through the TargetOption::StackAlignmentOverride,
which was removed in the upstream commit
<https://github.com/llvm/llvm-project/commit/3787ee457173c3612aac4c9b1a2b6d6ab0202616>.

Unfortunately Module::setOverrideStackAlignment() is not available
through the C API and we need to wrap it ourselves.

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reference: mesa/mesa#4906
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11940>

egl: add support for EGL_EXT_device_drm_render_node

This new EGL extension has been introduced in [1].

When we have a DRM device and a render node, we can advertise the
extension and return the render node name for the
EGL_DRM_RENDER_NODE_FILE_EXT query.

For the special software EGL device, we can advertise the extension
and return NULL for the EGL_DRM_RENDER_NODE_FILE_EXT query, because
we can guarantee that llvmpipe will never use a render node for
rendering operations.

However, llvmpipe might be using a primary node when used with the
GBM platform. So we can't advertise EXT_device_drm in this case.

When we have a DRM device but no render node, that means we're on a
split render/display SoC. We _should_ return the render node used
by the renderonly driver, however Mesa needs more plumbing to allow
this, so let's just disable the extension for now.

[1]: https://github.com/KhronosGroup/EGL-Registry/pull/127

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11797>

EGL: sync headers with Khronos

Taken from EGL-Registry commit dc0b58dca533c5882c38bc623d133190fff883a4.

Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Emil Velikov <emil.l.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11797>

ci/v3d: add piglit flake test

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12020>

aco: don't create v_madmk_f32/v_madak_f32 from v_fma_legacy_f16

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5105
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12004>

freedreno/registers: update dsi registers to support tpg

Based-on: https://patchwork.freedesktop.org/patch/445672/?series=92870&rev=1
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12021>

util: add workaround for Full Bore

Unfortunately I contacted the dev about this issue years ago and he
made a fix, but it has never been released after all these years.

This stops the screen from being completely black in game.

CC: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11941>

llvmpipe: add support for time elapsed queries.

It turns out for QBO you really need to explicitly support time
elapsed queries to avoid wierd interactions with the non-qbo
query paths.

Fixes: 506e51b8560f ("llvmpipe: initial query buffer object support. (v2)")
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11946>

Revert "CI: Disable LAVA devices"

This reverts commit 1f4ff4ed2e6fbefb5026d8300a80049ccf4912a5.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12016>

zink: fix cached descriptor allocation clamping

the number of allocated sets should be directly compared to the maximum

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11690>

zink: improve lazy descriptor pool handling

do set allocation when getting pool, queue filled pools for delete

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11690>

zink: add define for descriptor alloc clamping

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11690>

zink: clamp descriptor allocation bucket sizing to defined limit

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11690>

zink: split mem cache per type

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11966>

zink: inline mem cache hash table

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11966>

zink: move mem cache to sub-struct

no functional changes

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11966>

zink: rework oom flushing

tracking mem usage on the context is bad because if an app is always using
a large amount of memory across multiple batches, it triggers the oom flushes
on every flush and forces fencing

instead, add an explicit flag for oom flushing and another for stalling, then
flag oom flushing and stalling as needed, with set_framebuffer_state being an
additional flush point now since it's guaranteed not to split renderpasses

also proactively prune pending batch states if there's a lot of them

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11965>

zink: add a param to check_batch_completion for toggling lock-taking

need this to avoid deadlocks

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11965>

zink: use a local var for draw mode during draw

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11965>

zink: make batch_rp and norp static inlines

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11965>

zink: make zink_end_render_pass public

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11965>

zink: split draw_count checking to local variable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11965>

zink: split and move maybe_flush_or_stall mechanic

the batch state counting belongs in the flush call, and draws/computes
should each just check their counts and flush directly

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11965>

zink: handle vertex buffer offset overflows

there's a screen limit for vertex buffer offsets (???), so if a buffer
is going to overflow that limit, just rebind it as a new tmp buffer and
clamp the offset to 0

this also applies to buffer rebinds

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11836>

zink: change vbo_bind_count to a mask of slots

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11836>

zink: add mechanism for generating VkBuffers for rebinding

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11836>

meson: allow egl_native_platform to be specified

After commit f8dc22bf61c, it was no longer possible to have explicitly
enabled platforms with surfaceless being the EGL native platform.  This
fixes that by adding -Degl-native-platform.

Fixes: f8dc22bf61c ("meson: drop deprecated EGL platform build options")
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11992>

egl/surfaceless: try kms_swrast before swrast

Before commit f7e0cdcf1a5, we tried these in order

 - if (!ForceSoftware) surfaceless_probe_device(disp, false);
 - surfaceless_probe_device(disp, true);
 - surfaceless_probe_device_sw(disp);

The commit changed it to

 - surfaceless_probe_device(disp, ForceSoftware);
 - surfaceless_probe_device_sw(disp);

and broke 2D virtio-gpu and vgem when ForceSoftware is false.  This
commit restores the old behavior.

Fixes: f7e0cdcf1a5 ("egl/surfaceless: simplify dri2_initialize_surfaceless()")
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11992>

llvmpipe: always use draw_regions intersection

This was still used in the linear branch, since it works all a little
differently there (in particular, when using guard band we have to
intersect the draw regions with the viewport, since draw won't clip
for us). However, we should always intersect with draw_regions
(regardless if that includes the intersection with vp or not), since
the viewport can be larger than the fb size, and we don't want to
draw outside the fb (usually harmless, but important for occlusion
queries and shader image/buffer writes).

This fixes various dEQP-GLES31.functional.fbo.no_attachments failures
(which uses oversized viewport with occlusion queries).
The other ci changes aren't really bugs (the humus/Portals image
looks the same, we cannot expect bit-identical results, and
for the piglit quad-invariance test, I think we merely passed it
by accident since our interpolation may give different results
depending on where on the screen a tri is regardless of linear
rasterizer).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11969>

llvmpipe/linear: don't try to use tgsi analysis for nir shaders

Even though it's probably harmless, we shouldn't try it, so just skip it,
eventually need to hook in nir analysis there.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11969>

llvmpipe: add some extra linear rast checks.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11969>

llvmpipe/linear: fix ppc64/s390 build

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11969>

llvmpipe: Add a linear rasterizer optimized for 2D rendering.

This change adds:

- an alternative rasterizer, which rasterizes bins in a left->right &
  top->bottom linear fashion;

- triangle -> rectangle detection;

- 1:1 blit detection;

- a special TGSI -> LLVM IR code generation that uses 8-bit SSE integers
  in AoS fashion (as opposed to 32bits floats.)

Altogether these changes yield a 2x to 3x performance improvement for 2D
workloads.  It was designed to render Windows 7 Aero and other Windows
built-in 3D applications (like Windows Media Player, Internet Explorer
11, UWP applications) with minimum CPU utilization, but it should be
generally applicable to other 2D-on-3D applications, like desktop
compositors, HTML browsers, 3D based UI toolkits, etc.

This was mostly the brainchild of Keith Whitwell back in 2010.  I wrote
TGSI -> AoS translation.  And many others added bug-fixes and
enhancements over the years: Roland Scheidegger, Brian Paul, and James
Benton.

Known issues:

- piglit spec@!opengl 1.1@quad-invariance will warn that "left and right
half should match" due to rounding error difference

- These optimized paths to kick in is that depth-buffer must not be
used, so some applications which want to benefit from these improvements
might need to be modified to ensure they use painter's algorithm instead
of depth-buffers.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Acked-by: Keith Whitwell <keithw@vmware.com>
v2: Incorporate Dave Airlie feedback: cleanup LP_DEBUG_xx; shrink 3+
empty lines.
v3: silence unused var warning, adapt to new upstream code (point setup)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11969>

anv: Advertise support for VK_EXT_shader_atomic_float2

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11981>

vulkan: Update XML and headers to 1.2.185

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11981>

spirv: Implement SPV_EXT_shader_atomic_float16_add

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11981>

intel/compiler: Remove cube array size lowering in compiler backend

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9466>

intel/compiler: Lower cube image sizes using nir_lower_image()

Reworks:
 * Re-merge early/late passes using Jason's nir image deref patches
 * Create and use a common nir_lower_image() pass. (s-b Jason)
 * Remove cube array size handling in image load/store lowering

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9466>

intel/compiler: Rename brw_nir_lower_image_load_store to brw_nir_lower_storage_image

Reworks:
 * Add crocus

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9466>

nir: Add nir_lower_image() to lower cube image sizes

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9466>

iris: add tile cache flush to iris_copy_region

Add tile cache flush on iris_copy_region(). Temp workaround
until more robust tracking system implemented.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5029
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11935>

nir/lower_subgroups: Handle down-casts in uint_to_ballot_type

This is required for Zink where the API ballot type is a uint64_t and
the "hardware" ballot type is uvec4.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11989>

CI: Disable LAVA devices

We've had a physical machine death, and the restore/transfer is achingly
slow at the moment. Some of the devices are still fine, but
conservatively just kill the lot until it's all recovered.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11997>

intel/compiler: Use GCM in nir_optimize

There is still some work to do before we can enable GVN.

In these shader-db results, Skylake and older platforms used i965 while
newer platforms used Iris.  I believe this accounts for the difference
in "sends."  The shaders helped for sends are all Synmark shaders.

On Sandybridge, the shaders helped for sends were the same ones hurt for
spills and fills.  These are also all Synmark shaders.

Tiger Lake and Ice Lake had similar results. (Ice Lake shown)
total instructions in shared programs: 19868594 -> 19868452 (<.01%)
instructions in affected programs: 6607 -> 6465 (-2.15%)
helped: 12
HURT: 1
helped stats (abs) min: 12 max: 12 x̄: 12.00 x̃: 12
helped stats (rel) min: 1.94% max: 2.62% x̄: 2.38% x̃: 2.58%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.45% max: 0.45% x̄: 0.45% x̃: 0.45%
95% mean confidence interval for instructions value: -13.27 -8.58
95% mean confidence interval for instructions %-change: -2.67% -1.65%
Instructions are helped.

total cycles in shared programs: 962404540 -> 962008224 (-0.04%)
cycles in affected programs: 961274 -> 564958 (-41.23%)
helped: 23
HURT: 1
helped stats (abs) min: 10 max: 32536 x̄: 17438.96 x̃: 23658
helped stats (rel) min: 0.02% max: 80.04% x̄: 42.05% x̃: 51.58%
HURT stats (abs)   min: 4780 max: 4780 x̄: 4780.00 x̃: 4780
HURT stats (rel)   min: 3.26% max: 3.26% x̄: 3.26% x̃: 3.26%
95% mean confidence interval for cycles value: -22989.90 -10036.43
95% mean confidence interval for cycles %-change: -55.01% -25.32%
Cycles are helped.

Skylake and Broadwell had simliar results. (Skylake shown)
total instructions in shared programs: 17996652 -> 17996154 (<.01%)
instructions in affected programs: 96622 -> 96124 (-0.52%)
helped: 85
HURT: 0
helped stats (abs) min: 1 max: 12 x̄: 5.86 x̃: 5
helped stats (rel) min: 0.39% max: 2.65% x̄: 0.68% x̃: 0.39%
95% mean confidence interval for instructions value: -6.42 -5.30
95% mean confidence interval for instructions %-change: -0.84% -0.52%
Instructions are helped.

total cycles in shared programs: 939899189 -> 939289732 (-0.06%)
cycles in affected programs: 3719430 -> 3109973 (-16.39%)
helped: 60
HURT: 39
helped stats (abs) min: 18 max: 32444 x̄: 10437.30 x̃: 6940
helped stats (rel) min: 0.08% max: 80.40% x̄: 23.99% x̃: 12.07%
HURT stats (abs)   min: 10 max: 4970 x̄: 430.28 x̃: 323
HURT stats (rel)   min: 0.05% max: 3.41% x̄: 1.55% x̃: 1.60%
95% mean confidence interval for cycles value: -8095.51 -4216.75
95% mean confidence interval for cycles %-change: -18.65% -9.21%
Cycles are helped.

total sends in shared programs: 1026997 -> 1026927 (<.01%)
sends in affected programs: 6090 -> 6020 (-1.15%)
helped: 70
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.15% max: 1.15% x̄: 1.15% x̃: 1.15%
95% mean confidence interval for sends value: -1.00 -1.00
95% mean confidence interval for sends %-change: -1.15% -1.15%
Sends are helped.

Haswell and Ivy Bridge had similar results. (Haswell shown)
total instructions in shared programs: 16040891 -> 16040252 (<.01%)
instructions in affected programs: 109132 -> 108493 (-0.59%)
helped: 87
HURT: 0
helped stats (abs) min: 1 max: 12 x̄: 7.34 x̃: 7
helped stats (rel) min: 0.05% max: 2.61% x̄: 0.75% x̃: 0.51%
95% mean confidence interval for instructions value: -7.84 -6.85
95% mean confidence interval for instructions %-change: -0.90% -0.61%
Instructions are helped.

total cycles in shared programs: 968579567 -> 967867117 (-0.07%)
cycles in affected programs: 30688439 -> 29975989 (-2.32%)
helped: 241
HURT: 62
helped stats (abs) min: 4 max: 31929 x̄: 3901.22 x̃: 2282
helped stats (rel) min: 0.04% max: 79.63% x̄: 12.70% x̃: 4.44%
HURT stats (abs)   min: 4 max: 8230 x̄: 3673.27 x̃: 637
HURT stats (rel)   min: 0.01% max: 63.87% x̄: 24.54% x̃: 3.56%
95% mean confidence interval for cycles value: -3100.23 -1602.41
95% mean confidence interval for cycles %-change: -7.94% -2.22%
Cycles are helped.

total sends in shared programs: 935025 -> 934955 (<.01%)
sends in affected programs: 6090 -> 6020 (-1.15%)
helped: 70
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.15% max: 1.15% x̄: 1.15% x̃: 1.15%
95% mean confidence interval for sends value: -1.00 -1.00
95% mean confidence interval for sends %-change: -1.15% -1.15%
Sends are helped.

LOST:   1
GAINED: 0

Sandy Bridge
total instructions in shared programs: 11785330 -> 11786504 (<.01%)
instructions in affected programs: 53462 -> 54636 (2.20%)
helped: 16
HURT: 36
helped stats (abs) min: 1 max: 17 x̄: 10.06 x̃: 9
helped stats (rel) min: 0.47% max: 3.29% x̄: 2.03% x̃: 1.90%
HURT stats (abs)   min: 5 max: 38 x̄: 37.08 x̃: 38
HURT stats (rel)   min: 1.77% max: 2.98% x̄: 2.94% x̃: 2.98%
95% mean confidence interval for instructions value: 16.26 28.90
95% mean confidence interval for instructions %-change: 0.75% 2.08%
Instructions are HURT.

total cycles in shared programs: 498009911 -> 497378300 (-0.13%)
cycles in affected programs: 6848277 -> 6216666 (-9.22%)
helped: 108
HURT: 28
helped stats (abs) min: 4 max: 25394 x̄: 6037.42 x̃: 766
helped stats (rel) min: 0.02% max: 60.58% x̄: 11.60% x̃: 4.83%
HURT stats (abs)   min: 96 max: 6834 x̄: 729.64 x̃: 742
HURT stats (rel)   min: 0.17% max: 16.23% x̄: 1.57% x̃: 1.55%
95% mean confidence interval for cycles value: -5907.99 -3380.40
95% mean confidence interval for cycles %-change: -11.67% -6.11%
Cycles are helped.

total spills in shared programs: 2316 -> 2526 (9.07%)
spills in affected programs: 280 -> 490 (75.00%)
helped: 0
HURT: 35

total fills in shared programs: 1540 -> 1750 (13.64%)
fills in affected programs: 280 -> 490 (75.00%)
helped: 0
HURT: 35

total sends in shared programs: 642985 -> 642950 (<.01%)
sends in affected programs: 3045 -> 3010 (-1.15%)
helped: 35
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.15% max: 1.15% x̄: 1.15% x̃: 1.15%
95% mean confidence interval for sends value: -1.00 -1.00
95% mean confidence interval for sends %-change: -1.15% -1.15%
Sends are helped.

LOST:   1
GAINED: 0

Iron Lake and GM45 had similar results. (Iron Lake shown)
total cycles in shared programs: 239442382 -> 239429400 (<.01%)
cycles in affected programs: 20816 -> 7834 (-62.37%)
helped: 2
HURT: 0

In Fossil-db, all of the shaders hurt for spill and fills are compute
shaders from Shadow of the Tomb Raider.  Two shaders were helped for
sends, and these are also from SotTR.

All of the shaders helped for loops were from Geekbench5.  These all
went from 3 loops to 2.

Tiger Lake
Instructions in all programs: 160852396 -> 160855303 (+0.0%)
SENDs in all programs: 6878559 -> 6878559 (+0.0%)
Loops in all programs: 38350 -> 38305 (-0.1%)
Cycles in all programs: 7369162339 -> 7344236445 (-0.3%)
Spills in all programs: 193762 -> 193876 (+0.1%)
Fills in all programs: 306417 -> 306600 (+0.1%)

Ice Lake
Instructions in all programs: 144592523 -> 144593946 (+0.0%)
SENDs in all programs: 6930697 -> 6930697 (+0.0%)
Loops in all programs: 38344 -> 38299 (-0.1%)
Cycles in all programs: 8732456458 -> 8707823383 (-0.3%)
Spills in all programs: 216692 -> 216806 (+0.1%)
Fills in all programs: 334089 -> 334272 (+0.1%)

Skylake
Instructions in all programs: 135618746 -> 135619971 (+0.0%)
SENDs in all programs: 6896728 -> 6896724 (-0.0%)
Loops in all programs: 38343 -> 38298 (-0.1%)
Cycles in all programs: 8391957144 -> 8368935657 (-0.3%)
Spills in all programs: 194741 -> 194879 (+0.1%)
Fills in all programs: 301048 -> 301255 (+0.1%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/597>

intel/compiler: call nir_opt_dead_cf() after we have finished all opts

This will avoid a regression with the following patch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/597>

nir/gcm: be less destructive with instruction order

This changes the pass to extract pinned instructions and not just unpinned
instructions when rescheduling instructions. This stops pinned instructions
from being bunched together when instructions are reinserted into the blocks
which can result in regressions with regards to cycles and instruction
counts on i965 and register use/Max Waves on AMD hardware.

In order to do this we also throw away the post-order depth-first
search linearization algorithm used to re-insert the instructions, which
itself causes possible regressions when instructions are reinserted into
a less than ideal new order (of which the bunched together pinned
instructions is one example). Instead we simply insert instructions in the
reverse order they were extracted. This will simply place instructions
that were scheduled earlier onto the end of their new block and
instructions that were scheduled later to the start of their new block.
With this everything should remain in order without the need to run
over uses.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/597>

nir/gcm: Clear out pass_flags before starting

With this pass enabled in Intel drivers, running shader-db on
shaders/unity/38.shader_test resulted in

Program received signal SIGSEGV, Segmentation fault.
gcm_schedule_early_src (src=0x555555d45348, void_state=0x7fffffffba40) at ../../SOURCE/master/src/compiler/nir/nir_opt_gcm.c:297
297    if (info->early_block->index < src_info->early_block->index)
(gdb) print src_info->early_block
$1 = (nir_block *) 0x0

I tracked this down to an early exit from gcm_schedule_early_instr on
the parent instruction because instr->pass_flags was 0x1c.  That
should be an impossible value for this pass, so I inferred that
pass_flags must have dirt left from some previous pass.

Fixes: 8dfe6f672f4 ("nir/GCM: Use pass_flags instead of bitsets for tracking visited/pinned")

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/597>

nir: add nir_imm_ivec3 builder

the other ones exist, so why not this one too

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11983>

aco: include <cstddef> in aco_util.h

It's needed for ptrdiff.

Fixes: 59fdaa1985f9269c40f0ca4704fbeb3fb05c4c2f ('aco: reorder and cleanup #includes')
Closes: #5076
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11947>

gallivm: fix pass init order on mips64 with llvm 8

llvm 8 has some missing pass dependencies, fix the mips64 case
as well.

See similiar fix:

[1] https://gitlab.freedesktop.org/mesa/mesa/-/commit/f59ff014b199af118ac9b90e3a67f15f4c37110e
[2] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3805

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: suijingfeng <suijingfeng@loongson.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11955>

pass egl-symbols-check test on mips64el

Without this patch the egl symbols check test fail on mips platform:

72/87 mesa:egl / egl-symbols-check        FAIL        0.20s (exit status 1)

src/egl/libEGL.so.1.0.0: unknown symbol exported: _fbss
src/egl/libEGL.so.1.0.0: unknown symbol exported: _fdata
src/egl/libEGL.so.1.0.0: unknown symbol exported: _ftext

See Mips Run say thoes special symbols are automatically defined by the
linker to allow programs to discover the start and end of their various
section. They are descended from conventions that grew up in UNIX-like OSs,
and are peculiar to the MIPS environment.

_fbss  :  Start of uninitialized data segment
_fdata :  Start of initialized data segment
_ftext :  Start of text segment

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: suijingfeng <suijingfeng@loongson.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11955>

gallivm: add basic mips64 support and set mcpu to mips64r5 on ls3a4000

 ls3a4000 and ls2k1000 cpu is mips64r5 compatible with MSA SIMD
 instruction set implemented, while ls3a3000 is mips64r2 compatible only.
 Due to lacking llvm support for loongson CPU, llvm::sys::getHostCPUName().
 return "generic" on all loongson mips CPU.

 So we override the MCPU to mips64r5 if MSA is implemented, feedback to
 mips64r2 for all other ordinaries.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: suijingfeng <suijingfeng@loongson.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11955>

egl/wayland: Allow EGLSurface to outlive wl_egl_window

According to the EGL spec, it is entirely valid for an EGLSurface to
outlive the native_window it was created from, provided that SwapBuffers
and MakeCurrent return EGL_BAD_NATIVE_WINDOW.

We don't have any facility to error on MakeCurrent, so just make sure we
can bundle on safely through rendering for now, then return
EGL_BAD_NATIVE_WINDOW from SwapBuffers.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2251
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4902
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11979>

egl/wayland: Error on invalid native window

We unconditionally require a wl_egl_window to be passed as the native
window type, and do not permit a default window. The spec requires us to
return EGL_BAD_NATIVE_WINDOW when doing this, rather than crashing.

Further, if an EGLSurface has already been created for an existing
native window, we are required to return EGL_BAD_ALLOC.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2251
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4902
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11979>

aco/ra: don't allocate vector space for MIMG NSA operands

In this case, the MIMG vaddr components are not vector-aligned anymore, anyway.

Totals from 11866 (7.90% of 150170) affected shaders: (GFX10.3)
VGPRs: 733064 -> 728408 (-0.64%); split: -0.66%, +0.02%
CodeSize: 67968356 -> 67968440 (+0.00%); split: -0.02%, +0.02%
MaxWaves: 214022 -> 214014 (-0.00%)
Instrs: 12798200 -> 12797232 (-0.01%); split: -0.02%, +0.01%
Latency: 196427665 -> 196418706 (-0.00%); split: -0.02%, +0.01%
InvThroughput: 37082037 -> 37080799 (-0.00%); split: -0.02%, +0.02%
VClause: 246097 -> 246031 (-0.03%); split: -0.16%, +0.13%
Copies: 494852 -> 493923 (-0.19%); split: -0.52%, +0.34%
Branches: 220323 -> 220294 (-0.01%); split: -0.03%, +0.02%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11980>

anv: share some code between vkCmdDrawIndirectCount and vkCmdDrawIndexedIndirectCount

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11975>

ci/v3dv: update expected results

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11970>

intel/tools/aubinator_error_decode: tag hanging instruction

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11957>

ci: actually run piglit tests with virgl

Make sure that the host is using llvmpipe while the guest is using virgl as driver.

Note that the neverball/neverball.trace trace actually regressed in a way that the
foreground is missing.

Fixes: f1b952fa ("ci: Run tests inside Crosvm")

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11986>

v3dv: fix I/O lowering for GS

Fixes 9e7d9a6ef ('v3dv: add support for geometry shaders to pipelines')

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11977>

crocus/gen4-5: fix ff gs emit on VS vue map change.

This should fix some texturing problems seen on gen4/5, I reproduced it
with a minecraft.trace file

Fixes: f3630548f1da ("crocus: initial gallium driver for Intel gfx 4-7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11993>

docs: update anisotropic info for softpipe/llvmpipe/lavapipe

both drivers have proper implementations

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>

llvmpipe/virgl/ci: update traces for aniso

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>

lavapipe: add support for anisotropic texturing

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>

llvmpipe: enable GL_ARB_texture_filter_anisotropic

Update checksums as images are same as softpipe.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>

draw: add sampler max_aniso query.

Add support for draw shaders for retrieve max anisotropy.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>

llvmpipe: add support for max aniso query.

This just joins the sampler code to the llvmpipe shader stages.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>

gallivm: add support for anisotropic sampling.

This is a port of the softpipe anisotropic filtering
to llvmpipe. It should produce pretty similiar results.

This contains the proposed fix to the softpipe calculating
dq after scaling.

It also contains a number of other fixes around vector lengths
etc caught during test.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>

llvmpipe: add filter table shader accessor

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>

draw: add shader access to aniso filter table.

This allows the draw shaders to access the global filter table
vis the context ptr.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>

gallivm: add anisotropic filter weight table.

The anisotropic filtering needs access to a table of weights,
to make the calculations easier. This routes the table
through from shader parameter and makes it available for the
sampler code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>

gallium: add pipe_sampler_state::pad member

when zeroing the struct without memset, this needs to be zeroed to avoid
garbage data in the padding

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11886>

nir: Add a format field to _deref image intrinsics

The rules here are the same as for texture instructions.  The bits on
the intrinsic are the ground truth and are allowed to vary from the
deref a bit as-needed.  If the intrinsic says PIPE_FORMAT_NONE, then we
can look at the variable, if visible, to get format information.  This
means that we need to be careful when we rewrite intrinsics based on the
deref to only override the format from the _deref intrinsic from the
image variable unless the intrinsic is PIPE_FORMAT_NONE.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11849>

nir: Set src_components = -1 for image intrinsic deref sources

Semantically, -1 means "Unknown; don't validate" but it's really only
used for derefs because they often need to be flexible.  We don't really
need that flexibility for image intrinsics but this makes it more
consistent.  More immediately useful is that this gives us the ability
to tell _deref forms of these intrinsics apart from the lowered ones.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11849>

nir: Set IMAGE_DIM and IMAGE_ARRAY on deref intrinsics

The rules here are the same as for texture instructions.  The bits on
the intrinsic are the ground truth and are allowed to vary from the
deref a bit as-needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11849>

glsl/nir: Use nir_ssa_undef() from nir_builder

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11849>

anv: Allow unused VkSpecializationMapEntries

Fixes future CTS: dEQP-VK.pipeline.spec_constant.*.basic.*unused_*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11987>

aux/draw: use nir_to_tgsi for draw shader in llvm path

Some drivers doesn't support PIPE_SHADER_CAP_INTEGERS.
This leads to using load_ubo_vec4 which throws llvmpipe off the guard since
it doesn't expect load_ubo_vec4 in shader. Use nir_to_tgsi utility in
such a case.

This fixes crash seen with conform's mustpass.c, select.c and feedback.c.
Also, few gl-select related piglit tests exhibit same crash. Found in vmware's
internal testing

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
v2: incorporated Emma's comments. Added check for PIPE_SHADER_CAP_INTEGERS and
remove PIPE_SHADER_IR_TGSI check

v3: As per Emma's comment, removed expected crashes for i915 piglit

v4: update expetcted passes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11911>

zink: Fix unused-variable warning

Fixes: 9b40fc48
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11920>

nir/lower_point_size_mov: zero nir_state_slot::swizzle in new variable

this is otherwise uninitialized during nir_serialize calls

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11932>

freedreno: use new tc util for setting bytes_mapped_limit

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11853>

zink: use new tc util for setting bytes_mapped_limit

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11853>

radeonsi: use new tc util for setting bytes_mapped_limit

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11853>

util/tc: add a util function for setting bytes_mapped_limit

tc drivers set this based on os_get_total_physical_memory()/divisor,
which is going to be totally wrong for 32bit processes and explode
the address space

this util function can be used to handle per-platform clamping

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11853>

zink: add changed flag for blend states

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11968>

broadcom: don't define internal BPP values twice

We have a "maximum bpp of all render targets" field for several
packets. For them we were defining manually the possible values. But
all the possible values are the ones defined at the already defined
type "Internal BPP". So in practice we were defining the possible BPP
values twice.

Also for those fields, sometimes we were using the "Internal BPP" type
and in some other cases we were not, so this commit also adds some
consistency.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11976>

broadcom/compiler: emit TMU flush before a jump

Like in the case of emitting a block, process pending TMU operations
before a jump is executed.

Fixes dEQP-VK.graphicsfuzz.stable-binarysearch-tree-nested-if-and-conditional.

Fixes: 197090a3fca ("broadcom/compiler: implement pipelining for general
TMU operations")

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11971>

st/mesa: always use PIPE_USAGE_STAGING for GL_MAP_READ_BIT usage

This fixes CPU read performance.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5091
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11974>

radeonsi: Check aux_context on si_destroy_screen()

The function radeonsi_screen_create_impl() tries to create the
aux_context but doesn't actually check for the returned value from
si_create_context().

Then, on si_destroy_screen() the aux_context is used without actually
checking whether it's a thing or not.

As a result, if for any reason si_create_context() failed, we shall
crash in si_destroy_screen() with a NULL pointer dereference trying to
access ((struct si_context *)sscreen->aux_context)->log.

Simply check for aux_context not being NULL to avoid that crash.

Cc: mesa-stable
Signed-off-by: Olivier Fourdan <ofourdan@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11948>

mesa: fix bindless uniform samplers update

According to the comment below some extra magic is needed
for bindless samplers, so don't do an early return in this
case.

Fixes: 736f1f70ab8 ("mesa: skip redundant uniform updates for glUniform")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4806
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11930>

aco/optimizer: ensure to not erase high bits when propagating packed constants

Packed constants with non-zero values in the high half
might have been propagated as 16 bit, dropping the high half.

Cc: mesa-stable
Closes: #5070
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11954>

clover/il: return IL only for spirv and correct length

This is specified as  char[] and I don't think requires null termination,
Also we should only return IL based programs.

Fixes CTS spirv_new get_program_il

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11868>

zink: remove screen info stuff from draw templates

we can initialize templates that we never need to evaluate again at
runtime, cutting the overhead for all tempaltes

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11964>

zink: add a ctx flag for shader reading basevertex

less rare than drawid, but still not great across repeated draw calls
with all the derefs

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11964>

zink: use drawid_offset directly during draw

this used to be worth making a local variable for, now it's not

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11964>

zink: flatten descriptor_refs_dirty into BATCH_CHANGED template

that's all this is now

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11964>

zink: add a ctx flag for drawid reading

avoid needing so many derefs and a bitset to check this during draw

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11964>