Pavel Labath [Wed, 6 Jun 2018 09:16:00 +0000 (09:16 +0000)]
Revert "PDB support of function-level linking and splitted functions"
This reverts commit r334030 because it adds a broken test.
llvm-svn: 334076
Elena Demikhovsky [Wed, 6 Jun 2018 09:11:46 +0000 (09:11 +0000)]
Added documentation for Masked Vector Expanding Load and Compressing Store Intrinsics
Differential Revision: https://reviews.llvm.org/D26743
llvm-svn: 334075
Sam McCall [Wed, 6 Jun 2018 08:53:36 +0000 (08:53 +0000)]
Adjust symbol score based on crude symbol type.
Summary: Numbers are guesses to be adjusted later.
Reviewers: ioeric
Subscribers: ilya-biryukov, MaskRay, jkorous, cfe-commits
Differential Revision: https://reviews.llvm.org/D47787
llvm-svn: 334074
Ilya Biryukov [Wed, 6 Jun 2018 08:50:12 +0000 (08:50 +0000)]
Change test to output 'pcm' to the temp dir, not the source dir
llvm-svn: 334073
Ivan Donchevskii [Wed, 6 Jun 2018 08:25:54 +0000 (08:25 +0000)]
Fix build - use llvm::make_unique
llvm-svn: 334072
Petar Jovanovic [Wed, 6 Jun 2018 07:24:52 +0000 (07:24 +0000)]
[MIPS GlobalISel] Add lowerCall
Add minimal support to lower function calls.
Support only functions with arguments/return that go through registers
and have type i32.
Patch by Petar Avramovic.
Differential Revision: https://reviews.llvm.org/D45627
llvm-svn: 334071
Ivan Donchevskii [Wed, 6 Jun 2018 07:17:26 +0000 (07:17 +0000)]
[Frontend] Honor UserFilesAreVolatile flag getting file buffer in ASTUnit
Do not memory map the main file if the flag UserFilesAreVolatile is set to true
in ASTUnit when calling FileSystem::getBufferForFile.
Differential Revision: https://reviews.llvm.org/D47460
llvm-svn: 334070
Eric Fiselier [Wed, 6 Jun 2018 06:42:27 +0000 (06:42 +0000)]
Remove unused code from __functional_base. NFC.
Patch from Arthur O'Dwyer.
`__user_alloc_construct_impl` is used by <experimental/memory_resource>, but
this `__user_alloc_construct` is never used.
Also, `<experimental/memory_resource>` doesn't need a full definition of
`std::tuple`; just the forward declaration in `<__tuple>` will suffice.
Reviewed as https://reviews.llvm.org/D46806
llvm-svn: 334069
Petr Hosek [Wed, 6 Jun 2018 06:26:18 +0000 (06:26 +0000)]
[Support] Use zx_cache_flush on Fuchsia to flush instruction cache
Fuchsia doesn't use __clear_cache, instead it provide zx_cache_flush
system call. Use it to flush instruction cache.
Differential Revision: https://reviews.llvm.org/D47753
llvm-svn: 334068
Vlad Tsyrklevich [Wed, 6 Jun 2018 06:25:51 +0000 (06:25 +0000)]
[Analyzer][Z3] Test fixes for Z3 constraint manager
Summary:
Since Z3 tests have been not been running [1] some tests needed to be
updated. I also added a regression test for [1].
[1] https://reviews.llvm.org/D47722
Reviewers: george.karpenkov, NoQ, ddcc
Reviewed By: george.karpenkov
Subscribers: mikhail.ramalho, dcoughlin, xazax.hun, szepet, zzheng, a.sidorin, cfe-commits
Differential Revision: https://reviews.llvm.org/D47726
llvm-svn: 334067
Vlad Tsyrklevich [Wed, 6 Jun 2018 06:25:37 +0000 (06:25 +0000)]
[Analyzer] Fix the Z3 lit test config
Summary:
The '%analyze' extra_args config argument seems to have been erroneously
deleted in r315627 disabling Z3 tests for the clang analyzer. Add the
flag back.
Reviewers: george.karpenkov, NoQ, ddcc
Reviewed By: george.karpenkov
Subscribers: xazax.hun, szepet, delcypher, a.sidorin, llvm-commits
Differential Revision: https://reviews.llvm.org/D47722
llvm-svn: 334066
Vlad Tsyrklevich [Wed, 6 Jun 2018 06:09:02 +0000 (06:09 +0000)]
[Analyzer] Fix Z3ConstraintManager crash (PR37646)
Summary:
Fix another Z3ConstraintManager crash, use fixAPSInt() to extend a
boolean APSInt.
Reviewers: george.karpenkov, NoQ, ddcc
Reviewed By: george.karpenkov
Subscribers: xazax.hun, szepet, a.sidorin, cfe-commits
Differential Revision: https://reviews.llvm.org/D47617
llvm-svn: 334065
Dean Michael Berris [Wed, 6 Jun 2018 06:07:48 +0000 (06:07 +0000)]
[XRay][compiler-rt] Refactor recursion guard for Basic and FDR Mode
Summary:
This change extracts the recursion guard implementation from FDR Mode
and updates it to do the following:
- Do the atomic operation correctly to be signal-handler safe.
- Make it usable in both FDR and Basic Modes.
Before this change, the recursion guard relied on an unsynchronised read
and write on a volatile thread-local. A signal handler could then run in
between the read and the write, and then be able to run instrumented
code as part of the signal handling. Using an atomic exchange instead
fixes that by doing a proper mutual exclusion even in the presence of
signal handling.
Reviewers: kpw, eizan, jfb
Reviewed By: eizan
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47696
llvm-svn: 334064
Petr Hosek [Wed, 6 Jun 2018 05:18:39 +0000 (05:18 +0000)]
[Fuchsia] Include install-distribution-stripped in bootstrap targets
This enables the use of install-distribution-stripped target in the
2-stage builds.
Differential Revision: https://reviews.llvm.org/D47758
llvm-svn: 334063
Jan Korous [Wed, 6 Jun 2018 05:16:34 +0000 (05:16 +0000)]
[Sema] Fix parsing of anonymous union in language linkage specification
C++17 [dcl.link]p4:
A linkage specification does not establish a scope.
C++17 [class.union.anon]p2:
Namespace level anonymous unions shall be declared static.
Differential Revision: https://reviews.llvm.org/D45884
rdar://problem/
37545925
llvm-svn: 334062
Craig Topper [Wed, 6 Jun 2018 04:51:52 +0000 (04:51 +0000)]
[X86] Move the vec_set/vec_ext builtins for 64-bit elements to BuiltinsX86_64.def.
The instructions these correspond to and the intrinsics that use them are only available in 64-bit mode.
llvm-svn: 334061
Reid Kleckner [Wed, 6 Jun 2018 01:44:10 +0000 (01:44 +0000)]
Fix std::tuple errors
llvm-svn: 334060
Reid Kleckner [Wed, 6 Jun 2018 01:35:08 +0000 (01:35 +0000)]
Implement bittest intrinsics generically for non-x86 platforms
I tested these locally on an x86 machine by disabling the inline asm
codepath and confirming that it does the same bitflips as we do with the
inline asm.
Addresses code review feedback.
llvm-svn: 334059
Kostya Serebryany [Wed, 6 Jun 2018 01:23:29 +0000 (01:23 +0000)]
[libFuzzer] initial implementation of -data_flow_trace. It parses the data flow trace and prints the summary, but doesn't use the information in any other way yet
llvm-svn: 334058
Craig Topper [Wed, 6 Jun 2018 00:24:55 +0000 (00:24 +0000)]
[X86] Add builtins for vector element insert and extract for different 128 and 256 bit vector types. Use them to implement the extract and insert intrinsics.
Previously we were just using extended vector operations in the header file.
This unfortunately allowed non-constant indices to be used with the intrinsics. This is incompatible with gcc, icc, and MSVC. It also introduces a different performance characteristic because non-constant index gets lowered to a vector store and an element sized load.
By adding the builtins we can check for the index to be a constant and ensure its in range of the vector element count.
User code still has the option to use extended vector operations themselves if they need non-constant indexing.
llvm-svn: 334057
Eric Fiselier [Wed, 6 Jun 2018 00:13:49 +0000 (00:13 +0000)]
Fix test failures after r334053.
llvm-svn: 334056
Sanjay Patel [Tue, 5 Jun 2018 23:34:45 +0000 (23:34 +0000)]
[CodeGen] assume max/default throughput for unspecified instructions
This is a fix for the problem arising in D47374 (PR37678):
https://bugs.llvm.org/show_bug.cgi?id=37678
We may not have throughput info because it's not specified in the model
or it's not available with variant scheduling, so assume that those
instructions can execute/complete at max-issue-width.
Differential Revision: https://reviews.llvm.org/D47723
llvm-svn: 334055
Craig Topper [Tue, 5 Jun 2018 22:40:03 +0000 (22:40 +0000)]
[X86] Implement __builtin_ia32_vec_ext_v2si correctly even though we only use it with an index of 0.
This builtin takes an index as its second operand, but the codegen hardcodes an index of 0 and doesn't use the operand. The only use of the builtin in the header file passes 0 to the operand so this works for that usage. But its more correct to use the real operand.
llvm-svn: 334054
Eric Fiselier [Tue, 5 Jun 2018 22:32:52 +0000 (22:32 +0000)]
Fix PR37694 - std::vector doesn't correctly move construct allocators.
C++2a[container.requirements.general]p8 states that when move constructing
a container, the allocator is move constructed. Vector previously copy
constructed these allocators. This patch fixes that bug.
Additionally it cleans up some unnecessary allocator conversions
when copy constructing containers. Libc++ uses
__internal_allocator_traits::select_on_copy_construction to select
the correct allocator during copy construction, but it unnecessarily
converted the resulting allocator to the user specified allocator
type and back. After this patch list and forward_list no longer
do that.
Technically we're supposed to be using allocator_traits<allocator_type>::select_on_copy_construction,
but that should seemingly be addressed as a separate patch, if at all.
llvm-svn: 334053
Amaury Sechet [Tue, 5 Jun 2018 22:13:56 +0000 (22:13 +0000)]
[Mips] Remove uneeded variants of ADDC/ADDE lowering
Summary: As it turns out, the lowering for the Mips16* family of target is the exact same thing as what the ops expands to, so the code handling them can be removed and the ops only enabled for the MipsSE* family of targets.
Reviewers: smaksimovic, atanasyan, abeserminji
Subscribers: sdardis, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D47703
llvm-svn: 334052
Craig Topper [Tue, 5 Jun 2018 21:54:35 +0000 (21:54 +0000)]
[X86] Make __builtin_ia32_vec_ext_v2si require ICE for its index argument. Add warnings for out of range indices for __builtin_ia32_vec_ext_v2si, __builtin_ia32_vec_ext_v4hi, and __builtin_ia32_vec_set_v4hi.
These should take a constant value for an index and that constant should be a valid element number.
llvm-svn: 334051
Guozhi Wei [Tue, 5 Jun 2018 21:03:52 +0000 (21:03 +0000)]
[CodeGenPrepare] Move Extension Instructions Through Logical And Shift Instructions
CodeGenPrepare pass move extension instructions close to load instructions in different BB, so they can be combined later. But the extension instructions can't move through logical and shift instructions in current implementation. This patch enables this enhancement, so we can eliminate more extension instructions.
Differential Revision: https://reviews.llvm.org/D45537
This is re-commit of r331783, which was reverted by r333305. The performance regression was caused by some unlucky alignment, not a code generation problem.
llvm-svn: 334049
Zachary Turner [Tue, 5 Jun 2018 19:58:26 +0000 (19:58 +0000)]
[FileSystem] Remove OpenFlags param from several functions.
There was only one place in the entire codebase where a non
default value was being passed, and that place was already hidden
in an implementation file. So we can delete the extra parameter
and all existing clients continue to work as they always have,
while making the interface a bit simpler.
Differential Revision: https://reviews.llvm.org/D47789
llvm-svn: 334046
Matt Arsenault [Tue, 5 Jun 2018 19:52:56 +0000 (19:52 +0000)]
AMDGPU: Preserve metadata when widening loads
Preserves the low bound of the !range. I don't think
it's legal to do anything with the top half since it's
theoretically reading garbage.
llvm-svn: 334045
Matt Arsenault [Tue, 5 Jun 2018 19:52:46 +0000 (19:52 +0000)]
AMDGPU: Use more custom insert/extract_vector_elt lowering
Apply to i8 vectors.
llvm-svn: 334044
Krzysztof Parzyszek [Tue, 5 Jun 2018 19:52:39 +0000 (19:52 +0000)]
[Hexagon] Add pattern to generate 64-bit neg instruction
llvm-svn: 334043
Krzysztof Parzyszek [Tue, 5 Jun 2018 19:00:50 +0000 (19:00 +0000)]
[Hexagon] Add more patterns for generating abs/absp instructions
llvm-svn: 334038
Michael Berg [Tue, 5 Jun 2018 18:49:47 +0000 (18:49 +0000)]
guard fneg with fmf sub flags
Summary: This change uses fmf subflags to guard optimizations as well as unsafe. These changes originated from D46483.
Reviewers: spatel, hfinkel
Reviewed By: spatel
Subscribers: nemanjai
Differential Revision: https://reviews.llvm.org/D47389
llvm-svn: 334037
Vitaly Buka [Tue, 5 Jun 2018 18:15:57 +0000 (18:15 +0000)]
[lsan] Do not check for leaks in the forked process
Summary:
If calling process had threads then forked process will fail to detect
references from them.
Fixes https://github.com/google/sanitizers/issues/836
Reviewers: alekseyshl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47751
llvm-svn: 334036
Michael Berg [Tue, 5 Jun 2018 18:12:25 +0000 (18:12 +0000)]
NFC: adding baseline fneg case for fmf
llvm-svn: 334035
Alex Shlyapnikov [Tue, 5 Jun 2018 18:02:09 +0000 (18:02 +0000)]
[LSan] Report proper error on allocator failures instead of CHECK(0)-ing
Summary:
Following up on and complementing D44404.
Currently many allocator specific errors (OOM, for example) are reported as
a text message and CHECK(0) termination, not stack, no details, not too
helpful nor informative. To improve the situation, detailed and
structured errors were defined and reported under the appropriate conditions.
Reviewers: eugenis
Subscribers: srhines, mgorny, delcypher, llvm-commits, #sanitizers
Differential Revision: https://reviews.llvm.org/D47645
llvm-svn: 334034
Sam McCall [Tue, 5 Jun 2018 18:00:48 +0000 (18:00 +0000)]
[clangd] Fix inverted test again, sigh
llvm-svn: 334033
Sam McCall [Tue, 5 Jun 2018 17:58:12 +0000 (17:58 +0000)]
[clangd] Quality fixes (uninit var, missing debug output, pattern decl CCRs).
llvm-svn: 334032
Simon Dardis [Tue, 5 Jun 2018 17:53:22 +0000 (17:53 +0000)]
[mips] Fix the predicates for arithmetic operations
Reviewers: smaksimovic, atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D47635
llvm-svn: 334031
Aaron Smith [Tue, 5 Jun 2018 17:19:21 +0000 (17:19 +0000)]
PDB support of function-level linking and splitted functions
Summary:
The patch adds support of splitted functions (when MSVC is used with PGO) and function-level linking feature.
SymbolFilePDB::ParseCompileUnitLineTable function relies on fact that ranges of compiled source files in the binary are continuous and don't intersect each other. The function creates LineSequence for each file and inserts it into LineTable, and implementation of last one relies on continuity of the sequence. But it's not always true when function-level linking enabled, e.g. in added input test file test-pdb-function-level-linking.exe there is xstring's std__basic_string_char_std__char_traits_char__std__allocator_char_____max_size (.
00454820) between test-pdb-function-level-linking.cpp's foo (.
00454770) and main (.
004548F0).
To fix the problem this patch renews the sequence on each address gap.
Reviewers: asmith, zturner
Reviewed By: asmith
Subscribers: mgorny, lldb-commits
Differential Revision: https://reviews.llvm.org/D47708
llvm-svn: 334030
Greg Bedwell [Tue, 5 Jun 2018 17:16:19 +0000 (17:16 +0000)]
[UpdateTestChecks] Error if --llvm-mca-binary gets an empty string
If the command line was mistyped like:
./update_mca_test_checks.py --llvm-mca-binary= /path/to/llvm-mca *.s
^-- extra whitespace
then /path/to/llvm-mca would get treated by argparse as a test-path
pattern and could actually be opened in write mode and overwritten.
llvm-svn: 334029
Andrea Di Biagio [Tue, 5 Jun 2018 17:12:02 +0000 (17:12 +0000)]
[llvm-mca] Correctly update the CyclesLeft of a register read in the presence of partial register updates.
This patch fixe the logic in ReadState::cycleEvent(). That method was not
correctly updating field `TotalCycles`.
Added extra code comments in class ReadState to better describe each field.
llvm-svn: 334028
Fangrui Song [Tue, 5 Jun 2018 16:59:40 +0000 (16:59 +0000)]
Remove a self-referencing #include
llvm-svn: 334027
Sam McCall [Tue, 5 Jun 2018 16:30:25 +0000 (16:30 +0000)]
[clangd] Boost code completion results that are narrowly scoped (local, members)
Summary:
This signal is considered a relevance rather than a quality signal because it's
dependent on the query (the fact that it's completion, and implicitly the query
context).
This is part of the effort to reduce reliance on Sema priority, so we can have
consistent ranking between Index and Sema results.
Reviewers: ioeric
Subscribers: klimek, ilya-biryukov, MaskRay, jkorous, cfe-commits
Differential Revision: https://reviews.llvm.org/D47762
llvm-svn: 334026
Stella Stamenova [Tue, 5 Jun 2018 16:20:36 +0000 (16:20 +0000)]
[lit, pdb] Fix func-symbols.test (on Windows)
Summary: This test was failing sporadically on windows because the order in which the symbols are generated was different between builds. To fix the test, we need to run FileCheck twice - once for each set of symbols we want to verify. The test only runs on Windows.
Reviewers: asmith, zturner, labath
Subscribers: stella.stamenova, llvm-commits
Differential Revision: https://reviews.llvm.org/D47746
llvm-svn: 334025
Rui Ueyama [Tue, 5 Jun 2018 16:13:40 +0000 (16:13 +0000)]
Do not show unrelated "-m is missing" error message.
Previously, "-m is missing" error message is shown if you pass a
nonexistent file or don't pass any file at all to lld, as shown below:
$ ld.lld nonexistent.o
ld.lld: error: cannot open nonexistent.o: No such file or directory
ld.lld: error: target emulation unknown: -m or at least one .o file required
This patch eliminates the second error message because it's not related
and even inaccurate (you passed a .o file though it didn't exist).
llvm-svn: 334024
Simon Pilgrim [Tue, 5 Jun 2018 15:17:39 +0000 (15:17 +0000)]
[X86][SSE] Use multiplication scale factors for v8i16 SHL on pre-AVX2 targets.
Similar to v4i32 SHL, convert v8i16 shift amounts to scale factors instead to improve performance and reduce instruction count. We were already doing this for constant shifts, this adds variable shift support.
Reduces the serial nature of the codegen, which relies on chains of plendvb/pand+pandn+por shifts.
This is a step towards adding support for vXi16 vector rotates.
Differential Revision: https://reviews.llvm.org/D47546
llvm-svn: 334023
Nirav Dave [Tue, 5 Jun 2018 15:13:39 +0000 (15:13 +0000)]
[MC][X86] Allow assembler variable assignment to register name.
Summary:
Allow extended parsing of variable assembler assignment syntax and modify X86 to permit
VAR = register assignment. As we emit these as .set directives when possible, we inline
such expressions in output assembly.
Fixes PR37425.
Reviewers: rnk, void, echristo
Reviewed By: rnk
Subscribers: nickdesaulniers, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D47545
llvm-svn: 334022
Yaxun Liu [Tue, 5 Jun 2018 15:11:02 +0000 (15:11 +0000)]
[CUDA][HIP] Do not emit type info when compiling for device
CUDA/HIP does not support RTTI on device side, therefore there
is no point of emitting type info when compiling for device.
Emitting type info for device not only clutters the IR with useless
global variables, but also causes undefined symbol at linking
since vtable for cxxabiv1::class_type_info has external linkage.
Differential Revision: https://reviews.llvm.org/D47694
llvm-svn: 334021
Matt Arsenault [Tue, 5 Jun 2018 14:52:24 +0000 (14:52 +0000)]
DAG: Stop dropping invariant/dereferencable
When legalizing illegal FP load results, this was
for some reason dropping the invariant and dereferencable
memory flags. There doesn't seem to be any reason for this,
and the equivalent isn't done for integer loads.
Fixes an issue in a future AMDGPU commit where some identical
loads fail to merge because one of the loads ends up
dropping the flags.
llvm-svn: 334020
John Brawn [Tue, 5 Jun 2018 14:10:55 +0000 (14:10 +0000)]
[InstCombine] Correct the cmp operand type used when canonicalizing abs/nabs
When adjusting a cmp in order to canonicalize an abs/nabs select pattern we need
to use the type of the existing operand when creating a new operand not the
type of a select operand, as the two may be different.
This fixes PR37686.
llvm-svn: 334019
Marc-Andre Laperle [Tue, 5 Jun 2018 14:07:45 +0000 (14:07 +0000)]
[clangd] Remove unused variables
Summary: Signed-off-by: Marc-Andre Laperle <marc-andre.laperle@ericsson.com>
Subscribers: klimek, ilya-biryukov, ioeric, MaskRay, jkorous, cfe-commits
Differential Revision: https://reviews.llvm.org/D47737
llvm-svn: 334018
Marc-Andre Laperle [Tue, 5 Jun 2018 14:01:40 +0000 (14:01 +0000)]
[clangd] Add "member" symbols to the index
Summary:
This adds more symbols to the index:
- member variables and functions
- enum constants in scoped enums
The code completion behavior should remain intact but workspace symbols should
now provide much more useful symbols.
Other symbols should be considered such as the ones in "main files" (files not
being included) but this can be done separately as this introduces its fair
share of problems.
Signed-off-by: Marc-Andre Laperle <marc-andre.laperle@ericsson.com>
Reviewers: ioeric, sammccall
Reviewed By: ioeric, sammccall
Subscribers: hokein, sammccall, jkorous, klimek, ilya-biryukov, jkorous-apple, ioeric, MaskRay, cfe-commits
Differential Revision: https://reviews.llvm.org/D44954
llvm-svn: 334017
Gabor Buella [Tue, 5 Jun 2018 12:55:12 +0000 (12:55 +0000)]
[X86] NFC Fix typo introduced in r328016 HSI->HDI
llvm-svn: 334016
Krzysztof Parzyszek [Tue, 5 Jun 2018 12:49:19 +0000 (12:49 +0000)]
[Hexagon] Minor cleanups in isel lowering
llvm-svn: 334015
Sam McCall [Tue, 5 Jun 2018 12:22:43 +0000 (12:22 +0000)]
[clangd] Test tweaks (consistency, shorter, doc). NFC
llvm-svn: 334014
Aaron Ballman [Tue, 5 Jun 2018 12:14:47 +0000 (12:14 +0000)]
Silence a "truncation from double to float" diagnostic in MSVC; NFC.
llvm-svn: 334013
Pavel Labath [Tue, 5 Jun 2018 12:13:22 +0000 (12:13 +0000)]
DWARFIndex: more GetFunctions cleanup
This applies similar simplification as r334004, only it touches the
regex version of the method.
llvm-svn: 334012
Hiroshi Inoue [Tue, 5 Jun 2018 11:58:01 +0000 (11:58 +0000)]
[PowerPC] reduce rotate in BitPermutationSelector
BitPermutationSelector builds the output value by repeating rotate-and-mask instructions with input registers.
Here, we may avoid one rotate instruction if we start building from an input register that does not require rotation.
For example of the test case bitfieldinsert.ll, it first rotates left r4 by 8 bits and then inserts some bits from r5 without rotation.
This can be executed by one rlwimi instruction, which rotates r4 by 8 bits and inserts its bits into r5.
This patch adds a check for rotation amounts in the comparator used in sorting to process the input without rotation first.
Differential Revision: https://reviews.llvm.org/D47765
llvm-svn: 334011
Simon Pilgrim [Tue, 5 Jun 2018 11:38:11 +0000 (11:38 +0000)]
[X86][SSE] Fix line endings for shuffle-vs-trunc tests. NFCI.
Strip native eol property which we don't use in this folder.
llvm-svn: 334010
Pavel Labath [Tue, 5 Jun 2018 10:58:44 +0000 (10:58 +0000)]
dotest: make inline tests compatible with -f
Summary:
This is split off from D47265 where I needed to be able to invoke every test
with -f. That patch is kinda dead now, but this part seems like a good
cleanup anyway.
The problem with inline tests was in the way we were adding methods to
the class, which left them with an incorrect __name__ property. This
prevented dotest from finding them with -f.
I fix this with (what I think is) the correct way of dynamically
creating classes -- passing the list of methods during type construction
instead of fixing up the class afterwards. Among other things this has
the advantage of not needing to do anything special for debug info
variants. As our test method will be visible to the metaclass, it will
automagically do the multiplication for us.
Reviewers: JDevlieghere, aprantl, tberghammer
Subscribers: eraman, lldb-commits
Differential Revision: https://reviews.llvm.org/D47579
llvm-svn: 334009
Clement Courbet [Tue, 5 Jun 2018 10:56:19 +0000 (10:56 +0000)]
[llvm-exegesis] Add instructions to BenchmarkResult Key.
We want llvm-exegesis to explore instructions (effect of initial register values, effect of operand selection). To enable this a BenchmarkResult muststore all the relevant data in its key. This patch starts adding such data. Here we simply allow to store the generated instructions, following patches will add operands and initial values for registers.
https://reviews.llvm.org/D47764
Authored by: Guilluame Chatelet
llvm-svn: 334008
Simon Pilgrim [Tue, 5 Jun 2018 10:52:29 +0000 (10:52 +0000)]
[X86][SSE] Add target shuffle support to X86TargetLowering::computeKnownBitsForTargetNode
Ideally we'd use resolveTargetShuffleInputs to handle faux shuffles as well but:
(a) that code path doesn't handle general/pre-legalized ops/types very well.
(b) I'm concerned about the compute time as they recurse to calls to computeKnownBits/ComputeNumSignBits which would need depth limiting somehow.
llvm-svn: 334007
Pavel Labath [Tue, 5 Jun 2018 10:49:56 +0000 (10:49 +0000)]
Fix windows build broken by r334004
The problem was a link error due to a missing =0 on an abstract method.
Interestingly, this was not a problem for clang/linux.
llvm-svn: 334006
Gabor Buella [Tue, 5 Jun 2018 10:41:39 +0000 (10:41 +0000)]
[X86] NFC Refactor some code in InstPrinters
Summary:
Bringing some come duplicated in the AT&T and the Intel printers
into a common parent class.
Reviewers: craig.topper
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D47682
llvm-svn: 334005
Pavel Labath [Tue, 5 Jun 2018 10:33:56 +0000 (10:33 +0000)]
DWARFIndex: simplify GetFunctions methods
Now that Apple index determines method-ness straight from the debug
info, we don't need to resolve the functions into SymbolContexts inside
the Index classes. This removes the need for callback arguments and
allows us to pull the common parts out of the two implementations of
these functions back into the SymbolFileDWARF class.
Reviewers: JDevlieghere, clayborg
Subscribers: aprantl, lldb-commits
Differential Revision: https://reviews.llvm.org/D47147
llvm-svn: 334004
Pavel Labath [Tue, 5 Jun 2018 10:29:48 +0000 (10:29 +0000)]
Really fix ClangParserTest
It turns out the test needs a fixture after all (to initialize HostInfo), so
provide one that does that.
llvm-svn: 334003
Dean Michael Berris [Tue, 5 Jun 2018 10:27:20 +0000 (10:27 +0000)]
[XRay][compiler-rt] Use DCHECK instead of assert(...) (NFC)
Use DCHECK instead of assert(...) in the XRay runtime.
llvm-svn: 334002
Dean Michael Berris [Tue, 5 Jun 2018 10:18:39 +0000 (10:18 +0000)]
[XRay][compiler-rt] Use static instead of inline (NFC)
We don't actually need to support multiple definitions of the functions
in FDR mode, but rather want to make sure that the implementation-detail
functions are marked as 'static' instead. This allows the inliner to do
its magic better for these functions too, since inline functions must
have a unique address across translation units.
llvm-svn: 334001
Dean Michael Berris [Tue, 5 Jun 2018 10:12:58 +0000 (10:12 +0000)]
[XRay][compiler-rt] Remove __xray:: in some places (NFC)
This is a cosmetic change to remove unnecessary full-qualifications of
types/functions that are already in the __xray:: namespace.
llvm-svn: 334000
Ilya Biryukov [Tue, 5 Jun 2018 10:07:07 +0000 (10:07 +0000)]
Silence unhandled enums warning in ClangASTContext::GetEncoding
The warning started firing after r333923, which added new builtin
types (fixed point types) into clang.
This patch merely silences the warning to unblock our integrate, does
not aim to support the new types in lldb.
llvm-svn: 333999
Dean Michael Berris [Tue, 5 Jun 2018 10:01:45 +0000 (10:01 +0000)]
[XRay][compiler-rt] Remove namespace __xray_fdr_internal (NFC)
We no longer need the __xray_fdr_internal namespace.
llvm-svn: 333998
Peter Smith [Tue, 5 Jun 2018 10:00:56 +0000 (10:00 +0000)]
[MC][ARM] Add range checking for Thumb2 resolved fixups.
When the branch target of a Thumb2 unconditional or conditonal branch is
resolved at assembly time, no range checking is performed on the result
leading to incorrect immediates. This change adds a range check:
+- 16 Megabytes for unconditional branches, +- 1 Megabyte for the
conditional branch.
Differential Revision: https://reviews.llvm.org/D46306
llvm-svn: 333997
Pavel Labath [Tue, 5 Jun 2018 09:56:14 +0000 (09:56 +0000)]
Fixup r333987
- add #include <atomic> (fixes windows build)
- remove std::move (fixes "using move prevents copy ellision" warnings)
llvm-svn: 333996
Simon Pilgrim [Tue, 5 Jun 2018 09:45:03 +0000 (09:45 +0000)]
[X86][SSE] Add basic PACKUS support to X86TargetLowering::computeKnownBitsForTargetNode
Helps improve analysis of saturation ops
llvm-svn: 333995
Sam McCall [Tue, 5 Jun 2018 09:42:06 +0000 (09:42 +0000)]
[clang-tidy] fix broken test (no compile command) from r331763
llvm-svn: 333994
Sam McCall [Tue, 5 Jun 2018 09:34:46 +0000 (09:34 +0000)]
[clangd] Rewrite JSON dispatcher loop using C IO (FILE*) instead of std::istream.
Summary:
The EINTR loop around getline was added to fix an issue with mac gdb, but seems
to loop infinitely in rare cases on linux where the parent editor exits (most
reports with VSCode).
I can't work out how to fix this in a portable way with std::istream, but the
C APIs have clearer contracts and LLVM has a RetryAfterSignal function for use
with them which seems battle-tested.
While here, clean up some inconsistency around \n in log messages (now
add it only after JSON payloads), and reduce the scope of the
long-message handling which was only really added to fight fuzzers.
Reviewers: malaperle, ilya-biryukov
Subscribers: klimek, ioeric, jkorous, cfe-commits
Differential Revision: https://reviews.llvm.org/D47643
llvm-svn: 333993
Pavel Labath [Tue, 5 Jun 2018 09:33:26 +0000 (09:33 +0000)]
Fix ClangParserTest.cpp
The test does not use a test fixture, so it needs to be declared with
the TEST macro.
llvm-svn: 333992
Peter Smith [Tue, 5 Jun 2018 09:32:28 +0000 (09:32 +0000)]
[MC][ARM] Correct Thumb BL instruction range
The Thumb BL range is + or - either 16 Megabytes or 4 Megabytes depending
on whether the CPU supports Thumb2 or the v8-m baseline ops. The existing
check for BL range is incorrectly set at +- 32 Megabytes. This change
corrects the higher range and uses the lower range if the featurebits
don't have the necessary support for it.
Differential Revision: https://reviews.llvm.org/D46305
llvm-svn: 333991
Alexander Ivchenko [Tue, 5 Jun 2018 09:22:30 +0000 (09:22 +0000)]
[X86][CET] Shadow stack fix for setjmp/longjmp
This is the new version of D46181, allowing setjmp/longjmp
to work correctly with the Intel CET shadow stack by storing
SSP on setjmp and fixing it on longjmp. The patch has been
updated to use the cf-protection-return module flag instead
of HasSHSTK, and the bug that caused D46181 to be reverted
has been fixed with the test expanded to track that fix.
patch by mike.dvoretsky
Differential Revision: https://reviews.llvm.org/D47311
llvm-svn: 333990
Jeremy Morse [Tue, 5 Jun 2018 09:18:26 +0000 (09:18 +0000)]
Detect an incompatible VLA pointer assignment
For pointer assignments of VLA types, Clang currently detects when array
dimensions _lower_ than a variable dimension differ, and reports a warning.
However it does not do the same when the _higher_ dimensions differ, a
case that GCC does catch.
These two pointer types
int (*foo)[1][bar][3];
int (*baz)[1][2][3];
are compatible with each another, and the program is well formed if
bar == 2, a matter that is the programmers problem. However the following:
int (*qux)[2][2][3];
would not be compatible with either, because the upper dimension differs
in size. Clang reports baz is incompatible with qux, but not that foo is
incompatible with qux because it doesn't check those higher dimensions.
Fix this by comparing array sizes on higher dimensions: if both are
constants but unequal then report incompatibility; if either dimension is
variable then we can't know either way.
Differential Revision: https://reviews.llvm.org/D47628
llvm-svn: 333989
Tobias Grosser [Tue, 5 Jun 2018 09:03:46 +0000 (09:03 +0000)]
Fix formatting
llvm-svn: 333988
Jan Kratochvil [Tue, 5 Jun 2018 08:52:18 +0000 (08:52 +0000)]
Protect DWARFCompileUnit::m_die_array by new mutexes
If BuildAddressRangeTable called ExtractDIEsIfNeeded(false), then another
thread started processing data from m_die_array and then the first thread
called final ClearDIEs() the second thread would crash.
It is also required without multithreaded debugger using DW_TAG_partial_unit
for DWZ.
Differential revision: https://reviews.llvm.org/D40470
llvm-svn: 333987
Dean Michael Berris [Tue, 5 Jun 2018 08:20:54 +0000 (08:20 +0000)]
[XRay][compiler-rt] Merge XRay FDR mode into a single file (NFC)
We planned to have FDR mode's internals unit-tested but it turns out
that we can just use end-to-end testing to verify the implementation.
We're going to move towards that approach more and more going forward,
so we're merging the implementation details of FDR mode into a single
.cc file.
We also avoid globbing in the XRay test helper macro, and instead list
down the files from the lib directory.
llvm-svn: 333986
Kamil Rytarowski [Tue, 5 Jun 2018 07:29:23 +0000 (07:29 +0000)]
Introduce CheckASLR() in sanitizers
Summary:
At least the ASan, MSan, TSan sanitizers require disabled ASLR on a NetBSD.
Introduce a generic CheckASLR() routine, that implements a check for the
current process. This flag depends on the global or per-process settings.
There is no simple way to disable ASLR in the build process from the
level of a sanitizer or during the runtime execution.
With ASLR enabled sanitizers that operate over the process virtual address
space can misbehave usually breaking with cryptic messages.
This check is dummy for !NetBSD.
Sponsored by <The NetBSD Foundation>
Reviewers: vitalybuka, joerg
Reviewed By: vitalybuka
Subscribers: cryptoad, kubamracek, llvm-commits, #sanitizers
Tags: #sanitizers
Differential Revision: https://reviews.llvm.org/D47442
llvm-svn: 333985
Craig Topper [Tue, 5 Jun 2018 06:20:06 +0000 (06:20 +0000)]
[X86] Make all instructions that operate on MMX types, but were added after the initial MMX support via one of the SSE features flags make them require the MMX feature as well.
Passing -mattr=-mmx needs to disable these instructions since the MMX register class won't have been set up. But we don't want -mattr=-mmx to disable SSE so we have to do it separately.
llvm-svn: 333984
Dean Michael Berris [Tue, 5 Jun 2018 06:12:42 +0000 (06:12 +0000)]
[XRay][compiler-rt] Remove __sanitizer:: from namespace __xray (NFC)
This is a non-functional change that removes the full qualification of
functions in __sanitizer:: being used in __xray.
llvm-svn: 333983
Dean Michael Berris [Tue, 5 Jun 2018 03:46:54 +0000 (03:46 +0000)]
[XRay][compiler-rt] Remove reliance on C++ ABI from BufferQueue
Summary:
This is part of the work to address http://llvm.org/PR32274.
We remove the calls to array-placement-new and array-delete. This allows
us to rely on the internal memory management provided by
sanitizer_common/sanitizer_internal_allocator.h.
Reviewers: eizan, kpw
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47695
llvm-svn: 333982
Nirav Dave [Tue, 5 Jun 2018 03:16:28 +0000 (03:16 +0000)]
[RegAllocGreedy] Use simpler map class for EvicteeInfo. NFCI.
RegAlloc keeps a insertion-time ordered map of evictee information,
but we only use membership. Replace MapVector with contextually
equivalent DenseMap which is smaller and faster.
llvm-svn: 333981
Craig Topper [Tue, 5 Jun 2018 03:12:14 +0000 (03:12 +0000)]
[X86] Mark all the builtins and intrinsics that require MMX and an SSE feature as requiring both mmx and the sse feature.
Previously we only checked the sse feature, but this means that if you passed -mno-mmx, the builtins/intrinsics wouldn't be disabled in the frontend and would instead fail backend isel.
llvm-svn: 333980
Petr Hosek [Tue, 5 Jun 2018 01:50:59 +0000 (01:50 +0000)]
[Driver][Fuchsia] Pass LTO flags to linker
Even though we use lld by default for Fuchsia, we use Gold plugin
arguments like all other drivers as lld supports Gold plugin options.
Differential Revision: https://reviews.llvm.org/D47668
llvm-svn: 333979
Reid Kleckner [Tue, 5 Jun 2018 01:33:40 +0000 (01:33 +0000)]
Reimplement the bittest intrinsic family as builtins with inline asm
We need to implement _interlockedbittestandset as a builtin for
windows.h, so we might as well do the whole family. It reduces code
duplication anyway.
Fixes PR33188, a long standing bug in our bittest implementation
encountered by Chakra.
llvm-svn: 333978
Vedant Kumar [Tue, 5 Jun 2018 00:56:08 +0000 (00:56 +0000)]
[opt] Introduce -strip-named-metadata
This renames and generalizes -strip-module-flags to erase all named
metadata from a module. This makes it easier to diff IR.
llvm-svn: 333977
Vedant Kumar [Tue, 5 Jun 2018 00:56:07 +0000 (00:56 +0000)]
[Debugify] Don't insert debug values after terminating deopts
As is the case with musttail calls, the IR does not allow for
instructions inserted after a terminating deopt.
llvm-svn: 333976
Vedant Kumar [Tue, 5 Jun 2018 00:56:07 +0000 (00:56 +0000)]
Apply clang-format on a file, NFC
llvm-svn: 333975
Jonas Devlieghere [Tue, 5 Jun 2018 00:32:41 +0000 (00:32 +0000)]
Fix Expression unittests on Darwin
Fixes the Expression unittests on Darwin after r333933 was landed.
llvm-svn: 333974
Francis Visoiu Mistrih [Tue, 5 Jun 2018 00:27:28 +0000 (00:27 +0000)]
Use MF instead of Fn for MachineFunction references. NFC
llvm-svn: 333973
Francis Visoiu Mistrih [Tue, 5 Jun 2018 00:27:24 +0000 (00:27 +0000)]
[ShrinkWrap] Add optimization remarks to the shrink-wrapping pass
Start by emitting remarks for very basic unsupported cases such as
irreducible CFGs and EHFunclets. The end goal is to be able to cover all
the cases where we give up with an explanation.
llvm-svn: 333972
Jim Ingham [Tue, 5 Jun 2018 00:19:03 +0000 (00:19 +0000)]
Add ClangHost.cpp to the Xcode project.
Also add an include that was needed for the if APPLE branch
of the function.
llvm-svn: 333971
Amara Emerson [Tue, 5 Jun 2018 00:17:13 +0000 (00:17 +0000)]
[MIRParser] Add parser support for 'true' and 'false' i1s.
We already output true and false in the printer, but the parser isn't able to
read it.
Differential Revision: https://reviews.llvm.org/D47424
llvm-svn: 333970