Albert ARIBAUD [Tue, 26 Mar 2013 09:40:13 +0000 (10:40 +0100)]
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 26 Mar 2013 08:51:09 +0000 (09:51 +0100)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Tom Warren [Mon, 18 Mar 2013 21:52:26 +0000 (14:52 -0700)]
Tegra114: MMC: Enable DT MMC driver support for Tegra114 Dalmore boards
Tested on my Dalmore E1611 board, eMMC and SD-Card work fine, can load
a kernel off of an SD card OK, card detect works, and the env is now
stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20/30).
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Mon, 18 Mar 2013 21:51:20 +0000 (14:51 -0700)]
Tegra114: MMC: Add SD bus power-rail init routine
T114 requires SD bus power-rail bringup for the SDIO card on SDMMC3.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Mon, 18 Mar 2013 21:47:55 +0000 (14:47 -0700)]
Tegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table
SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup
before the MMC driver is added.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Mon, 18 Mar 2013 21:46:46 +0000 (14:46 -0700)]
Tegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)
Took these values directly from the kernel dts files.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:14 +0000 (18:58 +0000)]
tegra114: dalmore: config: enable SPI
Turn on SPI in dalmore config file
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:13 +0000 (18:58 +0000)]
tegra114: add SPI driver
Add driver for tegra114 SPI controller. This controller is not
compatible with either the tegra20 or tegra30 controllers, so it
requires a new driver.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:12 +0000 (18:58 +0000)]
tegra114: dalmore: fdt: enable dalmore SPI controller
Dalmore has a SPI flash part attached to controller 4, so enable
controller 4 and set to 25MHz.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:11 +0000 (18:58 +0000)]
tegra114: fdt: add SPI blocks
Add nodes for t114 SPI controller hardware
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:10 +0000 (18:58 +0000)]
tegra114: fdt: add apbdma block
Add node for apbdma controller hardware.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:09 +0000 (18:58 +0000)]
tegra114: fdt: add compatible string for tegra114 SPI ctrl
Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:08 +0000 (18:58 +0000)]
sf: winbond: add W25Q32DW
Add support for Winbond W25Q32DW 32Mbit part
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:07 +0000 (18:58 +0000)]
spi: add common fdt SPI driver interface
Add a common interface to fdt based SPI drivers. Each driver is
represented by a table entry in fdt_spi_drivers[]. If there are
multiple SPI drivers in the table, the first driver to return success
from spi_init() will be registered as the SPI driver.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:06 +0000 (18:58 +0000)]
tegra20: spi: move fdt probe to spi_init
Make the tegra20 SPI driver similar to the tegra30 (and soon to be
tegra114) SPI drivers in preparation of common fdt SPI driver front
end.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:05 +0000 (18:58 +0000)]
tegra: spi: pull register structs out of headers
Move register structs from headers into .c files and use common name.
This is in preparation of making common fdt front end for SPI
drivers.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:04 +0000 (18:58 +0000)]
tegra: spi: remove non fdt support
Remove non fdt support from tegra20 and tegra30 SPI drivers in
preparation of new common fdt based SPI driver front end.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:03 +0000 (18:58 +0000)]
tegra: spi: rename tegra SPI drivers
Rename tegra SPI drivers to tegra20_flash and tegra20_slink in
preparation for commonization and addition of tegra114_spi.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Allen Martin [Sat, 16 Mar 2013 18:58:02 +0000 (18:58 +0000)]
tegra: remove support for UART SPI switch
This feature was only used for tegra20 seaboard that had a pinmux
conflict on the SPI pins. These boards were never manufactured, so
remove this support to clean up SPI driver.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Albert ARIBAUD [Sun, 24 Mar 2013 16:52:22 +0000 (17:52 +0100)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Peter Korsgaard [Thu, 21 Mar 2013 04:00:04 +0000 (04:00 +0000)]
mmc: omap_hsmmc.c: only register getcd/getwp callbacks if gpio could be used
Gets rid of warnings from omap_gpio:
ERROR : check_gpio: invalid GPIO -1
(and undefined behaviour as the -1 error code is interpreted as gpio value)
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
Peter Korsgaard [Thu, 21 Mar 2013 04:00:03 +0000 (04:00 +0000)]
mmc: mmc_getcd/getwp: use sensible defaults
Let mmc_getcd() return true and mmc_getwp() false if mmc driver doesn't
provide handlers for them.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Add braces around first if test in each case to fix warning]
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 14 Mar 2013 06:49:04 +0000 (06:49 +0000)]
arm: Correct CONFIG_STANDALONE_LOAD_ADDR for AM33XX/OMAP* platforms
All of these platforms have memory starting at 0x80000000, so this is
the correct CONFIG_STANDALONE_LOAD_ADDR for all of them.
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 21 Mar 2013 04:30:02 +0000 (04:30 +0000)]
am335x_evm: Add better timings for the new BeagleBoard DDR3 part
Tested-by: Rao Bodapati <rao@circuitco.com>
Signed-off-by: Tom Rini <trini@ti.com>
Matt Porter [Fri, 15 Mar 2013 10:07:10 +0000 (10:07 +0000)]
ti814x_evm: add ti814x evm board support
Add TI814X EVM board directory, config file, and MAINTAINERS
entry. Enable build.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
[trini: Adapt to recent omap_hsmmc requirements, Matt re-tested]
Signed-off-by: Tom Rini <trini@ti.com>
Matt Porter [Fri, 15 Mar 2013 10:07:09 +0000 (10:07 +0000)]
ns16550: enable quirks for ti814x
TI814X requires the same quirks as AM33XX to be enabled.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Matt Porter [Fri, 15 Mar 2013 10:07:08 +0000 (10:07 +0000)]
am33xx: support ti814x mmc reference clock
TI814x has a 192MHz hsmmc reference clock. Select that clock rate
when building for TI814x.
Signed-off-by: Matt Porter <mporter@ti.com>
Matt Porter [Fri, 15 Mar 2013 10:07:07 +0000 (10:07 +0000)]
am33xx: add dmm support to emif4 library
Adds a config_dmm() routine to support TI814X DMM configuration.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Matt Porter [Fri, 15 Mar 2013 10:07:06 +0000 (10:07 +0000)]
am33xx: add ti814x specific register definitions
Support the ti814x specific register definitions within
arch-am33xx.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Matt Porter [Fri, 15 Mar 2013 10:07:05 +0000 (10:07 +0000)]
am33xx: refactor am33xx mux support and add ti814x support
AM33XX and TI814X have a similar mux though the pinmux register
layout and address space differ. Add a separate ti814x mux include
to support the TI814X-specific differences.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Matt Porter [Fri, 15 Mar 2013 10:07:04 +0000 (10:07 +0000)]
am33xx: refactor am33xx clocks and add ti814x support
Split clock.c for am335x and ti814x and add ti814x specific
clock support.
Signed-off-by: Matt Porter <mporter@ti.com>
Matt Porter [Fri, 15 Mar 2013 10:07:03 +0000 (10:07 +0000)]
am33xx: refactor emif4/ddr to support multiple EMIF instances
The AM33xx emif4/ddr support closely matches what is need to support
TI814x except that TI814x has two EMIF instances. Refactor all the
emif4 helper calls and the config_ddr() init function to use an
additional instance number argument.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Matt Porter [Fri, 15 Mar 2013 10:07:02 +0000 (10:07 +0000)]
am33xx: convert defines from am33xx-specific to generic names
Eliminate AM33xx specific names to prepare for TI814x support
within AM33xx-land.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 14 Mar 2013 11:15:25 +0000 (11:15 +0000)]
am33xx: Add required includes to some omap/am33xx code
- In arch/arm/cpu/armv7/omap-common/timer.c,
drivers/mtd/nand/omap_gpmc.c and drivers/net/cpsw.c add #include files
that the driver needs but had been relying on <config.h> to bring in.
- In arch/arm/cpu/armv7/omap-common/lowlevel_init.S add <config.h>
- In am335x_evm.h and pcm051.h don't globally include
<asm/arch/hardware.h> and <asm/arch/cpu.h> but just <asm/arch/omap.h>
as that is the only include which defines things the config uses.
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tom Rini <trini@ti.com>
Enric Balletbo i Serra [Fri, 15 Mar 2013 02:32:35 +0000 (02:32 +0000)]
igep00x0: Enable CONFIG_CMD_BOOTZ
With v3.9 and later of the Linux Kernel defaulting to multi-platform
images with omap2plus_defconfig, uImage isn't builtable anymore by
default. Add CONFIG_CMD_BOOTZ so that we can still boot something the
kernel spits out.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Enric Balletbo i Serra [Fri, 15 Mar 2013 01:35:37 +0000 (01:35 +0000)]
ARM: AM33XX: Fix typo that causes an AM duplication in CPU name.
Just fix a typo displaying the CPU info. With CONFIG_DISPLAY_INFO we see
something like AMAM335X-GP rev 0 instead of AM335X-GP rev 0.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Vaibhav Hiremath [Thu, 14 Mar 2013 21:11:16 +0000 (21:11 +0000)]
am335x: Enable DDR PHY dynamic power down bit for DDR3 boards
Enable DDR PHY dynamic power down bit, which enables
powering down the IO receiver when not performing read.
This also helps in reducing overall power consumption in
low power states (suspend/standby).
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Stephen Warren [Mon, 4 Mar 2013 13:29:41 +0000 (13:29 +0000)]
ARM: tegra: enable workaround for ARM erratum 716044
Tegra20 requires the workaround for this erratum. Enable it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 4 Mar 2013 13:29:40 +0000 (13:29 +0000)]
ARM: implement erratum 716044 workaround
Add common code to enable the workaround for ARM erratum 716044. This
will be enabled for Tegra.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Steve Kipisz [Fri, 8 Mar 2013 07:40:58 +0000 (07:40 +0000)]
am33xx:ddr:Fix config_sdram to work for all DDR
The original write to sdram_config is correct for DDR3 but incorrect
for DDR2 so SPL was hanging. For DDR2, the write to sdram_config
should be after the writes to ref_ctrl. This was working for DDR3
because there was a write of 0x2800 to ref_ctrl before a write
to sdram_config.
Tested on: GP EVM 1.1A (DDR2), GP EVM 1.5A (DDR3),
Beaglebone A6 (DDR2), Beagleone Blacd A4A (DDR3)
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Koen Kooi [Thu, 14 Mar 2013 05:55:21 +0000 (05:55 +0000)]
am335x_evm: Add more variables and switch to DT booting.
Make bootcmd run findfdt so that we know what dtb file to load. Add a
loadfdt command to load this file in. Make mmcboot pass in ${fdtaddr}
and make the mmc section of bootcmd run loadfdt.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Koen Kooi [Thu, 14 Mar 2013 05:55:20 +0000 (05:55 +0000)]
am335x_evm: Enable CMD_EXT4 and CMD_FS_GENERIC, add bootpart to env
The kernel is loaded from some form of ext[234] or FAT, depending on the
distribution used. We add a bootpart variable to the environment so
that we can load from the correct mmc partition as well. We leave
CONFIG_CMD_EXT2 for existing scripts that use ext2load.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Koen Kooi [Thu, 14 Mar 2013 05:55:19 +0000 (05:55 +0000)]
am335x_evm: add support for BeagleBone Black DT name
Cc: Matt Porter <mporter@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Matt Porter <mporter@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Nishanth Menon <nm@ti.com>
Mark Jackson [Thu, 21 Feb 2013 02:49:38 +0000 (02:49 +0000)]
Initialise correct GPMC WAITx irq for AM33xx
Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
Fix it such that WAIT0 irq is enabled instead.
Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Mark Jackson [Mon, 4 Mar 2013 01:27:20 +0000 (01:27 +0000)]
Allow AM335x MPU core clock speed to be specified in the board config file
Allow AM335x MPU core clock speed to be specified in the board config file.
To use, add the following to the board's config file:-
#define CONFIG_SYS_MPUCLK <desired clock freq in MHz>
Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Nikita Kiryanov [Sat, 22 Dec 2012 21:03:48 +0000 (21:03 +0000)]
cm-t35: add support for loading splash image from NAND
Add support for loading splash image from NAND
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tom Rini [Wed, 20 Mar 2013 18:55:10 +0000 (14:55 -0400)]
Merge branch 'spi' of git://git.denx.de/u-boot-x86
Stephen Warren [Tue, 29 Jan 2013 16:37:42 +0000 (16:37 +0000)]
ARM: rpi_b: enable SD controller, add related env/cmds
Enable the SD controller driver for the Raspberry Pi. Enable a number
of useful MMC, partition, and filesystem-related commands. Set up the
environment to provide standard locations for loading a kernel, DTB,
etc. Provide a boot command that loads and executes boot.scr.uimg from
the SD card; this is written considering future extensibilty to USB
storage.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Stephen Warren [Tue, 29 Jan 2013 16:37:41 +0000 (16:37 +0000)]
mmc: add bcm2835 driver
This adds a simple driver for the BCM2835's SD controller.
Workarounds are implemented for:
* Register writes can't be too close to each-other in time, or they will
be lost.
* Register accesses must all be 32-bit, so implement custom accessors.
This code was extracted from:
git://github.com/gonzoua/u-boot-pi.git master
which was created by Oleksandr Tymoshenko.
Portions of the code there were obviously based on the Linux kernel at:
git://github.com/raspberrypi/linux.git rpi-3.6.y
commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.
swarren changed the following for upstream:
* Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting
SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues.
* Remove register logging from read*/write* functions.
* Sort out confusion with min/max_freq values passed to add_sdhci().
* Use more descriptive variable names and calculations in IO accessors.
* Simplified and commented twoticks_delay calculation.
* checkpatch fixes.
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Andy Fleming <afleming@gmail.com>
Stephen Warren [Tue, 29 Jan 2013 16:37:40 +0000 (16:37 +0000)]
video: add a driver for the bcm2835
The firmware running on the bcm2835 SoC's VideoCore CPU manages the
display controller. Add a simple "LCD" driver that communicates with the
firmware using the property mailbox protocol. This configures the
display and frame-buffer to match whatever physical resolution the
firmware chosen when booting, which is typically the native resolution
of the attached display device, presumably unless otherwise specified
in config.txt on the boot media.
Enable this driver in the Raspberry Pi board configuration.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Stephen Warren [Tue, 29 Jan 2013 16:37:39 +0000 (16:37 +0000)]
ARM: rpi_b: disable rpi_b dcache explicitly
There appears to be no implementation of flush_dcache_range() for
ARM1176, so explicitly disable dcache support to avoid references to
that function from the LCD core in the next patch. This was presumably
not noticed before simply because no drivers for the rpi_b were
attempting DMA.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Stephen Warren [Tue, 29 Jan 2013 16:37:38 +0000 (16:37 +0000)]
lcd: calculate line_length after lcd_ctrl_init()
When an LCD driver is actually driving a regular external display, e.g.
an HDMI monitor, the display resolution might not be known until the
display controller has initialized, i.e. during lcd_ctrl_init(). However,
lcd.c calculates lcd_line_length before calling this function, thus
relying on a hard-coded resolution in struct panel_info.
Instead, defer this calculation until after lcd_ctrl_init() has had the
chance to dynamically determine the resolution. This needs to happen
before lcd_clear(), since the value is used there.
grep indicates that no code outside lcd.c uses this lcd_line_length; in
particular, no lcd_ctrl_init() implementations read it.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Stephen Warren [Tue, 29 Jan 2013 16:37:37 +0000 (16:37 +0000)]
ARM: rpi_b: use bcm2835 mbox driver to get memory size
The firmware running on the bcm2835 SoC's VideoCore CPU determines how
much of the system RAM is available for use by the ARM CPU. Previously,
U-Boot assumed that only 128MB was available, since this was the
smallest value configured by any public firmware. However, we can now
query the actual value at run-time from the firmware using the mbox
property protocol.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Stephen Warren [Tue, 29 Jan 2013 16:37:36 +0000 (16:37 +0000)]
ARM: bcm2835: add mailbox driver
The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
and the ARM CPU. The ARM CPU is often thought of as the main CPU.
However, the VideoCore actually controls the initial SoC boot, and hides
much of the hardware behind a protocol. This protocol is transported
using the SoC's mailbox hardware module.
Here, we add a very simplistic driver for the mailbox module, and define
a few structures for the property messages.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Fabio Estevam [Fri, 15 Mar 2013 10:43:48 +0000 (10:43 +0000)]
Add initial support for Wandboard dual lite and solo.
Wandboard is a development board that has two variants: one version based
on mx6 dual lite and another one based on mx6 solo.
For more details about Wandboard, please refer to: http://www.wandboard.org/
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Eric Nelson [Sat, 9 Mar 2013 13:26:32 +0000 (13:26 +0000)]
i.MX6: mx6qsabrelite: discard override of CONFIG_ARP_TIMEOUT
Nothing on the SABRE Lite board warrants a shorter than normal
ARP timeout.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Sat, 9 Mar 2013 07:06:09 +0000 (07:06 +0000)]
i.MX6: Add hdmidet command to detect attached HDMI monitor
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Fri, 8 Mar 2013 04:47:10 +0000 (04:47 +0000)]
mx28evk: Disable CONFIG_CMD_I2C
When loading a Freescale 2.6.35 on a mx28evk the following issue is seen:
sgtl5000_hw_read: read reg error : Reg 0x00
Device with ID register 0 is not a SGTL5000
Disabling CONFIG_CMD_I2C makes the sgtl5000 probe to succeed.
Mainline kernel does not show this problem.
Until the real cause is not identified, disable 'CONFIG_CMD_I2C' for the
time being.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Knut Wohlrab [Mon, 4 Mar 2013 04:16:02 +0000 (04:16 +0000)]
imx-common: timer: fix 32-bit overflow
The i.MX6 common timer uses the 32-bit variable tbl (time base lower)
to record the overflow of the 32-bit counter. I.e. if the counter
overflows, the variable tbl does overflow, too.
To capture this overflow, use the variable tbu (time base upper), too.
Return the combined value of tbl and tbu.
lastinc is unused then, remove it.
Signed-off-by: Knut Wohlrab <knut.wohlrab@de.bosch.com>
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Sun, 27 Jan 2013 05:52:05 +0000 (05:52 +0000)]
configs: mx28evk: Use single-line comments
No need to use multi-line style comments for single-line contents.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
Fabio Estevam [Thu, 28 Feb 2013 12:59:19 +0000 (12:59 +0000)]
mxs: spl_mem_init: Align DDR2 init with FSL bootlets source
Currently the following kernel hang happens when loading a 2.6.35 kernel from
Freeescale on a mx28evk board:
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Bus freq driver module loaded
IMX usb wakeup probe
usb h1 wakeup device is registered
mxs_cpu_init: cpufreq init finished
...
Loading the same kernel using the bootlets from the imx-bootlets-src-10.12.01
package, the hang does not occur.
Comparing the DDR2 initialization from the bootlets code against the U-boot
one, we can notice some mismatches, and after applying the same initialization
into U-boot the 2.6.35 kernel can boot normally.
Also tested with 'mtest' command, which runs succesfully.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Marek Vasut <marex@denx.de>
Simon Glass [Mon, 11 Mar 2013 06:08:13 +0000 (06:08 +0000)]
sf: Use unsigned type for buffers
The verify code is broken on archs with signed char. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:12 +0000 (06:08 +0000)]
x86: Enable time command for coreboot
This command is useful for measuring SPI flash load times and the like.
Enable gettime as well to obtain absolute time tick values.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:11 +0000 (06:08 +0000)]
x86: Enable SPI flash support for coreboot
Turn on SPI flash support and related commands.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:10 +0000 (06:08 +0000)]
x86: Add FDT SPI node for link
Add a memory-mapped 8GB SPI chip.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:09 +0000 (06:08 +0000)]
x86: Move PCI init before SPI init
It is possible that our PCI bus will provide the SPI controller, so change
the init order to make this work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:08 +0000 (06:08 +0000)]
sf: Enable FDT-based configuration and memory mapping
Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:07 +0000 (06:08 +0000)]
x86: spi: Set maximum write size for ICH
This SPI controller can only write 64 bytes at a time. Add this restriction
in so that 'sf write' works correct for blocks larger than 64 bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:06 +0000 (06:08 +0000)]
sf: Respect maximum SPI write size
Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:05 +0000 (06:08 +0000)]
spi: Add parameter for maximum write size
Some SPI controllers (e.g. Intel ICH) have a limit on the number of SPI
bytes that can be written at a time. Add this as a parameter so that
clients of the SPI interface can respect this value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 19 Mar 2013 04:58:56 +0000 (04:58 +0000)]
x86: spi: Add Intel ICH driver
This supports Intel ICH7/9. The Intel controller is a little unusual in
that it is mostly intended for use with SPI flash, and has some
optimisations and features specifically for that application. In
particular it is not possible to support ongoing transactions that
continue over many calls with SPI_XFER_BEGIN and SPI_XFER_END.
This driver supports writes of up to 64 bytes at a time, the limit
for the controller. Future work will improve this.
Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:03 +0000 (06:08 +0000)]
sf: Use spi_flash_alloc() in each SPI flash driver
Rather than each device having its own way to allocate a SPI flash
structure, use the new allocation function everywhere. This will make it
easier to extend the interface without breaking devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:02 +0000 (06:08 +0000)]
sf: Add spi_flash_alloc() to create a new SPI flash struct
At present it is difficult to extend the SPI flash structure since
all devices allocate it themselves, and few of them zero all fields.
Add a new function spi_flash_alloc() which can be used by SPI devices
to perform this allocation, and thus ensure that all devices can
better cope with SPI structure changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 18 Mar 2013 19:23:40 +0000 (19:23 +0000)]
spi: Use spi_alloc_slave() in each SPI driver
Rather than each driver having its own way to allocate a SPI slave,
use the new allocation function everywhere. This will make it easier
to extend the interface without breaking drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 11 Mar 2013 06:08:00 +0000 (06:08 +0000)]
spi: Add function to allocate a new SPI slave
At present it is difficult to extend the SPI structure since all
drivers allocate it themselves, and few of them zero all fields. Add
a new function spi_alloc_slave() which can be used by SPI drivers
to perform this allocation, and thus ensure that all drivers can
better cope with SPI structure changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 19 Mar 2013 04:58:51 +0000 (04:58 +0000)]
fdt: Add fdtdec_get_addr_size() to read reg properties
It is common to have a "reg = <address size>" property in the FDT.
Add a function to handle this, similar to the existing
fdtdec_get_addr();
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 18 Mar 2013 19:33:47 +0000 (15:33 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Mon, 18 Mar 2013 16:31:00 +0000 (12:31 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm
Albert's rework of the linker scripts conflicted with Simon's making
everyone use __bss_end. We also had a minor conflict over
README.scrapyard being added to in mainline and enhanced in
u-boot-arm/master with proper formatting.
Conflicts:
arch/arm/cpu/ixp/u-boot.lds
arch/arm/cpu/u-boot.lds
arch/arm/lib/Makefile
board/actux1/u-boot.lds
board/actux2/u-boot.lds
board/actux3/u-boot.lds
board/dvlhost/u-boot.lds
board/freescale/mx31ads/u-boot.lds
doc/README.scrapyard
include/configs/tegra-common.h
Build tested for all of ARM and run-time tested on am335x_evm.
Signed-off-by: Tom Rini <trini@ti.com>
Vincent Palatin [Tue, 12 Mar 2013 03:45:31 +0000 (03:45 +0000)]
usb: Add multiple controllers support for EHCI PCI
Use the ability to have several active EHCI controller on a system
in the PCI EHCI controller implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 6 Mar 2013 14:08:35 +0000 (14:08 +0000)]
x86: Enable USB features for coreboot
Enable PCI EHCI, storage, keyboard and Ethernet for USB.
Signed-off-by: Simon Glass <sjg@chromium.org>
Michael Spang [Wed, 6 Mar 2013 14:08:33 +0000 (14:08 +0000)]
usb: usbeth: smsc95xx: remove EEPROM loaded check
[port of Linux kernel commit
bcd218be5aeb by Steve Glendinning]
The eeprom read & write commands currently check the E2P_CMD_LOADED_ bit is
set before allowing any operations. This prevents any reading or writing
unless a correctly programmed EEPROM is installed.
Signed-off-by: Michael Spang <spang@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Vincent Palatin [Wed, 6 Mar 2013 14:08:32 +0000 (14:08 +0000)]
usb: ehci: Fix aliasing issue in EHCI interrupt code
The interrupt endpoint handling code stores the buffer pointer in the QH
padding field. We need to make it the size of a pointer to avoid strict
aliasing issue with the compiler.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Patrick Georgi [Wed, 6 Mar 2013 14:08:31 +0000 (14:08 +0000)]
usb: ehci: Support interrupt transfers via periodic list
Interrupt transfers aren't meant to be used from the async list
(the EHCI spec indicates trouble with low/full-speed intr on async).
Build a periodic list instead, and provide an API to make use of it.
Then, use that API from the existing interrupt transfer API.
This provides support for USB keyboards using EHCI.
Use timeouts to ensure we cannot get stuck in the keyboard scanning
if something wrong happens (USB device unplugged or fatal I/O error)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Vivek Gautam [Wed, 6 Mar 2013 08:48:33 +0000 (14:18 +0530)]
usb: ehci: exynos: Enable non-dt path
Enabling the non-dt path for the driver so that
we don't get any build errors for non-dt configuration.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Vivek Gautam [Wed, 6 Mar 2013 08:48:32 +0000 (14:18 +0530)]
usb: ehci: exynos: Fix multiple FDT decode
With current FDT support driver tries to parse device node
twice in ehci_hcd_init() and ehci_hcd_stop(), which shouldn't
happen ideally.
Making provision to store data in a global structure and thereby
passing its pointer when needed.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Lukasz Majewski [Tue, 5 Mar 2013 11:10:18 +0000 (12:10 +0100)]
arm:trats: Use new ums command
This patch enables new "ums" command on Trats board
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
Lukasz Majewski [Tue, 5 Mar 2013 11:10:17 +0000 (12:10 +0100)]
usb:gadget: USB Mass Storage Gadget support
This patch adds the USB Mass Storage Gadget to u-boot
New command called "ums" is implemented to provide access
to on-device embedded persistent memory.
USB Mass Storage is supposed to work on top of the USB
Gadget framework
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Marek Vasut <marek.vasut@gmail.com>
Piotr Wilczek [Tue, 5 Mar 2013 11:10:16 +0000 (12:10 +0100)]
usb:composite: USB Mass Storage - f_mass_storage.c from Linux kernel
The f_mass_storage.c source file from v2.6.36 Linux kernel.
commit
8876f5e7d3b2a320777dd4f6f5301d474c97a06c
Author: Michal Nazarewicz <m.nazarewicz@samsung.com>
Date: Mon Jun 21 13:57:09 2010 +0200
USB: gadget: f_mass_storage: added eject callback
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Marek Vasut <marek.vasut@gmail.com>
Lukasz Majewski [Tue, 5 Mar 2013 11:10:15 +0000 (12:10 +0100)]
usb:composite: USB Mass Storage - storage_common.c from Linux kernel
The storage_common.c source file from v2.6.36 Linux kernel.
commit
d26a6aa08b9f12b44fb1ee65625e7480d3d5bb81
Author: Michal Nazarewicz <m.nazarewicz@samsung.com>
Date: Mon Nov 9 14:15:23 2009 +0100
USB: g_mass_storage: code cleaned up and comments updated
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Marek Vasut <marek.vasut@gmail.com>
Lukasz Majewski [Fri, 1 Mar 2013 14:30:18 +0000 (15:30 +0100)]
usb:composite:fix Provide function data when addressing device with only one interface
This commit fixes problems with some non-standard requests send with
device address instead of interface address (bmRequestType.Receipent field).
This happens with dfu-util (debian version: 0.5), which address non standard
requests (like w_value=0x21 and bRequest=GET_DESCRIPTOR) to device.
Without this fix, the above request is STALLED, and hence causes dfu-util
to assume some standard configuration (packet size = 1024B instead of 4096B)
In turn it displays following errors:
Error obtaining DFU functional descriptor
Warning: Assuming DFU version 1.0
Warning: Transfer size can not be detected
...
Warning: Trying default transfer size 1024
This fix allows passing non-standard request to function setup code, where
it shall be handled.
Tested at: Trats (exynos4210)
Tested with:DFU and UMS gadgets
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Shiraz Hashim [Mon, 17 Dec 2012 08:49:37 +0000 (14:19 +0530)]
usbtty: adapt buffers for large packet support
Increase buffer sizes at driver and tty level to accommodate kermit
large packet support.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Vipin Kumar [Mon, 17 Dec 2012 08:48:55 +0000 (14:18 +0530)]
usb/host/ehci: Add support for EHCI on spear
Add EHCI support for spear boards
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Pantelis Antoniou [Mon, 3 Dec 2012 00:10:28 +0000 (00:10 +0000)]
usb: Fix bug when both DFU & ETHER are defined
When both CONFIG_USB_GADGET & CONFIG_USB_ETHER are defined
the makefile links objects twice.
This patch uses a Makefile specific idiom of
'if defined(CONFIG_USB_GADGET) || defined(CONFIG_USB_ETHER)'
to handle the case.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Pantelis Antoniou [Fri, 30 Nov 2012 08:01:11 +0000 (08:01 +0000)]
dfu: Add a partition type target
Dealing with raw block numbers with the dfu is very annoying.
Introduce a partition method.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Pantelis Antoniou [Fri, 30 Nov 2012 08:01:10 +0000 (08:01 +0000)]
dfu: Properly zero out timeout value
Zero out timeout value; letting it filled with undefined values
ends up with the dfu host hanging.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Pantelis Antoniou [Fri, 30 Nov 2012 08:01:08 +0000 (08:01 +0000)]
dfu: Fix crash when wrong number of arguments given
Fix obvious crash when not enough arguments are given to the dfu
command.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Pantelis Antoniou [Fri, 30 Nov 2012 08:01:07 +0000 (08:01 +0000)]
dfu: Only perform DFU board_usb_init() for TRATS
USB initialization shouldn't happen for all the boards.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Vincent Palatin [Thu, 13 Dec 2012 01:55:22 +0000 (17:55 -0800)]
usb: ehci: Add 64-bit controller support
On EHCI controller with 64-bit address space support, we must initialize
properly the high word for the PCI bus master accesses.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Vincent Palatin [Fri, 14 Dec 2012 06:58:27 +0000 (22:58 -0800)]
usb: ehci: generic PCI support
Instead of hardcoding the PCI IDs on the USB controller, use the PCI
class to detect them.
Ensure the busmaster bit is properly set in the PCI configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 5 Mar 2013 14:40:05 +0000 (14:40 +0000)]
Use 'unsigned int' for global_data's baudrate
We decided to used unsigned int here, rather than unsigned long. But
for the generic global_data it is still unsigned long. So change it
over.
Signed-off-by: Simon Glass <sjg@chromium.org>