Boris Brezillon [Mon, 9 Nov 2020 11:21:03 +0000 (12:21 +0100)]
pan/bi: Add support for tex offsets
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Fri, 13 Nov 2020 08:50:25 +0000 (09:50 +0100)]
pan/bi: Allow lane selections on component 4 and above
The lane selection only cares about intra-32b swizzling. Add a modulo
on the test to allow selecting lanes when the swizzle is above 4 (needed
for MKVEC.v4i8 lane selection).
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Fri, 13 Nov 2020 08:47:54 +0000 (09:47 +0100)]
pan/bi: Allow vec16 in bi_print_swizzle()
Ideally we should choose "abcd" instead of "xyzw" when accessing a
vector that has more than 4 components, but bi_instruction does not
provide this information, so let's keep things simple for now.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Thu, 12 Nov 2020 15:19:09 +0000 (16:19 +0100)]
pan/bi: Add support for derivative instructions
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Thu, 12 Nov 2020 15:15:18 +0000 (16:15 +0100)]
pan/bi: Add support for the CLPER instructions
Those are needed to implement derivatives.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Thu, 12 Nov 2020 15:10:41 +0000 (16:10 +0100)]
pan/bi: Rename CLPER into CLPER_V7 and add CLPER_V6
The encoding is different between v6 and v7.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Thu, 12 Nov 2020 15:18:13 +0000 (16:18 +0100)]
pan/bi: Expose FAU slots
Instead of adding a BIR_INDEX_ per FAU index, let's group some of those
together.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Thu, 12 Nov 2020 15:13:08 +0000 (16:13 +0100)]
pan/bi: Store the architecture in the compiler context
Some instructions differ between v6 and v7 and we'll need to know which
architecture we're compiling for if we want to generate the right
instructions.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Thu, 12 Nov 2020 15:08:31 +0000 (16:08 +0100)]
panfrost: Get rid of the Pixel Format descriptor
We use opaque uint to encode formats everywhere else, so let's make
things consistent and convert the only user to an opaque int too.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Thu, 12 Nov 2020 15:03:24 +0000 (16:03 +0100)]
panfrost: Fix panfrost_format_to_bifrost_blend()
panfrost_format_to_bifrost_blend() shouldn't return a pipe_format, but
a mali_format.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Thu, 12 Nov 2020 14:59:22 +0000 (15:59 +0100)]
pan/bi: Force BLEND src0 to r0
Blend shaders expect the input color to be passed through r0-r3, let's
enforce that when we allocate registers.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Boris Brezillon [Mon, 9 Nov 2020 12:36:00 +0000 (13:36 +0100)]
pan/bi: Extract shadowmap comparator
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
Rhys Perry [Wed, 11 Nov 2020 15:44:54 +0000 (15:44 +0000)]
aco/tests: add some more clamp combining tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
Rhys Perry [Wed, 7 Oct 2020 13:46:34 +0000 (14:46 +0100)]
aco/tests: expand optimize.const_comparison_ordering tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
Rhys Perry [Wed, 7 Oct 2020 13:35:21 +0000 (14:35 +0100)]
aco/tests: initialize debug function
aco_log() will print the message to stderr.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
Rhys Perry [Wed, 7 Oct 2020 10:45:30 +0000 (11:45 +0100)]
aco: disallow various v_add_u32 opts if modifiers are used
Check for clamp, SDWA or DPP. The optimization isn't possible with SDWA
and DPP, so it would have been skipped anyway. Doing any of these with a
clamp modifier present would be incorrect.
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
Rhys Perry [Wed, 7 Oct 2020 10:40:45 +0000 (11:40 +0100)]
aco: fix combine_constant_comparison_ordering() NaN check with 16/64-bit
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
Rhys Perry [Wed, 7 Oct 2020 10:09:16 +0000 (11:09 +0100)]
aco: don't combine precise max(min()) to med3
fossil-db (Navi):
Totals from 241 (0.18% of 137413) affected shaders:
CodeSize: 856280 -> 856308 (+0.00%); split: -0.00%, +0.00%
Instrs: 164220 -> 164514 (+0.18%); split: -0.00%, +0.18%
Cycles: 1031916 -> 1033092 (+0.11%); split: -0.00%, +0.11%
VMEM: 77855 -> 78514 (+0.85%); split: +0.85%, -0.01%
SMEM: 20501 -> 20593 (+0.45%); split: +0.46%, -0.01%
Copies: 9791 -> 9790 (-0.01%); split: -0.03%, +0.02%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
Pierre-Eric Pelloux-Prayer [Thu, 12 Nov 2020 09:51:42 +0000 (10:51 +0100)]
radeonsi: remove AMD_DEBUG=zerovram flag
The same feature is available by using: radeonsi_zerovram=true
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7525>
Pierre-Eric Pelloux-Prayer [Tue, 10 Nov 2020 09:30:54 +0000 (10:30 +0100)]
radeonsi: remove unused NO_RB_PLUS flag
It's not used since https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1751.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7525>
Simon Ser [Fri, 3 Jul 2020 13:16:00 +0000 (15:16 +0200)]
radv: add img debug flag
This is similar to AMD_DEBUG=tex, but for radv.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5734>
Simon Ser [Tue, 21 Jul 2020 16:56:16 +0000 (18:56 +0200)]
radeonsi: use ac_surface_print_info in si_print_texture_info
Pieces of information not printed by ac_surface_print_info are still
printed in si_print_texture_info.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5734>
Simon Ser [Tue, 21 Jul 2020 16:54:28 +0000 (18:54 +0200)]
amd/common: introduce ac_surface_print_info
This is mostly copied from si_print_texture_info, with the si-specific
bits removed. Moving it into common code will allow to use it from both
radeonsi and radv.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5734>
Erik Faye-Lund [Thu, 12 Nov 2020 14:16:46 +0000 (15:16 +0100)]
meson: verify that d3d12.h exists when building the d3d12 driver
Without this header-file, we can't build the driver. So let's verify
that it exists, and can be used by the C++ compiler.
This should make it a bit more clear what's wrong if someone attempts to
build this using MinGW or on Linux.
Fixes:
2ea15cd661c ("d3d12: introduce d3d12 gallium driver")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7575>
Erik Faye-Lund [Tue, 10 Nov 2020 11:23:59 +0000 (12:23 +0100)]
microsoft/compiler: correct typo
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7578>
Erik Faye-Lund [Tue, 10 Nov 2020 11:00:16 +0000 (12:00 +0100)]
microsoft/compiler: inline some struct-declarations
We don't need to refer to these by name anywhere, so let's just inline
these for readability reasons.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7578>
Erik Faye-Lund [Tue, 10 Nov 2020 10:57:01 +0000 (11:57 +0100)]
microsoft/compiler: move c++ higher up
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7578>
Erik Faye-Lund [Tue, 10 Nov 2020 10:55:43 +0000 (11:55 +0100)]
microsoft/compiler: remove unused struct
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7578>
Samuel Pitoiset [Wed, 11 Nov 2020 17:42:35 +0000 (18:42 +0100)]
aco: optimize v_add(v_bcnt(a, 0), b) to v_bcnt(a, b)
The first operand of v_bcnt should always be a VGPR because if it's
a SGPR, isel selects s_bcnt1 but I added a sanity check to prevent
any problems.
fossils-db (Vega10):
Totals from 23 (0.02% of 139517) affected shaders:
CodeSize: 106828 -> 106664 (-0.15%)
Instrs: 20242 -> 20201 (-0.20%)
Cycles: 213112 -> 211352 (-0.83%)
VMEM: 3200 -> 3184 (-0.50%)
SMEM: 928 -> 927 (-0.11%)
Helps Control, Assassins Creeds Origins and Youngblood.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7568>
Martin Peres [Wed, 21 Oct 2020 07:40:29 +0000 (10:40 +0300)]
driconf: remove the redundant glx-extension-disabling options
Now that we introduced the generic glx_extension_override option,
we can remove the glx_disable_oml_sync_control,
glx_disable_sgi_video_sync, and glx_disable_ext_buffer_age ones.
It seems like the only user for them was the vmwgfx, and only for
Gnome and Compiz which are covered by the default mesa driconf. This
means that it is unlikely for a user to have these options set in
their local driconf file.
Suggested-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7252>
Bas Nieuwenhuizen [Sun, 15 Mar 2020 13:47:25 +0000 (14:47 +0100)]
radeonsi: Add auxiliary plane support.
This adds support for multiple DRM planes for a single format plane
and uses that to enable DCC support with modifiers.
With the implicit flush patches we can also enable displayable DCC
both with and without DCC as the X server and compositors know not
to do frontbuffer rendering onto images with multiple DRM planes.
For now we require that the extra planes are essentially fixed though.
We require that the offset/stride are the same as ac_surface computes
and that all planes are in the same buffer. This is mainly for
simplicity and could be somewhat more relaxed in the future given
a strong usecase.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6176>
Bas Nieuwenhuizen [Mon, 3 Aug 2020 01:55:48 +0000 (03:55 +0200)]
radeonsi: Do not try to disable displayable DCC with modifiers.
We do flushing on glFlush etc., so we don't need explicit flush,
but we still need to avoid frontbuffer rendering.
For modifiers there was logic put in apps that basically prevent
frontbuffer rendering if multipe planes are involved.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6176>
Bas Nieuwenhuizen [Mon, 10 Feb 2020 18:00:33 +0000 (19:00 +0100)]
radeonsi: Do not disable DCC when we have it as a modifier.
Because other processes might be expecting DCC.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6176>
Bas Nieuwenhuizen [Tue, 17 Dec 2019 13:15:56 +0000 (14:15 +0100)]
radeonsi: Add modifier support.
This adds basic modifier support in radeonsi.
Support for import/export of DCC comes in a later patch as that
needs support for multiple memory planes.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6176>
Bas Nieuwenhuizen [Sat, 30 May 2020 01:42:39 +0000 (03:42 +0200)]
radeonsi: Check pitch and offset for validity.
And lack of overflows, which should help for security.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6176>
Bas Nieuwenhuizen [Mon, 14 Oct 2019 22:09:08 +0000 (00:09 +0200)]
amd/common: Add modifier tests.
This primarily tests that:
- multiple GPUs with the same GPU modifier parameters result
in the same tiling layout.
- The size & alignment calculations don't change for a given
modifier & image parameters.
It does this primarily based on addrlib. Radeonsi has used addrlib
for the retiling of displayable DCC for a while already, so the
DCC tiling should be pretty reliable.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6176>
Bas Nieuwenhuizen [Tue, 8 Oct 2019 08:21:30 +0000 (10:21 +0200)]
amd/common: Add support for modifiers.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6176>
Bas Nieuwenhuizen [Tue, 17 Dec 2019 13:12:01 +0000 (14:12 +0100)]
drm-uapi: Add AMD modifiers.
This adds modifiers for GFX9+ AMD GPUs.
As the modifiers need a lot of parameters I split things out in
getters and setters.
- Advantage: simplifies the code a lot
- Disadvantage: Makes it harder to check that you're setting all
the required fields.
The tiling modes seem to change every generatio, but the structure
of what each tiling mode is good for stays really similar. As such
the core of the modifier is
- the tiling mode
- a version. Not explicitly a GPU generation, but splitting out
a new set of tiling equations.
Sometimes one or two tiling modes stay the same and for those we
specify a canonical version.
Then we have a bunch of parameters on how the compression works.
Different HW units have different requirements for these and we
actually have some conflicts here.
e.g. the render backends need a specific alignment but the display
unit only works with unaligned compression surfaces. To work around
that we have a DCC_RETILE option where both an aligned and unaligned
compression surface are allocated and a writer has to sync the
aligned surface to the unaligned surface on handoff.
Finally there are some GPU parameters that participate in the tiling
equations. These are constant for each GPU on the rendering/texturing
side. The display unit is very flexible however and supports all
of them :|
Some estimates:
- Single GPU, render+texture: ~10 modifiers
- All possible configs in a gen, display: ~1000 modifiers
- Configs of actually existing GPUs in a gen: ~100 modifiers
For formats with a single plane everything gets put in a separate
DRM plane. However, this doesn't fit for some YUV formats, so if
the format has >1 plane, we let the driver pack the surfaces into
1 DRM plane per format plane.
This way we avoid X11 rendering onto the frontbuffer with DCC, but
still fit into 4 DRM planes.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6176>
Bas Nieuwenhuizen [Fri, 10 Jul 2020 20:27:12 +0000 (22:27 +0200)]
radeonsi: Add displayable DCC flushing without explicit flushes.
Flushes non-explicit shared textures that need retiling on
* glFlush
* glSync
* glSignalSemaphoreEXT
* DRI fences.
* The first time we create a non-explicit handle for it.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6176>
Bas Nieuwenhuizen [Fri, 13 Nov 2020 01:34:40 +0000 (02:34 +0100)]
amd/addrlib: Use signed char for INT_8.
Some architectures like aarch64 and ppc64el have char = unisgned char.
This breaks meta equation generation for DCC coords, as addrlib tries
to filter all the Z bits > -1 which ends up being all the Z bits > 255.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7593>
Bas Nieuwenhuizen [Fri, 13 Nov 2020 01:44:48 +0000 (02:44 +0100)]
radv: Do the sample check for tiling earlier.
The LINEAR optimization is not allowed for MSAA images.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7594>
Vinson Lee [Sun, 8 Nov 2020 23:59:55 +0000 (15:59 -0800)]
turnip: Fix file descriptor return.
Fix defect reported by Coverity Scan.
Logically dead code (DEADCODE)
dead_error_line: Execution cannot reach the expression -1 inside this statement: return ret ? -1 : handle.fd;
Fixes:
cec0bc73e55 ("turnip: rework fences to use syncobjs")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7498>
Marek Olšák [Mon, 21 Sep 2020 02:57:29 +0000 (22:57 -0400)]
radeonsi: enable GL_EXT_demote_to_helper_invocation
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7586>
Marek Olšák [Mon, 21 Sep 2020 02:50:52 +0000 (22:50 -0400)]
ac/llvm: fix demote inside conditional branches
The big comment explains it.
v2: don't kill if subgroup ops are used
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7586>
Marek Olšák [Tue, 22 Sep 2020 01:16:02 +0000 (21:16 -0400)]
nir: optimize nir_lower_discard_to_demote to lower discard/demote both ways
This is smarter and also lowers demote to discard if helper invocations are
not needed.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7586>
Marek Olšák [Tue, 22 Sep 2020 00:35:06 +0000 (20:35 -0400)]
nir: gather shader_info::needs_all_helper_invocations
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7586>
Marek Olšák [Tue, 22 Sep 2020 00:21:40 +0000 (20:21 -0400)]
nir: rename needs_helper_invocations to needs_quad_helper_invocations
This indicates that only quad operations use helper invocations.
Also handle quad_swizzle_amd.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7586>
Marek Olšák [Mon, 21 Sep 2020 11:33:59 +0000 (07:33 -0400)]
nir: optionally shuffle local invocation IDs for compute quad derivatives
Used by radeonsi. local_invocation_index is lowered only when quad
derivatives are enabled.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7586>
Boyuan Zhang [Wed, 11 Nov 2020 20:33:20 +0000 (15:33 -0500)]
radeon: fix license in header
Incorrect license was added previously.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7561>
Eric Anholt [Wed, 11 Nov 2020 19:03:57 +0000 (11:03 -0800)]
gallium/draw: Fix rasterizer_discard for wide points/lines.
Fixes the rasterizer_discard failures for softpipe, because the wide paths
(which we hit for points in the CTS) were dropping the discard state when
making the no_cull shadow state.
Cc: mesa-stable
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7558>
Brendan Dougherty [Wed, 11 Nov 2020 17:26:39 +0000 (11:26 -0600)]
mesa: Fix vertex_format_to_pipe_format index.
Corrects the index into the vertex_formats table for `integer` and
`normalized` values other than 0 or 1.
Fixes:
e6448f993b1 ("mesa: translate into gallium vertex formats in mesa/main")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7554>
Marcin Ślusarz [Tue, 10 Nov 2020 16:32:15 +0000 (17:32 +0100)]
nir: handle float atomics in copy propagation pass
Without this patch, copy propagation pass can optimize out
buffer loads out of compare & swap loop, which then leads
to infinite loop.
Triggered by a change to atomicCompSwap float test in piglit.
Fixes:
8424cd8fbd1 ("nir: Account for atomics in copy propagation.")
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7538>
Rob Clark [Wed, 11 Nov 2020 19:21:05 +0000 (11:21 -0800)]
freedreno/drm: Add some locking asserts
Also fix evil-twin table_lock which they turned up.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7580>
Rhys Perry [Thu, 12 Nov 2020 14:20:26 +0000 (14:20 +0000)]
radv/winsys: set has_dedicated_vram in the null winsys
NGG is disabled if this is false.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7577>
Rob Clark [Thu, 12 Nov 2020 00:59:04 +0000 (16:59 -0800)]
nir: Fix nir_validate fail after nir_lower_tex
It is UB to initialize unions on the stack and rely on bits not covered
by the initialized union member to be zero. Lets just simplify it and
move the entire nir_const_value off the stack.
While we're in there, sprinkle around some const.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3778
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7579>
Yuxuan Shui [Wed, 26 Aug 2020 18:01:53 +0000 (19:01 +0100)]
Add EGL xcb platform
This enables GL applications to be written without any involvement of
Xlib.
EGL X11 platform is actually already xcb-only underneath, so this commit
just add the necessary interface changes so eglDisplay can be created
from a xcb_connection_t.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Yuxuan Shui <yshuiv7@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6474>
Alexander Kanavin [Mon, 2 Nov 2020 22:23:53 +0000 (23:23 +0100)]
anv: fix a build race between generating a header and using it
anv_batch_chain.c includes genX_bits.h but doesn't ensure it gets
generated first. This causes build failures, as observed here:
https://autobuilder.yoctoproject.org/typhoon/#/builders/86/builds/1501/steps/8/logs/step2d
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Alexander Kanavin <alex.kanavin@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7412>
Erik Faye-Lund [Thu, 12 Nov 2020 13:31:23 +0000 (14:31 +0100)]
d3d12: fix code after simple-shader helper changes
Fixes:
4e9328e3b6a ("nir_builder: Return a new builder from nir_builder_init_simple_shader().")
Fixes:
5f992802f51 ("nir/builder: Drop the mem_ctx arg from nir_builder_init_simple_shader().")
Fixes:
eda3e4e055e ("nir/builder: Add a name format arg to nir_builder_init_simple_shader().")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7574>
Michel Zou [Tue, 3 Nov 2020 17:42:58 +0000 (18:42 +0100)]
zink: fix build on windows
guard the drm includes that are not available on this platform
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7432>
Samuel Pitoiset [Mon, 2 Nov 2020 14:34:25 +0000 (15:34 +0100)]
aco: optimize v_add_u32(v_mul_lo_u16) -> v_mad_u32_u16
fossils-db (Vega10):
Totals from 779 (0.56% of 139517) affected shaders:
CodeSize: 1187928 -> 1187508 (-0.04%); split: -0.04%, +0.00%
Instrs: 247353 -> 244608 (-1.11%); split: -1.11%, +0.00%
Cycles: 1127472 -> 1116420 (-0.98%); split: -0.98%, +0.00%
VMEM: 139720 -> 138297 (-1.02%); split: +0.00%, -1.02%
SMEM: 51069 -> 50735 (-0.65%); split: +0.04%, -0.69%
Copies: 11548 -> 11547 (-0.01%); split: -0.03%, +0.03%
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7425>
Samuel Pitoiset [Mon, 2 Nov 2020 14:15:04 +0000 (15:15 +0100)]
aco: select v_mul_lo_u16 for 16-bit multiplications that can't overflow
Only on GFX8-9 because GFX10 doesn't zero the upper 16 bits.
No fossils-db changes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7425>
Samuel Pitoiset [Mon, 2 Nov 2020 13:46:03 +0000 (14:46 +0100)]
aco: select v_mad_u32_u16 for 16-bit multiplications on GFX9+
No fossils-db changes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7425>
Samuel Pitoiset [Mon, 2 Nov 2020 15:44:04 +0000 (16:44 +0100)]
aco: optimize v_mad_u32_u16 with acc=0 to v_mul_u32_u24
v_mad_u32_u16 will be selected by isel to keep the range analysis
information around and to combine more v_add_u32+v_mad_u32_u16
together. When it's not possible to optimize that pattern, fallback
to v_mul_u32_u24 which is VOP2 instead of VOP3.
No fossils-db changes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7425>
Samuel Pitoiset [Fri, 6 Nov 2020 07:49:12 +0000 (08:49 +0100)]
aco: add a new Operand flag to indicate that is 16-bit
To indicate that the upper 16-bits are always 0 and that optimizing
v_mad_u32_u16 to v_mul_u32_u24 is valid.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7425>
Samuel Pitoiset [Wed, 11 Nov 2020 14:13:08 +0000 (15:13 +0100)]
aco: introduce a generic label for labelling instructions
When one instruction doesn't fit into the existing labels, use
the generic one.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7425>
Erik Faye-Lund [Wed, 11 Nov 2020 14:46:14 +0000 (15:46 +0100)]
util/u_process: implement util_get_process_name for Windows
There's not yet any users of this function on Windows, but it prints a
warning during builds, and seems easy enough to implement. So let's add
a trivial implementation.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7548>
Christian Gmeiner [Wed, 11 Nov 2020 16:15:25 +0000 (17:15 +0100)]
ci: sort packages installed via apt-get
Also remove duplicates.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7553>
Iago Toral Quiroga [Wed, 11 Nov 2020 08:45:33 +0000 (09:45 +0100)]
v3dv: move authenticated display fd acquisition to swapchain creation time
So far, we have only been supporting X11, so we assumed that we were running
inside X11 and would always try to get an authenticated fd from Xorg during
device initialization. While this works for desktop Raspbian, it is not
really correct and it is not what we want to do when we start considering
other WSIs.
Initially, one could think we can still do this by guarding the WSI code
under the proper instance extension check. This, however, doesn't work
reliably, as the Vulkan loader can call vkEnumerateDevices without enabling
surface extensions on the instance, which then can lead to us not
initializing any display_fd and failing with VK_ERROR_INITIALIZATION_FAILED,
which is not correct, so while we can try to acquire the display_fd here,
it might not always work, and we should definitely not fail initialization
of the physical device for that.
Instead, with this change we move acquisition of display_fd to swapchain
creation time where required extensions need to be enabled in the instance.
This was also suggested by Daniel Stone during review of a work-in-progress
implementation for the Wayland WSI.
There is a special case to consider though: applications like Zink that
don't use Vulkan's swapchains at all but still allocate images that they
intend to use for WSI. We need to handle these by checking that we have
indeed acquired a display_fd before doing any memory allocation for WSI,
and acquiring one at that time if that's not the case.
This change also removes the render_fd and display_fd fields from the
logical device (which we were copying from the physical device), because
now there is no guarantee that we have acquired a display_fd at the
time we create a logical device. Instead, we now put a reference to the
physical device on the logical device from which we can access these.
Finally, this also fixes a regression introduced with VK_KHR_display, where
if that extension is enabled but we are running inside a compositor, we would
acquire a display_fd that is not authenticated and try to use that instead
of acquiring an authenticated display_fd from the display server.
Fixes:
b1188c9451 (v3dv: VK_KHR_display extension support)
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7546>
Iago Toral Quiroga [Wed, 11 Nov 2020 08:46:51 +0000 (09:46 +0100)]
v3dv: fix typo
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7546>
Samuel Pitoiset [Tue, 10 Nov 2020 10:20:18 +0000 (11:20 +0100)]
aco: combine more s_add+s_lshl to s_lshl<n>_add by ignoring uses
Even if the s_lshl is used more that once, it can still be combined.
fossils-db (Vega10):
Totals from 771 (0.55% of 139517) affected shaders:
SGPRs: 46216 -> 46304 (+0.19%); split: -0.02%, +0.21%
VGPRs: 38488 -> 38464 (-0.06%)
SpillSGPRs: 1894 -> 1875 (-1.00%); split: -3.12%, +2.11%
CodeSize: 5681856 -> 5679844 (-0.04%); split: -0.07%, +0.03%
MaxWaves: 5320 -> 5323 (+0.06%)
Instrs: 1093960 -> 1093474 (-0.04%); split: -0.09%, +0.05%
Cycles:
47198380 ->
47258872 (+0.13%); split: -0.06%, +0.19%
VMEM: 176036 -> 176283 (+0.14%); split: +0.16%, -0.02%
SMEM: 53397 -> 53255 (-0.27%); split: +0.03%, -0.30%
VClause: 23156 -> 23152 (-0.02%); split: -0.03%, +0.01%
SClause: 35716 -> 35726 (+0.03%); split: -0.00%, +0.03%
Copies: 139395 -> 139871 (+0.34%); split: -0.04%, +0.39%
Branches: 33808 -> 33798 (-0.03%); split: -0.04%, +0.01%
PreSGPRs: 35381 -> 35331 (-0.14%); split: -0.20%, +0.06%
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7539>
Samuel Pitoiset [Tue, 10 Nov 2020 09:24:36 +0000 (10:24 +0100)]
aco/tests: add some tests for combining s_add+s_lshl to s_lshl<n>_add
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7539>
Kenneth Graunke [Wed, 11 Nov 2020 21:44:47 +0000 (13:44 -0800)]
prog_to_nir: Revert name initialization change
Commit
eda3e4e055e240a14c6ad4bdbde544c6348fc01d moved the creation of
s->info.name to shader creation time, rather than after the compile.
A few lines after creating the shader, prog_to_nir clobbers s->info
entirely, losing the name.
This dropped the "ARB" indicator that iris uses to switch math to the
legacy non-IEEE mode used by ARB_vertex_program/fragment_program.
Revert that hunk and go back to doing things the way they were.
Fixes:
eda3e4e055e ("nir/builder: Add a name format arg to nir_builder_init_simple_shader().")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3777
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7564>
Kenneth Graunke [Wed, 11 Nov 2020 20:17:50 +0000 (12:17 -0800)]
intel/compiler: Fix passthrough TCS regressions from program rename
In commit
eda3e4e055e240a14c6ad4bdbde544c6348fc01d, Eric added names
to various programs. In that patch, he also renamed our passthrough
TCS shader from "passthrough" to "passthrough TCS". The passthrough
TCS directly supplies the VUE headers rather than doing the whole
"patch parameters are in backwards order" reswizzling dance.
We failed to detect this and started trying to supply vec4s starting
at component 3, leading to a stack smash on an array of 7 sources,
not to mention the values were being put in the wrong place.
Easy fix: update the code for the new name.
Fixes:
eda3e4e055e ("nir/builder: Add a name format arg to nir_builder_init_simple_shader().")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3777
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7564>
Vinson Lee [Wed, 11 Nov 2020 19:49:50 +0000 (11:49 -0800)]
microsoft/compiler: Add dxil_nir_lower_16bit_conv prototype.
Fix missing-prototypes build error.
src/microsoft/compiler/dxil_nir_algebraic.c:5761:1: error: no previous prototype for ‘dxil_nir_lower_16bit_conv’ [-Werror=missing-prototypes]
5761 | dxil_nir_lower_16bit_conv(nir_shader *shader)
| ^~~~~~~~~~~~~~~~~~~~~~~~~
Fixes:
b9c61379ab4 ("microsoft/compiler: translate nir to dxil")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7559>
Vinson Lee [Tue, 3 Nov 2020 02:24:37 +0000 (18:24 -0800)]
glsl: Fix typos in comments.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7415>
Vinson Lee [Tue, 3 Nov 2020 02:17:13 +0000 (18:17 -0800)]
glsl: Initialize ir_variable member field data.is_xfb.
Fix defect reported by Coverity Scan.
Uninitialized scalar field (UNINIT_CTOR)
uninit_member: Non-static class member field data.is_xfb is not
initialized in this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7414>
Vinson Lee [Sat, 31 Oct 2020 02:29:39 +0000 (19:29 -0700)]
draw: Clean up single-use goto statements.
Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7389>
Jason Ekstrand [Tue, 10 Nov 2020 16:13:53 +0000 (10:13 -0600)]
intel/fs: Fix use of undefined value in fixup_nomask_control_flow
Fixes:
a8ac0bd759cbf "intel/fs/gen12: Workaround unwanted SEND execution..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7536>
Eric Anholt [Sat, 7 Nov 2020 17:32:02 +0000 (09:32 -0800)]
ci/db410c: Fix networking so we get artifacts from our jobs.
Seems some sort of linux change (bugfix?) resulted in the db410cs
selecting device mode for the db410cs due to the micro cable being
plugged in (fastboot runs them in device mode), so we weren't finding
the network and getting artifacts out.
Closes: #3728
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6971>
Eric Anholt [Thu, 1 Oct 2020 22:28:38 +0000 (15:28 -0700)]
ci: Re-enable the clip_three test on non-freedreno ARMs.
I'm surprised these were listed as flaky instead of xfails, since I would
have expected them to always fail given my experience on freedreno and
broadcom. But let's try turning them back on and see if it's actually
flaky since the test has been fixed.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6971>
Eric Anholt [Wed, 30 Sep 2020 17:20:22 +0000 (10:20 -0700)]
ci: Bump deqp to current vulkan-cts-1.2.4
I want the new version to show the fix in the fd-largeconsts branch (and
make sure the pass keeps working, and make sure other drivers get around
to fixing the issue). While I'm here, cherry-pick in the VK test along
with the GLES one, and also the fix for clip_three on ARMs.
Since the VK and GL test lists were changing, I took the opportunity to
reset freedreno xfails lists to just the tests that are being run with the
CTS uprev, and increase its coverage to 1/10th of the CTS across two
boards (since we just freed up a bunch of runtime with the grouped gles
"other" job).
For panfrost, I didn't spend the time characterizing the t720 fragment_ops
flakes like I did for the deqp-runner change. Given that the random
behavior changes between CTS versions, it doesn't seem to be worth the
time to do so.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6971>
Eric Anholt [Fri, 6 Nov 2020 23:55:24 +0000 (15:55 -0800)]
ci/deqp: Allow specifying the caselist fraction separate from CI_NODE_INDEX.
To increase our VK coverage on a630, we want to have two jobs in parallel,
but we still can't hit full coverage so we need the fractional setting to
be separate from gitlab CI's flags for setting up parallel jobs.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6971>
Eric Anholt [Fri, 6 Nov 2020 22:06:26 +0000 (14:06 -0800)]
ci/freedreno: Group the short a630 dEQP runs into one test job.
This saves the minute and a half boot time on each of these minute-or-less
test jobs. The whole job was 3.5 minutes in my last run.
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6971>
Eric Anholt [Mon, 9 Nov 2020 23:06:38 +0000 (15:06 -0800)]
ci: Only install kernel modules for LAVA devices.
The recent change to install kernel modules for AMD included a sed job to
disable kernel modules in the defconfig. This somehow broke booting on
a307, except the commit failed to bump the arm64_test tag so it wasn't
noticed until the next uprev. (I didn't notice when landing the next
change to that container to add the deqp runner, because I didn't get a
git conflict on rebasing my tag bump so I didn't bump the tag again to
pull in the kernel changes and catch the fail).
I've spent a while trying to debug what's happened (including what
*should* be a replication of the kernel build on my local db410c) and come
up empty. Just punt and disable the AMD kernel module changes on
baremetal to fix it. Bump every container using lava_build.sh to make
sure we don't screw anything up with the script changes.
Fixes:
60c5729d1669 ("ci: Distribute ADMGPU driver to LAVA as a module")
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6971>
Eric Anholt [Sat, 7 Nov 2020 17:25:37 +0000 (09:25 -0800)]
ci: Move the rust cleanup in lava_build out of the middle of kernel build.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6971>
Eric Anholt [Mon, 26 Oct 2020 18:37:25 +0000 (11:37 -0700)]
nir/builder: Add a name format arg to nir_builder_init_simple_shader().
This cleans up a bunch of gross sprintfs and keeps the caller from needing
to remember to ralloc_strdup. I added a couple of '"%s", name ? name :
""' to radv where I didn't fully trace through whether a non-null name was
being passed in.
I also took the liberty of adding a basic name to a few shaders (pan_blit,
unit tests)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
Eric Anholt [Mon, 26 Oct 2020 18:28:33 +0000 (11:28 -0700)]
nir/builder: Drop the mem_ctx arg from nir_builder_init_simple_shader().
This looks a lot more simple now!
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
Eric Anholt [Mon, 26 Oct 2020 18:25:08 +0000 (11:25 -0700)]
intel: Drop the last uses of a mem_ctx in nir_builder_init_simple_shader().
These two consumers were the only ones out of the ~65 calls to
init_simple_shader, so there's a pretty clear consensus on how to allocate
simple shaders. I suspect that actually these would be just fine with
b.shader being the mem_ctx, but that would take a bit more rework.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
Eric Anholt [Mon, 26 Oct 2020 18:22:49 +0000 (11:22 -0700)]
nir/tests: Simplify the mem_ctx setup in our unit tests.
These all make a simple shader and free it at the end, that can be our
mem_ctx.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
Eric Anholt [Mon, 26 Oct 2020 18:20:30 +0000 (11:20 -0700)]
nir/builder_tests: Drop unused lin_ctx.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
Eric Anholt [Mon, 26 Oct 2020 17:44:53 +0000 (10:44 -0700)]
nir_builder: Return a new builder from nir_builder_init_simple_shader().
It's a little inline function, so we can just RAII it for better
ergonomics.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
Samuel Pitoiset [Tue, 10 Nov 2020 13:10:35 +0000 (14:10 +0100)]
nir/algebraic: optimize bitfield_select(a, iand(a, b), c)
fossils-db (Vega10):
Totals from 242 (0.17% of 139517) affected shaders:
CodeSize: 853752 -> 852752 (-0.12%)
Instrs: 165944 -> 165694 (-0.15%)
Cycles: 855720 -> 854528 (-0.14%)
VMEM: 83772 -> 83668 (-0.12%); split: +0.13%, -0.25%
SMEM: 12360 -> 12316 (-0.36%)
SClause: 8222 -> 8238 (+0.19%)
Only helps Control.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7531>
James Jones [Mon, 3 Feb 2020 21:17:01 +0000 (13:17 -0800)]
gallium: Add format modifier plane count query
Rather than hard-code a list of all the format
modifiers supported by any gallium driver and the
number of aux planes they require in the dri state
tracker, add a screen proc that queries the number
of planes required for a given modifier+format
pair.
Since the only format modifiers that require
auxiliary planes currently are the iris driver's
I915_FORMAT_MOD_Y_TILED_CCS,
I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS, and
I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS, the absence
of the screen proc implies zero aux planes for all
of the screen's supported modifiers. Hence, when
a driver does not expose the proc, derive the
number of planes directly from the format.
Signed-off-by: James Jones <jajones@nvidia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3723>
James Jones [Thu, 6 Aug 2020 23:13:07 +0000 (16:13 -0700)]
gallium: Add pipe_screen::is_dmabuf_modifier_supported
Add a "do you support this modifier?" query to all
drivers which support format modifiers. This will
be used in a subsequent change to fully
encapsulate modifier validation and auxiliary plane
count calculation logic behind the driver
abstraction, which will in turn simplify the
addition of device-class-specific format modifiers
in the nouveau driver.
Signed-off-by: James Jones <jajones@nvidia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3723>
Duncan Hopkins [Wed, 26 Aug 2020 16:39:56 +0000 (17:39 +0100)]
mesa: Undefine ALIGN macro before it is used as a function name. Issues on MacOS.
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7469>
Steven Houston [Wed, 4 Nov 2020 17:45:10 +0000 (17:45 +0000)]
v3dv: VK_KHR_display extension support
When VK_KHR_display is enabled it needs to open the primary
node on the vc4/vc5 display device, so pass it to
physical_device_init().
Extension functions call through to the wsi_common_display.c
implementations.
v2: Follow Mesa conventions for comments and char *
Refer to vc4 display device in comments.
v3: Added Copyright © 2020 Raspberry Pi
v4: Test device has primary node when using simulator.
v5: Assert that we have a primary device. Fix trailing blank space.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3692
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7515>
Dave Airlie [Mon, 9 Nov 2020 06:49:44 +0000 (16:49 +1000)]
llvmpipe: just use draw_regions in draw/line setup.
This fixes:
dEQP-VK.draw.scissor*
Cc: 20.3 <mesa-stable>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7499>
Dave Airlie [Thu, 5 Nov 2020 03:18:57 +0000 (13:18 +1000)]
lavapipe: disable SNORM blending for now
dEQP-VK.pipeline.blend.dual_source.format.r16g16b16a16_snorm.states.color_1msc_1ms1a_add_alpha_1mdc_1msa_sub-color_dc_1ms1c_rsub_alpha_z_1mdc_sub-color_ca_1ms1c_min_alpha_sas_ca_rsub-color_1ms1c_s1c_add_alpha_z_1mda_add,Fail
dEQP-VK.pipeline.blend.dual_source.format.r8g8_snorm.states.color_z_sc_add_alpha_1ms1c_sa_min-color_dc_1mca_add_alpha_z_1mca_max-color_1ms1c_sa_max_alpha_1mcc_sc_sub-color_s1c_1mda_add_alpha_s1c_1mda_add,Fail
dEQP-VK.pipeline.blend.dual_source.format.r8g8b8a8_snorm.states.color_1msc_1ms1a_add_alpha_1mdc_1msa_sub-color_dc_1ms1c_rsub_alpha_z_1mdc_sub-color_ca_1ms1c_min_alpha_sas_ca_rsub-color_1ms1c_s1c_add_alpha_z_1mda_add,Fail
dEQP-VK.pipeline.blend.dual_source.format.r8g8b8a8_snorm.states.color_z_sc_add_alpha_1ms1c_sa_min-color_dc_1mca_add_alpha_z_1mca_max-color_1ms1c_sa_max_alpha_1mcc_sc_sub-color_s1c_1mda_add_alpha_s1c_1mda_add,Fail
dEQP-VK.pipeline.blend.format.r16g16b16a16_snorm.states.color_ca_1mca_rsub_alpha_1mda_z_sub-color_sc_sc_add_alpha_1mca_sa_max-color_sa_1msa_min_alpha_1msc_sa_sub-color_dc_sc_add_alpha_1mdc_1mca_add,Fail
dEQP-VK.pipeline.blend.format.r8g8b8a8_snorm.states.color_ca_1mca_rsub_alpha_1mda_z_sub-color_sc_sc_add_alpha_1mca_sa_max-color_sa_1msa_min_alpha_1msc_sa_sub-color_dc_sc_add_alpha_1mdc_1mca_add,Fail
All fail due to the 1 - mdc or 1 - mca alpha channel in the last quadrant.
Cc: 20.3 <mesa-stable>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7499>
Dave Airlie [Tue, 3 Nov 2020 22:59:53 +0000 (08:59 +1000)]
lavapipe: enable alpha to one.
CTS seems fine with this.
Cc: 20.3 <mesa-stable>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7499>
Dave Airlie [Mon, 9 Nov 2020 01:06:27 +0000 (11:06 +1000)]
u_blitter: port radv 3D blit coords logic.
The current code fails a lot of VK CTS tests, this fixes them all:
dEQP-VK*blit_image*3d*
Cc: 20.3 <mesa-stable>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7499>