Adam Nemet [Fri, 22 Apr 2016 18:34:50 +0000 (18:34 +0000)]
[LoopVersioningLICM] Add test coverage for llvm.loop.licm_versioning.disable
In the next change, I am generalizing the function
findStringMetadataForLoop and I want to make sure I don't break this.
Looks like there was no coverage for this so far.
llvm-svn: 267182
Davide Italiano [Fri, 22 Apr 2016 18:26:33 +0000 (18:26 +0000)]
[LTO] Create Undefined Bitcode symbol when we drop a comdat member.
Differential Revision: http://reviews.llvm.org/D19389
llvm-svn: 267181
Quentin Colombet [Fri, 22 Apr 2016 18:09:14 +0000 (18:09 +0000)]
[AArch64][AdvSIMDScalar] Update the kill flags correctly.
We used to simply set the kill flags to true when transforming a scalar
instruction to a vector one.
SrcScalar1 = copy SrcVector1
... = opScalar SrcScalar1
=>
SrcScalar1 = copy SrcVector1
... = opVector SrcVector1<kill>
This is obviously wrong. The proper update consists in:
1. Propagate the kill status from the copy to the new opVector
2. Reset the kill status on the copy, since the live-range of
SrcVector1 got extended.
This fixes some of the machine verifier errors for AArch64 with make check.
llvm-svn: 267180
Saleem Abdulrasool [Fri, 22 Apr 2016 18:06:51 +0000 (18:06 +0000)]
test: split test into two runs
Rather than checking both stdout and stderr simultaneously, split it into two
tests. This apparently breaks on Windows where MSVCRT does not buffer output
correctly. NFC.
Thanks to chapuni for bringing the issue to my attention!
llvm-svn: 267179
Krzysztof Parzyszek [Fri, 22 Apr 2016 18:05:55 +0000 (18:05 +0000)]
[Hexagon] Use common Pat classes for selecting code for intrinsics
llvm-svn: 267178
Chad Rosier [Fri, 22 Apr 2016 17:57:34 +0000 (17:57 +0000)]
[SimplifyCFG] Add final missing implications to isImpliedTrueByMatchingCmp.
Summary: eq imply [u|s]ge and [u|s]le are true.
Remove redundant logic by implementing isImpliedFalseByMatchingCmp(Pred1, Pred2)
as isImpliedTrueByMatchingCmp(Pred1, getInversePredicate(Pred2)).
llvm-svn: 267177
Michael Kuperstein [Fri, 22 Apr 2016 17:41:12 +0000 (17:41 +0000)]
Point link to CODE_OWNERS.txt to klaus instead of viewvc.
llvm-svn: 267176
Sanjoy Das [Fri, 22 Apr 2016 17:41:06 +0000 (17:41 +0000)]
Have isKnownNotFullPoison be smarter around control flow
Summary:
(... while still not using a PostDomTree)
The way we use isKnownNotFullPoison from SCEV today, the new CFG walking
logic will not trigger for any realistic cases -- it will kick in only
for situations where we could have merged the contiguous basic blocks
anyway[0], since the poison generating instruction dominates all of its
non-PHI uses (which are the only uses we consider right now).
However, having this change in place will allow a later bugfix to break
fewer llvm-lit tests.
[0]: i.e. cases where block A branches to block B and B is A's only
successor and A is B's only predecessor.
Reviewers: broune, bjarke.roune
Subscribers: mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D19212
llvm-svn: 267175
Krzysztof Parzyszek [Fri, 22 Apr 2016 17:30:13 +0000 (17:30 +0000)]
[Hexagon] Properly close live range in HexagonBlockRanges ---add testcase
llvm-svn: 267174
Krzysztof Parzyszek [Fri, 22 Apr 2016 17:27:22 +0000 (17:27 +0000)]
[Hexagon] Properly close live range in HexagonBlockRanges
llvm-svn: 267173
Justin Bogner [Fri, 22 Apr 2016 17:25:43 +0000 (17:25 +0000)]
PM: Remove some redundant name() methods
These passes all get names from PassInfoMixin already, we don't need
to override them.
llvm-svn: 267172
Chad Rosier [Fri, 22 Apr 2016 17:14:12 +0000 (17:14 +0000)]
[SimplifyCFG] Add missing implications to isImpliedTrueByMatchingCmp.
Summary: [u|s]gt and [u|s]lt imply [u|s]ge and [u|s]le are true, respectively.
I've simplified the existing tests and added additional tests to cover the new
cases mentioned above. I've also added tests for all the cases where the
first compare doesn't imply anything about the second compare.
llvm-svn: 267171
Chad Rosier [Fri, 22 Apr 2016 17:14:08 +0000 (17:14 +0000)]
[SimplifyCFG] Simplify code review by temporarily removing this test file.
A followup commit will replace these tests with simplified and more inclusive
tests. The diff is unreadable if this were to be done in a single commit.
llvm-svn: 267170
Saleem Abdulrasool [Fri, 22 Apr 2016 17:11:05 +0000 (17:11 +0000)]
unwind: unify some more macros
The macros were defined identically across both cases. Unify the definitions to
have a single definition for _LIBUWNIND_{HIDDEN,EXPORT} and _LIBUNWIND_LOG.
NFC.
llvm-svn: 267169
Rafael Espindola [Fri, 22 Apr 2016 17:10:28 +0000 (17:10 +0000)]
Trying to fix the windows build.
llvm-svn: 267168
Konstantin Zhuravlyov [Fri, 22 Apr 2016 17:04:51 +0000 (17:04 +0000)]
[AMDGPU] Insert nop pass: take care of outstanding feedback
- Switch few loops to range-based for loops
- Fix nop insertion at the end of BB
- Fix formatting
- Check for endpgm
Differential Revision: http://reviews.llvm.org/D19380
llvm-svn: 267167
Zoran Jovanovic [Fri, 22 Apr 2016 16:53:15 +0000 (16:53 +0000)]
[mips][microMIPS] Revert commit r266861.
Commit r266861 was the reason for failing tests in LLVM test suite.
llvm-svn: 267166
Krzysztof Parzyszek [Fri, 22 Apr 2016 16:47:01 +0000 (16:47 +0000)]
[Hexagon] Teach mux expansion how to deal with undef predicates
llvm-svn: 267165
Rafael Espindola [Fri, 22 Apr 2016 16:46:08 +0000 (16:46 +0000)]
GC entries of SHF_MERGE sections.
It is a fairly direct extension of the gc algorithm. For merge sections
instead of remembering just a live bit, we remember which offsets were
used.
This reduces the .rodata sections in chromium from 9648861 to 9477472
bytes.
llvm-svn: 267164
Rafael Espindola [Fri, 22 Apr 2016 16:39:59 +0000 (16:39 +0000)]
This reverts commit r267154 and r267161.
It turns out that this will read data from the section to properly
handle Elf_Rel implicit addends.
Sorry for the noise.
Original messages:
Try to fix Windows lld build.
Move getRelocTarget to ObjectFile.
It doesn't use anything from the InputSection.
llvm-svn: 267163
Krzysztof Parzyszek [Fri, 22 Apr 2016 16:25:00 +0000 (16:25 +0000)]
[Hexagon] Add definitions for trap/pause instructions
Also add tests for other instructions from HexagonSystemInst.td.
llvm-svn: 267162
Nico Weber [Fri, 22 Apr 2016 15:23:02 +0000 (15:23 +0000)]
Try to fix Windows lld build.
llvm\tools\lld\ELF\MarkLive.cpp(49): error C2872: 'ObjectFile': ambiguous symbol
llvm\tools\lld\elf\InputFiles.h(100): note: could be 'lld::elf::ObjectFile'
llvm\include\llvm/Object/IRObjectFile.h(26): note: or 'llvm::object::ObjectFile'
llvm\tools\lld\ELF\MarkLive.cpp(133): note: see reference to function template instantiation
'void forEachSuccessor<ELFT>(lld::elf::InputSection<ELFT> *,
std::function<void (lld::elf::InputSectionBase<ELFT> *)>)'
being compiled with
[ ELFT=llvm::object::ELF32LE ]
llvm\tools\lld\ELF\MarkLive.cpp(136): note: see reference to function template instantiation
'void lld::elf::markLive<llvm::object::ELF32LE>(lld::elf::SymbolTable<llvm::object::ELF32LE> *)
being compiled
llvm-svn: 267161
Tom Stellard [Fri, 22 Apr 2016 15:11:08 +0000 (15:11 +0000)]
PostRAHazardRecocgnizer: Fix unused-private-field warning
llvm-svn: 267160
Krzysztof Parzyszek [Fri, 22 Apr 2016 14:58:46 +0000 (14:58 +0000)]
[Hexagon] Add definitions for circular and bit-reverse loads/stores
llvm-svn: 267159
Renato Golin [Fri, 22 Apr 2016 14:56:30 +0000 (14:56 +0000)]
Revert "[LSAN] Fix test swapcontext.cc on MIPS"
This reverts commit r266716, as it breaks the self-hosting on Thumb2 buildbot.
llvm-svn: 267158
Geoff Berry [Fri, 22 Apr 2016 14:44:10 +0000 (14:44 +0000)]
[MemorySSA] Fix bug in CachingMemorySSAWalker::invalidateInfo
Summary:
CachingMemorySSAWalker::invalidateInfo was using IsCall to determine
which cache map needed to be cleared of entries referring to the invalidated
MemoryAccess, but there could also be entries referring to it in the
other cache map (value entries, not key entries). This change just
clears both tables to be conservatively correct.
Also add a verifyRemoved() function, called when expensive
checks (i.e. XDEBUG) are enabled to verify that the invalidated
MemoryAccess object is not referenced in any of the caches.
Reviewers: dberlin, george.burgess.iv
Subscribers: mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D19388
llvm-svn: 267157
Tom Stellard [Fri, 22 Apr 2016 14:43:50 +0000 (14:43 +0000)]
CodeGen: Add a stand-alone hazard recognizer pass
Summary:
This new pass allows targets to use the hazard recognizer without having
to also run one of the schedulers. This is useful when compiling with
optimizations disabled for targets that still need noop hazards
to be handled correctly.
Reviewers: hfinkel, atrick
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18594
llvm-svn: 267156
Haojian Wu [Fri, 22 Apr 2016 14:43:39 +0000 (14:43 +0000)]
[clang-tidy] fix link in Release Notes
Summary: This is intended to fix https://llvm.org/bugs/show_bug.cgi?id=27426
Patch by Kirill Bobyrev!
Reviewers: alexfh, LegalizeAdulthood, hokein
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D19406
llvm-svn: 267155
Rafael Espindola [Fri, 22 Apr 2016 14:17:14 +0000 (14:17 +0000)]
Move getRelocTarget to ObjectFile.
It doesn't use anything from the InputSection.
llvm-svn: 267154
David Majnemer [Fri, 22 Apr 2016 14:12:50 +0000 (14:12 +0000)]
[EarlyCSE] Don't add the overflow flags to the hash
We take the intersection of overflow flags while CSE'ing.
This permits us to consider two instructions with different overflow
behavior to be replaceable.
llvm-svn: 267153
Nirav Dave [Fri, 22 Apr 2016 13:36:11 +0000 (13:36 +0000)]
Emit code16 in assembly in 16-bit mode
Summary:
When generating assembly using -m16 we must explicitly mark it as
16-bit. Emit .code16 at beginning of file. Fixes wrong results when
using -fno-integrated-as.
Reviewers: dwmw2
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19392
llvm-svn: 267152
Simon Dardis [Fri, 22 Apr 2016 13:19:22 +0000 (13:19 +0000)]
[mips] Fix select patterns for MIPS64
When targetting MIPS64R6 some of the patterns for select were guarded by a
broken predicate. The predicate was supposed to test if a constant value
could fit in a 16 bit zero-extended field. Instead the value was tested to
fit in a 16 bit sign-extended field. For negative constants of native word
width this resulted in wrong code generation.
Reviewers: vkalintiris, dsanders
Differential Review: http://reviews.llvm.org/D19378
llvm-svn: 267151
Teresa Johnson [Fri, 22 Apr 2016 13:09:17 +0000 (13:09 +0000)]
Document source_filename in LangRef.
Summary: Add documentation for new LLVM IR source_filename identifier.
Reviewers: joker.eph, majnemer
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D18857
llvm-svn: 267150
Vasileios Kalintiris [Fri, 22 Apr 2016 13:05:51 +0000 (13:05 +0000)]
[mips] Fix a small typo that would leave BLTZC out of getAnalyzableBrOpc().'
llvm-svn: 267149
Daniel Sanders [Fri, 22 Apr 2016 12:04:42 +0000 (12:04 +0000)]
Revert r267049, r26706[16789], r267071 - Refactor raw pdb dumper into library
r267049 broke multiple buildbots (e.g. clang-cmake-mips, and clang-x86_64-linux-selfhost-modules) which the follow-ups have not yet resolved and this is preventing subsequent committers from being notified about additional failures on the affected buildbots.
llvm-svn: 267148
Rafael Espindola [Fri, 22 Apr 2016 11:46:28 +0000 (11:46 +0000)]
Simplify. NFC.
llvm-svn: 267147
Johannes Doerfert [Fri, 22 Apr 2016 11:41:14 +0000 (11:41 +0000)]
Bail for complex execution contexts of invariant loads
llvm-svn: 267146
George Rimar [Fri, 22 Apr 2016 11:40:53 +0000 (11:40 +0000)]
[ELF] - Implemented linkerscript ALIGN command
ALIGN(exp)
Return the location counter (.) aligned to the next exp boundary. (https://access.redhat.com/documentation/en-US/Red_Hat_Enterprise_Linux/4/html/Using_ld_the_GNU_Linker/expressions.html)
Patch implements this command.
This fixes PR27406.
Differential revision: http://reviews.llvm.org/D19364
llvm-svn: 267145
Nikolay Haustov [Fri, 22 Apr 2016 11:39:43 +0000 (11:39 +0000)]
AMDGPU/SI: Add test missed in rL266865
llvm-svn: 267144
Johannes Doerfert [Fri, 22 Apr 2016 11:38:44 +0000 (11:38 +0000)]
Early exit for addInvariantLoads
llvm-svn: 267143
Johannes Doerfert [Fri, 22 Apr 2016 11:38:19 +0000 (11:38 +0000)]
Bail for complex alias checks
llvm-svn: 267142
Johannes Doerfert [Fri, 22 Apr 2016 11:36:13 +0000 (11:36 +0000)]
Repair doxygen comment [NFC]
llvm-svn: 267141
George Rimar [Fri, 22 Apr 2016 11:28:54 +0000 (11:28 +0000)]
Recommitted r267132 "[ELF] - implemented ternary operator for linkerscript expressions"
With fix: removed redundant Dot parameter.
Original commit message:
[ELF] - implemented ternary operator for linkerscript expressions
Patch implements ternary operator for linkerscript expressions.
Like:
SECTIONS {
. = 0x1 ? 0x2 : 0x3;
...
}
Differential revision: http://reviews.llvm.org/D19332
llvm-svn: 267140
Silviu Baranga [Fri, 22 Apr 2016 11:21:36 +0000 (11:21 +0000)]
[InstCombine] Preserve fast math flags when combining PHIs
Summary:
When optimizing PHIs which have inputs floating point binary
operators, we preserve all IR flags except the fast math
flags.
This change removes the logic which tracked some of the IR flags
(no wrap, exact) and replaces it by doing an and on the IR flags of
all inputs to the PHI - which will also handle the fast math
flags.
Reviewers: majnemer
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19370
llvm-svn: 267139
Hrvoje Varga [Fri, 22 Apr 2016 11:18:40 +0000 (11:18 +0000)]
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
Differential Revision: http://reviews.llvm.org/D19354
llvm-svn: 267137
Renato Golin [Fri, 22 Apr 2016 11:18:14 +0000 (11:18 +0000)]
Revert "[sanitizer] Allow the sanitizer allocator to use a non-fixed address range. An allocator with a non-fixed address range will be attack-resistan. NFC for the sanitizers at this point."
This reverts commit r267094, because it broke a lot of MSAN tests in AArch64.
Being NFC and all, this needs some deeper investigation before it goes in again.
llvm-svn: 267136
Michael Zuckerman [Fri, 22 Apr 2016 10:56:24 +0000 (10:56 +0000)]
[clang][AVX512][Builtin] adding intrinsics for vf{n}madd{ss|sd} and vf{n}sub{ss|sd} instruction set
Differential Revision: http://reviews.llvm.org/D19320
llvm-svn: 267135
George Rimar [Fri, 22 Apr 2016 10:51:34 +0000 (10:51 +0000)]
Revert r267132 as it broke buildbot.
llvm-svn: 267134
Kuba Brecka [Fri, 22 Apr 2016 10:40:14 +0000 (10:40 +0000)]
Renumber ThreadSanitizer-provided thread IDs to match LLDB thread numbers.
llvm-svn: 267133
George Rimar [Fri, 22 Apr 2016 10:35:34 +0000 (10:35 +0000)]
[ELF] - implemented ternary operator for linkerscript expressions
Patch implements ternary operator for linkerscript expressions.
Like:
SECTIONS {
. = 0x1 ? 0x2 : 0x3;
...
}
Differential revision: http://reviews.llvm.org/D19332
llvm-svn: 267132
Eric Fiselier [Fri, 22 Apr 2016 10:33:56 +0000 (10:33 +0000)]
Fix some non-standard parts of our test suite. Reported by STL
llvm-svn: 267131
Zoran Jovanovic [Fri, 22 Apr 2016 10:15:12 +0000 (10:15 +0000)]
[mips][microMIPS] Add R_MICROMIPS_PC18_S3 relocation
Differential Revision: http://reviews.llvm.org/D15026
llvm-svn: 267130
Michael Zuckerman [Fri, 22 Apr 2016 10:06:10 +0000 (10:06 +0000)]
[Clang][AVX512][BUILTIN] Adding scalar intrinsics for rsqrt14 ,rcp14, getexp and getmant instruction set
Differential Revision: http://reviews.llvm.org/D19326
llvm-svn: 267129
Eric Liu [Fri, 22 Apr 2016 09:50:31 +0000 (09:50 +0000)]
Fix -Wunused-variable in non-asserts build.
llvm-svn: 267128
Daniel Sanders [Fri, 22 Apr 2016 09:37:26 +0000 (09:37 +0000)]
Revert r267098 - [MachineCombiner] Support for floating-point FMA on ARM64
It introduced buildbot failures on clang-cmake-mips, clang-ppc64le-linux, among others.
llvm-svn: 267127
Sagar Thakur [Fri, 22 Apr 2016 09:20:22 +0000 (09:20 +0000)]
[ASAN] Use struct instead of array in sancov.py
Summary: When using 32-bit python with 64-bit asan the pc array in sancov.py cannot fit in 64-bit pc's because the type-code 'L' for
arrays in python corresponds to the C type long which is only of 4 bytes. Because of this some of the coverage tool tests fail on
mips. To fix these test possible solutions are to use 64-bit python or use struct.unpack with the 'Q' type-code. We have used
struct.unpack with 'Q' type code since it is not appropriate to have a 64-bit python on all hosts.
Reviewed by kcc, aizatsky
Differential: http://reviews.llvm.org/D18817
llvm-svn: 267126
Alexey Bataev [Fri, 22 Apr 2016 09:05:03 +0000 (09:05 +0000)]
[OPENMP] Fix for PR27463: Privatizing struct fields with array type
causes code generation failure.
The codegen part of firstprivate clause for member decls used type of
original variable without skipping reference type from
OMPCapturedExprDecl. Patch fixes this problem.
llvm-svn: 267125
Pavel Labath [Fri, 22 Apr 2016 08:41:07 +0000 (08:41 +0000)]
Update comment in lldb-enumerations.h
llvm-svn: 267124
Ashutosh Nema [Fri, 22 Apr 2016 08:34:05 +0000 (08:34 +0000)]
[X86]: Changing cost for “TRUNCATE v16i32 to v16i8” in SSE4.1 mode.
Summary:
rL256194 transforms truncations between vectors of integers into PACKUS/PACKSS
operations during DAG combine. This generates better code for truncate, so cost
of truncate needs to be changed but looks like it got changed only in SSE2 table
Whereas this change is also applicable for SSE4.1, so the cost of truncate needs
to be changed for that as well. Cost of “TRUNCATE v16i32 to v16i8” & “TRUNCATE
v16i16 to v16i8” should be same in SSE4.1 & SSE2 table. Removing their cost from
SSE4.1, so it will fall back to SSE2.
Reviewers: Simon Pilgrim
llvm-svn: 267123
Chris Dewhurst [Fri, 22 Apr 2016 08:17:17 +0000 (08:17 +0000)]
[Sparc] This provides support for itineraries on Sparc.
Specifically, itineraries for LEON processors has been added, along with several LEON processor Subtargets. Although currently all these targets are pretty much identical, support for features that will differ among these processors will be added in the very near future.
The different Instruction Itinerary Classes (IICs) added are sufficient to differentiate between the instruction timings used by LEON and, quite probably, by generic Sparc processors too, but the focus of the exercise has been for LEON processors, as the requirement of my project. If the IICs are not sufficient for other Sparc processor types and you want to add a new itinerary for one of those, it should be relatively trivial to adapt this.
As none of the LEON processors has Quad Floats, or is a Version 9 processor, none of those instructions have itinerary classes defined and revert to the default "NoItinerary" instruction itinerary.
Phabricator Review: http://reviews.llvm.org/D19359
llvm-svn: 267121
Chris Dewhurst [Fri, 22 Apr 2016 08:13:47 +0000 (08:13 +0000)]
The following code would not work before this patch, due to the inability to take the address of a global object:
void func1() {
...
}
int main(int argc, char** argv) {
void (*pFunc)();
pFunc = &func1
pFunc();
...
}
Phabricator review: http://reviews.llvm.org/D19368
llvm-svn: 267120
Marshall Clow [Fri, 22 Apr 2016 07:39:05 +0000 (07:39 +0000)]
Add missing include of <algorithm>
llvm-svn: 267119
Argyrios Kyrtzidis [Fri, 22 Apr 2016 07:21:16 +0000 (07:21 +0000)]
[index] Add SymbolSubKinds for ObjC IB annotations.
llvm-svn: 267118
Argyrios Kyrtzidis [Fri, 22 Apr 2016 07:21:10 +0000 (07:21 +0000)]
[index] Add a SymbolSubKind for an ObjC unit test.
llvm-svn: 267117
Argyrios Kyrtzidis [Fri, 22 Apr 2016 07:21:04 +0000 (07:21 +0000)]
[index] Change SymbolCXXTemplateKind to a 'SymbolSubKinds' bitset.
This provides a more general and flexible way to annotate special symbols.
llvm-svn: 267116
Vedant Kumar [Fri, 22 Apr 2016 06:51:37 +0000 (06:51 +0000)]
Revert "Initial implementation of optimization bisect support."
This reverts commit r267022, due to an ASan failure:
http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan_check/1549
llvm-svn: 267115
Zlatko Buljan [Fri, 22 Apr 2016 06:44:34 +0000 (06:44 +0000)]
[mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions
Differential Revision: http://reviews.llvm.org/D18687
llvm-svn: 267114
David Majnemer [Fri, 22 Apr 2016 06:37:51 +0000 (06:37 +0000)]
[GVN] Respect fast-math-flags on fcmps
We assumed that flags were only present on binary operators. This is
not true, they may also be present on calls and fcmps.
llvm-svn: 267113
David Majnemer [Fri, 22 Apr 2016 06:37:48 +0000 (06:37 +0000)]
Fix some spelling mistakes
llvm-svn: 267112
David Majnemer [Fri, 22 Apr 2016 06:37:45 +0000 (06:37 +0000)]
[EarlyCSE] Take the intersection of flags on instructions
EarlyCSE had inconsistent behavior with regards to flag'd instructions:
- In some cases, it would pessimize if the available instruction had
different flags by not performing CSE.
- In other cases, it would miscompile if it replaced an instruction
which had no flags with an instruction which has flags.
Fix this by being more consistent with our flag handling by utilizing
andIRFlags.
llvm-svn: 267111
Sanjoy Das [Fri, 22 Apr 2016 05:38:54 +0000 (05:38 +0000)]
[SCEV] Extract out a `isSCEVExprNeverPoison` helper; NFCI
Summary:
Also adds a small comment blurb on control flow + no-wrap flags, since
that question came up a few days back on llvm-dev.
Reviewers: bjarke.roune, broune
Subscribers: sanjoy, mcrosier, llvm-commits, mzolotukhin
Differential Revision: http://reviews.llvm.org/D19209
llvm-svn: 267110
Craig Topper [Fri, 22 Apr 2016 05:29:58 +0000 (05:29 +0000)]
[SystemZ] Mark CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF as Expand instead of Custom since the custom logic just did what Expand does when CTTZ/CTLZ are Legal. NFC
llvm-svn: 267109
Craig Topper [Fri, 22 Apr 2016 05:13:01 +0000 (05:13 +0000)]
[Lanai] Set CTLZ_ZERO_UNDEF/CTTZ_ZERO_UNDEF to Expand instead of Legal so they will be converted to CTLZ/CTTZ by LegalizeDAG. Remove extra instructions that only existed to to contain patterns that match the zero_undef operations. NFC
llvm-svn: 267108
Craig Topper [Fri, 22 Apr 2016 05:12:57 +0000 (05:12 +0000)]
[Lanai] Remove unused methods declarations. NFC
llvm-svn: 267107
Mehdi Amini [Fri, 22 Apr 2016 04:58:12 +0000 (04:58 +0000)]
Clean the API for CollectAsmUndefinedRefs, taking a Triple and a String InlineAsm instead of a Module (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 267106
Mehdi Amini [Fri, 22 Apr 2016 04:49:46 +0000 (04:49 +0000)]
IRObjectFile, clang-format fixup for r267104
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 267105
Mehdi Amini [Fri, 22 Apr 2016 04:45:57 +0000 (04:45 +0000)]
Use std::move on the enum to insert it into the pair to please MSVC
(I have no idea why is it needed)
Fixup for r267103
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 267104
Mehdi Amini [Fri, 22 Apr 2016 04:28:05 +0000 (04:28 +0000)]
Refactor IRObjectFile, extract a static CollectAsmUndefinedRefs() method to parse inline assembly (NFC)
I plan to call this from ThinLTOCodeGenerator.
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 267103
Nicolai Haehnle [Fri, 22 Apr 2016 04:04:08 +0000 (04:04 +0000)]
AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic
Summary:
This intrinsic returns true if the current thread belongs to a live pixel
and false if it belongs to a pixel that we are executing only for derivative
computation. It will be used by Mesa to implement gl_HelperInvocation.
Note that for pixels that are killed during the shader, this implementation
also returns true, but it doesn't matter because those pixels are always
disabled in the EXEC mask.
This unearthed a corner case in the instruction verifier, which complained
about a v_cndmask 0, 1, exec, exec<imp-use> instruction. That's stupid but
correct code, so make the verifier accept it as such.
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19191
llvm-svn: 267102
Alexey Bataev [Fri, 22 Apr 2016 03:56:56 +0000 (03:56 +0000)]
[OPENMP] Fix for LCV in simd directives in explicit clauses.
If loop control variable for simd-based directives is explicitly marked
as linear/lastprivate in clauses, codegen for such construct would
crash. Patch fixes this problem.
llvm-svn: 267101
Craig Topper [Fri, 22 Apr 2016 03:22:38 +0000 (03:22 +0000)]
[AVX512] Teach lowering to use vplzcntd/q to implement 128/256-bit CTTZ_ZERO_UNDEF even without VLX support. We can just extend to 512-bits and extract like we do for CTLZ.
llvm-svn: 267100
Duncan P. N. Exon Smith [Fri, 22 Apr 2016 02:33:06 +0000 (02:33 +0000)]
ValueMapper/Enumerator: Clean up code in post-order traversals, NFC
Re-layer the functions in the new (i.e., newly correct) post-order
traversals in ValueEnumerator (r266947) and ValueMapper (r266949).
Instead of adding a node to the worklist in a helper function and
returning a flag to say what happened, return the node itself. This
makes the code way cleaner: the worklist is local to the main function,
there is no flag for an early loop exit (since we can cleanly bury the
loop), and it's perfectly clear when pointers into the worklist might be
invalidated.
I'm fixing both algorithms in the same commit to avoid repeating the
commit message; if you take the time to understand one the other should
be easy. The diff itself isn't entirely obvious since the traversals
have some noise (i.e., things to do), but here's the high-level change:
auto helper = [&WL](T *Op) { auto helper = [](T **&I, T **E) {
=> while (I != E) {
if (shouldVisit(Op)) { T *Op = *I++;
WL.push(Op, Op->begin()); if (shouldVisit(Op)) {
return true; return Op;
} }
return false; return nullptr;
}; };
=>
WL.push(S, S->begin()); WL.push(S, S->begin());
while (!empty()) { while (!empty()) {
auto *N = WL.top().N; auto *N = WL.top().N;
auto *&I = WL.top().I; auto *&I = WL.top().I;
bool DidChange = false;
while (I != N->end())
if (helper(*I++)) { => if (T *Op = helper(I, N->end()) {
DidChange = true; WL.push(Op, Op->begin());
break; continue;
} }
if (DidChange)
continue;
POT.push(WL.pop()); => POT.push(WL.pop());
} }
Thanks to Mehdi for helping me find a better way to layer this.
llvm-svn: 267099
Gerolf Hoflehner [Fri, 22 Apr 2016 02:15:19 +0000 (02:15 +0000)]
[MachineCombiner] Support for floating-point FMA on ARM64
Evaluates fmul+fadd -> fmadd combines and similar code sequences in the
machine combiner. It adds support for float and double similar to the existing
integer implementation. The key features are:
- DAGCombiner checks whether it should combine greedily or let the machine
combiner do the evaluation. This is only supported on ARM64.
- It gives preference to throughput over latency: the heuristic used is
to combine always in loops. The targets decides whether the machine
combiner should optimize for throughput or latency.
- Supports for fmadd, f(n)msub, fmla, fmls patterns
- On by default at O3 ffast-math
llvm-svn: 267098
Teresa Johnson [Fri, 22 Apr 2016 01:52:00 +0000 (01:52 +0000)]
[ThinLTO] Remove unused/incomplete lazy summary reading support (NFC)
This removes the interfaces added (and not yet complete) to support
lazy reading of summaries. This support is not expected to be needed
since we are moving to a model where the full index is only being
traversed in the thin link step, instead of the back ends.
(The second part of this that I plan to do next is remove the
GlobalValueInfo from the ModuleSummaryIndex - it was mostly needed to
support lazy parsing of summaries. The index can instead reference the
summary structures directly.)
llvm-svn: 267097
NAKAMURA Takumi [Fri, 22 Apr 2016 01:33:50 +0000 (01:33 +0000)]
Untabify.
llvm-svn: 267096
Nico Weber [Fri, 22 Apr 2016 01:08:56 +0000 (01:08 +0000)]
Try to fix UNRESOLVED: LLVM :: CodeGen/AArch64/arm64-regress-opt-cmp.s on bots.
This test used to write a .s file until r266971 fixed that. But on most bots,
the .s file still exists. Add an rm statement to clean up the bots. In a few
days, this statement can go away again.
llvm-svn: 267095
Kostya Serebryany [Fri, 22 Apr 2016 01:08:54 +0000 (01:08 +0000)]
[sanitizer] Allow the sanitizer allocator to use a non-fixed address range. An allocator with a non-fixed address range will be attack-resistan. NFC for the sanitizers at this point.
llvm-svn: 267094
Evgeniy Stepanov [Fri, 22 Apr 2016 01:04:55 +0000 (01:04 +0000)]
Cleanup: move visibility/linkage attributes to the first declaration.
http://reviews.llvm.org/D15404
llvm-svn: 267093
Saleem Abdulrasool [Fri, 22 Apr 2016 01:03:38 +0000 (01:03 +0000)]
ARM: fix test for Windows division
This was meant to be part of SVN r267080. cbz cannot use a high register, which
would be silently truncated. This has now been fixed.
llvm-svn: 267092
Eric Fiselier [Fri, 22 Apr 2016 00:49:12 +0000 (00:49 +0000)]
Fix LWG issue #2106: move_iterators returning prvalues
llvm-svn: 267091
Eric Fiselier [Fri, 22 Apr 2016 00:47:15 +0000 (00:47 +0000)]
Fix C++03 build breakage
llvm-svn: 267090
Nico Weber [Fri, 22 Apr 2016 00:38:09 +0000 (00:38 +0000)]
Try to get test passing on OS X (see comment at top of file).
llvm-svn: 267089
Evgeniy Stepanov [Fri, 22 Apr 2016 00:34:10 +0000 (00:34 +0000)]
[asan] Disable one test on windows.
Patch by Vitaly Buka.
llvm-svn: 267088
NAKAMURA Takumi [Fri, 22 Apr 2016 00:33:39 +0000 (00:33 +0000)]
clangTidyReadabilityModule: Add clangTidyUtils in libdeps, corresponding to r267003.
llvm-svn: 267087
Rui Ueyama [Fri, 22 Apr 2016 00:23:52 +0000 (00:23 +0000)]
Inline SectionRule::match.
This short function was used only once and didn't provide much value.
llvm-svn: 267086
Eric Fiselier [Fri, 22 Apr 2016 00:15:18 +0000 (00:15 +0000)]
Complete LWG issue #2016. Allocators must be nothrow swappable
llvm-svn: 267085
Evgeniy Stepanov [Fri, 22 Apr 2016 00:10:23 +0000 (00:10 +0000)]
Enable stack-use-after-scope tests.
Fix and enable working stack-use-after-scope tests.
Add more failing tests for the feature, for fix later.
PR27453.
Patch by Vitaly Buka.
llvm-svn: 267084
Rui Ueyama [Fri, 22 Apr 2016 00:03:13 +0000 (00:03 +0000)]
ELF: Make the special variable "." as a LinkerScript class member.
I will eventually make `evaluate` function a usual parse function
rather than a function that works on a separate token list.
This is the first step toward that.
llvm-svn: 267083
Dan Gohman [Thu, 21 Apr 2016 23:59:48 +0000 (23:59 +0000)]
[WebAssembly] Limit alignment hints to natural alignment.
This follows the current binary format rules.
llvm-svn: 267082
Rafael Espindola [Thu, 21 Apr 2016 23:59:19 +0000 (23:59 +0000)]
Don't gc protected symbols.
llvm-svn: 267081