Patrick Delaunay [Thu, 15 Oct 2020 12:28:17 +0000 (14:28 +0200)]
stm32mp: stm32prog: accept device without partition
When partitions are not available on a device the command stm32prog raises
an error but a device can have no partition to check in init_device()
and the command need to continue to the next part_id.
This patch correct an issue for ram0 target, when block_dev and mtd
are NULL.
For example with the simple flashlayout file:
Opt Part Name Type Device Offset Binary
- 0x01 fsbl Binary none 0x0 tf-a-serialboot.stm32
- 0x03 ssbl Binary none 0x0 u-boot.stm32
P 0x10 kernel System ram0 0xC2000000 uImage.bin
P 0x11 dtb FileSytem ram0 0xC4000000 stm32mp157f-ev1.dtb
Fixes:
ffc405e63b94 ("stm32mp: stm32prog: add upport of partial update")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 15 Oct 2020 12:46:34 +0000 (14:46 +0200)]
configs: stm32mp15: activate CMD_ELF
Activate CONFIG_CMD_ELF to accept the command "bootelf".
This patch simplifies the file stm32mp defconfig, as we have
no reason to deactivate this command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 15 Oct 2020 12:31:51 +0000 (14:31 +0200)]
configs: stm32mp15: activate CMD_EXPORTENV
Activate CONFIG_CMD_EXPORTENV to accept the command "env export".
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 15 Oct 2020 12:31:50 +0000 (14:31 +0200)]
configs: stm32mp15: activate CMD_IMPORTENV
Activate CONFIG_CMD_IMPORTENV to accept the command "env import".
This command is useful in script to include some variable.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Tue, 6 Oct 2020 11:52:26 +0000 (13:52 +0200)]
MAINTAINERS: Add STM32MP1 RNG driver in stm32mp platform
Add the STM32MP1 RNG driver in the list of drivers supported by
the STMicroelectronics STM32MP15x series.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Tue, 6 Oct 2020 11:59:41 +0000 (13:59 +0200)]
MAINTAINERS: Add stm32 and stm regexp for ARM STM STM32MP platform
Add files and directories regex "stm32" and "stm" in "ARM STM STM32MP"
platform to avoid missing files or drivers supported by the
STMicroelectronics series STM32MP15x.
This patch adds the rules already used in Linux kernel for
ARM/STM32 ARCHITECTURE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 2 Oct 2020 12:08:54 +0000 (14:08 +0200)]
arm: stm32: cleanup arch gpio.h
Cosmetic update of gpio.h:
- remove enumerate: stm32_gpio_port, stm32_gpio_pin
because STM32_GPIO_XXX values are unused
- move STM32_GPIOS_PER_BANK in stm32_gpio.c
as its value is IP dependent and not arch dependent
No functional change as number of banks and number of gpio by banks
is managed by device tree since since DM migration and
commit
8f651ca60ba1 ("pinctrl: stm32: Add get_pins_count() ops").
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Marek Vasut [Thu, 8 Oct 2020 13:14:58 +0000 (15:14 +0200)]
ARM: dts: stm32: Do not set eth1addr if KS8851 has EEPROM
In case the KS8851 has external EEPROM attached to it, do not set
eth1addr at all. The network stack will read the MAC out of the
KS8851 and set eth1addr accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 4 Sep 2020 10:55:19 +0000 (12:55 +0200)]
stm32mp: limit size of cacheable DDR in pre-reloc stage
In pre-reloc stage, U-Boot marks cacheable the DDR limited by
the new config CONFIG_DDR_CACHEABLE_SIZE.
This patch allows to avoid any speculative access to DDR protected by
firewall and used by OP-TEE; the "no-map" reserved memory
node in DT are assumed after this limit:
STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
Without security, in basic boot, the value is equal to STM32_DDR_SIZE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Alexandru Gagniuc [Wed, 9 Sep 2020 21:54:02 +0000 (16:54 -0500)]
mmc: stm32_sdmmc2: Use mmc_of_parse() to read host capabilities
mmc_of_parse() can populate the 'f_max' and 'host_caps' fields of
struct mmc_config from devicetree.
The same logic is duplicated in stm32_sdmmc2_probe(). Use
mmc_of_parse(), which is more generic.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Alexandru Gagniuc [Tue, 15 Sep 2020 19:51:46 +0000 (14:51 -0500)]
mmc: mmc_of_parse: Enable 52 MHz support with "cap-mmc-highspeed"
"cap-mmc-highspeed" enables support for 26 MHz MMC, but there is no
additional flag to enable 52 MHz MMC. In Linux. "cap-mmc-highspeed"
is used for MMC HS at both 26MHz and 52MHz.
Use the same approach and enable MMC_CAP(MMC_HS_52) host capability
when "cap-mmc-highspeed" is found in the devicetree. In the event an
MMC card doesn't support 52 MHz, it will be clocked at a speed based
on its EXT CSD, even on 52 MHz host controllers
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Tom Rini [Mon, 19 Oct 2020 13:29:05 +0000 (09:29 -0400)]
Merge tag 'u-boot-atmel-2021.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
Second set of u-boot-atmel features for 2021.01 cycle:
This feature set brings the rework of the clock tree for sam9x60 SoC.
This makes the clock tree fully compatible with Common Clock Framework
and allows full clock configuration in U-Boot. This means that the
sam9x60 boards can boot now using U-Boot.
This also includes the definitions for sam9x60 SiPs and a divisor fix
for the clock on sama7g5 SoC.
Eugen Hristev [Wed, 1 Jul 2020 07:44:21 +0000 (10:44 +0300)]
clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics
This SoC has the 5th divisor for the mck0 master clock.
Adapt the characteristics accordingly.
Reported-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Eugen Hristev [Wed, 1 Jul 2020 07:42:58 +0000 (10:42 +0300)]
clk: at91: clk-master: add 5th divisor for mck master
clk-master can have 5 divisors with a field width of 3 bits
on some products.
Change the mask and number of divisors accordingly.
Reported-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Nicolas Ferre [Wed, 7 Oct 2020 14:53:44 +0000 (16:53 +0200)]
ARM: at91: Add chip ID for SAM9X60 SiP
SAM9X60 SiP (System in Package) are added for SoC identification.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Claudiu Beznea [Wed, 7 Oct 2020 15:17:14 +0000 (18:17 +0300)]
ARM: dts: sam9x60: use alphabetical order
Use alphabetical order for entries in sam9x60ek-u-boot.dtsi
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Claudiu Beznea [Wed, 7 Oct 2020 15:17:13 +0000 (18:17 +0300)]
configs: sam9x60ek: update defconfigs for CCF
Update defconfigs for using common clock framework compatible
clocks.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Claudiu Beznea [Wed, 7 Oct 2020 15:17:12 +0000 (18:17 +0300)]
ARM: dts: sam9x60: use CCF compatibles for PMC
Use CCF compatible for PMC. With this, the board/SoC will be
able to boot.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Claudiu Beznea [Wed, 7 Oct 2020 15:17:11 +0000 (18:17 +0300)]
ARM: dts: sam9x60: use slow clock CCF compatible bindings
Use slow clock CCF compatible DT bindings. This will not break
the above functionality as the SoC is not booting with current
PMC bindings.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Claudiu Beznea [Wed, 7 Oct 2020 15:17:10 +0000 (18:17 +0300)]
ARM: dts: sam9x60: use u-boot,dm-pre-reloc
Use u-boot,dm-pre-reloc for slow xtal and main xtal.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Claudiu Beznea [Wed, 7 Oct 2020 15:17:09 +0000 (18:17 +0300)]
ARM: dts: sam9x60ek: add clock frequencies to board file
Slow Xtal and Main Xtal are board specific. Add their proper
frequency to board file.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Claudiu Beznea [Wed, 7 Oct 2020 15:17:08 +0000 (18:17 +0300)]
clk: at91: sam9x60: add support compatible with CCF
Add SAM9X60 clock support compatible with CCF.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Claudiu Beznea [Wed, 7 Oct 2020 15:17:07 +0000 (18:17 +0300)]
board: atmel: sam9x60ek: add SYS_MALLOC_F_LEN to SYS_INIT_SP_ADDR
Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tom Rini [Mon, 19 Oct 2020 01:19:06 +0000 (21:19 -0400)]
Merge tag 'video-for-2021.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-video
- add dw-mipi-dsi phy timings and Tx escape clock configuration
- fix pwm backlight duty cycle calculation
- migrate CONFIG_VIDEO_BMP_* and CONFIG_BMP_* to Kconfig
Patrick Delaunay [Mon, 28 Sep 2020 09:30:16 +0000 (11:30 +0200)]
configs: migrate CONFIG_BMP_16/24/32BPP to defconfigs
Done with:
./tools/moveconfig.py BMP_16BPP BMP_24BPP BMP_32BPP
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 28 Sep 2020 09:30:15 +0000 (11:30 +0200)]
configs: migrate CONFIG_VIDEO_BMP_RLE8 to defconfigs
Done with:
./tools/moveconfig.py VIDEO_BMP_RLE8
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 28 Sep 2020 09:30:14 +0000 (11:30 +0200)]
configs: migrate CONFIG_VIDEO_BMP_GZIP to defconfigs
Done with:
./tools/moveconfig.py VIDEO_BMP_GZIP
The 3 suspicious migration because CMD_BMP and SPLASH_SCREEN
are not activated in these defconfigs:
- trats_defconfig
- s5pc210_universal_defconfig
- trats2_defconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dario Binacchi [Sun, 11 Oct 2020 12:28:04 +0000 (14:28 +0200)]
video: backlight: fix pwm's duty cycle calculation
For levels equal to the maximum value, the duty cycle must be equal to
the period.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dario Binacchi [Sun, 11 Oct 2020 12:28:03 +0000 (14:28 +0200)]
video: backlight: fix pwm data structure description
The description of the 'max_level' field was incorrectly assigned to the
'min_level' field.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Neil Armstrong [Fri, 2 Oct 2020 09:16:09 +0000 (11:16 +0200)]
video: dw-mipi-dsi: permit configuring the escape clock rate
The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency
higher than 10MHz for the TX Escape Clock, thus make the target rate
configurable.
This is based on the Linux commit [1] and adapted to the U-Boot driver.
[1]
a328ca7e4af3 ("drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 2 Oct 2020 09:16:08 +0000 (11:16 +0200)]
video: dw-mipi-dsi: driver-specific configuration of phy timings
The timing values for dw-dsi are often dependent on the used display and
according to Philippe Cornu will most likely also depend on the used phy
technology in the soc-specific implementation.
To solve this and allow specific implementations to define them as needed
add a new get_timing callback to phy_ops and call this from the dphy_timing
function to retrieve the necessary values for the specific mode.
This is based on the Linux commit [1] and adapted to the U-Boot driver.
[1]
25ed8aeb9c39 ("drm/bridge/synopsys: dsi: driver-specific configuration of phy timings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Sean Anderson [Tue, 13 Oct 2020 19:20:52 +0000 (15:20 -0400)]
test: Fix sandbox tests failing to build
syslog_test.h is in test/log/, not include/
Fixes:
52d3df7fef ("log: Allow LOG_DEBUG to always enable log output")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 16 Oct 2020 13:56:15 +0000 (09:56 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Fix Octeon SPI driver for Octeon TX2
- Fix and enhance Octeon watchdog driver
- Misc minor enhancements to Octeon TX/TX2
Tom Rini [Fri, 16 Oct 2020 13:44:51 +0000 (09:44 -0400)]
Merge branch '2020-10-15-further-cleanup_dev_xxx'
- Bring in the next round of dev_xxx cleanup patches.
Sean Anderson [Mon, 5 Oct 2020 01:39:57 +0000 (21:39 -0400)]
dm: Don't undefine dev_xxx macros
Now that linux/compat.h does not define these macros, we do not need to
undefine them.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 5 Oct 2020 01:39:56 +0000 (21:39 -0400)]
linux/compat.h: Remove redefinition of dev_xxx macros
All users of these functions now include dm/device_compat.h directly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 16 Oct 2020 12:41:37 +0000 (08:41 -0400)]
usb: dwc3: Include device_compat.h in dwc3-octeon-glue.c
Necessary for dev_xxx.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 16 Oct 2020 01:44:43 +0000 (21:44 -0400)]
clk: at91: Include device_compat.h in compat.c
Necessary for dev_xxx.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 16 Oct 2020 01:44:15 +0000 (21:44 -0400)]
arm: fsl-layerscape: Include device_compat.h in soc.c
Necessary for dev_xxx.
Signed-off-by: Tom Rini <trini@konsulko.com>
Sean Anderson [Mon, 5 Oct 2020 01:39:55 +0000 (21:39 -0400)]
usb: musb-new: mt85xx: Fix not calling dev_err with a device
This driver doesn't use DM (in the correct places), so we use a device and
not a udevice. We also need to include device_compat.h
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson [Mon, 5 Oct 2020 01:39:54 +0000 (21:39 -0400)]
usb: musb-new: Include device_compat.h
This was included, but was ifdef'd out. We also need dm.h for struct
udevice.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson [Mon, 5 Oct 2020 01:39:53 +0000 (21:39 -0400)]
usb: xhci: Include device_compat.h
This header is necessary for the dev_xxx macros.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson [Mon, 5 Oct 2020 01:39:52 +0000 (21:39 -0400)]
timer: Include device_compat.h
Necessary for dev_xxx.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 5 Oct 2020 01:39:51 +0000 (21:39 -0400)]
tee: optee: Include device_compat.h
Necessary for dev_xxx.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 5 Oct 2020 01:39:50 +0000 (21:39 -0400)]
spi: fsl_qspi: Include device_compat.h
Necessary for dev_xxx.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson [Mon, 5 Oct 2020 01:39:49 +0000 (21:39 -0400)]
spi: nxp_fspi: Include device_compat.h
Necessary for dev_xxx.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Stefan Roese [Wed, 23 Sep 2020 09:01:32 +0000 (11:01 +0200)]
arm: octeontx: Add CMD_WDT
Enable WDT command for Octeon TX/TX2 boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Suneel Garapati [Wed, 23 Sep 2020 09:01:31 +0000 (11:01 +0200)]
watchdog: octeontx_wdt: Add support for start and stop
This patch enhances the Octeon TX/TX2 watchdog driver to fully enable
the WDT. With this changes, the "wdt" command is now also supported
on these platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Stefan Roese [Wed, 23 Sep 2020 09:01:30 +0000 (11:01 +0200)]
arm: octeontx: Select CLK
Clock support is needed for all Octeon TX/TX2 boards. This patch selects
CONFIG_CLK so that it is available.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Stefan Roese [Wed, 23 Sep 2020 09:01:29 +0000 (11:01 +0200)]
mmc: octeontx_hsmmc.c: Remove test debug message
Remove a left-over debug test message from the Octeon TX / TX2
MMC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Stefan Roese [Wed, 5 Aug 2020 13:07:30 +0000 (15:07 +0200)]
spi: octeon_spi: Use a fixed 100MHz input clock on Octeon TX2
Octeon TX2 sets the TB100_EN bit in the config register. We need to use
a fixed 100MHz clock for this as well to work properly.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Sean Anderson [Mon, 5 Oct 2020 01:39:48 +0000 (21:39 -0400)]
ram: imxrt: Include device_compat.h
Necessary for dev_xxx.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson [Mon, 5 Oct 2020 01:39:47 +0000 (21:39 -0400)]
phy: Include device_compat.h
Necessary for dev_xxx.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson [Mon, 5 Oct 2020 01:39:46 +0000 (21:39 -0400)]
net: ldpaa_eth: Include device_compat.h
Necessary for dev_xxx.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson [Mon, 5 Oct 2020 01:39:45 +0000 (21:39 -0400)]
mtd: mxs_nand: Fix not calling dev_xxx with a device
This includes device_compat.h, and fixes several calls to dev_xxx.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson [Mon, 5 Oct 2020 01:39:44 +0000 (21:39 -0400)]
firmware: scmi: Include device_compat.h
This header is necessary for the dev_xxx macros.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 5 Oct 2020 01:39:43 +0000 (21:39 -0400)]
dm: syscon: Set LOG_CATEGORY
We call log_debug, but do not have a category set.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 5 Oct 2020 01:39:42 +0000 (21:39 -0400)]
clk: sifive: Include device_compat.h
Necessary for dev_xxx.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tom Rini [Thu, 15 Oct 2020 12:20:42 +0000 (08:20 -0400)]
Merge tag 'mmc-2020-10-14' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- fsl_esdhc_imx cleanup
- not send cm13 if send_status is 0.
- Add reinit API
- Add mmc HS400 for fsl_esdhc
- Several cleanup for fsl_esdhc
- Add ADMA2 for sdhci
Tom Rini [Wed, 14 Oct 2020 17:51:56 +0000 (13:51 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Octeon TX: Add NAND driver (Suneel)
- Octeon TX: Add NIC driver driver (Suneel)
- Octeon TX2: Add NIC driver driver (Suneel)
- Armada 8040: Add iEi Puzzle-M80 board support (Luka)
- Armada A37xx SPI: Add support for CS-GPIO (George)
- Espressobin: Use Linux model/compatible strings (Andre)
- Espressobin: Add armada-3720-espressobin-emmc.dts from Linux (Andre)
- Armada A37xx: Small cleanup of config header (Pali)
Tom Rini [Wed, 14 Oct 2020 17:35:05 +0000 (13:35 -0400)]
Merge branch '2020-10-14-assorted-changes'
- Add support for Linux "pstore" dumps.
- Button command fixup.
- gd cleanup and documentation.
- Assorted other cleanups.
Heinrich Schuchardt [Tue, 6 Oct 2020 15:56:59 +0000 (17:56 +0200)]
doc: Sphinx.override_domain() deprecated
Sphinx.override_domain() is deprecated since Sphinx 1.8 and removed in
Sphinx 3.
Use Sphinx.add_domain(, override=True) instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Christian Gmeiner [Tue, 6 Oct 2020 14:08:35 +0000 (16:08 +0200)]
net: e1000: add defaults for i210 TX/RX PBSIZE
Set the defaults on probe for the packet buffer size registers
for the i210.
The TX/RX PBSIZE register of the i210 resets to its default value
only at power-on - see Intel Ethernet Controller I210 Datasheet rev 3.5
chapter 8.3 'Internal Packet Buffer Size Registers'.
If something (another driver, another OS, etc.) modifies this register
from its default value, the e1000 driver doesn't function correctly. It
detects a hang of the transmitter and continuously resets the adapter.
Here we set this value to its default when resetting the i210 to
resolve this issue.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Alper Nebi Yasak [Mon, 5 Oct 2020 06:57:30 +0000 (09:57 +0300)]
checkpatch.pl: Make CONFIG_IS_ENABLED(CONFIG_*) an error
CONFIG_IS_ENABLED() takes the kconfig name without the CONFIG_ prefix,
e.g. CONFIG_IS_ENABLED(CLK) for CONFIG_CLK. Make including the prefix
an error in checkpatch.pl so calls in the wrong format aren't
accidentally reintroduced.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alper Nebi Yasak [Mon, 5 Oct 2020 06:57:29 +0000 (09:57 +0300)]
treewide: Fix wrong CONFIG_IS_ENABLED() handling
CONFIG_IS_ENABLED() takes the kconfig name without the CONFIG_ prefix,
e.g. CONFIG_IS_ENABLED(CLK) for CONFIG_CLK. Some of these were being
fixed every now and then, see:
commit
71ba2cb0d678 ("board: stm32mp1: correct CONFIG_IS_ENABLED usage for LED")
commit
a5ada25e4213 ("rockchip: clk: fix wrong CONFIG_IS_ENABLED handling")
commit
5daf6e56d36c ("common: console: Fix duplicated CONFIG in silent env callback")
commit
48bfc31b6484 ("MIPS: bootm: Fix broken boot_env_legacy codepath")
Fix all files found by `git grep "CONFIG_IS_ENABLED(CONFIG"` by running
':%s/CONFIG_IS_ENABLED(CONFIG_\(\w+\))/CONFIG_IS_ENABLED(\1)/g' in vim.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 5 Oct 2020 06:30:10 +0000 (08:30 +0200)]
doc: global data pointer
Add the description of the global data pointer to the generated HTML
documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 5 Oct 2020 06:30:09 +0000 (08:30 +0200)]
global_data.h: add Sphinx documentation
Add the missing Sphinx documentation for struct global_data and
gd_board_type().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 5 Oct 2020 06:30:08 +0000 (08:30 +0200)]
global_data.h: convert GD_FLG_* to enum
Sphinx documentation is only available for enums not for #defines.
Anyway it is better to keep related definitions in an enum.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 14 Sep 2020 23:58:11 +0000 (01:58 +0200)]
bootm: add {arch,board}_preboot_os() to bootm.h
Functions that are used in multiple C modules should be defined in an
include.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Michael Walle <michael@walle.cc>
Sean Anderson [Wed, 9 Sep 2020 20:24:56 +0000 (16:24 -0400)]
time: Fix get_ticks being non-monotonic
get_ticks does not always succeed. Sometimes it can be called before the
timer has been initialized. If it does, it returns a negative errno.
This causes the timer to appear non-monotonic, because the value will
become much smaller after the timer is initialized.
No users of get_ticks which I checked handle errors of this kind. Further,
functions like tick_to_time mangle the result of get_ticks, making it very
unlikely that one could check for an error without suggesting a patch such
as this one.
This patch panics if we ever get an error. There are two cases in which
this can occur. The first is if we couldn't find/probe the timer for some
reason. One reason for this is if the timer is not available so early. This
likely indicates misconfiguration. Another reason is that the timer has an
invalid/missing device tree binding. In this case, panicing is also
correct. The second case covers errors calling get_count. This can only
occur if the timer is missing a get_count function (or on RISC-V, but that
should be fixed soon).
Fixes:
c8a7ba9e6a5
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Otavio Salvador [Wed, 30 Sep 2020 02:14:29 +0000 (23:14 -0300)]
spl: Add SPL_SERIAL as requirement for SDP_USB_SDP
The USB SDP protocol require the SPL serial support to allow the build
to succeed.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Otavio Salvador [Thu, 3 Sep 2020 17:25:15 +0000 (14:25 -0300)]
spl: Avoid printing boot device if silent console is enabled
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
David Woodhouse [Tue, 4 Aug 2020 09:05:47 +0000 (10:05 +0100)]
env/ext4.c: allow loading from an EXT4 partition on the MMC boot device
This parallels what I added for FAT in commit
6731bef6966, allowing the
environment to be found in a specific partition on the device that the
board's mmc_get_env_dev() returns. On the Banana Pi R2 that means the
device that U-Boot was loaded from; either the internal eMMC or an SD
card.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
David Woodhouse [Tue, 4 Aug 2020 09:05:46 +0000 (10:05 +0100)]
mmc: remove duplicate mmc_get_env_dev() implementations
Since it's so trivial I could just about tolerate this when there were only
two copies of it. But now there are about to be three.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Heinrich Schuchardt [Sat, 19 Sep 2020 05:55:35 +0000 (07:55 +0200)]
arm: enable DM_RNG on QEMU by default
The EFI_RNG_PROTOCOL is needed for address randomization in Linux.
We should provide it by default on QEMU.
Reported-by: François Ozog <francois.ozog@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Mon, 14 Sep 2020 10:50:56 +0000 (12:50 +0200)]
cmd/button: return button status
To make the button command useful in a shell script it should return the
status of the button:
* 0 (true) - pressed, on
* 1 (false) - not pressed, off
The button command takes only one argument. Correct maxargs.
Adjust the Python unit test.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Heinrich Schuchardt [Mon, 14 Sep 2020 10:50:55 +0000 (12:50 +0200)]
drivers: gpio: keep output value for input on sandbox
For testing purposes keep the output value when switching to input.
This allows us to manipulate the input value via the gpio command.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Heinrich Schuchardt [Mon, 14 Sep 2020 10:50:54 +0000 (12:50 +0200)]
test: sharpen button label unit test
Using different strings for the device tree node labels and the label
property of buttons sharpens the button label unit test.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Frédéric Danis [Fri, 20 Mar 2020 09:59:24 +0000 (10:59 +0100)]
cmd: Fixup DT to pass PStore Ramoops parameters
To simplify configuration and keep synchronized the PStore/Ramoops between
U-Boot and the Linux kernel, this commit dynamically adds the Ramoops
parameters defined in the U-Boot session to the Device Tree.
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Frédéric Danis [Fri, 20 Mar 2020 09:59:23 +0000 (10:59 +0100)]
test: Add PStore command tests
Add PStore command to sandbox and sandbox64 defconfigs.
Add test checking:
- 'pstore display' of all records
- 'pstore display' only the 2nd dump record
- 'pstore save' of all records
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
[trini: Adjust to always load files from source directory]
Signed-off-by: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Frédéric Danis [Fri, 20 Mar 2020 09:59:22 +0000 (10:59 +0100)]
cmd: Add command to display or save Linux PStore dumps
This patch adds a new pstore command allowing to display or save ramoops
logs (oops, panic, console, ftrace and user) generated by a previous
kernel crash.
PStore parameters can be set in U-Boot configuration file, or at run-time
using "pstore set" command. Records size should be the same as the ones
used by kernel, and should be a power of 2.
This command allows:
- to display uncompressed logs
- to save compressed or uncompressed logs, compressed logs are saved as a
compressed stream, it may need some work to be able to decompress it,
e.g. adding a fake header:
"printf "\x1f\x8b\x08\x00\x00\x00\x00\x00\x00\x00" |
cat - dmesg-ramoops-0.enc.z | gzip -dc"
- ECC part is not used to check memory corruption
- only 1st FTrace log is displayed or saved
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
[trini: Minor updates for current design, correct spacing in rST]
Signed-off-by: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Michael Walle [Mon, 12 Oct 2020 08:07:14 +0000 (10:07 +0200)]
mmc: fsl_esdhc: add ADMA2 support
Newer eSDHC controllers support ADMA2 descriptor tables which support
64bit DMA addresses. One notable user of addresses in the upper memory
segment is the EFI loader.
If support is enabled, but the controller doesn't support ADMA2, we
will fall back to SDMA (and thus 32 bit DMA addresses only).
Signed-off-by: Michael Walle <michael@walle.cc>
Michael Walle [Mon, 12 Oct 2020 08:07:13 +0000 (10:07 +0200)]
mmc: fsl_esdhc: replace most #ifdefs by IS_ENABLED()
Make the code cleaner and drop the old-style #ifdef constructs where it is
possible.
Signed-off-by: Michael Walle <michael@walle.cc>
Pali Rohár [Mon, 5 Oct 2020 10:17:15 +0000 (12:17 +0200)]
arm: mvebu: Remove old comments from configs/mvebu_armada-37xx.h file
These comments are relict for old, now removed config options.
So remove these obsoleted comments too.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Andre Heider [Fri, 4 Sep 2020 15:33:54 +0000 (17:33 +0200)]
arm64: dts: a3720: add support for espressobin with populated emmc
Import armada-3720-espressobin-emmc.dts from Linux, but use sdhc1 for
emmc, since our dtsi is still based on downstream and sdhc0 is used for
the sd card.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Andre Heider [Fri, 4 Sep 2020 15:33:53 +0000 (17:33 +0200)]
arm64: dts: armada-3720-espressobin: split common parts to .dtsi
Move most of the dts to the new common armada-3720-espressobin.dtsi
file, just like Linux, but keep the current, downstream based, version.
The dts itself is imported from Linux.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Andre Heider [Fri, 2 Oct 2020 05:51:12 +0000 (07:51 +0200)]
arm64: dts: armada-3720-espressobin: use Linux model/compatible strings
Fix the actual board vendor and ease synching dts files from Linux.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
George Hilliard [Wed, 30 Sep 2020 14:28:21 +0000 (09:28 -0500)]
spi: mvebu_a3700_spi: add support for cs-gpios
The device tree has a way to specify GPIO lines as chip selects. From
the binding docs:
So if for example the controller has 2 CS lines, and the cs-gpios
property looks like this:
cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;
Then it should be configured so that num_chipselect = 4 with the
following mapping:
cs0 : &gpio1 0 0
cs1 : native
cs2 : &gpio1 1 0
cs3 : &gpio1 2 0
Add support for this, while retaining backward-compatibility with
existing device trees; the driver will preserve existing behavior if a
cs-gpios list is not given, or if a particular line is specified as <0>
(native).
This implementation is inspired by similar implementations in
neighboring drivers for other platforms: atmega, mxc, etc.
Signed-off-by: George Hilliard <ghilliar@amazon.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Luka Kovacic [Fri, 28 Aug 2020 22:35:51 +0000 (00:35 +0200)]
arm: mvebu: mvebu_armada-8k: Add support for initializing iEi Puzzle-M801 networking
Add support for the marvell,armada8040-puzzle-m801 compatible string
in the board/Marvell/mvebu_armada-8k/board.c file to initialize the
networking on iEi Puzzle-M801 board (2x CP1 1 Gb ports).
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Luka Kovacic [Fri, 28 Aug 2020 22:35:50 +0000 (00:35 +0200)]
arm: mvebu: Initial iEi Puzzle-M801 support
Add initial U-Boot support for the iEi Puzzle-M801 board based on the
Marvell Armada 88F8040 SoC.
Currently supported hardware:
1x USB 3.0
4x Gigabit Ethernet
2x SFP+ (with NXP PCA9555 and NXP PCA9544)
1x SATA 3.0
1x M.2 type B
1x RJ45 UART
1x SPI flash
1x EPSON RX8010 RTC
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Suneel Garapati [Wed, 26 Aug 2020 12:37:42 +0000 (14:37 +0200)]
net: Add NIC controller driver for OcteonTX2
Adds support for Network Interface controllers found on
OcteonTX2 SoC platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Suneel Garapati [Wed, 26 Aug 2020 12:37:33 +0000 (14:37 +0200)]
net: Add NIC controller driver for OcteonTX
Adds support for Network Interface controllers found on
OcteonTX SoC platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Suneel Garapati [Wed, 26 Aug 2020 12:37:22 +0000 (14:37 +0200)]
mtd: nand: Add NAND controller driver for OcteonTX
Adds support for NAND controllers found on OcteonTX or
OcteonTX2 SoC platforms. Also includes driver to support
Hardware ECC using BCH HW engine found on these platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Tue, 13 Oct 2020 14:04:17 +0000 (10:04 -0400)]
Merge branch '2020-10-12-assorted-encryption-changes'
- Fix verified boot on BE targets
- Add support for multiple required keys in verified boots
- Add support for Initialization Vectors in AES keys in FIT images
- Assorted fixes in the RSA code
Heinrich Schuchardt [Thu, 8 Oct 2020 18:53:13 +0000 (20:53 +0200)]
lib: rsa: superfluous initialization in rsa_verify()
Remove initialization of ret with unused value.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rasmus Villemoes [Tue, 6 Oct 2020 10:09:45 +0000 (12:09 +0200)]
rsa: fix retrieving public exponent on big-endian systems
Commit
fdf0819afb (rsa: fix alignment issue when getting public
exponent) changed the logic to avoid doing an 8-byte access to a
possibly-not-8-byte-aligned address.
However, using rsa_convert_big_endian is wrong: That function converts
an array of big-endian (32-bit) words with the most significant word
first (aka a BE byte array) to an array of cpu-endian words with the
least significant word first. While the exponent is indeed _stored_ as
a big-endian 64-bit word (two BE words with MSW first), we want to
extract it as a cpu-endian 64 bit word. On a little-endian host,
swapping the words and byte-swapping each 32-bit word works, because
that's the same as byte-swapping the whole 64 bit word. But on a
big-endian host, the fdt32_to_cpu are no-ops, but
rsa_convert_big_endian() still does the word-swapping, breaking
verified boot.
To fix that, while still ensuring we don't do unaligned accesses, add
a little helper that first memcpy's the bytes to a local fdt64_t, then
applies fdt64_to_cpu(). [The name is chosen based on the
[bl]eXX_to_cpup in linux/byteorder/generic.h].
Fixes:
fdf0819afb ("rsa: fix alignment issue when getting public exponent")
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Matthieu CASTET [Wed, 23 Sep 2020 17:11:44 +0000 (19:11 +0200)]
lib: rsa: check algo match in rsa_verify_with_keynode
The algo name should match between the FIT's signature node and the
U-Boot's control FDT.
If we do not check it, U-Boot's control FDT can expect sha512 hash but
nothing will prevent to accept image with sha1 hash if the signature is correct.
Signed-off-by: Matthieu CASTET <castet.matthieu@free.fr>
Philippe Reynes [Thu, 17 Sep 2020 13:01:47 +0000 (15:01 +0200)]
fit: cipher: aes: allow to read the IV in the FIT image
This commit add the support in u-boot to read the IV
in the FIT image instead of u-boot device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 17 Sep 2020 13:01:46 +0000 (15:01 +0200)]
fit: cipher: aes: allow to store the IV in the FIT image
Binaries may be encrypted in a FIT image with AES. This
algo needs a key and an IV (Initialization Vector). The
IV is provided in a file (pointer by iv-name-hint in the
ITS file) when building the ITB file.
This commits adds provide an alternative way to manage
the IV. If the property iv-name-hint is not provided in
the ITS file, the tool mkimage will generate an random
IV and store it in the FIT image.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Heinrich Schuchardt [Thu, 20 Aug 2020 17:57:45 +0000 (19:57 +0200)]
lib/hashtable: remove superfluous check
We assign first_deleted = 0. There is no need to check its value without
any further assignment in between.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>