platform/kernel/linux-rpi.git
3 years agocomedi: dt9812: fix DMA buffers on stack
Johan Hovold [Wed, 27 Oct 2021 09:35:29 +0000 (11:35 +0200)]
comedi: dt9812: fix DMA buffers on stack

USB transfer buffers are typically mapped for DMA and must not be
allocated on the stack or transfers will fail.

Allocate proper transfer buffers in the various command helpers and
return an error on short transfers instead of acting on random stack
data.

Note that this also fixes a stack info leak on systems where DMA is not
used as 32 bytes are always sent to the device regardless of how short
the command is.

Fixes: 63274cd7d38a ("Staging: comedi: add usb dt9812 driver")
Cc: stable@vger.kernel.org # 2.6.29
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Johan Hovold <johan@kernel.org>
Link: https://lore.kernel.org/r/20211027093529.30896-3-johan@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocomedi: ni_usb6501: fix NULL-deref in command paths
Johan Hovold [Wed, 27 Oct 2021 09:35:28 +0000 (11:35 +0200)]
comedi: ni_usb6501: fix NULL-deref in command paths

The driver uses endpoint-sized USB transfer buffers but had no sanity
checks on the sizes. This can lead to zero-size-pointer dereferences or
overflowed transfer buffers in ni6501_port_command() and
ni6501_counter_command() if a (malicious) device has smaller max-packet
sizes than expected (or when doing descriptor fuzz testing).

Add the missing sanity checks to probe().

Fixes: a03bb00e50ab ("staging: comedi: add NI USB-6501 support")
Cc: stable@vger.kernel.org # 3.18
Cc: Luca Ellero <luca.ellero@brickedbrain.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Johan Hovold <johan@kernel.org>
Link: https://lore.kernel.org/r/20211027093529.30896-2-johan@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agoMerge tag 'coresight-next-v5.16.v3' of gitolite.kernel.org:pub/scm/linux/kernel/git...
Greg Kroah-Hartman [Sat, 30 Oct 2021 08:48:32 +0000 (10:48 +0200)]
Merge tag 'coresight-next-v5.16.v3' of gitolite.pub/scm/linux/kernel/git/coresight/linux into char-misc-next

Mathieu writes:

Coresight changes for v5.16

- A new option to make coresight cpu-debug capabilities available as early
as possible in the kernel boot process.

- Make trace sessions more enduring by coping with scenarios where events
are scheduled on CPUs that can't reach the selected sink.

- A set of improvement to make the TMC-ETR driver more efficient.

- Enhancements to the TRBE driver to correct several errata.

- An enhancement to make the AXI burts size configurable for TMC devices
that can't work with the default value.

- A fix in the CTI module to use the correct device when calling
pm_runtime_put()

- The addition of the Kryo-5xx device to the list of support ETMs.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
* tag 'coresight-next-v5.16.v3' of gitolite.kernel.org:pub/scm/linux/kernel/git/coresight/linux: (39 commits)
  arm64: errata: Enable TRBE workaround for write to out-of-range address
  arm64: errata: Enable workaround for TRBE overwrite in FILL mode
  coresight: trbe: Work around write to out of range
  coresight: trbe: Make sure we have enough space
  coresight: trbe: Add a helper to determine the minimum buffer size
  coresight: trbe: Workaround TRBE errata overwrite in FILL mode
  coresight: trbe: Add infrastructure for Errata handling
  coresight: trbe: Allow driver to choose a different alignment
  coresight: trbe: Decouple buffer base from the hardware base
  coresight: trbe: Add a helper to pad a given buffer area
  coresight: trbe: Add a helper to calculate the trace generated
  coresight: trbe: Defer the probe on offline CPUs
  coresight: trbe: Fix incorrect access of the sink specific data
  coresight: etm4x: Add ETM PID for Kryo-5XX
  coresight: trbe: Prohibit trace before disabling TRBE
  coresight: trbe: End the AUX handle on truncation
  coresight: trbe: Do not truncate buffer on IRQ
  coresight: trbe: Fix handling of spurious interrupts
  coresight: trbe: irq handler: Do not disable TRBE if no action is needed
  coresight: trbe: Unify the enabling sequence
  ...

3 years agoarm64: errata: Enable TRBE workaround for write to out-of-range address
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:53 +0000 (17:31 +0100)]
arm64: errata: Enable TRBE workaround for write to out-of-range address

With the TRBE driver workaround available, enable the config symbols
to be built without COMPILE_TEST

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-16-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agoarm64: errata: Enable workaround for TRBE overwrite in FILL mode
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:52 +0000 (17:31 +0100)]
arm64: errata: Enable workaround for TRBE overwrite in FILL mode

With the workaround enabled in TRBE, enable the config entries
to be built without COMPILE_TEST

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-15-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Work around write to out of range
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:51 +0000 (17:31 +0100)]
coresight: trbe: Work around write to out of range

TRBE implementations affected by Arm erratum (2253138 or 2224489), could
write to the next address after the TRBLIMITR.LIMIT, instead of wrapping
to the TRBBASER. This implies that the TRBE could potentially corrupt :

  - A page used by the rest of the kernel/user (if the LIMIT = end of
    perf ring buffer)
  - A page within the ring buffer, but outside the driver's range.
    [head, head + size]. This may contain some trace data, may be
    consumed by the userspace.

We workaround this erratum by :
  - Making sure that there is at least an extra PAGE space left in the
    TRBE's range than we normally assign. This will be additional to other
    restrictions (e.g, the TRBE alignment for working around
    TRBE_WORKAROUND_OVERWRITE_IN_FILL_MODE, where there is a minimum of
    PAGE_SIZE. Thus we would have 2 * PAGE_SIZE)

  - Adjust the LIMIT to leave the last PAGE_SIZE out of the TRBE's allowed
    range (i.e, TRBEBASER...TRBLIMITR.LIMIT), by :

        TRBLIMITR.LIMIT -= PAGE_SIZE

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-14-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Make sure we have enough space
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:50 +0000 (17:31 +0100)]
coresight: trbe: Make sure we have enough space

The TRBE driver makes sure that there is enough space for a meaningful
run, otherwise pads the given space and restarts the offset calculation
once. But there is no guarantee that we may find space or hit "no space".
Make sure that we repeat the step until, either :
  - We have the minimum space
   OR
  - There is NO space at all.

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-13-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Add a helper to determine the minimum buffer size
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:49 +0000 (17:31 +0100)]
coresight: trbe: Add a helper to determine the minimum buffer size

For the TRBE to operate, we need a minimum space available to collect
meaningful trace session. This is currently a few bytes, but we may need
to extend this for working around errata. So, abstract this into a helper
function.

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-12-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Workaround TRBE errata overwrite in FILL mode
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:48 +0000 (17:31 +0100)]
coresight: trbe: Workaround TRBE errata overwrite in FILL mode

ARM Neoverse-N2 (#2139208) and Cortex-A710(##2119858) suffers from
an erratum, which when triggered, might cause the TRBE to overwrite
the trace data already collected in FILL mode, in the event of a WRAP.
i.e, the TRBE doesn't stop writing the data, instead wraps to the base
and could write upto 3 cache line size worth trace. Thus, this could
corrupt the trace at the "BASE" pointer.

The workaround is to program the write pointer 256bytes from the
base, such that if the erratum is triggered, it doesn't overwrite
the trace data that was captured. This skipped region could be
padded with ignore packets at the end of the session, so that
the decoder sees a continuous buffer with some padding at the
beginning. The trace data written at the base is considered
lost as the limit could have been in the middle of the perf
ring buffer, and jumping to the "base" is not acceptable.
We set the flags already to indicate that some amount of trace
was lost during the FILL event IRQ. So this is fine.

One important change with the work around is, we program the
TRBBASER_EL1 to current page where we are allowed to write.
Otherwise, it could overwrite a region that may be consumed
by the perf. Towards this, we always make sure that the
"handle->head" and thus the trbe_write is PAGE_SIZE aligned,
so that we can set the BASE to the PAGE base and move the
TRBPTR to the 256bytes offset.

Cc: Mike Leach <mike.leach@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-11-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Add infrastructure for Errata handling
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:47 +0000 (17:31 +0100)]
coresight: trbe: Add infrastructure for Errata handling

Add a minimal infrastructure to keep track of the errata
affecting the given TRBE instance. Given that we have
heterogeneous CPUs, we have to manage the list per-TRBE
instance to be able to apply the work around as needed.
Thus we will need to check if individual CPUs are affected
by the erratum.

We rely on the arm64 errata framework for the actual
description and the discovery of a given erratum, to
keep the Erratum work around at a central place and
benefit from the code and the advertisement from the
kernel. Though we could reuse the "this_cpu_has_cap()"
to apply an erratum work around, it is a bit of a heavy
operation, as it must go through the "erratum" detection
check on the CPU every time it is called (e.g, scanning
through a table of affected MIDRs). Since we need
to do this check for every session, may be multiple
times (depending on the wrok around), we could save
the cycles by caching the affected errata per-CPU
instance in the per-CPU struct trbe_cpudata.

Since we are only interested in the errata affecting
the TRBE driver, we only need to track a very few of them
per-CPU.  Thus we use a local mapping of the CPUCAP for the
erratum to avoid bloating up a bitmap for trbe_cpudata.

i.e, each arm64 TRBE erratum bit is assigned a "index"
within the driver to track. Each trbe instance updates
the list of affected erratum at probe time on the CPU.
This makes sure that we can easily access the list of
errata on a given TRBE instance without much overhead.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-10-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Allow driver to choose a different alignment
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:46 +0000 (17:31 +0100)]
coresight: trbe: Allow driver to choose a different alignment

The TRBE hardware mandates a minimum alignment for the TRBPTR_EL1,
advertised via the TRBIDR_EL1. This is used by the driver to
align the buffer write head. This patch allows the driver to
choose a different alignment from that of the hardware, by
decoupling the alignment tracking. This will be useful for
working around errata.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-9-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Decouple buffer base from the hardware base
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:45 +0000 (17:31 +0100)]
coresight: trbe: Decouple buffer base from the hardware base

We always set the TRBBASER_EL1 to the base of the virtual ring
buffer. We are about to change this for working around an erratum.
So, in preparation to that, allow the driver to choose a different
base for the TRBBASER_EL1 (which is within the buffer range).

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-8-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Add a helper to pad a given buffer area
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:44 +0000 (17:31 +0100)]
coresight: trbe: Add a helper to pad a given buffer area

Refactor the helper to pad a given AUX buffer area to allow
"filling" ignore packets, without moving any handle pointers.
This will be useful in working around errata, where we may
have to fill the buffer after a session.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-7-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Add a helper to calculate the trace generated
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:43 +0000 (17:31 +0100)]
coresight: trbe: Add a helper to calculate the trace generated

We collect the trace from the TRBE on FILL event from IRQ context
and via update_buffer(), when the event is stopped. Let us
consolidate how we calculate the trace generated into a helper.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-6-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Defer the probe on offline CPUs
Suzuki K Poulose [Thu, 14 Oct 2021 14:22:38 +0000 (15:22 +0100)]
coresight: trbe: Defer the probe on offline CPUs

If a CPU is offline during the driver init, we could end up causing
a kernel crash trying to register the coresight device for the TRBE
instance. The trbe_cpudata for the TRBE instance is initialized only
when it is probed. Otherwise, we could end up dereferencing a NULL
cpudata->drvdata.

e.g:

[    0.149999] coresight ete0: CPU0: ete v1.1 initialized
[    0.149999] coresight-etm4x ete_1: ETM arch init failed
[    0.149999] coresight-etm4x: probe of ete_1 failed with error -22
[    0.150085] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000050
[    0.150085] Mem abort info:
[    0.150085]   ESR = 0x96000005
[    0.150085]   EC = 0x25: DABT (current EL), IL = 32 bits
[    0.150085]   SET = 0, FnV = 0
[    0.150085]   EA = 0, S1PTW = 0
[    0.150085] Data abort info:
[    0.150085]   ISV = 0, ISS = 0x00000005
[    0.150085]   CM = 0, WnR = 0
[    0.150085] [0000000000000050] user address but active_mm is swapper
[    0.150085] Internal error: Oops: 96000005 [#1] PREEMPT SMP
[    0.150085] Modules linked in:
[    0.150085] Hardware name: FVP Base RevC (DT)
[    0.150085] pstate: 00800009 (nzcv daif -PAN +UAO -TCO BTYPE=--)
[    0.150155] pc : arm_trbe_register_coresight_cpu+0x74/0x144
[    0.150155] lr : arm_trbe_register_coresight_cpu+0x48/0x144
  ...

[    0.150237] Call trace:
[    0.150237]  arm_trbe_register_coresight_cpu+0x74/0x144
[    0.150237]  arm_trbe_device_probe+0x1c0/0x2d8
[    0.150259]  platform_drv_probe+0x94/0xbc
[    0.150259]  really_probe+0x1bc/0x4a8
[    0.150266]  driver_probe_device+0x7c/0xb8
[    0.150266]  device_driver_attach+0x6c/0xac
[    0.150266]  __driver_attach+0xc4/0x148
[    0.150266]  bus_for_each_dev+0x7c/0xc8
[    0.150266]  driver_attach+0x24/0x30
[    0.150266]  bus_add_driver+0x100/0x1e0
[    0.150266]  driver_register+0x78/0x110
[    0.150266]  __platform_driver_register+0x44/0x50
[    0.150266]  arm_trbe_init+0x28/0x84
[    0.150266]  do_one_initcall+0x94/0x2bc
[    0.150266]  do_initcall_level+0xa4/0x158
[    0.150266]  do_initcalls+0x54/0x94
[    0.150319]  do_basic_setup+0x24/0x30
[    0.150319]  kernel_init_freeable+0xe8/0x14c
[    0.150319]  kernel_init+0x14/0x18c
[    0.150319]  ret_from_fork+0x10/0x30
[    0.150319] Code: f94012c8 b0004ce2 9134a442 52819801 (f9402917)
[    0.150319] ---[ end trace d23e0cfe5098535e ]---
[    0.150346] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

Fix this by skipping the step, if we are unable to probe the CPU.

Fixes: 3fbf7f011f24 ("coresight: sink: Add TRBE driver")
Reported-by: Bransilav Rankov <branislav.rankov@arm.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: stable <stable@vger.kernel.org>
Tested-by: Branislav Rankov <branislav.rankov@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20211014142238.2221248-1-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Fix incorrect access of the sink specific data
Suzuki K Poulose [Tue, 21 Sep 2021 13:41:05 +0000 (14:41 +0100)]
coresight: trbe: Fix incorrect access of the sink specific data

The TRBE driver wrongly treats the aux private data as the TRBE driver
specific buffer for a given perf handle, while it is the ETM PMU's
event specific data. Fix this by correcting the instance to use
appropriate helper.

Cc: stable <stable@vger.kernel.org>
Fixes: 3fbf7f011f24 ("coresight: sink: Add TRBE driver")
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20210921134121.2423546-2-suzuki.poulose@arm.com
[Fixed 13 character SHA down to 12]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: etm4x: Add ETM PID for Kryo-5XX
Tao Zhang [Fri, 24 Sep 2021 10:06:20 +0000 (18:06 +0800)]
coresight: etm4x: Add ETM PID for Kryo-5XX

Add ETM PID for Kryo-5XX to the list of supported ETMs.
Otherwise, Kryo-5XX ETMs will not be initialized successfully.
e.g.
This change can be verified on qrb5165-rb5 board. ETM4-ETM7 nodes
will not be visible without this change.

Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Link: https://lore.kernel.org/r/1632477981-13632-2-git-send-email-quic_taozha@quicinc.com
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Prohibit trace before disabling TRBE
Suzuki K Poulose [Thu, 23 Sep 2021 14:39:19 +0000 (15:39 +0100)]
coresight: trbe: Prohibit trace before disabling TRBE

When the TRBE generates an IRQ, we stop the TRBE, collect the trace
and then reprogram the TRBE with the updated buffer pointers, whenever
possible. We might also leave the TRBE disabled, if there is not
enough space left in the buffer. However, we do not touch the ETE at
all during all of this. This means the ETE is only disabled when
the event is disabled later (via irq_work). This is incorrect, as the
ETE trace is still ON without actually being captured and may be routed
to the ATB (even if it is for a short duration).

So, we move the CPU into trace prohibited state always before disabling
the TRBE, upon entering the IRQ handler. The state is restored if the
TRBE is enabled back. Otherwise the trace remains prohibited.

Since, the ETM/ETE driver now controls the TRFCR_EL1 per session, the
tracing can be restored/enabled back when the event is rescheduled
in.

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210923143919.2944311-6-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: End the AUX handle on truncation
Suzuki K Poulose [Thu, 23 Sep 2021 14:39:18 +0000 (15:39 +0100)]
coresight: trbe: End the AUX handle on truncation

When we detect that there isn't enough space left to start a meaningful
session, we disable the TRBE, marking the buffer as TRUNCATED. But we delay
the notification to the perf layer by perf_aux_output_end() until the event
is scheduled out, triggered from the kernel perf layer. This will cause
significant black outs in the trace. Now that the CoreSight PMU layer can
handle a closed "AUX" handle properly, we can close the handle as soon as
we detect the case, allowing the userspace to collect and re-enable the
event.

Also, while in the IRQ handler, move the irq_work_run() after we have
updated the handle, to make sure the "TRUNCATED" flag causes the event to
be disabled as soon as possible.

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210923143919.2944311-5-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Do not truncate buffer on IRQ
Suzuki K Poulose [Thu, 23 Sep 2021 14:39:17 +0000 (15:39 +0100)]
coresight: trbe: Do not truncate buffer on IRQ

The TRBE driver marks the AUX buffer as TRUNCATED when we get an IRQ
on FILL event. This has rather unwanted side-effect of the event
being disabled when there may be more space in the ring buffer.

So, instead of TRUNCATE we need a different flag to indicate
that the trace may have lost a few bytes (i.e from the point of
generating the FILL event until the IRQ is consumed). Anyways, the
userspace must use the size from RECORD_AUX headers to restrict
the "trace" decoding.

Using PARTIAL flag causes the perf tool to generate the
following warning:

  Warning:
  AUX data had gaps in it XX times out of YY!

  Are you running a KVM guest in the background?

which is pointlessly scary for a user. The other remaining options
are :
  - COLLISION - Use by SPE to indicate samples collided
  - Add a new flag - Specifically for CoreSight, doesn't sound
    so good, if we can re-use something.

Given that we don't already use the "COLLISION" flag, the above
behavior can be notified using this flag for CoreSight.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: James Clark <james.clark@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210923143919.2944311-4-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Fix handling of spurious interrupts
Suzuki K Poulose [Thu, 23 Sep 2021 14:39:16 +0000 (15:39 +0100)]
coresight: trbe: Fix handling of spurious interrupts

On a spurious IRQ, right now we disable the TRBE and then re-enable
it back, resetting the "buffer" pointers(i.e BASE, LIMIT and more
importantly WRITE) to the original pointers from the AUX handle.
This implies that we overwrite any trace that was written so far,
(by overwriting TRBPTR) while we should have ignored the IRQ.

On detecting a spurious IRQ after examining the TRBSR we simply
re-enable the TRBE without touching the other parameters.

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210923143919.2944311-3-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: irq handler: Do not disable TRBE if no action is needed
Suzuki K Poulose [Thu, 23 Sep 2021 14:39:15 +0000 (15:39 +0100)]
coresight: trbe: irq handler: Do not disable TRBE if no action is needed

The IRQ handler of the TRBE driver could race against the update_buffer()
in consuming the  IRQ. So, if the update_buffer() gets to processing the
TRBE irq, the TRBSR will be cleared. Thus by the time IRQ handler is
triggered, there is nothing to do there. Handle these cases and do not
disable the TRBE unnecessarily. Since the TRBSR can be read without
stopping the TRBE, we can check that before disabling the TRBE.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210923143919.2944311-2-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Unify the enabling sequence
Suzuki K Poulose [Tue, 14 Sep 2021 10:26:39 +0000 (11:26 +0100)]
coresight: trbe: Unify the enabling sequence

Unify the sequence of enabling the TRBE. We do this from
event_start and also from the TRBE IRQ handler. Lets move
this to a common helper. The only minor functional change
is returning an error when we fail to enable the TRBE.
This should be handled already.

Since we now have unique entry point to trying to enable TRBE,
move the format flag setting to the central place.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-9-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Drop duplicate TRUNCATE flags
Suzuki K Poulose [Tue, 14 Sep 2021 10:26:36 +0000 (11:26 +0100)]
coresight: trbe: Drop duplicate TRUNCATE flags

We mark the buffer as TRUNCATED when there is no space left
in the buffer. But we do it at different points.
    __trbe_normal_offset()
and also, at all the callers of the above function via
compute_trbe_buffer_limit(), when the limit == base (i.e
offset = 0 as returned by the __trbe_normal_offset()).

So, given that the callers already mark the buffer as TRUNCATED
drop the caller inside the __trbe_normal_offset().

This is in preparation to moving the handling of TRUNCATED
into a central place.

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-6-suzuki.poulose@arm.com
[Moved comment as Anshuman requested]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: trbe: Ensure the format flag is always set
Suzuki K Poulose [Tue, 14 Sep 2021 10:26:35 +0000 (11:26 +0100)]
coresight: trbe: Ensure the format flag is always set

When the TRBE is stopped on truncating an event, we may not
set the FORMAT flag, even though the size of the record is 0.
Let us be consistent and not confuse the user.

To ensure that the format flag is always set on all the
records generated by TRBE, set the flag when we have a
new handle. Rather than deferring to the "end" operation,
which makes it clear. So, we can do this from

 -  arm_trbe_enable() -> When a new handle is provided by the
    CoreSight PMU, triggered via etm_event_start()
 -  trbe_handle_overflow() -> When we begin a new handle after
    closing the previous on overflow.

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-5-suzuki.poulose@arm.com
[Fixed inverted words in title]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: etm-pmu: Ensure the AUX handle is valid
Suzuki K Poulose [Tue, 14 Sep 2021 10:26:34 +0000 (11:26 +0100)]
coresight: etm-pmu: Ensure the AUX handle is valid

The ETM perf infrastructure closes out a handle during event_stop
or on an error in starting the event. In either case, it is possible
for a "sink" to update/close the handle, under certain circumstances.
(e.g no space in ring buffer.). So, ensure that we handle this
gracefully in the PMU driver by verifying the handle is still valid.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-4-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: etm4x: Use Trace Filtering controls dynamically
Suzuki K Poulose [Tue, 14 Sep 2021 10:26:33 +0000 (11:26 +0100)]
coresight: etm4x: Use Trace Filtering controls dynamically

The Trace Filtering support (FEAT_TRF) ensures that the ETM
can be prohibited from generating any trace for a given EL.
This is much stricter knob, than the TRCVICTLR exception level
masks, which doesn't prevent the ETM from generating Context
packets for an "excluded" EL. At the moment, we do a onetime
enable trace at user and kernel and leave it untouched for the
kernel life time. This implies that the ETM could potentially
generate trace packets containing the kernel addresses, and
thus leaking the kernel virtual address in the trace.

This patch makes the switch dynamic, by honoring the filters
set by the user and enforcing them in the TRFCR controls.
We also rename the cpu_enable_tracing() appropriately to
cpu_detect_trace_filtering() and the drvdata member
trfc => trfcr to indicate the "value" of the TRFCR_EL1.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Al Grant <al.grant@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-3-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: etm4x: Save restore TRFCR_EL1
Suzuki K Poulose [Tue, 14 Sep 2021 10:26:32 +0000 (11:26 +0100)]
coresight: etm4x: Save restore TRFCR_EL1

When the CPU enters a low power mode, the TRFCR_EL1 contents could be
reset. Thus we need to save/restore the TRFCR_EL1 along with the ETM4x
registers to allow the tracing.

The TRFCR related helpers are in a new header file, as we need to use
them for TRBE in the later patches.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210914102641.1852544-2-suzuki.poulose@arm.com
[Fixed cosmetic details]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: Don't immediately close events that are run on invalid CPU/sink combos
James Clark [Wed, 22 Sep 2021 12:51:44 +0000 (13:51 +0100)]
coresight: Don't immediately close events that are run on invalid CPU/sink combos

When a traced process runs on a CPU that can't reach the selected sink,
the event will be stopped with PERF_HES_STOPPED. This means that even if
the process migrates to a valid CPU, tracing will not resume.

This can be reproduced (on N1SDP) by using taskset to start the process
on CPU 0, and then switching it to CPU 2 (ETF 1 is only reachable from
CPU 2):

  taskset --cpu-list 0 ./perf record -e cs_etm/@tmc_etf1/ --per-thread -- taskset --cpu-list 2 ls

This produces a single 0 length AUX record, and then no more trace:

  0x3c8 [0x30]: PERF_RECORD_AUX offset: 0 size: 0 flags: 0x1 [T]

After the fix, the same command produces normal AUX records. The perf
self test "89: Check Arm CoreSight trace data recording and synthesized
samples" no longer fails intermittently. This was because the taskset in
the test is after the fork, so there is a period where the task is
scheduled on a random CPU rather than forced to a valid one.

Specifically selecting an invalid CPU will still result in a failure to
open the event because it will never produce trace:

  ./perf record -C 2 -e cs_etm/@tmc_etf0/
  failed to mmap with 12 (Cannot allocate memory)

The only scenario that has changed is if the CPU mask has a valid CPU
sink combo in it.

Testing
=======

* Coresight self test passes consistently:
  ./perf test Coresight

* CPU wide mode still produces trace:
  ./perf record -e cs_etm// -a

* Invalid -C options still fail to open:
  ./perf record -C 2,3 -e cs_etm/@tmc_etf0/
  failed to mmap with 12 (Cannot allocate memory)

* Migrating a task to a valid sink/CPU now produces trace:
  taskset --cpu-list 0 ./perf record -e cs_etm/@tmc_etf1/ --per-thread -- taskset --cpu-list 2 ls

* If the task remains on an invalid CPU, no trace is emitted:
  taskset --cpu-list 0 ./perf record -e cs_etm/@tmc_etf1/ --per-thread -- ls

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: James Clark <james.clark@arm.com>
Link: https://lore.kernel.org/r/20210922125144.133872-2-james.clark@arm.com
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: tmc-etr: Speed up for bounce buffer in flat mode
Leo Yan [Sun, 5 Sep 2021 03:21:44 +0000 (11:21 +0800)]
coresight: tmc-etr: Speed up for bounce buffer in flat mode

The AUX bounce buffer is allocated with API dma_alloc_coherent(), in the
low level's architecture code, e.g. for Arm64, it maps the memory with
the attribution "Normal non-cacheable"; this can be concluded from the
definition for pgprot_dmacoherent() in arch/arm64/include/asm/pgtable.h.

Later when access the AUX bounce buffer, since the memory mapping is
non-cacheable, it's low efficiency due to every load instruction must
reach out DRAM.

This patch changes to allocate pages with dma_alloc_noncoherent(), the
driver can access the memory via cacheable mapping; therefore, load
instructions can fetch data from cache lines rather than always read
data from DRAM, the driver can boost memory performance.  After using
the cacheable mapping, the driver uses dma_sync_single_for_cpu() to
invalidate cacheline prior to read bounce buffer so can avoid read stale
trace data.

By measurement the duration for function tmc_update_etr_buffer() with
ftrace function_graph tracer, it shows the performance significant
improvement for copying 4MiB data from bounce buffer:

  # echo tmc_etr_get_data_flat_buf > set_graph_notrace // avoid noise
  # echo tmc_update_etr_buffer > set_graph_function
  # echo function_graph > current_tracer

  before:

  # CPU  DURATION                  FUNCTION CALLS
  # |     |   |                     |   |   |   |
  2)               |    tmc_update_etr_buffer() {
  ...
  2) # 8148.320 us |    }

  after:

  # CPU  DURATION                  FUNCTION CALLS
  # |     |   |                     |   |   |   |
  2)               |  tmc_update_etr_buffer() {
  ...
  2) # 2525.420 us |  }

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210905032144.966766-1-leo.yan@linaro.org
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: Update comments for removing cs_etm_find_snapshot()
Leo Yan [Sun, 12 Sep 2021 12:57:48 +0000 (20:57 +0800)]
coresight: Update comments for removing cs_etm_find_snapshot()

Commit 2f01c200d440 ("perf cs-etm: Remove callback cs_etm_find_snapshot()")
has removed the function cs_etm_find_snapshot() from the perf tool in the
user space, now CoreSight trace directly uses the perf common function
__auxtrace_mmap__read() to calcualte the head and size for AUX trace data
in snapshot mode.

This patch updates the comments in drivers to make them generic and not
stick to any specific function from perf tool.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Link: https://lore.kernel.org/r/20210912125748.2816606-3-leo.yan@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: tmc-etr: Use perf_output_handle::head for AUX ring buffer
Leo Yan [Sun, 12 Sep 2021 12:57:47 +0000 (20:57 +0800)]
coresight: tmc-etr: Use perf_output_handle::head for AUX ring buffer

When enable the Arm CoreSight PMU event, the context for AUX ring buffer
is prepared in the structure perf_output_handle, and its field "head"
points the head of the AUX ring buffer and it is updated after filling
AUX trace data into buffer.

Current code uses an extra field etr_perf_buffer::head to maintain the
header for the AUX ring buffer which is not necessary; alternatively,
it's better to directly use perf_output_handle::head.

This patch removes the field etr_perf_buffer::head and directly uses
perf_output_handle::head for the head of AUX ring buffer.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210912125748.2816606-2-leo.yan@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: tmc-etf: Add comment for store ordering
Leo Yan [Mon, 9 Aug 2021 11:14:01 +0000 (19:14 +0800)]
coresight: tmc-etf: Add comment for store ordering

Since the function CS_LOCK() has contained memory barrier mb(), it
ensures the visibility of the AUX trace data before updating the
aux_head, thus it's needless to add any explicit barrier anymore.

Add comment to make clear for the barrier usage for ETF.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Link: https://lore.kernel.org/r/20210809111407.596077-4-leo.yan@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: tmc-etr: Add barrier after updating AUX ring buffer
Leo Yan [Mon, 9 Aug 2021 11:14:00 +0000 (19:14 +0800)]
coresight: tmc-etr: Add barrier after updating AUX ring buffer

Since a memory barrier is required between AUX trace data store and
aux_head store, and the AUX trace data is filled with memcpy(), it's
sufficient to use smp_wmb() so can ensure the trace data is visible
prior to updating aux_head.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210809111407.596077-3-leo.yan@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: tmc: Configure AXI write burst size
Tanmay Jagdale [Wed, 1 Sep 2021 13:10:49 +0000 (18:40 +0530)]
coresight: tmc: Configure AXI write burst size

The current driver sets the write burst size initiated by TMC-ETR on
AXI bus to a fixed value of 16. Make this configurable by reading the
value specified in fwnode. If not specified, then default to 16.

Introduced a "max_burst_size" variable in tmc_drvdata structure to
facilitate this change.

Signed-off-by: Tanmay Jagdale <tanmay@marvell.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20210901131049.1365367-3-tanmay@marvell.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agodt-bindings: coresight: Add burst size for TMC
Tanmay Jagdale [Wed, 1 Sep 2021 13:10:48 +0000 (18:40 +0530)]
dt-bindings: coresight: Add burst size for TMC

Add "arm,max-burst-size" optional property for TMC ETR.
If specified, this value indicates the maximum burst size
that can be initiated by TMC on the AXI bus.

Signed-off-by: Tanmay Jagdale <tanmay@marvell.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210901131049.1365367-2-tanmay@marvell.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: cpu-debug: Control default behavior via Kconfig
Brian Norris [Sat, 4 Sep 2021 01:28:54 +0000 (18:28 -0700)]
coresight: cpu-debug: Control default behavior via Kconfig

Debugfs is nice and so are module parameters, but
 * debugfs doesn't take effect early (e.g., if drivers are locking up
   before user space gets anywhere)
 * module parameters either add a lot to the kernel command line, or
   else take effect late as well (if you build =m and configure in
   /etc/modprobe.d/)

So in the same spirit as these
  CONFIG_PANIC_ON_OOPS (also available via cmdline or modparam)
  CONFIG_INTEL_IOMMU_DEFAULT_ON (also available via cmdline)
add a new Kconfig option.

Module parameters and debugfs can still override.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
[Fixed missing double quote in Kconfig title]
Link: https://lore.kernel.org/r/20210903182839.1.I20856983f2841b78936134dcf9cdf6ecafe632b9@changeid
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agocoresight: cti: Correct the parameter for pm_runtime_put
Tao Zhang [Thu, 19 Aug 2021 09:29:37 +0000 (17:29 +0800)]
coresight: cti: Correct the parameter for pm_runtime_put

The input parameter of the function pm_runtime_put should be the
same in the function cti_enable_hw and cti_disable_hw. The correct
parameter to use here should be dev->parent.

Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Fixes: 835d722ba10a ("coresight: cti: Initial CoreSight CTI Driver")
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/1629365377-5937-1-git-send-email-quic_taozha@quicinc.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
3 years agoMerge tag 'phy-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux...
Greg Kroah-Hartman [Wed, 27 Oct 2021 15:01:16 +0000 (17:01 +0200)]
Merge tag 'phy-for-5.16' of git://git./linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy-for-5.16

  - New support:
- Kirin 970 PCIe PHY driver
- Qualcomm QCM2290 USB2 and USB3 support

  - Updates:
        - Qualcomm synopsis phy driver updates
- sc8180x PCIe update
- cadence-torrent driver updates for output reference clock
- stm32 phy tuning support

* tag 'phy-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (28 commits)
  phy: Sparx5 Eth SerDes: Fix return value check in sparx5_serdes_probe()
  phy: qcom-snps: Correct the FSEL_MASK
  phy: hisilicon: Add of_node_put() in phy-hisi-inno-usb2
  phy: qcom-qmp: another fix for the sc8180x PCIe definition
  phy: cadence-torrent: Add support to output received reference clock
  phy: cadence-torrent: Model reference clock driver as a clock to enable derived refclk
  dt-bindings: phy: cadence-torrent: Add clock IDs for derived and received refclk
  phy: cadence-torrent: Migrate to clk_hw based registration and OF APIs
  phy: ti: gmii-sel: check of_get_address() for failure
  dt-bindings: phy: qcom,qmp: IPQ6018 and IPQ8074 PCIe PHY require no supply
  phy: stm32: add phy tuning support
  dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties
  phy: stm32: restore utmi switch on resume
  dt-bindings: phy: rockchip: remove usb-phy fallback string for rk3066a/rk3188
  phy: qcom-qusb2: Fix a memory leak on probe
  phy: qcom-qmp: Add QCM2290 USB3 PHY support
  dt-bindings: phy: qcom,qmp: Add QCM2290 USB3 PHY
  phy: qcom-qusb2: Add missing vdd supply
  dt-bindings: phy: qcom,qusb2: Add missing vdd-supply
  phy: rockchip-inno-usb2: Make use of the helper function devm_add_action_or_reset()
  ...

3 years agoMerge tag 'extcon-next-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git...
Greg Kroah-Hartman [Wed, 27 Oct 2021 14:49:55 +0000 (16:49 +0200)]
Merge tag 'extcon-next-for-5.16' of git://git./linux/kernel/git/chanwoo/extcon into char-misc-next

Chanwoo writes:

Update extcon next for v5.16

Detailed description for this pull request:
1. Add support for TUSB320L and update tusb320 extcon driver
- The existing extcon-usbc-tusb320 driver is updated
for supporting the mode setting and reset operation.
Also, this driver supports the simliar TUSB320L device
at the same extcon-usbc-tusb320 extcon provider driver.

2. Use p-unit semaphone lock for register access for extcon-axp288
driver

3. Update the minor clean-up for extcon-max3355 and extcon-usb-gpio
driver.

* tag 'extcon-next-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon:
  dt-bindings: extcon: usbc-tusb320: Add TUSB320L compatible string
  extcon: usbc-tusb320: Add support for TUSB320L
  extcon: usbc-tusb320: Add support for mode setting and reset
  extcon: extcon-axp288: Use P-Unit semaphore lock for register accesses
  extcon: max3355: Drop unused include
  extcon: usb-gpio: Use the right includes

3 years agofix for "dma-buf: move dma-buf symbols into the DMA_BUF module namespace"
Stephen Rothwell [Wed, 27 Oct 2021 04:48:43 +0000 (15:48 +1100)]
fix for "dma-buf: move dma-buf symbols into the DMA_BUF module namespace"

Adds the proper MODULE_IMPORT_NS(DMA_BUF) line to the file to get it to
build properly.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Link: https://lore.kernel.org/r/20211027154843.622961fd@canb.auug.org.au
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agodt-bindings: extcon: usbc-tusb320: Add TUSB320L compatible string
Yassine Oudjana [Sat, 25 Sep 2021 05:46:09 +0000 (05:46 +0000)]
dt-bindings: extcon: usbc-tusb320: Add TUSB320L compatible string

Add a compatible string for TUSB320L.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
3 years agoextcon: usbc-tusb320: Add support for TUSB320L
Yassine Oudjana [Sat, 25 Sep 2021 05:45:54 +0000 (05:45 +0000)]
extcon: usbc-tusb320: Add support for TUSB320L

TUSB320L is a newer chip with additional features, and it has additional steps
in its mode changing sequence:
 - Disable CC state machine,
 - Write to mode register,
 - Wait for 5 ms,
 - Re-enable CC state machine.
It also has an additional register that a revision number can be read from.

Add support for the mode changing sequence, and read the revision number during
probe and print it as info.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
3 years agoextcon: usbc-tusb320: Add support for mode setting and reset
Yassine Oudjana [Sat, 25 Sep 2021 05:45:39 +0000 (05:45 +0000)]
extcon: usbc-tusb320: Add support for mode setting and reset

Reset the chip and set its mode to default (maintain mode set by PORT pin)
during probe to make sure it comes up in the default state.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
3 years agoextcon: extcon-axp288: Use P-Unit semaphore lock for register accesses
Fabio Aiuto [Thu, 16 Sep 2021 07:12:55 +0000 (09:12 +0200)]
extcon: extcon-axp288: Use P-Unit semaphore lock for register accesses

use low level P-Unit semaphore lock for axp288 register
accesses directly and for more than one access a time,
to reduce the number of times this semaphore is locked
and released which is an expensive operation.

i2c-bus to the XPower is shared between the kernel and the
SoCs P-Unit. The P-Unit has a semaphore wich the kernel must
lock for axp288 register accesses. When the P-Unit semaphore
is locked CPU and GPU power states cannot change or the system
will freeze.

The P-Unit semaphore lock is already managed inside the regmap
access logic, but for each access the semaphore is locked and
released. So use directly iosf_mbi_(un)block_punit_i2c_access(),
we are safe in doing so because nested calls to the same
semaphore are turned to nops.

Suggested-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Fabio Aiuto <fabioaiuto83@gmail.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
3 years agoextcon: max3355: Drop unused include
Linus Walleij [Thu, 15 Jul 2021 15:26:57 +0000 (17:26 +0200)]
extcon: max3355: Drop unused include

This driver includes the legacy <linux/gpio.h> header but
does not use it. Drop this include.

Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
3 years agoextcon: usb-gpio: Use the right includes
Linus Walleij [Thu, 15 Jul 2021 19:06:06 +0000 (21:06 +0200)]
extcon: usb-gpio: Use the right includes

The USB GPIO extcon driver does not use any of the legacy
includes <linux/gpio.h> or <linux/of_gpio.h> but
exploits the fact that this brings in <linux/mod_device_table.h>.
Fix this up by using the right includes.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
3 years agomost: fix control-message timeouts
Johan Hovold [Mon, 25 Oct 2021 11:58:11 +0000 (13:58 +0200)]
most: fix control-message timeouts

USB control-message timeouts are specified in milliseconds and should
specifically not vary with CONFIG_HZ.

Use the common control-message timeout defines for the five-second
timeouts.

Fixes: 97a6f772f36b ("drivers: most: add USB adapter driver")
Cc: stable@vger.kernel.org # 5.9
Signed-off-by: Johan Hovold <johan@kernel.org>
Link: https://lore.kernel.org/r/20211025115811.5410-1-johan@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocomedi: vmk80xx: fix bulk and interrupt message timeouts
Johan Hovold [Mon, 25 Oct 2021 11:45:32 +0000 (13:45 +0200)]
comedi: vmk80xx: fix bulk and interrupt message timeouts

USB bulk and interrupt message timeouts are specified in milliseconds
and should specifically not vary with CONFIG_HZ.

Note that the bulk-out transfer timeout was set to the endpoint
bInterval value, which should be ignored for bulk endpoints and is
typically set to zero. This meant that a failing bulk-out transfer
would never time out.

Assume that the 10 second timeout used for all other transfers is more
than enough also for the bulk-out endpoint.

Fixes: 985cafccbf9b ("Staging: Comedi: vmk80xx: Add k8061 support")
Fixes: 951348b37738 ("staging: comedi: vmk80xx: wait for URBs to complete")
Cc: stable@vger.kernel.org # 2.6.31
Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Link: https://lore.kernel.org/r/20211025114532.4599-6-johan@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocomedi: vmk80xx: fix bulk-buffer overflow
Johan Hovold [Mon, 25 Oct 2021 11:45:31 +0000 (13:45 +0200)]
comedi: vmk80xx: fix bulk-buffer overflow

The driver is using endpoint-sized buffers but must not assume that the
tx and rx buffers are of equal size or a malicious device could overflow
the slab-allocated receive buffer when doing bulk transfers.

Fixes: 985cafccbf9b ("Staging: Comedi: vmk80xx: Add k8061 support")
Cc: stable@vger.kernel.org # 2.6.31
Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Link: https://lore.kernel.org/r/20211025114532.4599-5-johan@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocomedi: vmk80xx: fix transfer-buffer overflows
Johan Hovold [Mon, 25 Oct 2021 11:45:30 +0000 (13:45 +0200)]
comedi: vmk80xx: fix transfer-buffer overflows

The driver uses endpoint-sized USB transfer buffers but up until
recently had no sanity checks on the sizes.

Commit e1f13c879a7c ("staging: comedi: check validity of wMaxPacketSize
of usb endpoints found") inadvertently fixed NULL-pointer dereferences
when accessing the transfer buffers in case a malicious device has a
zero wMaxPacketSize.

Make sure to allocate buffers large enough to handle also the other
accesses that are done without a size check (e.g. byte 18 in
vmk80xx_cnt_insn_read() for the VMK8061_MODEL) to avoid writing beyond
the buffers, for example, when doing descriptor fuzzing.

The original driver was for a low-speed device with 8-byte buffers.
Support was later added for a device that uses bulk transfers and is
presumably a full-speed device with a maximum 64-byte wMaxPacketSize.

Fixes: 985cafccbf9b ("Staging: Comedi: vmk80xx: Add k8061 support")
Cc: stable@vger.kernel.org # 2.6.31
Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Link: https://lore.kernel.org/r/20211025114532.4599-4-johan@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agophy: Sparx5 Eth SerDes: Fix return value check in sparx5_serdes_probe()
Yang Yingliang [Thu, 9 Sep 2021 07:21:49 +0000 (15:21 +0800)]
phy: Sparx5 Eth SerDes: Fix return value check in sparx5_serdes_probe()

In case of error, the function devm_ioremap() returns NULL
pointer not ERR_PTR(). The IS_ERR() test in the return value
check should be replaced with NULL test.

Fixes: 2ff8a1eeb5aa ("phy: Add Sparx5 ethernet serdes PHY driver")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20210909072149.2934047-1-yangyingliang@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: qcom-snps: Correct the FSEL_MASK
Sandeep Maheswaram [Mon, 25 Oct 2021 04:19:35 +0000 (09:49 +0530)]
phy: qcom-snps: Correct the FSEL_MASK

The FSEL_MASK which selects the refclock is defined incorrectly.
It should be [4:6] not [5:7]. Due to this incorrect definition, the BIT(7)
in USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0 is reset which keeps PHY analog
blocks ON during suspend.
Fix this issue by correctly defining the FSEL_MASK.

Fixes: 51e8114f80d0 ("phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs")
Signed-off-by: Sandeep Maheswaram <quic_c_sanm@quicinc.com>
Link: https://lore.kernel.org/r/1635135575-5668-1-git-send-email-quic_c_sanm@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: hisilicon: Add of_node_put() in phy-hisi-inno-usb2
Wan Jiabing [Fri, 15 Oct 2021 08:01:51 +0000 (04:01 -0400)]
phy: hisilicon: Add of_node_put() in phy-hisi-inno-usb2

Fix following coccicheck warning:
./drivers/phy/hisilicon/phy-hisi-inno-usb2.c:138:1-23: WARNING: Function
for_each_child_of_node should have of_node_put() before break

Early exits from for_each_child_of_node should decrement the
node reference counter.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Link: https://lore.kernel.org/r/20211015080154.16016-1-wanjiabing@vivo.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: qcom-qmp: another fix for the sc8180x PCIe definition
Dmitry Baryshkov [Wed, 20 Oct 2021 15:56:04 +0000 (18:56 +0300)]
phy: qcom-qmp: another fix for the sc8180x PCIe definition

Commit f839f14e24f2 ("phy: qcom-qmp: Add sc8180x PCIe support") added
SC8180X PCIe tables, but used sm8250_qmp_pcie_serdes_tbl as a serdes
table because of the copy paste error. Commit bfccd9a71a08 ("phy:
qcom-qmp: Fix sc8180x PCIe definition") corrected part of this mistake
by pointing serdes_tbl to sc8180x_qmp_pcie_serdes_tbl, however the
serdes_tbl_num field was not updated to use sc8180x table. So let's now
fix the serdes_tbl_num field too.

Fixes: bfccd9a71a08 ("phy: qcom-qmp: Fix sc8180x PCIe definition")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211020155604.1374530-1-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: cadence-torrent: Add support to output received reference clock
Swapnil Jakhade [Wed, 22 Sep 2021 12:37:35 +0000 (14:37 +0200)]
phy: cadence-torrent: Add support to output received reference clock

Add support to output received reference clock. Model the received
reference clock as an alternate parent of reference clock driver
clock. When received refclk is selected to output on cmn_refclk_p/m,
this is the internal reference clock driven on the pma_cmn_refclk_int.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210922123735.21927-5-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: cadence-torrent: Model reference clock driver as a clock to enable derived refclk
Swapnil Jakhade [Wed, 22 Sep 2021 12:37:34 +0000 (14:37 +0200)]
phy: cadence-torrent: Model reference clock driver as a clock to enable derived refclk

When reference clock driver is enabled, either derived or received refclk
is output on cmn_refclk_p/m. Update the reference clock driver
implementation by modelling reference clock driver as a "clock" with
derived reference clock set as its default parent. The support for
received reference clock will be added in a separate patch.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210922123735.21927-4-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodt-bindings: phy: cadence-torrent: Add clock IDs for derived and received refclk
Swapnil Jakhade [Wed, 22 Sep 2021 12:37:33 +0000 (14:37 +0200)]
dt-bindings: phy: cadence-torrent: Add clock IDs for derived and received refclk

Add clock IDs for derived and received reference clock output.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210922123735.21927-3-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: cadence-torrent: Migrate to clk_hw based registration and OF APIs
Swapnil Jakhade [Wed, 22 Sep 2021 12:37:32 +0000 (14:37 +0200)]
phy: cadence-torrent: Migrate to clk_hw based registration and OF APIs

Use clk_hw based provider APIs to register clks to remove the usage of
deprecated APIs.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210922123735.21927-2-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: ti: gmii-sel: check of_get_address() for failure
Dan Carpenter [Tue, 14 Sep 2021 11:00:38 +0000 (14:00 +0300)]
phy: ti: gmii-sel: check of_get_address() for failure

Smatch complains that if of_get_address() returns NULL, then "size"
isn't initialized.  Also it would lead to an Oops.

Fixes: 7f78322cdd67 ("phy: ti: gmii-sel: retrieve ports number and base offset from dt")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20210914110038.GB11657@kili
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodt-bindings: phy: qcom,qmp: IPQ6018 and IPQ8074 PCIe PHY require no supply
Shawn Guo [Wed, 20 Oct 2021 13:06:34 +0000 (21:06 +0800)]
dt-bindings: phy: qcom,qmp: IPQ6018 and IPQ8074 PCIe PHY require no supply

The qmp-phy driver suggests that 'vdda-phy-supply' and 'vdda-pll-supply'
are not required for IPQ6018 and IPQ8074 QMP PCIe PHY.  Update the
bindings to reflect it.

While at it, also correct the clock properties for IPQ8074 QMP PCIe PHY.
And as the result, 'qcom,ipq8074-qmp-pcie-phy' and
'qcom,ipq6018-qmp-pcie-phy' share the same clock, reset and supply
bindings.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211020130634.26194-1-shawn.guo@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: stm32: add phy tuning support
Amelie Delaunay [Fri, 15 Oct 2021 16:14:27 +0000 (18:14 +0200)]
phy: stm32: add phy tuning support

It can be necessary to adjust the phys settings to compensate parasitics.
This patch adds support of new optional properties to configure the tune
interface of the phys of stm32-usbphyc.
Properties are optional, that's why each property is skipped if not
found (-EINVAL).
Phy tuning is restored on resume because if deep low power state is
achieved, phy tuning configuration is reset.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20211015161427.220784-4-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties
Amelie Delaunay [Fri, 15 Oct 2021 16:14:26 +0000 (18:14 +0200)]
dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties

This patch adds the description of new optional phy tuning properties
for usbphyc phy sub nodes.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211015161427.220784-3-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: stm32: restore utmi switch on resume
Amelie Delaunay [Fri, 15 Oct 2021 16:14:25 +0000 (18:14 +0200)]
phy: stm32: restore utmi switch on resume

UTMI switch value can be lost during suspend/resume, depending on the power
state reached.
This patch adds resume function to usbphyc, to reconfigure utmi switch
after suspend.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20211015161427.220784-2-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodt-bindings: phy: rockchip: remove usb-phy fallback string for rk3066a/rk3188
Johan Jonker [Sat, 28 Aug 2021 11:12:17 +0000 (13:12 +0200)]
dt-bindings: phy: rockchip: remove usb-phy fallback string for rk3066a/rk3188

With the conversion of rockchip-usb-phy.yaml a long time used fallback
string for rk3066a/rk3188 was added. The linux driver doesn't do much with
the GRF phy address range, however the u-boot driver rockchip_usb2_phy.c
does. The bits in GRF_UOC0_CON2 for rk3066a/rk3188 and rk3288 for example
don't match. Remove the usb-phy fallback string for rk3066a/rk3188
to prevent possible strange side effects.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210828111218.10026-1-jbx6244@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: qcom-qusb2: Fix a memory leak on probe
Vladimir Zapolskiy [Wed, 22 Sep 2021 23:35:48 +0000 (02:35 +0300)]
phy: qcom-qusb2: Fix a memory leak on probe

On success nvmem_cell_read() returns a pointer to a dynamically allocated
buffer, and therefore it shall be freed after usage.

The issue is reported by kmemleak:

  # cat /sys/kernel/debug/kmemleak
  unreferenced object 0xffff3b3803e4b280 (size 128):
    comm "kworker/u16:1", pid 107, jiffies 4294892861 (age 94.120s)
    hex dump (first 32 bytes):
      00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
      00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    backtrace:
      [<000000007739afdc>] __kmalloc+0x27c/0x41c
      [<0000000071c0fbf8>] nvmem_cell_read+0x40/0xe0
      [<00000000e803ef1f>] qusb2_phy_init+0x258/0x5bc
      [<00000000fc81fcfa>] phy_init+0x70/0x110
      [<00000000e3d48a57>] dwc3_core_soft_reset+0x4c/0x234
      [<0000000027d1dbd4>] dwc3_core_init+0x68/0x990
      [<000000001965faf9>] dwc3_probe+0x4f4/0x730
      [<000000002f7617ca>] platform_probe+0x74/0xf0
      [<00000000a2576cac>] really_probe+0xc4/0x470
      [<00000000bc77f2c5>] __driver_probe_device+0x11c/0x190
      [<00000000130db71f>] driver_probe_device+0x48/0x110
      [<0000000019f36c2b>] __device_attach_driver+0xa4/0x140
      [<00000000e5812ff7>]  bus_for_each_drv+0x84/0xe0
      [<00000000f4bac574>] __device_attach+0xe4/0x1c0
      [<00000000d3beb631>] device_initial_probe+0x20/0x30
      [<000000008019b9db>] bus_probe_device+0xa4/0xb0

Fixes: ca04d9d3e1b1 ("phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210922233548.2150244-1-vladimir.zapolskiy@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: qcom-qmp: Add QCM2290 USB3 PHY support
Shawn Guo [Mon, 27 Sep 2021 06:48:29 +0000 (14:48 +0800)]
phy: qcom-qmp: Add QCM2290 USB3 PHY support

Enable QCM2290 USB3 PHY support by adding the qmp_phy_cfg data which are
taken from downstream kernel.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210927064829.5752-3-shawn.guo@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodt-bindings: phy: qcom,qmp: Add QCM2290 USB3 PHY
Shawn Guo [Mon, 27 Sep 2021 06:48:28 +0000 (14:48 +0800)]
dt-bindings: phy: qcom,qmp: Add QCM2290 USB3 PHY

Add support for USB3 PHY found on Qualcomm QCM2290 SoC.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210927064829.5752-2-shawn.guo@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodma-buf: move dma-buf symbols into the DMA_BUF module namespace
Greg Kroah-Hartman [Sun, 10 Oct 2021 12:46:28 +0000 (14:46 +0200)]
dma-buf: move dma-buf symbols into the DMA_BUF module namespace

In order to better track where in the kernel the dma-buf code is used,
put the symbols in the namespace DMA_BUF and modify all users of the
symbols to properly import the namespace to not break the build at the
same time.

Now the output of modinfo shows the use of these symbols, making it
easier to watch for users over time:

$ modinfo drivers/misc/fastrpc.ko | grep import
import_ns:      DMA_BUF

Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: dri-devel@lists.freedesktop.org
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sumit Semwal <sumit.semwal@linaro.org>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20211010124628.17691-1-gregkh@linuxfoundation.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agolkdtm/bugs: Check that a per-task stack canary exists
Kees Cook [Fri, 22 Oct 2021 22:38:26 +0000 (15:38 -0700)]
lkdtm/bugs: Check that a per-task stack canary exists

Introduce REPORT_STACK_CANARY to check for differing stack canaries
between two processes (i.e. that an architecture is correctly implementing
per-task stack canaries), using the task_struct canary as the hint to
locate in the stack. Requires that one of the processes being tested
not be pid 1.

Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kees Cook <keescook@chromium.org>
Link: https://lore.kernel.org/r/20211022223826.330653-3-keescook@chromium.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agoselftests/lkdtm: Add way to repeat a test
Kees Cook [Fri, 22 Oct 2021 22:38:25 +0000 (15:38 -0700)]
selftests/lkdtm: Add way to repeat a test

Some LKDTM tests need to be run more than once (usually to setup and
then later trigger). Until now, the only case was the SOFT_LOCKUP test,
which wasn't useful to run in the bulk selftests. The coming stack canary
checking needs to run twice, so support this with a new test output prefix
"repeat".

Signed-off-by: Kees Cook <keescook@chromium.org>
Link: https://lore.kernel.org/r/20211022223826.330653-2-keescook@chromium.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agoMerge tag 'soundwire-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul...
Greg Kroah-Hartman [Mon, 25 Oct 2021 06:52:44 +0000 (08:52 +0200)]
Merge tag 'soundwire-5.16-rc1' of git://git./linux/kernel/git/vkoul/soundwire into char-misc-next

Vinod writes:

soundwire updates for 5.16-rc1

 - Update on sysfs wildcard documentation
 - debugfs update for core and qcom driver
 - invalid slave pointer fix for bus

* tag 'soundwire-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire:
  soundwire: qcom: add debugfs entry for soundwire register dump
  soundwire: bus: stop dereferencing invalid slave pointer
  ABI: sysfs-bus-soundwire-slave: use wildcards on What definitions
  ABI: sysfs-bus-soundwire-master: use wildcards on What definitions
  soundwire: debugfs: use controller id and link_id for debugfs

3 years agoiio: frequency: adrf6780: Fix adrf6780_spi_{read,write}()
Nathan Chancellor [Fri, 22 Oct 2021 19:56:56 +0000 (12:56 -0700)]
iio: frequency: adrf6780: Fix adrf6780_spi_{read,write}()

Clang warns:

drivers/iio/frequency/adrf6780.c:117:1: error: all paths through this
function will call itself [-Werror,-Winfinite-recursion]
{
^
drivers/iio/frequency/adrf6780.c:138:1: error: all paths through this
function will call itself [-Werror,-Winfinite-recursion]
{
^
2 errors generated.

The underscore variants should be used here.

Link: https://github.com/ClangBuiltLinux/linux/issues/1490
Fixes: 63aaf6d06d87 ("iio: frequency: adrf6780: add support for ADRF6780")
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Link: https://lore.kernel.org/r/20211022195656.1513147-1-nathan@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agoMerge tag 'iio-for-5.16b' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23...
Greg Kroah-Hartman [Sun, 24 Oct 2021 11:09:37 +0000 (13:09 +0200)]
Merge tag 'iio-for-5.16b' of https://git./linux/kernel/git/jic23/iio into char-misc-next

Jonathan writes:

2nd set of IIO new driver, cleanups and features for the 5.16 cycle

New device support
* adrf6780 microwave upconverter.
  - New driver for this interesting device including bindings.

Features
* lite-on ltr501
  - Add dt-bindings including vendor ID and of_device_id table.
  - Add regulator support.
* sensiron,scd4x
  - Add reporting of channel scale.

Cleanups including fixes for things in this cycle
* Tree wide: Another set of dev_err_probe() introductions to reduce
  noise in logs when deferred probing is needed and provide more debug
  info. Devices included this time:
  - amlogic,meson_saradc
  - capella,cm3605
  - fsl,imx7d
  - maxim,max1118
  - maxim,max1241
  - nxp,lpc18xx
  - qcom,pm8xxxx-xoadc
  - rockchip,saradc
  - sharp,gp2ap002
  - sterricson,ab8500
  - ti,ads7950
* core - iio:buffer
  - Fix a path where a ret value is not intialized.
* channel-mux
  - Add support to mux core subsystem for a settling delay and use
    it in the iio-channel-mux driver.
  - Fix a few dt binding warnings.
* nxp,lpc18xx
  - Convert to devm_ functions for all of probe and drop remove()
* st,lsm6dsx
  - Suppress a warning due to lack of handling of an enum *_MAX entry
    that is just there to get the size.
* st,stm32-adc
  - Add generic channel binding, deprecating the old approach.
  - Add nvmem support to get calibration data for the vrefint channel and
    use it to perform such calibration.
  - Add a binding for sample-time to the generic channel description as it
    can be per channel.
* ti,adc128s052
  - Use devm_ managed functions and drop remove()
* vti,sca3000
  - Use sign_extend32() rather than opencoding.
* xilinx,xadc
  - Drop irq field from state structure as now just used in probe.

* tag 'iio-for-5.16b' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (36 commits)
  dt-bindings: iio: frequency: add adrf6780 doc
  iio: frequency: adrf6780: add support for ADRF6780
  iio: chemical: scd4x: Add a scale for the co2 concentration reading
  dt-bindings: iio: io-channel-mux: allow duplicate channel, labels
  dt-bindings: iio: io-channel-mux: add optional #io-channel-cells
  iio: adc: adc128s052: Simplify adc128_probe()
  iio: multiplexer: iio-mux: Support settle-time-us property
  dt-bindings: iio: io-channel-mux: Add property for settle time
  mux: add support for delay after muxing
  iio: adc: stm32-adc: use generic binding for sample-time
  iio: adc: stm32-adc: add vrefint calibration support
  iio: adc: stm32-adc: add support of internal channels
  iio: adc: stm32-adc: add support of generic channels binding
  iio: adc: stm32-adc: split channel init into several routines
  dt-bindings: iio: stm32-adc: add nvmem support for vrefint internal channel
  dt-bindings: iio: stm32-adc: add generic channel binding
  iio: accel: sca3000: Use sign_extend32() instead of opencoding sign extension.
  iio: xilinx-xadc: Remove `irq` field from state struct
  iio: imu: st_lsm6dsx: Avoid potential array overflow in st_lsm6dsx_set_odr()
  iio: light: gp2ap002: Make use of the helper function dev_err_probe()
  ...

3 years agoMerge tag 'iio-fixes-for-5.16a' of https://git.kernel.org/pub/scm/linux/kernel/git...
Greg Kroah-Hartman [Sun, 24 Oct 2021 11:08:36 +0000 (13:08 +0200)]
Merge tag 'iio-fixes-for-5.16a' of https://git./linux/kernel/git/jic23/iio into char-misc-next

Jonathan writes:

First set of IIO fixes for the 5.16 cycle

As these are very late in the 5.15 cycle and non are particularly urgent,
they can wait for the merge window.

Key element in this set is Yang Yingliang has identified a number of
issues in error paths introduced recently when we added multiple
buffer support.

Other fixes:
* adi,ad5662
  - Fix handling of i2c_master_send() return value.
* adi,ad5766
  - Fix a wrong dt-property name that indicated wrong units and
    did not mach the bindings.
  - Associated 'fix' of the bindings example to have a possible scale.
* st,pressure-spi
  - Add some missing entries to the spi_device_id table to ensure
    auto-loading works.
* ti,tsc2046
  - Fix a backwards comparison leading to a false dev_warn

* tag 'iio-fixes-for-5.16a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio:
  iio: buffer: Fix memory leak in iio_buffers_alloc_sysfs_and_mask()
  iio: adc: tsc2046: fix scan interval warning
  iio: core: fix double free in iio_device_unregister_sysfs()
  iio: core: check return value when calling dev_set_name()
  iio: buffer: Fix memory leak in iio_buffer_register_legacy_sysfs_groups()
  iio: buffer: Fix double-free in iio_buffers_alloc_sysfs_and_mask()
  iio: buffer: Fix memory leak in __iio_buffer_alloc_sysfs_and_mask()
  iio: buffer: check return value of kstrdup_const()
  iio: dac: ad5446: Fix ad5622_write() return value
  Documentation:devicetree:bindings:iio:dac: Fix val
  drivers: iio: dac: ad5766: Fix dt property name
  iio: st_pressure_spi: Add missing entries SPI to device ID table

3 years agomisc: enclosure: replace snprintf in show functions with sysfs_emit
Ye Guojin [Fri, 22 Oct 2021 09:06:04 +0000 (09:06 +0000)]
misc: enclosure: replace snprintf in show functions with sysfs_emit

coccicheck complains about the use of snprintf() in sysfs show
functions:
WARNING  use scnprintf or sprintf

Use sysfs_emit instead of scnprintf or sprintf makes more sense.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Ye Guojin <ye.guojin@zte.com.cn>
Link: https://lore.kernel.org/r/20211022090604.1065367-1-ye.guojin@zte.com.cn
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agoMerge tag 'icc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov...
Greg Kroah-Hartman [Fri, 22 Oct 2021 09:25:05 +0000 (11:25 +0200)]
Merge tag 'icc-5.16-rc1' of git://git./linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 5.16

Here are the changes for the 5.16-rc1 merge window consisting of just
driver updates. The highlight is the refactoring of some existing drivers
into common code and expanding some macros that will make adding QoS
support much easier.

Driver changes:
- icc-rpm: move bus clocks handling into qnoc_probe
- sdm660: expand DEFINE_QNODE macros
- sdm660: drop default/unused values
- sdm660: merge common code into icc-rpm
- icc-rpm: add support for QoS reg offset
- msm8916: expand DEFINE_QNODE macros
- msm8916: add support for AP-owned nodes
- msm8939: expand DEFINE_QNODE macros
- msm8939: add support for AP-owned nodes
- qcs404: expand DEFINE_QNODE macros
- qcom: drop DEFINE_QNODE macro
- samsung: describe drivers in KConfig

Signed-off-by: Georgi Djakov <djakov@kernel.org>
* tag 'icc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  interconnect: samsung: describe drivers in KConfig
  interconnect: qcom: drop DEFINE_QNODE macro
  interconnect: qcs404: expand DEFINE_QNODE macros
  interconnect: msm8939: add support for AP-owned nodes
  interconnect: msm8939: expand DEFINE_QNODE macros
  interconnect: msm8916: add support for AP-owned nodes
  interconnect: msm8916: expand DEFINE_QNODE macros
  interconnect: icc-rpm: add support for QoS reg offset
  interconnect: sdm660: merge common code into icc-rpm
  interconnect: sdm660: drop default/unused values
  interconnect: sdm660: expand DEFINE_QNODE macros
  interconnect: icc-rpm: move bus clocks handling into qnoc_probe

3 years agoMerge tag 'fsi-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/fsi...
Greg Kroah-Hartman [Fri, 22 Oct 2021 07:45:59 +0000 (09:45 +0200)]
Merge tag 'fsi-for-v5.16' of git://git./linux/kernel/git/joel/fsi into char-misc-next

Joel writes:

FSI changes for v5.16

 - SBEFIFO usersapce interfaces to perform FFDC (First Failure
   Data Capture) and detect timeouts

 - A fix to handle multiple messages in flight

* tag 'fsi-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/fsi:
  fsi: sbefifo: Use interruptible mutex locking
  fsi: sbefifo: Add sysfs file indicating a timeout error
  docs: ABI: testing: Document the SBEFIFO timeout interface
  hwmon: (occ) Provide the SBEFIFO FFDC in binary sysfs
  docs: ABI: testing: Document the OCC hwmon FFDC binary interface
  fsi: occ: Store the SBEFIFO FFDC in the user response buffer
  fsi: occ: Use a large buffer for responses
  hwmon: (occ) Remove sequence numbering and checksum calculation
  fsi: occ: Force sequence numbering per OCC

3 years agofsi: sbefifo: Use interruptible mutex locking
Eddie James [Tue, 3 Aug 2021 21:30:16 +0000 (16:30 -0500)]
fsi: sbefifo: Use interruptible mutex locking

Some SBE operations have extremely large responses and can require
several minutes to process the response. During this time, the device
lock must be held. If another process attempts an operation, it will
wait for the mutex for longer than the kernel hung task watchdog
allows. Therefore, use the interruptible function to lock the mutex.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210803213016.44739-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
3 years agofsi: sbefifo: Add sysfs file indicating a timeout error
Eddie James [Tue, 19 Oct 2021 21:17:49 +0000 (16:17 -0500)]
fsi: sbefifo: Add sysfs file indicating a timeout error

The SBEFIFO timeout error requires special handling in userspace
to do recovery operations. Add a sysfs file to indicate a timeout
error, and notify pollers when a timeout occurs.

This will be used by the openpower-occ-control application.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20211019211749.38059-3-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
3 years agodocs: ABI: testing: Document the SBEFIFO timeout interface
Eddie James [Tue, 19 Oct 2021 21:17:48 +0000 (16:17 -0500)]
docs: ABI: testing: Document the SBEFIFO timeout interface

Add documentation for the new sysfs entry that indicates whether or not
the SBE has timed out.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20211019211749.38059-2-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
3 years agohwmon: (occ) Provide the SBEFIFO FFDC in binary sysfs
Eddie James [Tue, 19 Oct 2021 20:53:07 +0000 (15:53 -0500)]
hwmon: (occ) Provide the SBEFIFO FFDC in binary sysfs

Save any FFDC provided by the OCC driver, and provide it to userspace
through a binary sysfs entry. Notify userspace pollers when there is an
error too.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20211019205307.36946-5-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
3 years agodocs: ABI: testing: Document the OCC hwmon FFDC binary interface
Eddie James [Tue, 19 Oct 2021 20:53:06 +0000 (15:53 -0500)]
docs: ABI: testing: Document the OCC hwmon FFDC binary interface

Add documentation for the new binary sysfs that will dump the SBEFIFO
FFDC.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20211019205307.36946-4-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
3 years agofsi: occ: Store the SBEFIFO FFDC in the user response buffer
Eddie James [Tue, 19 Oct 2021 20:53:05 +0000 (15:53 -0500)]
fsi: occ: Store the SBEFIFO FFDC in the user response buffer

If the SBEFIFO response indicates an error, store the response in the
user buffer and return an error. Previously, the user had no way of
obtaining the SBEFIFO FFDC.

The user's buffer now contains data in the event of a failure. No change
in the event of a successful transfer.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20211019205307.36946-3-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
3 years agofsi: occ: Use a large buffer for responses
Eddie James [Tue, 19 Oct 2021 20:53:04 +0000 (15:53 -0500)]
fsi: occ: Use a large buffer for responses

Allocate a large buffer for each OCC to handle response data. This
removes memory allocation during an operation, and also allows for
the maximum amount of SBE FFDC.

Previously for the putsram and attn commands, only 32 words would have
been available, and for getsram, only up to the size of the transfer.
SBE FFDC might be up to 8Kb.

The SBE interface expects data to be specified in units of words (4
bytes), defined as OCC_MAX_RESP_WORDS.

This change allows the full FFDC capture to be implemented, where before
it was not available.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20211019205307.36946-2-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
3 years agodt-bindings: iio: frequency: add adrf6780 doc
Antoniu Miclaus [Thu, 21 Oct 2021 11:32:44 +0000 (14:32 +0300)]
dt-bindings: iio: frequency: add adrf6780 doc

Add device tree bindings for the ADRF6780 Upconverter.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Link: https://lore.kernel.org/r/20211021113244.56936-2-antoniu.miclaus@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
3 years agoiio: frequency: adrf6780: add support for ADRF6780
Antoniu Miclaus [Thu, 21 Oct 2021 11:32:43 +0000 (14:32 +0300)]
iio: frequency: adrf6780: add support for ADRF6780

The ADRF6780 is a silicon germanium (SiGe) design, wideband,
microwave upconverter optimized for point to point microwave
radio designs operating in the 5.9 GHz to 23.6 GHz frequency
range.

Datasheet:
https://www.analog.com/media/en/technical-documentation/data-sheets/ADRF6780.pdf

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Link: https://lore.kernel.org/r/20211021113244.56936-1-antoniu.miclaus@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
3 years agoiio: chemical: scd4x: Add a scale for the co2 concentration reading
Roan van Dijk [Thu, 21 Oct 2021 14:00:18 +0000 (16:00 +0200)]
iio: chemical: scd4x: Add a scale for the co2 concentration reading

This patch adds a scale for the co2 concentration reading. The reading is
expressed in percent after applying the scale to the raw value.

Signed-off-by: Roan van Dijk <roan@protonic.nl>
Link: https://lore.kernel.org/r/20211021140018.3051213-1-roan@protonic.nl
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
3 years agodt-bindings: iio: io-channel-mux: allow duplicate channel, labels
Peter Rosin [Fri, 8 Oct 2021 22:11:30 +0000 (00:11 +0200)]
dt-bindings: iio: io-channel-mux: allow duplicate channel, labels

This is needed since an empty channel label is used to indicate an
unused channel, and there can be more that one of those.

Fixes the following problem reported by dtbs_check:
envelope-detector-mux: channels: ['', '', 'sync-1', 'in', 'out', 'sync-2', 'sys-reg', 'ana-reg'] has non-unique elements
arch/arm/boot/dts/at91-tse850-3.dt.yaml

Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Rosin <peda@axentia.se>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
3 years agodt-bindings: iio: io-channel-mux: add optional #io-channel-cells
Peter Rosin [Fri, 8 Oct 2021 22:11:21 +0000 (00:11 +0200)]
dt-bindings: iio: io-channel-mux: add optional #io-channel-cells

Needed for in-kernel use of the child channels of the mux.

Fixes problems like this, reported by dtbs_check:
adc0mux: '#io-channel-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dt.yaml

Suggested-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Signed-off-by: Peter Rosin <peda@axentia.se>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
3 years agoiio: adc: adc128s052: Simplify adc128_probe()
Christophe JAILLET [Thu, 26 Aug 2021 18:36:22 +0000 (20:36 +0200)]
iio: adc: adc128s052: Simplify adc128_probe()

Turn 'adc128_probe()' into a full resource managed function to simplify the
code.

This way, the .remove function can be removed.
Doing so, the only 'spi_get_drvdata()' call is removed and the
corresponding 'spi_set_drvdata()' can be removed as well.

Suggested-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Link: https://lore.kernel.org/r/4fa7fcc59c40e27af0569138d656c698a53dbd44.1630002770.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
3 years agoiio: multiplexer: iio-mux: Support settle-time-us property
Vincent Whitchurch [Thu, 7 Oct 2021 13:46:41 +0000 (15:46 +0200)]
iio: multiplexer: iio-mux: Support settle-time-us property

If the devicetree specifies that the hardware requires a settle time,
pass this time on to the mux APIs.

Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
Tested-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/20211007134641.13417-4-vincent.whitchurch@axis.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
3 years agodt-bindings: iio: io-channel-mux: Add property for settle time
Vincent Whitchurch [Thu, 7 Oct 2021 13:46:40 +0000 (15:46 +0200)]
dt-bindings: iio: io-channel-mux: Add property for settle time

Hardware may require some time for the muxed analog signals to settle
after the muxing is changed.  Allow this time to be specified in the
devicetree.

Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
Tested-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/20211007134641.13417-3-vincent.whitchurch@axis.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
3 years agomux: add support for delay after muxing
Vincent Whitchurch [Thu, 7 Oct 2021 13:46:39 +0000 (15:46 +0200)]
mux: add support for delay after muxing

Hardware may require some time for the muxed analog signals to settle
after the muxing is changed.  Allow users of the mux subsystem to
specify this delay with the new mux_control_select_delay() function (and
the _try equivalent).

Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
Tested-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/20211007134641.13417-2-vincent.whitchurch@axis.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
3 years agoarm64: errata: Add detection for TRBE write to out-of-range
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:42 +0000 (17:31 +0100)]
arm64: errata: Add detection for TRBE write to out-of-range

Arm Neoverse-N2 and Cortex-A710 cores are affected by an erratum where
the trbe, under some circumstances, might write upto 64bytes to an
address after the Limit as programmed by the TRBLIMITR_EL1.LIMIT.
This might -
  - Corrupt a page in the ring buffer, which may corrupt trace from a
    previous session, consumed by userspace.
  - Hit the guard page at the end of the vmalloc area and raise a fault.

To keep the handling simpler, we always leave the last page from the
range, which TRBE is allowed to write. This can be achieved by ensuring
that we always have more than a PAGE worth space in the range, while
calculating the LIMIT for TRBE. And then the LIMIT pointer can be
adjusted to leave the PAGE (TRBLIMITR.LIMIT -= PAGE_SIZE), out of the
TRBE range while enabling it. This makes sure that the TRBE will only
write to an area within its allowed limit (i.e, [head-head+size]) and
we do not have to handle address faults within the driver.

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-5-suzuki.poulose@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
3 years agoarm64: errata: Add workaround for TSB flush failures
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:41 +0000 (17:31 +0100)]
arm64: errata: Add workaround for TSB flush failures

Arm Neoverse-N2 (#2067961) and Cortex-A710 (#2054223) suffers
from errata, where a TSB (trace synchronization barrier)
fails to flush the trace data completely, when executed from
a trace prohibited region. In Linux we always execute it
after we have moved the PE to trace prohibited region. So,
we can apply the workaround every time a TSB is executed.

The work around is to issue two TSB consecutively.

NOTE: This errata is defined as LOCAL_CPU_ERRATUM, implying
that a late CPU could be blocked from booting if it is the
first CPU that requires the workaround. This is because we
do not allow setting a cpu_hwcaps after the SMP boot. The
other alternative is to use "this_cpu_has_cap()" instead
of the faster system wide check, which may be a bit of an
overhead, given we may have to do this in nvhe KVM host
before a guest entry.

Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-4-suzuki.poulose@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
3 years agoarm64: errata: Add detection for TRBE overwrite in FILL mode
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:40 +0000 (17:31 +0100)]
arm64: errata: Add detection for TRBE overwrite in FILL mode

Arm Neoverse-N2 and the Cortex-A710 cores are affected
by a CPU erratum where the TRBE will overwrite the trace buffer
in FILL mode. The TRBE doesn't stop (as expected in FILL mode)
when it reaches the limit and wraps to the base to continue
writing upto 3 cache lines. This will overwrite any trace that
was written previously.

Add the Neoverse-N2 erratum(#2139208) and Cortex-A710 erratum
(#2119858) to the detection logic.

This will be used by the TRBE driver in later patches to work
around the issue. The detection has been kept with the core
arm64 errata framework list to make sure :
  - We don't duplicate the framework in TRBE driver
  - The errata detection is advertised like the rest
    of the CPU errata.

Note that the Kconfig entries are not fully active until the
TRBE driver implements the work around.

Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
cc: Leo Yan <leo.yan@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-3-suzuki.poulose@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
3 years agoarm64: Add Neoverse-N2, Cortex-A710 CPU part definition
Suzuki K Poulose [Tue, 19 Oct 2021 16:31:39 +0000 (17:31 +0100)]
arm64: Add Neoverse-N2, Cortex-A710 CPU part definition

Add the CPU Partnumbers for the new Arm designs.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-2-suzuki.poulose@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
3 years agocounter: Fix use-after-free race condition for events_queue_size write
William Breathitt Gray [Thu, 21 Oct 2021 10:35:40 +0000 (19:35 +0900)]
counter: Fix use-after-free race condition for events_queue_size write

A race condition is possible when writing to events_queue_size where the
events kfifo is freed during the execution of a kfifo_in(), resulting in
a use-after-free. This patch prevents such a scenario by protecting the
events queue in operation with a spinlock and locking before performing
the events queue size adjustment.

The existing events_lock mutex is renamed to events_out_lock to reflect
that it only protects events queue out operations. Because the events
queue in operations can occur in an interrupt context, a new
events_in_lock spinlock is introduced and utilized.

Fixes: feff17a550c7 ("counter: Implement events_queue_size sysfs attribute")
Cc: David Lechner <david@lechnology.com>
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Link: https://lore.kernel.org/r/20211021103540.955639-1-vilhelm.gray@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocounter: Cleanup lingering atomic.h includes
William Breathitt Gray [Thu, 21 Oct 2021 10:35:14 +0000 (19:35 +0900)]
counter: Cleanup lingering atomic.h includes

With the removal of the chrdev_lock atomic flag, the counter-sysfs.c and
counter-chrdev.c no longer needs to include the atomic.h header file.

Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Link: https://lore.kernel.org/r/20211021103514.955622-1-vilhelm.gray@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>