Connor Abbott [Mon, 8 Mar 2021 18:34:42 +0000 (19:34 +0100)]
freedreno/computerator: Fix example assembly
Use the new bindless cat6 syntax for a6xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9463>
Connor Abbott [Mon, 8 Mar 2021 18:10:24 +0000 (19:10 +0100)]
ir3/parser: Fix parsing of "0.0" in @const line
Trying to specify a floating-point value in a @const line would result
in it getting interpreted as a FLUT value and failing parsing. Fix this
by making the various FLUT tokens include the surrounding parentheses.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9463>
Marek Vasut [Thu, 21 Jan 2021 01:12:31 +0000 (02:12 +0100)]
etnaviv: Fix point sprite Z,W coordinate replacement
Mesa fixed pipeline texture loading on programmable pipeline hardware emits
a generic fragment shader program which contains gl_TexCoord.xyzw as a vec4
and then expects to configure the varying assignments to the shader in the
pipeline command stream, to select what is wired to the XYZW fragment shader
inputs.
This gl_TexCoord.xyzw is turned into texture load with projection (TGSI TXP
opcode, similar for NIR). Texture load with projection does not exist in the
Vivante GPU as a dedicated opcode and is emulated. The shader program first
divides texture coordinates XYZ by projector W and then applies regular TEX
opcode to load the texture (i.e. TEX(gl_TexCoord.xyzw/gl_TexCoord.wwww)).
For point sprites, XY are the point coordinates from VS, Z=0 and W=1, always.
The Vivante GPU can only configure varying to be either of -- point coord X,
point coord Y, used, unused -- which covers XYZ, but not W. Z is fine because
unused means 0.
W used to be 0 too before this patch and that led to division by 0 in shader.
The only known way to solve this is to set Z=0, W=1 in the shader program
itself if the point sprites are enabled. This means we have to generate a
special shader variant which does extra SET to set the W=1 in case the point
sprites are enabled.
In case of TGSI, emitting the SET.TRUE opcode permits setting W=1 without
allocating additional constants. With NIR, use nir_lower_texcoord_replace()
to lower TEXn to PNTC, which sets Z=0, W=1, and let NIR optimize the shader.
Note that nir_lower_texcoord_replace() must be called before input linking
is set up, as it might add new FS input.
Also note that it should be possible to simply drop PIPE_CAP_POINT_SPRITE
in the long run, ST would then apply the same optimization pass, but that
option is so far misbehaving. And for etnaviv TGSI this is not applicable
yet.
This fixes neverball point sprites (exit cylinder stars) and eglretrace of
gl4es pointsprite test:
https://github.com/ptitSeb/gl4es/blob/master/traces/pointsprite.tgz
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8618>
Iago Toral Quiroga [Thu, 4 Mar 2021 13:13:31 +0000 (14:13 +0100)]
v3dv: call util_cpu_detect() when initializing the instance
Fixes this assert in debug builds:
in __GI___assert_fail (assertion=0x7ffff731f66b "util_cpu_caps.nr_cpus >= 1", file=0x7ffff731f650 "../src/util/u_cpu_detect.h", line=116,
function=0x7ffff7323280 <__PRETTY_FUNCTION__.11654> "util_get_cpu_caps") at assert.c:101
in util_get_cpu_caps () at ../src/util/u_cpu_detect.h:116
in _mesa_float_to_float16_rtz (val=0) at ../src/util/half_float.h:93
in util_format_r16g16b16a16_float_pack_rgba_float (dst_row=0x7fffffffbdc0 "", dst_stride=0, src_row=0x7fffffffbf90, src_stride=0, width=1, height=1)
at src/util/format/u_format_table.c:13459
in util_format_pack_rgba (format=PIPE_FORMAT_R16G16B16A16_FLOAT, dst=0x7fffffffbdc0, src=0x7fffffffbf90, w=1) at ../src/util/format/u_format.h:1525
in util_pack_color (rgba=0x7fffffffbf90, format=PIPE_FORMAT_R16G16B16A16_FLOAT, uc=0x7fffffffbdc0) at ../src/gallium/auxiliary/util/u_pack_color.h:432
in v3dv_get_hw_clear_color (color=0x7fffffffbf90, internal_type=6, internal_size=8, hw_color=0x7fffffffbf10) at ../src/broadcom/vulkan/v3dv_cmd_buffer.c:1241
v2: move call from physical device to instance init.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9408>
Iago Toral Quiroga [Tue, 9 Mar 2021 08:20:50 +0000 (09:20 +0100)]
broadcom/compiler: disallow ldunif during ldvary sequences if possible
This restores many of the hurt shaders from the previous patch at the
expense of re-adding ldvary tracking in the scheduler.
total instructions in shared programs:
13760415 ->
13755738 (-0.03%)
instructions in affected programs: 1207560 -> 1202883 (-0.39%)
helped: 5080
HURT: 1731
Instructions are helped.
total max-temps in shared programs: 2322991 -> 2322828 (<.01%)
max-temps in affected programs: 5063 -> 4900 (-3.22%)
helped: 229
HURT: 108
Max-temps are helped.
total sfu-stalls in shared programs: 31827 -> 31545 (-0.89%)
sfu-stalls in affected programs: 478 -> 196 (-59.00%)
helped: 304
HURT: 21
Sfu-stalls are helped.
total inst-and-stalls in shared programs:
13792242 ->
13787283 (-0.04%)
inst-and-stalls in affected programs: 1220856 -> 1215897 (-0.41%)
helped: 5162
HURT: 1697
Inst-and-stalls are helped.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9471>
Iago Toral Quiroga [Fri, 5 Mar 2021 11:36:51 +0000 (12:36 +0100)]
broadcom/compiler: simplify ldvary pipelining
We get optimal ldvary pipelining by doing the following:
1) Carefully merge a paired ldvary into the previous instruction when
possible.
2) When the above succeeds, flag the ldvary as scheduled immediately so
we can merge one of its children into the current instruction.
3) When scheduling ldvary sequences, only pick up instructions that are
part of the sequence to avoid picking up something that prevents
successful pipelining.
This patch skips 3) assuming some hurt shaders in exchange for better
scheduling flexibility during ldvary sequences. Besides eliminating most
of the code dedicated to special handling ldvary sequences, this also
usually allows us to produce better code by merging instructions that are
unrelated to ldvary sequences into the ldvary sequences, which is
particularly effective to fill up the gaps produced when scheduling the
first and last ldvary sequences as well as the gaps produced by flat
and noperspective varyings sequences that don't have both mul and add
instructions.
Notice that there are some hurt shaders, because some times the extra
scheduler flexibility can lead to picking up instructions that will
break a sequence without compensating for that, typically an ldunif
that prevents us from doing the fixup for a follow-up ldvary. We will
try to correct some of these cases with the next patch.
total instructions in shared programs:
13786037 ->
13760415 (-0.19%)
instructions in affected programs: 3201387 -> 3175765 (-0.80%)
helped: 16155
HURT: 4146
Instructions are helped.
total max-temps in shared programs: 2324834 -> 2322991 (-0.08%)
max-temps in affected programs: 22160 -> 20317 (-8.32%)
helped: 1340
HURT: 103
Max-temps are helped.
total sfu-stalls in shared programs: 30685 -> 31827 (3.72%)
sfu-stalls in affected programs: 782 -> 1924 (146.04%)
helped: 253
HURT: 1416
Inconclusive result.
total inst-and-stalls in shared programs:
13816722 ->
13792242 (-0.18%)
inst-and-stalls in affected programs: 3171642 -> 3147162 (-0.77%)
helped: 15331
HURT: 4179
Inst-and-stalls are helped.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9471>
Iago Toral Quiroga [Tue, 9 Mar 2021 08:19:45 +0000 (09:19 +0100)]
broadcom/compiler: move code block around
These checks depend on prev_inst being set, so move them down below
with all the other checks with the same requirement.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9471>
Iago Toral Quiroga [Mon, 8 Mar 2021 09:07:28 +0000 (10:07 +0100)]
broadcom/compiler: add an additional sanity check assert to the ldvary fixup
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9471>
Samuel Pitoiset [Fri, 5 Mar 2021 13:18:22 +0000 (14:18 +0100)]
radv: check if dynamic line stipple state changed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9458>
Samuel Pitoiset [Fri, 5 Mar 2021 13:15:37 +0000 (14:15 +0100)]
radv: check if dynamic VRS state changed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9458>
Samuel Pitoiset [Tue, 9 Mar 2021 13:12:14 +0000 (14:12 +0100)]
radv: do not declare push constants for DCC decompress on compute
We don't use push constants at all.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9475>
Sagar Ghuge [Wed, 10 Mar 2021 02:18:54 +0000 (18:18 -0800)]
intel/blorp: Fix condition to figure out aux_address
Fixes:
4dfabac4 ("blorp/gen12: Don't use aux address if implicit CCS")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9491>
Sagar Ghuge [Wed, 10 Mar 2021 03:11:37 +0000 (19:11 -0800)]
Revert "Revert "blorp/gen12: Don't use aux address if implicit CCS""
This reverts commit
cbd5d82bae794f323bb3d1508360afda69ca309d.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9491>
Mark Janes [Wed, 10 Mar 2021 00:33:31 +0000 (16:33 -0800)]
Revert "blorp/gen12: Don't use aux address if implicit CCS"
This reverts commit
4dfabac493614e98ca9b388cd4eea844e30b4bd0.
The offending commit broke tens of thousands of tests in Intel's Mesa
CI. Iris asserted in iris_use_pinned_bo at:
assert(bo->kflags & EXEC_OBJECT_PINNED);
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9489>
Christian Gmeiner [Tue, 9 Mar 2021 20:15:31 +0000 (21:15 +0100)]
ci/bare-metal: fix fastboot
Only copy results from NFS if BM_FASTBOOT_NFSROOT is set.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9482>
Eric Anholt [Tue, 9 Mar 2021 18:44:46 +0000 (10:44 -0800)]
freedreno/a5xx: Flush depth at the end of sysmem, like a6xx does.
On a6xx, this flush fixed some force-bypass tests. Doesn't affect
anything in our current a5xx test set.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9481>
Eric Anholt [Tue, 9 Mar 2021 18:43:04 +0000 (10:43 -0800)]
freedreno/a5xx: Introduce an event write helper like a6xx has.
This should help the next person trying to diff a5xx to a6xx behavior.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9481>
Marek Vasut [Sat, 6 Feb 2021 03:23:55 +0000 (04:23 +0100)]
compiler/nir: Increment shader input count and mark as used when adding new gl_PointCoord
In case a new gl_PointCoord shader input is created, increment shader
input count and set valid driver_location to the new input variable,
otherwise the input gets aliased to input 0 and shows up in NIR_PRINT
output as whatever shader input 0 is instead of gl_PointCoord. Also
set the input as used, otherwise it might get removed.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9214>
Dave Airlie [Mon, 8 Mar 2021 05:23:31 +0000 (15:23 +1000)]
shader_info: convert textures_used to a bitset.
For now keep it a bitset of 1 32-bit dword.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9456>
Dave Airlie [Tue, 9 Mar 2021 01:19:17 +0000 (11:19 +1000)]
util/bitset: add a new last bit api
This is to be used where the bitset is a predefined array size.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9456>
Dave Airlie [Tue, 9 Mar 2021 01:17:17 +0000 (11:17 +1000)]
util/panfrost/glsl: rename BITSET_LAST_BIT to BITSET_LAST_BIT_SIZED
The current users all pass in the number of dwords, but I'd like
to provide an interface that doess ARRAY_SIZE implicitly.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9456>
Chad Versace [Tue, 15 Dec 2020 04:13:30 +0000 (20:13 -0800)]
anv/image: Make memory layout more explicit
Future patches for VK_EXT_image_drm_format_modifier will, in some cases,
place the aux surface and fast clear state into a driver-private bo.
This increases the complexity of image memory layout to such a degree
that, to maintain sanity, we must improve how we track the layout.
Define new types:
- anv_image_memory_range
- anv_image_memory_binding
- anv_image_binding
Delete many fields in anv_image (and its children), and replace them
with the new types.
This patch does not change how anv_image tracks (or, rather, does not
track) the memory of gen12 implicit ccs. We should probably do that, but
that's left as a future exercise.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Fri, 26 Feb 2021 03:20:38 +0000 (19:20 -0800)]
blorp/gen12: Don't use aux address if implicit CCS
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Mon, 15 Feb 2021 18:58:37 +0000 (10:58 -0800)]
anv/image: Add anv_image_address()
It calculates the address to a surface or to metadata in the image.
Refactor only. No intended change in behavior.
This patch prepares for, and reduces much noise in, the upcoming patch
that rewrites image memory tracking.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Tue, 15 Dec 2020 06:02:27 +0000 (22:02 -0800)]
anv: Refactor anv_image_get_compression_state_addr
Reduces noise in the path that introduces anv_image_mem_range.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Tue, 15 Dec 2020 02:08:37 +0000 (18:08 -0800)]
anv/image: Clean up anv_GetImageMemoryRequirements2
If the image is disjoint, there is no reason to calculate image-global
memory requirements. Instead, only per-plane memory requirements are
needed.
Also, delete a large duplicate comment.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Thu, 10 Dec 2020 19:57:46 +0000 (11:57 -0800)]
anv: Add anv_surface_is_valid()
Current code checks for surface validity with `surface.isl.size_B > 0`.
Replace the checks with anv_surface_is_valid().
This prepares for adding new members to anv_surface that may
be accidentally used as a validity-indicator.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Fri, 5 Feb 2021 20:07:08 +0000 (12:07 -0800)]
anv/android: Fix size check for imported gralloc bo
1. Don't compare bo->size to image->size. An upcoming patch replaces
anv_image::size with complicated stuff. Instead, properly query the
required size with anv_GetImageMemoryRequirements.
2. Require the bo to fit the *aligned* image size.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Fri, 5 Feb 2021 20:07:08 +0000 (12:07 -0800)]
anv/image: Fix interpretation of 'disjoint'
The calculation of the subsurfaces' memory requirements assumed that the
image was disjoint if the image was created with
VK_IMAGE_CREATE_DISJOINT_BIT. But the Vulkan spec also requires that the
VkFormat be multi-planar.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Fri, 5 Feb 2021 20:07:08 +0000 (12:07 -0800)]
anv/image: Drop duplicate 'format' in anv_image_create()
Reduces the chance of misusing unitialized 'n_planes' and 'format'
during image creation.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Fri, 5 Feb 2021 20:07:08 +0000 (12:07 -0800)]
anv/image: Move vkGetImageMemoryRequirements
Move from anv_device.c to anv_image.c, to live alongside
vkBindImageMemory* and related code.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Fri, 5 Feb 2021 20:07:07 +0000 (12:07 -0800)]
anv/image: Rename anv_image_plane::surface -> primary_surface
This disambiguates code that accesses `image->planes[*].surface`.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Chad Versace [Fri, 5 Feb 2021 20:07:07 +0000 (12:07 -0800)]
anv/image: Replace bo_is_owned with from_gralloc (v2)
The name anv_image_plane::bo_is_owned will be made ambiguous by the
implementation of VK_EXT_image_drm_format_modifier, which may bind the
plane to multiple bo's.
Also, bo_is_owned was set if and only if the image was imported from
gralloc, and it was set only on the first plane. Therefore, let's rename
the field to from_gralloc, and move it to the toplevel of anv_image.
v2: Fix build in anv_android.c.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
Mike Blumenkrantz [Tue, 9 Mar 2021 14:54:01 +0000 (09:54 -0500)]
zink: fix instance/device versioning (for real this time)
the maximum allowable runtime version of vk can be computed by MIN(instance_version, device_version)
despite this, instances and devices can be created using the maximum version available
for each respective type. the restriction is applied only at the point of
enabling/applying features and extensions, meaning that to correctly handle this,
zink must:
1. create an instance using the maximum allowable version
2. select a physical device using the instance
3. compute MIN(instance_version, device_version)
4. only now begin to enable/use features requiring vk 1.1+
ref #4392
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9479>
Danylo Piliaiev [Tue, 9 Mar 2021 13:49:28 +0000 (15:49 +0200)]
freedreno/hw: fix populating branch targets in isa_decode pre-pass
pre-pass ran with branch_labels being false which made it no-op.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9476>
Eric Anholt [Mon, 22 Feb 2021 19:24:56 +0000 (11:24 -0800)]
docs: Add some documentation of game GL buffer object mapping behavior.
There are a variety of paths that apps take (this is by no means a
complete enumeration, I tried to keep going until I saw repeats but
eventually ran out of steam), and it should be useful to driver developers
writing their pipe_transfer_map() and invalidate_resource() calls to see a
bunch of the patterns without having to do performance debug on each app.
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9231>
Simon Ser [Mon, 1 Mar 2021 11:57:54 +0000 (12:57 +0100)]
egl: use render node for wl_drm if available
This causes clients to use the render node and skip DRM
authentication if a DRM render node is available.
Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9334>
Georg Lehmann [Mon, 8 Mar 2021 16:39:09 +0000 (17:39 +0100)]
vulkan/device_select: Only call vkGetPhysicalDeviceProperties2 if the device supports it.
vkGetPhysicalDeviceProperties2 is not allowed to be used with a 1.0 device
because it's a vulkan 1.1 function.
Closes: #4396
Fixes:
38ce8d4d ("vulkan/device_select: Stop using device properties 2.")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9462>
Gert Wollny [Thu, 4 Mar 2021 17:08:51 +0000 (18:08 +0100)]
virgl: implement support for PIPE_CAP_STRING_MARKER
With this command implemented messages emitted by
applications via glDebugMessageInsert will be forwarded
to the host.
v2: - remove check for feature in encode function, this
is covered in the state tracker (Rohan)
- reorder parameters in the encode function to the
order of the emit callback
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9433>
Jason Ekstrand [Mon, 8 Mar 2021 23:43:13 +0000 (17:43 -0600)]
anv: Drop anv_extensions.py
This should have been dropped in
27d496706eb4.
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9469>
Fan Yugang [Wed, 3 Mar 2021 00:54:12 +0000 (08:54 +0800)]
intel/tools: Show unknown instructions in decoded state.
Signed-off-by: Fan Yugang <yugang.fan@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9455>
Christian Gmeiner [Sun, 7 Mar 2021 10:05:52 +0000 (11:05 +0100)]
etnaviv: use nir_lower_idiv(..) before opt loop
nir_lower_idiv(..) creates during its lowering isub instructions.
Move nir_lower_idiv(..) before the opt loop to have a chance to
optimize/lower isub away. Also drop the drop the halti dependency to
make it easier to follow.
This fixes the following assert on GC3000:
Unhandled ALU op: isub
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9447>
Mike Blumenkrantz [Fri, 5 Mar 2021 14:10:17 +0000 (09:10 -0500)]
zink: unref ctx->framebuffer on context destroy
we aren't guaranteed to get a final set_framebuffer_state(NULL) to do
this for us
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9434>
Mike Blumenkrantz [Wed, 24 Feb 2021 23:27:31 +0000 (18:27 -0500)]
zink: don't pass so_info to ntv at all unless it's necessary
this is only needed for explicit xfb outputs
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 20:24:39 +0000 (15:24 -0500)]
zink: only export necessary xfb outputs to ntv
the full-variable outputs can be skipped, leaving only the varyings which
actually need explicit emission due to packed layouts or whatever
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 23:23:43 +0000 (18:23 -0500)]
zink: use slightly stricter check for update_so_info() callsite
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 23:20:55 +0000 (18:20 -0500)]
zink: pass so_info directly to update_so_info()
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 23:19:37 +0000 (18:19 -0500)]
zink: use info.has_transform_feedback_varyings to determine xfb enablement
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 23:01:16 +0000 (18:01 -0500)]
zink: rename variable in update_so_info()
be more consistent
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 14:39:49 +0000 (09:39 -0500)]
zink: evaluate existing slot map during program init and force new map as needed
if the number of explicit xfb outputs or new varyings added to the existing size
of the slot map would cause an overflow, we have to force a new slot map to
ensure that everything fits
this means iterating all the stages which can produce new varyings and calculating
all the slots required in order to compare against the max size available
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 20:00:22 +0000 (15:00 -0500)]
zink: handle direct xfb output from output variables
if an entire variable is being dumped into an xfb buffer, there's no need
to create an explicit xfb variable to copy the value into, and instead
the xfb attributes can just be set normally on the variable
this doesn't work for geometry shaders because outputs are per-vertex
fixes all KHR-GL46.enhanced_layouts xfb tests
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 19:57:03 +0000 (14:57 -0500)]
zink: stop allocating xfb slot map
this can just be inlined since it's a small static size
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 19:55:24 +0000 (14:55 -0500)]
zink: run more nir passes for tess shaders
running nir_lower_io_arrays_to_elements_no_indirects for only some stages
breaks location-setting for the stages which don't run it when
e.g., dmat2x3 variables are sometimes split across locations and
sometimes jammed into a single location (TCS I'm looking at you)
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 19:53:51 +0000 (14:53 -0500)]
zink: fix location usage for explicit xfb outputs
ensure that this accurately handles multi-slot emission
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Wed, 24 Feb 2021 19:52:11 +0000 (14:52 -0500)]
zink: fix slot mapping for fat io variables
big types like dmat2x3 need multiple slots, and trying to jam them into
single slots breaks everything
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Tue, 23 Feb 2021 16:27:20 +0000 (11:27 -0500)]
zink: fix streamout emission for super-enhanced layouts
if we get some crazy matrix types in here then we need to ensure that
we accurately unwrap them and copy the components
fixes KHR-GL46.enhanced_layouts.xfb_stride
Fixes:
1b130c42b8d ("zink: implement streamout and xfb handling in ntv")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Mike Blumenkrantz [Tue, 23 Feb 2021 16:24:35 +0000 (11:24 -0500)]
zink: remove ntv streamout assert
this was added during review, but it was never correct and just crashes
valid cases like streamout from a mat3x4 type
Fixes:
b6f8f3a3ba4 ("zink: fix streamout for clipdistance")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
Jesse Natalie [Mon, 8 Mar 2021 19:56:55 +0000 (11:56 -0800)]
microsoft/compiler: Don't separate phis while inserting upcasts
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4414
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9464>
Jesse Natalie [Mon, 8 Mar 2021 22:15:05 +0000 (14:15 -0800)]
nir: Add a nir_after_instr_and_phis helper
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9464>
Jason Ekstrand [Mon, 8 Mar 2021 22:14:12 +0000 (16:14 -0600)]
intel/mi_builder: Fix a couple of #ifs
All this does is remove a field on Gen7 and stop asserting on it. No
actual functional change.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9467>
Jason Ekstrand [Mon, 8 Mar 2021 22:09:34 +0000 (16:09 -0600)]
intel/mi_builder: Fix some indentation
This got lost in the rebase on top of the s/gen_mi_/mi_/ change
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9467>
Jordan Justen [Mon, 8 Feb 2021 20:23:38 +0000 (12:23 -0800)]
anv: Add mem heap/type support for local-mem
This will take effect in future patches when we are able to query the
kernel to set device->vram.size to a non-zero size.
Builds on Sagar's ("anv: Query memory region info") patch, and
re-organizes things as recommended by Lionel (and Jason).
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9324>
Jordan Justen [Thu, 11 Feb 2021 01:08:44 +0000 (17:08 -0800)]
anv: Put cache memory type first on non-llc platforms
Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9324>
Jordan Justen [Mon, 8 Feb 2021 20:23:38 +0000 (12:23 -0800)]
anv: Restructure mem heap/type init code
Just treat the llc and non-llc paths as separate cases. This will also
help when adding the local memory setup.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9324>
Sagar Ghuge [Wed, 1 Apr 2020 01:23:25 +0000 (18:23 -0700)]
anv: Add anv_memregion structure
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9324>
Caio Marcelo de Oliveira Filho [Thu, 4 Mar 2021 04:22:15 +0000 (20:22 -0800)]
spirv: Update a couple of comments in variable handling
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9440>
Caio Marcelo de Oliveira Filho [Wed, 3 Mar 2021 22:50:21 +0000 (14:50 -0800)]
spirv: Explicitly break when finished handling SpvDecorationBuiltIn
When tyding up this section in
1e5b09f42f6 ("spirv: Tidy some repeated
if checks by using a switch statement.") the break got lost. It is
not a real problem because the next case just break, but better to
have it explicitly here instead of a FALLTHROUGH.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9440>
Caio Marcelo de Oliveira Filho [Wed, 3 Mar 2021 22:45:46 +0000 (14:45 -0800)]
spirv: Reuse nir_is_per_vertex_io()
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9440>
Eric Anholt [Tue, 2 Mar 2021 20:10:49 +0000 (12:10 -0800)]
nir-to-tgsi: Fix handling of partial writemasks on SSA/REG decls.
In nouveau's PBO path with GS support and no VS layer export, we got:
intrinsic store_output (ssa_1, ssa_0) (0, 15, 0, 160, 128) /* base=0 */ /* wrmask=xyzw */ /* component=0 */ /* src_type=float32 */ /* location=0 slots=1 */ /* out_pos */
[...]
vec3 32 ssa_4 = mov ssa_3.xxx
intrinsic store_output (ssa_4, ssa_0) (0, 4, 0, 160, 128) /* base=0 */ /* wrmask=z */ /* component=0 */ /* src_type=float32 */ /* location=0 slots=1 *//* out_pos */
The mov's SSA value we would decide we could store directly to the output,
since nothing else used it. However, the store has a writemask, and the
ALU op was stomping over it instead of ANDing with the output decl's
existing writemask.
Fixes:
f79f382c81f8 ("nir_to_tgsi: Store directly to TGSI outputs when possible.")
Closes: #4380
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9376>
Jason Ekstrand [Wed, 3 Mar 2021 16:35:36 +0000 (10:35 -0600)]
nir: Make nir_ssa_def_rewrite_uses_after take an SSA value
This replaces the new_src parameter of nir_ssa_def_rewrite_uses_after()
with an SSA def, and rewrites all the users as needed.
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9383>
Jason Ekstrand [Wed, 3 Mar 2021 06:13:38 +0000 (00:13 -0600)]
nir: Make nir_ssa_def_rewrite_uses take an SSA value
This commit replaces the new_src parameter of nir_ssa_def_rewrite_uses()
with an SSA def, removes nir_ssa_def_rewrite_uses_ssa(), and rewrites
all the users as needed.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9383>
Jason Ekstrand [Wed, 3 Mar 2021 06:01:15 +0000 (00:01 -0600)]
nir: Add and use a new nir_ssa_def_rewrite_uses_src helper
This is currently an alias for nir_ssa_def_rewrite_uses but we move all
the instances which used it to write a non-SSA source to the newly named
helper.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9383>
Jason Ekstrand [Wed, 24 Feb 2021 05:22:13 +0000 (23:22 -0600)]
intel/mi_builder: Add control-flow support
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
Jason Ekstrand [Wed, 24 Feb 2021 05:21:20 +0000 (23:21 -0600)]
intel/mi_builder: Return an address from __gen_get_batch_address
While we're here, add __gen_get_batch_address declarations to more files
because we're about to start requiring it on all GFX 12.5+.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
Jason Ekstrand [Thu, 11 Apr 2019 16:34:45 +0000 (11:34 -0500)]
intel/mi_builder: Use softpin for tests on gen8+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
Jason Ekstrand [Wed, 24 Feb 2021 06:28:17 +0000 (00:28 -0600)]
intel/batch_decoder: Don't follow predicated MI_BATCH_BUFFER_START
The stuff after these may be executed so we want to decode it too.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
Jason Ekstrand [Wed, 24 Feb 2021 06:27:49 +0000 (00:27 -0600)]
genxml: Clean up MI_SET_PREDICATE
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
Jason Ekstrand [Sat, 6 Mar 2021 17:32:46 +0000 (11:32 -0600)]
intel/mi_builder: Add load/store_offest on GFX 12.5+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
Jason Ekstrand [Mon, 8 Mar 2021 15:54:41 +0000 (09:54 -0600)]
intel/mi_builder: Support inverted values in mi_store
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
Sagar Ghuge [Thu, 16 Jul 2020 19:43:13 +0000 (12:43 -0700)]
intel/mi_builder: Added support for command streamer shift operations
Add logical shift left and right operations support to mi_builder.
v1:
- Add GEN_GEN > 12 check (Jordan Justen)
- Add gen_mi_has_shift function (Jordan Justen)
- Fix commit title (Jordan Justen)
v2 (Jason Ekstrand):
- Add _imm versions of all of them
- Better handle corner-cases in _imm helpers
- Handle the power-of-two limitation for _imm versions
- Add tests
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
Jason Ekstrand [Fri, 26 Feb 2021 21:29:14 +0000 (15:29 -0600)]
intel/mi_builder: Add ieq/ine helpers
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
Jason Ekstrand [Sat, 6 Mar 2021 20:52:52 +0000 (14:52 -0600)]
intel/mi_builder: Use AddCSMMIOStartOffset for LRI
In
06cf838cbdcb03184 we started using the AddCSMMIOStartOffset feature
on Gen11+ but we missed one place.
Fixes:
06cf838cbdcb "intel/mi_builder: Support gen11 command-streamer..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
Connor Abbott [Thu, 29 Oct 2020 16:48:55 +0000 (17:48 +0100)]
freedreno/cffdec: Use rb trees for tracking buffers
Gets rid of the arbitrary size limitation, and should make decoding
faster with many buffers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8838>
Marek Olšák [Sun, 7 Mar 2021 11:48:55 +0000 (06:48 -0500)]
ac/surface: select best swizzle mode for 3D sampler performance
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9448>
Marek Olšák [Sat, 26 Sep 2020 01:07:02 +0000 (21:07 -0400)]
driconf: add performance tweaks for viewperf
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9449>
Tony Wasserka [Thu, 4 Mar 2021 16:32:39 +0000 (17:32 +0100)]
aco: Fix vector::reserve() being called with the wrong size
The container is moved from before and hence returns size 0. To get the
correct value, the new instruction container must be used instead.
This was flagged by clang-tidy. The fixed call still triggers the
corresponding diagnostic, hence this change silences it by adding a
redundant clear() after move.
Fixes:
7f1b537304d ("aco: add new NOP insertion pass for GFX6-9")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9432>
Alyssa Rosenzweig [Sat, 6 Mar 2021 18:51:29 +0000 (18:51 +0000)]
nir/lower_viewport_transform: Allow geom/tess
This pass needs to run on the last shader in a pipeline writing
gl_Position. In GLES2, that's always the vertex shader, but in ES3.2, it
can be a geometry or tessellation shader. The shared code works the same
in this case, just make the assert more generous.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9444>
Alyssa Rosenzweig [Sun, 7 Mar 2021 01:36:01 +0000 (01:36 +0000)]
pan/bi: Treat +DISCARD.f32 as message-passing
Likely errata, matches blob's handling. Closes #4387
total nops in shared programs: 86266 -> 86272 (<.01%)
nops in affected programs: 347 -> 353 (1.73%)
helped: 1
HURT: 2
total clauses in shared programs: 20813 -> 20833 (0.10%)
clauses in affected programs: 343 -> 363 (5.83%)
helped: 0
HURT: 20
Clauses are HURT.
total quadwords in shared programs: 91572 -> 91588 (0.02%)
quadwords in affected programs: 1322 -> 1338 (1.21%)
helped: 1
HURT: 14
Quadwords are HURT.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9446>
Alyssa Rosenzweig [Sun, 7 Mar 2021 01:30:05 +0000 (01:30 +0000)]
pan/bi: Set clause_state.message conservatively
Accidentally prevented scheduling message-passing instructions to
anywhere but the last ADD of a clause.
total nops in shared programs: 86280 -> 86266 (-0.02%)
nops in affected programs: 1609 -> 1595 (-0.87%)
helped: 9
HURT: 4
Inconclusive result (value mean confidence interval includes 0).
total clauses in shared programs: 20993 -> 20813 (-0.86%)
clauses in affected programs: 3488 -> 3308 (-5.16%)
helped: 116
HURT: 0
Clauses are helped.
total quadwords in shared programs: 91697 -> 91572 (-0.14%)
quadwords in affected programs: 12257 -> 12132 (-1.02%)
helped: 53
HURT: 2
Quadwords are helped.
Fixes:
f0c0082ab01 ("pan/bi: Schedule blocks")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9446>
Alyssa Rosenzweig [Sun, 7 Mar 2021 01:58:46 +0000 (01:58 +0000)]
pan/bi: Mark message-passing sources/dests live
More general, same data race.
Fixes:
44726101d1e ("pan/bi: Don't fill garbage")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9446>
Axel Davy [Sun, 7 Feb 2021 21:01:41 +0000 (22:01 +0100)]
st/nine: Set default dynamic_texture_workaround to true
Now the texture virtual memory usage is less of a problem,
we can use this workaround permanently.
In the spirit of the API it's certainly not the proper way
of implementing DYNAMIC textures (it seems they are ok
to have hidden copies in driver managed memory, but not have
virtual addressing space reduced), but it makes sense for us,
both performance wise, and to avoid bugs.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9377>
Axel Davy [Sat, 6 Feb 2021 22:30:56 +0000 (23:30 +0100)]
st/nine: Add driconf option to limit texture memory
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9377>
Axel Davy [Sat, 6 Feb 2021 21:24:25 +0000 (22:24 +0100)]
st/nine: Control the memfd virtual limit
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9377>
Axel Davy [Thu, 21 May 2020 19:52:46 +0000 (21:52 +0200)]
st/nine: Use the texture memory helper
Switch to the new texture RAM memory API.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9377>
Axel Davy [Thu, 4 Feb 2021 21:19:00 +0000 (22:19 +0100)]
st/nine: Add RAM memory manager for textures
On 32 bits, virtual memory is sometimes too short for apps.
Textures can hold virtual memory 3 ways:
1) MANAGED textures have a RAM copy of any texture
2) SYSTEMMEM is used to have RAM copy of DEFAULT textures
(to upload them for example)
3) Textures being mapped.
Nine cannot do much for 3). It's up to driver to really unmap textures
when possible on 32 bits to reduce virtual memory usage.
It's not clear whether on Windows anything special is done for
1) and 2). However there is clear indication some efforts have
been done on 3) to really unmap when it makes sense.
My understanding is that other implementations reduce the usage
of 1) by deleting the RAM copy once the texture is uploaded
(Dxvk's behaviour is controlled by evictManagedOnUnlock).
The obvious issue with that approach is whether the texture is
read by the application after some time. In that case,
we have to recreate the RAM backing from the GPU buffer.
And apps DO that. Indeed I found that for example Mass Effect 2
with High Texture mods (one of the crash case fixed by this patch serie),
When the character gets close to an object, a high res texture and replaces
the low res one. The high res one simply has more levels, and the game seems
to optimize reading the high res texture by retrieving the small-resolution
levels from the original low res texture.
In other words during gameplay, the game will randomly read MANAGED textures.
This is expected to be fast as the data is supposed to be in RAM...
Instead of taking that RAM copy eviction approach, this patchset
proposes a different approach: storing in memfd and release the
virtual memory until needed.
Basically instead of using malloc(), we create a memfd file
and map it. When the data doesn't seem to be accessed anymore,
we can unmap the memfd file.
If the data is needed, the memfd file is mapped again.
This trick enables to allocate more than 4GB on 32 bits apps.
The advantage of this approach over the RAM eviction one,
is that the load is much faster and doesn't block the GPU.
Of course we have problems if there's not enough memory to map the
memfd file. But the problem is the same for the RAM eviction approach.
Naturally on 64 bits, we do not use memfd.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9377>
Axel Davy [Thu, 4 Feb 2021 21:18:25 +0000 (22:18 +0100)]
st/nine: Add new function to know if we are the worker
This will be useful in a later patch
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9377>
Ilia Mirkin [Fri, 5 Mar 2021 23:33:57 +0000 (18:33 -0500)]
mesa: fix fbo attachment size check for RBs, make it trigger in ES2
Makes dEQP-GLES2.functional.fbo.completeness.size.distinct pass.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9441>
Ilia Mirkin [Fri, 5 Mar 2021 21:45:09 +0000 (16:45 -0500)]
mesa: fix conditions for fp16 render format eligibility
GLES3 adds all of these, but they're also available in GLES2 with an
ext.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4400
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9441>
Karol Herbst [Fri, 5 Mar 2021 09:46:48 +0000 (10:46 +0100)]
tegra/context: unwrap indirect_draw_count as well
Fixes:
22f6624ed318 "gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytes"
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9425>
Karol Herbst [Thu, 4 Mar 2021 19:32:10 +0000 (20:32 +0100)]
tegra/context: fix regression in tegra_draw_vbo
We should only pass in a new indirect_info object if we actually set valid
values in it.
Fixes:
abe8ef862fe5 "gallium: make pipe_draw_indirect_info * a draw_vbo parameter"
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9425>