Maxim Ostapenko [Mon, 19 Sep 2016 14:38:07 +0000 (17:38 +0300)]
Add temporal fix for https://github.com/google/sanitizers/issues/703.
Redefine SANITIZER_MMAP_RANGE_SIZE to (1UL << 40) for AArch64. This is a
workaround for https://github.com/google/sanitizers/issues/703 that speeds
up LSan and makes it usable for AArch64.
Change-Id: I31672b4feab6c91a2ec17fae76ab9d1d494aeb5c
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Maxim Ostapenko [Thu, 24 Mar 2016 12:12:07 +0000 (15:12 +0300)]
Backport recovery mode related stuff from LLVM mainline.
Backport ASan reports deduplication in recovery mode.
Backport from LLVM upstream r255228.
Optionally print reproducer cmdline in ASan reports.
Backport from LLVM upstream r258037.
Fix internal CHECK failure on double free in recovery mode.
Backport from LLVM upstream r259473.
Bail out on stack overflow in ASan recovery mode.
Backport from LLVM upstream r268713.
Change-Id: I11ad0ddf94e803a0f240bf76cdff529e1b72f576
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Dongkyun, Son [Thu, 2 Feb 2017 06:27:19 +0000 (15:27 +0900)]
packaging: explicitly added configure options
--enable-plugin (same as 4.9's)
--disable-libcc1 (new on 6.2's)
Change-Id: I005be6c5c888597cda64b0fe94b6d20399ef4c93
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>
Chan Lee [Thu, 19 Jan 2017 06:54:25 +0000 (15:54 +0900)]
packaging: remove plugin packages and files
Change-Id: I416cdc6e1bc6c687427a48796f1575a94f678f10
Signed-off-by: Chan Lee <chan45.lee@samsung.com>
Chan Lee [Thu, 19 Jan 2017 06:51:50 +0000 (15:51 +0900)]
packaging: disable lsan for arm and x86
Change-Id: I0ff97d8f50f386eabd49f8b5d1479f6645e52e90
Signed-off-by: Chan Lee <chan45.lee@samsung.com>
Dongkyun, Son [Wed, 11 Jan 2017 10:29:59 +0000 (19:29 +0900)]
packaging: add packaging
Change-Id: Icd5159e115d6827eaaff5ff59861d07438c29129
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>
Yvan Roux [Fri, 10 Feb 2017 13:33:22 +0000 (13:33 +0000)]
Make Linaro GCC Snapshot 6.3-2017.02.
gcc/
* LINARO-VERSION: Update.
Change-Id: Iacba5ee450e7d5173ae2ae0e1b60100281b09706
Yvan Roux [Mon, 6 Feb 2017 12:25:57 +0000 (13:25 +0100)]
Merge branches/gcc-6-branch rev 245201.
Change-Id: Ibc46d8742ef080683f302f5623b4907e9622ac4c
Christophe Lyon [Mon, 30 Jan 2017 10:21:03 +0000 (10:21 +0000)]
gcc/testsuite/
Backport from trunk r244891.
2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.dg/lto/pr54709_0.c: Require 'shared' effective target.
* gcc.dg/lto/pr61526_0.c: Likewise.
* gcc.dg/lto/pr64415_0.c: Likewise.
Change-Id: I5e933c61f5f661ec9dcbd04b9f04b28e5c4ec0fb
Christophe Lyon [Mon, 30 Jan 2017 10:21:39 +0000 (10:21 +0000)]
gcc/
Backport from trunk r244894.
2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/79145
* config/arm/arm.md (xordi3): Force constant operand into a register
for TARGET_IWMMXT.
gcc/testsuite/
Backport from trunk r244894.
2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/79145
* gcc.target/arm/pr79145.c: New test.
Change-Id: Ia1ee8c855c4324fc3226fbc04bd485911c2c6289
Christophe Lyon [Mon, 30 Jan 2017 10:20:34 +0000 (10:20 +0000)]
gcc/
Backport from trunk r244879.
2017-01-24 Eric Botcazou <ebotcazou@adacore.com>
PR target/77439
* config/arm/arm.c (arm_function_ok_for_sibcall): Add back restriction
for long calls with APCS frame and VFP.
gcc/testsuite/
Backport from trunk r244879.
2017-01-24 Eric Botcazou <ebotcazou@adacore.com>
* gcc.target/arm/vfp-longcall-apcs.c: New test.
Change-Id: I1663e7b52decbb7c5d9cb13c42136e10e44940b7
Christophe Lyon [Mon, 30 Jan 2017 10:19:18 +0000 (10:19 +0000)]
gcc/
Backport from trunk r244828.
2017-01-23 Andreas Tobler <andreast@gcc.gnu.org>
* config/aarch64/aarch64.c (aarch64_elf_asm_constructor): Increase
size of buf.
(aarch64_elf_asm_destructor): Likewise.
Change-Id: I22482fe29e558254616a97aeddd6b39c48718a85
Christophe Lyon [Tue, 24 Jan 2017 20:50:47 +0000 (20:50 +0000)]
gcc/testsuite/
Backport from trunk r244772.
2017-01-23 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (CHECK_POLY): New.
(CHECK_RESULTS_NAMED_NO_FP16): Call CHECK_POLY instead of CHECK
for poly*_t types.
* gcc.target/aarch64/advsimd-intrinsics/vcnt.c (FNNAME): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcombine.c (void
exec_vcombine): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcreate.c (FNNAME): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vget_high.c (void exec_vget_high): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vget_low.c (void exec_vget_low): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX.c (void exec_vldX): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c (void exec_vldX_dup): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c (void exec_vldX_lane): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vmul.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vmvn.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vqtbX.c (void exec_vqtbX): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrev.c (void exec_vrev): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vsXi_n.inc: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vsli_n.c (void vsli_extra): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vsri_n.c (void vsri_extra): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c (void exec_vstX_lane): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vtbX.c (void exec_vtbX): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c (int main):
Likewise.
(TEST_VGET_LANE): Cast to uint to avoid warning.
* gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc (void
FNNAME): Fix PRIx format for int16_t, int32_t, uint16_t, uint32_t.
* gcc.target/aarch64/advsimd-intrinsics/vfms_vfma_n.c (void
exec_vfma_vfms_n): Fix PRIx format for float64_t.
* gcc.target/aarch64/advsimd-intrinsics/vmovn.c (void exec_vmovn):
Fix PRIx format for int8_t, int16_t, uint8_t, uint16_t.
* gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c (void
exec_vmul_lane): Fix PRIx format for int16_t, uint16_t.
* gcc.target/aarch64/advsimd-intrinsics/vmul_n.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vmull.c (void exec_vmull):
Fix PRIx format for int16_t, int64_t, uint16_t, uint64_t. Call
CHECK_POLY instead of CHECK for poly64_t types.
* gcc.target/aarch64/advsimd-intrinsics/vmull_lane.c (void
exec_vmull_lane): Fix PRIx format for int64_t, uint64_t.
* gcc.target/aarch64/advsimd-intrinsics/vpXXX.inc:
Fix PRIx format for int8_t, int16_t, uint8_t, uint16_t.
* gcc.target/aarch64/advsimd-intrinsics/vqabs.c (void
vqabs_extra): Fix PRIx format for int16_t, int32_t, uint16_t,
uint32_t.
* gcc.target/aarch64/advsimd-intrinsics/vqdmull.c: Fix PRIx format
for int32_t, int64_t.
* gcc.target/aarch64/advsimd-intrinsics/vqneg.c (void
vqneg_extra): Fix PRIx format for int16_t, int32_t.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c
(TEST_VREINTERPRET_TO_POLY): New. (main): Call
TEST_VREINTERPRET_TO_POLY instead of TEST_VREINTERPRET where
needed.
Change-Id: I4e3d5d184b57c3d544daf384bebe1ca79a747cfe
Christophe Lyon [Tue, 24 Jan 2017 20:21:12 +0000 (20:21 +0000)]
gcc/
Backport from trunk r241965.
2016-11-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (arm_slowmul_tune): Use generic_extra_costs.
(arm_fastmul_tune): Likewise.
(arm_strongarm_tune): Likewise.
(arm_xscale_tune): Likewise.
(arm_9e_tune): Likewise.
(arm_marvell_pj4_tune): Likewise.
(arm_v6t2_tune): Likewise.
(arm_v6m_tune): Likewise.
(arm_fa726te_tune): Likewise.
gcc/
Backport from trunk r241966.
2016-11-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.opt (mold-rtx-costs): Delete.
(mnew-generic-costs): Delete.
* config/arm/arm-protos.h (struct tune_params): Delete rtx_costs field.
* config/arm/arm.c (arm_rtx_costs_1): Delete.
(arm_size_rtx_costs): Likewise.
(arm_slowmul_rtx_costs): Likewise.
(arm_fastmul_rtx_costs): Likewise.
(arm_xscale_rtx_costs): Likewise.
(arm_9e_rtx_costs): Likewise.
(arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune,
arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune,
arm_cortex_a8_tune, arm_cortex_a7_tune, arm_cortex_a15_tune,
arm_cortex_a53_tune, arm_cortex_a57_tune, arm_cortex_a9_tune,
arm_cortex_a12_tune, arm_v7m_tune, arm_v6m_tune, arm_fa726te_tune
arm_cortex_a5_tune, arm_xgene1_tune, arm_marvell_pj4_tune,
arm_cortex_a35_tune, arm_exynosm1_tune, arm_cortex_a73_tune,
arm_cortex_m7_tune):
Delete rtx_costs field.
(arm_new_rtx_costs): Rename to...
(arm_rtx_costs_internal): ... This.
(arm_rtx_costs): Remove old way of doing rtx costs.
Change-Id: I6d1dbef466bc74c932fe597f18b8ef6cbcfb4c1c
Christophe Lyon [Tue, 24 Jan 2017 20:49:45 +0000 (20:49 +0000)]
gcc/
Backport from trunk r244643.
2016-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_nopcrelative_literal_loads):
Delete.
* config/aarch64/aarch64.md
(aarch64_reload_movcp<GPF_TF:mode><P:mode>): Delete reference to
aarch64_nopcrelative_literal_loads.
(aarch64_reload_movcp<VALL:mode><P:mode>): Likewise.
Change-Id: I734b2d4ee36a58c79daee33a2d221799e6c1efe2
Christophe Lyon [Tue, 24 Jan 2017 20:50:22 +0000 (20:50 +0000)]
gcc/
Backport from trunk r244716.
2017-01-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71270
* config/arm/arm.c (neon_valid_immediate): Reject vector constants
in big-endian mode when they are not a single duplicated value.
Change-Id: Ic4d9bfae5ac18f63895ad5d4206027ce7cbcccd6
Christophe Lyon [Tue, 24 Jan 2017 20:49:19 +0000 (20:49 +0000)]
gcc/
Backport from trunk r244613.
2017-01-19 Richard Earnshaw <rearnsha@arm.com>
PR rtl-optimization/79121
* expr.c (expand_expr_real_2, case LSHIFT_EXPR): Look at the signedness
of the inner type when shifting an extended value.
gcc/testsuite/
Backport from trunk r244613.
2017-01-19 Richard Earnshaw <rearnsha@arm.com>
PR rtl-optimization/79121
* gcc.c-torture/execute/pr79121.c: New test.
Change-Id: If91063c6b5f6a7ce9b0ba96c75c04e6cd7a56bb4
Christophe Lyon [Tue, 24 Jan 2017 20:44:41 +0000 (20:44 +0000)]
gcc/
Backport from trunk r243820.
2016-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78694
* config/arm/arm.c (dump_minipool): Copy mp->value before emitting it
in the minipool to avoid invalid RTL sharing.
gcc/testsuite/
Backport from trunk r243820.
2016-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78694
* gcc.c-torture/compile/pr78694.c: New test.
Change-Id: Id655a90d077824831e9b365e52e749957c78226b
Christophe Lyon [Tue, 24 Jan 2017 20:48:18 +0000 (20:48 +0000)]
gcc/
Backport from trunk r244586.
2017-01-18 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_sched_adjust_priority)
New function.
(TARGET_SCHED_ADJUST_PRIORITY): Define target hook.
Change-Id: Id6f8c329d97ca125353b04ab813a453097bf45c0
Christophe Lyon [Tue, 24 Jan 2017 20:44:04 +0000 (20:44 +0000)]
gcc/
Backport from trunk r243755.
2016-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.md: New define_split above insv<mode>.
gcc/testsuite/
Backport from trunk r243755.
2016-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/ubfx_lsr_1.c: New test.
gcc/
Backport from trunk r243756.
2016-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.md: New define_split above bswap<mode>2.
gcc/testsuite/
Backport from trunk r243756.
2016-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/ubfiz_lsl_1.c: New test.
Change-Id: Ic891f120d65097d78a92ce5133c25d0710cf7405
Christophe Lyon [Tue, 24 Jan 2017 20:42:56 +0000 (20:42 +0000)]
gcc/
Backport from trunk r243744.
2016-12-16 Wilco Dijkstra <wdijkstr@arm.com>
* config/arm/arm.c (thumb_core_reg_alloc_order): Swap R12 and R14.
Change-Id: I31f4f5221b9bcb265cb8e461bcb028ee9e98c92a
Christophe Lyon [Tue, 24 Jan 2017 20:43:30 +0000 (20:43 +0000)]
gcc/
Backport from trunk r243745.
2016-12-16 Wilco Dijkstra <wdijkstr@arm.com>
* config/arm/arm.md (subsi3_carryin): Add Thumb-2 RSC #0.
(arm_negdi2) Rename to negdi2_insn, allow on Thumb-2.
* config/arm/thumb2.md (thumb2_negdi2): Remove pattern.
Change-Id: I596cd552bba3152c81f96e3e9aa9c47195e09c9f
Christophe Lyon [Tue, 24 Jan 2017 20:40:20 +0000 (20:40 +0000)]
gcc/
Backport from trunk r243011.
2016-11-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78362
* config/aarch64/aarch64.md (add<mode>3): Extract inner expression
from a subreg in operands[1] and don't call REGNO on a non-reg
expression when deciding to force operands[2] into a reg.
gcc/testsuite/
Backport from trunk r243011.
2016-11-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78362
* gcc.c-torture/compile/pr78362.c: New test.
Change-Id: I7c910ef24d5731c4bf14fae312da071d716cf1fb
Christophe Lyon [Tue, 24 Jan 2017 20:39:22 +0000 (20:39 +0000)]
gcc/testsuite/
Backport from trunk r242821.
2016-11-23 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* gcc.target/aarch64/fmaxmin.c : Add -fno-vect-cost-model.
* gcc.target/aarch64/fmul_fcvt_2.c : Likewise.
* gcc.target/aarch64/vect-abs-compile.c : Likewise.
* gcc.target/aarch64/vect-clz.c : Likewise.
* gcc.target/aarch64/vect-fcm-eq-d.c : Likewise.
* gcc.target/aarch64/vect-fcm-ge-d.c : Likewise.
* gcc.target/aarch64/vect-fcm-gt-d.c : Likewise.
* gcc.target/aarch64/vect-fmovd-zero.c : Likewise.
* gcc.target/aarch64/vect-fmovd.c : Likewise.
* gcc.target/aarch64/vect-fmovf-zero.c : Likewise.
* gcc.target/aarch64/vect-fmovf.c : Likewise.
* gcc.target/aarch64/vect_ctz_1.c : Likewise.
gcc/testsuite/
Backport from trunk r242827.
2016-11-23 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* gcc.target/aarch64/ldp_stp_1.c : Add -mcpu=generic.
* gcc.target/aarch64/store-pair-1.c : Likewise.
Change-Id: I554995f86636a9d3f9828fa7ae05406b5230be2b
Christophe Lyon [Tue, 24 Jan 2017 20:25:42 +0000 (20:25 +0000)]
gcc/
Backport from trunk r242471.
2016-11-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78364
* config/arm/arm.md (*extv_reg): Restrict operands 2 and 3 to the
proper ranges for an SBFX instruction.
(extzv_t2): Likewise for UBFX.
Change-Id: I94a24294a7de7cf1c02fd841f4b184206520542e
Christophe Lyon [Tue, 24 Jan 2017 20:24:50 +0000 (20:24 +0000)]
gcc/
Backport from trunk r242384.
2016-11-14 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.md (aarch64_ashl_sisd_or_int_<mode>3)
Use bfx attribute.
(aarch64_lshr_sisd_or_int_<mode>3): Likewise.
(aarch64_ashr_sisd_or_int_<mode>3): Likewise.
(<optab>si3_insn_uxtw): Likewise.
(<optab><mode>3_insn): Likewise.
(<ANY_EXTEND:optab><GPI:mode>_ashl<SHORT:mode>): Likewise.
(zero_extend<GPI:mode>_lshr<SHORT:mode>): Likewise.
(extend<GPI:mode>_ashr<SHORT:mode>): Likewise.
(<optab><mode>): Likewise.
(insv<mode>): Likewise.
(andim_ashift<mode>_bfiz): Likewise.
* config/aarch64/thunderx.md (thunderx_shift): Add bfx.
* config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.
* config/arm/cortex-a57.md (cortex_a57_alu): Add bfx.
* config/arm/exynos-m1.md (exynos_m1_alu): Add bfx.
(exynos_m1_alu_p): Likewise.
* config/arm/types.md: Add bfx.
* config/arm/xgene1.md (xgene1_bfm): Add bfx.
gcc/
Backport from trunk r242385.
2016-11-14 Wilco Dijkstra <wdijkstr@arm.com>
* config/arm/cortex-a57.md (cortex_a57_alu): Move extend here, bfm...
(cortex_a57_alu_shift): ...here.
Change-Id: Iae492f8d77e9dfecb62dcee384f4db2abfbba6ae
Christophe Lyon [Tue, 24 Jan 2017 20:23:20 +0000 (20:23 +0000)]
gcc/
Backport from trunk r242383.
2016-11-14 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (cortexa57_vector_cost):
Change vec_stmt_cost, vec_align_load_cost and vec_unalign_load_cost.
Change-Id: Ica758a72d803d572db08b6bd23ffed90d5b71ad4
Christophe Lyon [Tue, 24 Jan 2017 20:15:28 +0000 (20:15 +0000)]
libgcc/
Backport from trunk r238215.
2016-07-11 Hale Wang <hale.wang@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/lib1funcs.S: Add new wrapper.
Change-Id: I46326f9f5e5db3bda9c87a514e8b987883d8fede
Christophe Lyon [Wed, 11 Jan 2017 17:01:17 +0000 (18:01 +0100)]
gcc/
Backport from trunk r244322.
2017-01-11 Wilco Dijkstra <wdijkstr@arm.com>
* config/arm/cortex-a53.md: Add bypasses for
cortex_a53_r2f_cvt.
(cortex_a53_r2f): Only use for transfers.
(cortex_a53_f2r): Likewise.
(cortex_a53_r2f_cvt): Add reservation for conversions.
(cortex_a53_f2r_cvt): Likewise.
Change-Id: I2ea61c2da9127d3c2367227ad74a1a3d4bf76ab6
Christophe Lyon [Wed, 11 Jan 2017 17:00:37 +0000 (18:00 +0100)]
gcc/
Backport from trunk r244321.
2017-01-11 Tamar Christina <tamar.christina@arm.com>
* config/arm/arm_neon.h: Add __artificial__ and gnu_inline
to all inlined functions, change static to extern.
Change-Id: I2da244ae2cc8b480e301a010e225781d1bf405b9
Christophe Lyon [Wed, 11 Jan 2017 22:14:47 +0000 (23:14 +0100)]
gcc/
Backport from trunk r244320.
2017-01-11 Christophe Lyon <christophe.lyon@linaro.org>
PR target/78253
* config/arm/arm.c (legitimize_pic_address): Handle reference to
weak symbol.
(arm_assemble_integer): Likewise.
Change-Id: I477d2f99ddb334594188c53dd06d13591f941b97
Yvan Roux [Wed, 11 Jan 2017 17:08:17 +0000 (18:08 +0100)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: If36dadaddae3ffcb1e7928f3c46161d793ef9303
Yvan Roux [Wed, 11 Jan 2017 15:42:06 +0000 (16:42 +0100)]
Make Linaro GCC Snapshot 6.3-2017.01.
gcc/
* LINARO-VERSION: Update.
Change-Id: Ib9f8d4c91a8652966f82c8f72f0430706dd2d498
Christophe Lyon [Tue, 10 Jan 2017 15:05:34 +0000 (16:05 +0100)]
gcc/
Backport from trunk r240504.
2016-09-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
* tree.h (memmodel_from_int, memmodel_base, is_mm_relaxed,
is_mm_consume, is_mm_acquire, is_mm_release, is_mm_acq_rel,
is_mm_seq_cst, is_mm_sync): Move to ...
* memmodel.h: This. New file.
* builtins.c: Include memmodel.h.
* optabs.c: Likewise.
* tsan.c: Likewise.
* config/aarch64/aarch64.c: Likewise.
* config/alpha/alpha.c: Likewise.
* config/arm/arm.c: Likewise.
* config/i386/i386.c: Likewise.
* config/ia64/ia64.c: Likewise.
* config/mips/mips.c: Likewise.
* config/rs6000/rs6000.c: Likewise.
* config/sparc/sparc.c: Likewise.
* genconditions.c: Include memmodel.h in generated file.
* genemit.c: Likewise.
* genoutput.c: Likewise.
* genpeep.c: Likewise.
* genpreds.c: Likewise.
* genrecog.c: Likewise.
gcc/c-family/
Backport from trunk r240504.
2016-09-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
* c-common.c: Include memmodel.h.
gcc/
Backport from trunk r241507.
2016-10-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/constraints.md (Q constraint): Document its use for
Thumb-1.
(Pf constraint): New constraint for relaxed, consume or relaxed memory
models.
* config/arm/sync.md (atomic_load<mode>): Add new ARMv8-M Baseline only
alternatives to allow any register when memory model matches Pf and
thus lda is used, but only low registers otherwise. Use unpredicated
output template for Thumb-1 targets.
(atomic_store<mode>): Likewise for stl.
(arm_load_exclusive<mode>): Add new ARMv8-M Baseline only alternative
whose output template does not have predication.
(arm_load_acquire_exclusive<mode>): Likewise.
(arm_load_exclusivesi): Likewise.
(arm_load_acquire_exclusivesi): Likewise.
(arm_store_release_exclusive<mode>): Likewise.
(arm_store_exclusive<mode>): Use unpredicated output template for
Thumb-1 targets.
gcc/
Backport from trunk r241577.
2016-10-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_expand_compare_and_swap): Add new bdst local
variable. Add the new parameter to the insn generator. Set that
parameter to be CC flag for 32-bit targets, bval otherwise. Set the
return value from the negation of that parameter for Thumb-1, keeping
the logic unchanged otherwise except for using bdst as the destination
register of the compare_and_swap insn.
(arm_split_compare_and_swap): Add explanation about how is the value
returned to the function comment. Rename scratch variable to
neg_bval. Adapt initialization of variables holding operands to the
new operand numbers. Use return register to hold result of store
exclusive for Thumb-1, scratch register otherwise. Construct the
appropriate cbranch for Thumb-1 targets, keeping the logic unchanged
for 32-bit targets. Guard Z flag setting to restrict to 32bit targets.
Use gen_cbranchsi4 rather than hand-written conditional branch to loop
for strongly ordered compare_and_swap.
* config/arm/predicates.md (cc_register_operand): New predicate.
* config/arm/sync.md (atomic_compare_and_swap<mode>_1): Use a
match_operand with the new predicate to accept either the CC flag or a
destination register for the boolean return value, restricting it to
CC flag only via constraint. Adapt operand numbers accordingly.
gcc/
Backport from trunk r241578.
2016-10-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/sync.md (atomic_compare_and_swap<mode>_1): Add new ARMv8-M
Baseline only alternatives to (i) hold store atomic success value in a
return register rather than a scratch register, (ii) use a low register
for it and to (iii) ensure the cbranchsi insn generated by the split
respect the constraints of Thumb-1 cbranchsi4_insn and
cbranchsi4_scratch.
* config/arm/thumb1.md (cbranchsi4_insn): Add comment to indicate
constraints must match those in atomic_compare_and_swap.
(cbranchsi4_scratch): Likewise.
gcc/
Backport from trunk r241614.
2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_split_atomic_op): Add function comment. Add
logic to to decide whether to copy over old value to register for new
value.
* config/arm/sync.md: Add comments explaning why mode and code
attribute are not defined in iterators.md
(thumb1_atomic_op_str): New code attribute.
(thumb1_atomic_newop_str): Likewise.
(thumb1_atomic_fetch_op_str): Likewise.
(thumb1_atomic_fetch_newop_str): Likewise.
(thumb1_atomic_fetch_oldop_str): Likewise.
(atomic_exchange<mode>): Add new ARMv8-M Baseline only alternatives to
mirror the more restrictive constraints of the Thumb-1 insns after
split compared to Thumb-2 counterpart insns.
(atomic_<sync_optab><mode>): Likewise. Add comment to keep constraints
in sync with non atomic version.
(atomic_nand<mode>): Likewise.
(atomic_fetch_<sync_optab><mode>): Likewise.
(atomic_fetch_nand<mode>): Likewise.
(atomic_<sync_optab>_fetch<mode>): Likewise.
(atomic_nand_fetch<mode>): Likewise.
* config/arm/thumb1.md (thumb1_addsi3): Add comment to keep contraint
in sync with atomic version.
(thumb1_subsi3_insn): Likewise.
(thumb1_andsi3_insn): Likewise.
(thumb1_iorsi3_insn): Likewise.
(thumb1_xorsi3_insn): Likewise.
gcc/
Backport from trunk r241615.
2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.h (TARGET_HAVE_LDREX): Define for ARMv8-M Baseline.
(TARGET_HAVE_LDREXBH): Likewise.
(TARGET_HAVE_LDACQ): Likewise.
gcc/testsuite/
Backport from trunk r241615.
2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/atomic-comp-swap-release-acquire-3.c: New test.
* gcc.target/arm/atomic-op-acq_rel-3.c: Likewise.
* gcc.target/arm/atomic-op-acquire-3.c: Likewise.
* gcc.target/arm/atomic-op-char-3.c: Likewise.
* gcc.target/arm/atomic-op-consume-3.c: Likewise.
* gcc.target/arm/atomic-op-int-3.c: Likewise.
* gcc.target/arm/atomic-op-relaxed-3.c: Likewise.
* gcc.target/arm/atomic-op-release-3.c: Likewise.
* gcc.target/arm/atomic-op-seq_cst-3.c: Likewise.
* gcc.target/arm/atomic-op-short-3.c: Likewise.
gcc/
Backport from trunk r241848.
2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-arches.def (armv8-m.base): Set Cortex-M23 as
representative core for this architecture.
* config/arm/arm-cores.def (cortex-m23): Define new processor.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* config/arm/arm.c (arm_v6m_tune): Add Cortex-M23 to the list of cores
this tuning parameters apply to in the comment.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add Cortex-M23 to the list of
valid -mcpu options.
* doc/invoke.texi (ARM Options): Document new Cortex-M23 processor.
gcc/
Backport from trunk r241849.
2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-arches.def (armv8-m.main+dsp): Set Cortex-M33 as
representative core for this architecture.
* config/arm/arm-cores.def (cortex-m33): Define new processor.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add Cortex-M33 to the list of
valid -mcpu options.
* doc/invoke.texi (ARM Options): Document new Cortex-M33 processor.
gcc/
Backport from trunk r242596.
2016-11-18 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-protos.h (FL_NONE, FL_ANY, FL_CO_PROC, FL_ARCH3M,
FL_MODE26, FL_MODE32, FL_ARCH4, FL_ARCH5, FL_THUMB, FL_LDSCHED,
FL_STRONG, FL_ARCH5E, FL_XSCALE, FL_ARCH6, FL_VFPV2, FL_WBUF,
FL_ARCH6K, FL_THUMB2, FL_NOTM, FL_THUMB_DIV, FL_VFPV3, FL_NEON,
FL_ARCH7EM, FL_ARCH7, FL_ARM_DIV, FL_ARCH8, FL_CRC32, FL_SMALLMUL,
FL_NO_VOLATILE_CE, FL_IWMMXT, FL_IWMMXT2, FL_ARCH6KZ, FL2_ARCH8_1,
FL2_ARCH8_2, FL2_FP16INST): Reindent comment, add final dot when
missing and make value unsigned.
(arm_feature_set): Use unsigned entries instead of unsigned long.
gcc/
Backport from trunk r242597.
2016-11-18 Terry Guo <terry.guo@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* common/config/arm/arm-common.c (arm_target_thumb_only): New function.
* config/arm/arm-opts.h: Include arm-flags.h.
(struct arm_arch_core_flag): Define.
(arm_arch_core_flags): Define.
* config/arm/arm-protos.h: Include arm-flags.h
(FL_NONE, FL_ANY, FL_CO_PROC, FL_ARCH3M, FL_MODE26, FL_MODE32,
FL_ARCH4, FL_ARCH5, FL_THUMB, FL_LDSCHED, FL_STRONG, FL_ARCH5E,
FL_XSCALE, FL_ARCH6, FL_VFPV2, FL_WBUF, FL_ARCH6K, FL_THUMB2, FL_NOTM,
FL_THUMB_DIV, FL_VFPV3, FL_NEON, FL_ARCH7EM, FL_ARCH7, FL_ARM_DIV,
FL_ARCH8, FL_CRC32, FL_SMALLMUL, FL_NO_VOLATILE_CE, FL_IWMMXT,
FL_IWMMXT2, FL_ARCH6KZ, FL2_ARCH8_1, FL2_ARCH8_2, FL2_FP16INST,
FL_TUNE, FL_FOR_ARCH2, FL_FOR_ARCH3, FL_FOR_ARCH3M, FL_FOR_ARCH4,
FL_FOR_ARCH4T, FL_FOR_ARCH5, FL_FOR_ARCH5T, FL_FOR_ARCH5E,
FL_FOR_ARCH5TE, FL_FOR_ARCH5TEJ, FL_FOR_ARCH6, FL_FOR_ARCH6J,
FL_FOR_ARCH6K, FL_FOR_ARCH6Z, FL_FOR_ARCH6ZK, FL_FOR_ARCH6KZ,
FL_FOR_ARCH6T2, FL_FOR_ARCH6M, FL_FOR_ARCH7, FL_FOR_ARCH7A,
FL_FOR_ARCH7VE, FL_FOR_ARCH7R, FL_FOR_ARCH7M, FL_FOR_ARCH7EM,
FL_FOR_ARCH8A, FL2_FOR_ARCH8_1A, FL2_FOR_ARCH8_2A, FL_FOR_ARCH8M_BASE,
FL_FOR_ARCH8M_MAIN, arm_feature_set, ARM_FSET_MAKE,
ARM_FSET_MAKE_CPU1, ARM_FSET_MAKE_CPU2, ARM_FSET_CPU1, ARM_FSET_CPU2,
ARM_FSET_EMPTY, ARM_FSET_ANY, ARM_FSET_HAS_CPU1, ARM_FSET_HAS_CPU2,
ARM_FSET_HAS_CPU, ARM_FSET_ADD_CPU1, ARM_FSET_ADD_CPU2,
ARM_FSET_DEL_CPU1, ARM_FSET_DEL_CPU2, ARM_FSET_UNION, ARM_FSET_INTER,
ARM_FSET_XOR, ARM_FSET_EXCLUDE, ARM_FSET_IS_EMPTY,
ARM_FSET_CPU_SUBSET): Move to ...
* config/arm/arm-flags.h: This new file.
* config/arm/arm.h (TARGET_MODE_SPEC_FUNCTIONS): Define.
(EXTRA_SPEC_FUNCTIONS): Add TARGET_MODE_SPEC_FUNCTIONS to its value.
(TARGET_MODE_SPECS): Define.
(DRIVER_SELF_SPECS): Add TARGET_MODE_SPECS to its value.
gcc/testsuite/
Backport from trunk r242597.
2016-11-18 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/optional_thumb-1.c: New test.
* gcc.target/arm/optional_thumb-2.c: New test.
* gcc.target/arm/optional_thumb-3.c: New test.
gcc/
Backport from trunk r242696.
2016-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config.gcc: Allow new rmprofile value for configure option
--with-multilib-list.
* config/arm/t-rmprofile: New file.
* doc/install.texi (--with-multilib-list): Document new rmprofile value
for ARM.
gcc/testsuite/
Backport from trunk r243013.
2016-11-30 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (add_options_for_arm_arch_v6m): Add
-mfloat-abi=soft option.
(add_options_for_arm_arch_v8m_base): Likewise. Reindent containing
foreach loop.
gcc/
Backport from trunk r243015.
2016-11-30 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/t-rmprofile: Add mappings for Cortex-M23 and Cortex-M33.
gcc/
Backport from trunk r243187.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config.gcc (extra_headers): Added arm_cmse.h.
* config/arm/arm-arches.def (ARM_ARCH):
(armv8-m): Add FL2_CMSE.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-c.c
(arm_cpu_builtins): Added __ARM_FEATURE_CMSE macro.
* config/arm/arm-flags.h: Define FL2_CMSE.
* config/arm.c (arm_arch_cmse): New.
(arm_option_override): New error for unsupported cmse target.
* config/arm/arm.h (arm_arch_cmse): New.
* config/arm/arm.opt (mcmse): New.
* config/arm/arm_cmse.h: New file.
* doc/invoke.texi (ARM Options): Add -mcmse.
* doc/sourcebuild.texi (arm_cmse_ok): Add new effective target.
* doc/extend.texi: Add ARMv8-M Security Extensions entry.
gcc/testsuite/
Backport from trunk r243187.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse.exp: New.
* gcc.target/arm/cmse/cmse-1.c: New.
* gcc.target/arm/cmse/cmse-12.c: New.
* lib/target-supports.exp
(check_effective_target_arm_cmse_ok): New.
libgcc/
Backport from trunk r243187.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/t-arm (HAVE_CMSE): New.
* config/arm/cmse.c: New.
gcc/
Backport from trunk r243188.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New.
(arm_attribute_table): Added cmse_nonsecure_entry
(arm_compute_func_type): Handle cmse_nonsecure_entry.
(cmse_func_args_or_return_in_stack): New.
(arm_handle_cmse_nonsecure_entry): New.
* config/arm/arm.h (ARM_FT_CMSE_ENTRY): New macro define.
(IS_CMSE_ENTRY): Likewise.
* doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute.
gcc/testsuite/
Backport from trunk r243188.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-3.c: New.
gcc/
Backport from trunk r243189.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (use_return_insn): Change to return with bxns
when cmse_nonsecure_entry.
(output_return_instruction): Likewise.
(arm_output_function_prologue): Likewise.
(thumb_pop): Likewise.
(thumb_exit): Likewise.
(thumb2_expand_return): Assert that entry functions always have simple
returns.
(arm_expand_epilogue): Handle entry functions.
(arm_function_ok_for_sibcall): Disable sibcall for entry functions.
(arm_asm_declare_function_name): New.
* config/arm/arm-protos.h (arm_asm_declare_function_name): New.
* config/arm/elf.h (ASM_DECLARE_FUNCTION_NAME): Redefine to
use arm_asm_declare_function_name.
gcc/testsuite/
Backport from trunk r243189.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-4.c: New.
* gcc.target/arm/cmse/cmse-9.c: New.
* gcc.target/arm/cmse/cmse-10.c: New.
gcc/
Backport from trunk r243190.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (output_return_instruction): Clear
registers.
(thumb2_expand_return): Likewise.
(thumb1_expand_epilogue): Likewise.
(thumb_exit): Likewise.
(arm_expand_epilogue): Likewise.
(cmse_nonsecure_entry_clear_before_return): New.
(comp_not_to_clear_mask_str_un): New.
(compute_not_to_clear_mask): New.
* config/arm/thumb1.md (*epilogue_insns): Change length attribute.
* config/arm/thumb2.md (*thumb2_return): Disable for
cmse_nonsecure_entry functions.
(*thumb2_cmse_entry_return): Duplicate thumb2_return pattern for
cmse_nonsecure_entry functions.
gcc/testsuite/
Backport from trunk r243190.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse.exp: Test different multilibs separate.
* gcc.target/arm/cmse/struct-1.c: New.
* gcc.target/arm/cmse/bitfield-1.c: New.
* gcc.target/arm/cmse/bitfield-2.c: New.
* gcc.target/arm/cmse/bitfield-3.c: New.
* gcc.target/arm/cmse/baseline/cmse-2.c: New.
* gcc.target/arm/cmse/baseline/softfp.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: New.
gcc/
Backport from trunk r243191.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (gimplify.h): New include.
(arm_handle_cmse_nonsecure_call): New.
(arm_attribute_table): Added cmse_nonsecure_call.
(arm_comp_type_attributes): Deny compatibility of function types
with without the cmse_nonsecure_call attribute.
* doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute.
gcc/testsuite/
Backport from trunk r243191.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-3.c: Add tests.
* gcc.target/arm/cmse/cmse-4.c: Add tests.
* gcc.target/arm/cmse/cmse-15.c: New.
gcc/
Backport from trunk r243192.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (detect_cmse_nonsecure_call): New.
(cmse_nonsecure_call_clear_caller_saved): New.
(arm_reorg): Use cmse_nonsecure_call_clear_caller_saved.
(arm_function_ok_for_sibcall): Disable sibcalls for
cmse_nonsecure_call.
* config/arm/arm-protos.h (detect_cmse_nonsecure_call): New.
* config/arm/arm.md (call): Handle cmse_nonsecure_entry.
(call_value): Likewise.
(nonsecure_call_internal): New.
(nonsecure_call_value_internal): New.
* config/arm/thumb1.md (*nonsecure_call_reg_thumb1_v5): New.
(*nonsecure_call_value_reg_thumb1_v5): New.
* config/arm/thumb2.md (*nonsecure_call_reg_thumb2): New.
(*nonsecure_call_value_reg_thumb2): New.
* config/arm/unspecs.md (UNSPEC_NONSECURE_MEM): New.
gcc/testsuite/
Backport from trunk r243192.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse.exp: Run tests in mainline dir.
* gcc.target/arm/cmse/cmse-9.c: Added some extra tests.
* gcc.target/arm/cmse/cmse-14.c: New.
* gcc.target/arm/cmse/baseline/bitfield-4.c: New.
* gcc.target/arm/cmse/baseline/bitfield-5.c: New.
* gcc.target/arm/cmse/baseline/bitfield-6.c: New.
* gcc.target/arm/cmse/baseline/bitfield-7.c: New.
* gcc.target/arm/cmse/baseline/bitfield-8.c: New.
* gcc.target/arm/cmse/baseline/bitfield-9.c: New.
* gcc.target/arm/cmse/baseline/bitfield-and-union-1.c: New.
* gcc.target/arm/cmse/baseline/cmse-11.c: New.
* gcc.target/arm/cmse/baseline/cmse-13.c: New.
* gcc.target/arm/cmse/baseline/cmse-6.c: New.
* gcc.target/arm/cmse/baseline/union-1.c: New.
* gcc.target/arm/cmse/baseline/union-2.c: New.
* gcc.target/arm/cmse/mainline/bitfield-4.c: New.
* gcc.target/arm/cmse/mainline/bitfield-5.c: New.
* gcc.target/arm/cmse/mainline/bitfield-6.c: New.
* gcc.target/arm/cmse/mainline/bitfield-7.c: New.
* gcc.target/arm/cmse/mainline/bitfield-8.c: New.
* gcc.target/arm/cmse/mainline/bitfield-9.c: New.
* gcc.target/arm/cmse/mainline/bitfield-and-union-1.c: New.
* gcc.target/arm/cmse/mainline/union-1.c: New.
* gcc.target/arm/cmse/mainline/union-2.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-8.c: New.
libgcc/
Backport from trunk r243192.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/cmse_nonsecure_call.S: New.
* config/arm/t-arm: Compile cmse_nonsecure_call.S
gcc/
Backport from trunk r243193.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-builtins.c (arm_builtins): Define
ARM_BUILTIN_CMSE_NONSECURE_CALLER.
(bdesc_2arg): Add line for cmse_nonsecure_caller.
(arm_init_builtins): Handle cmse_nonsecure_caller.
(arm_expand_builtin): Likewise.
* config/arm/arm_cmse.h (cmse_nonsecure_caller): New.
gcc/testsuite/
Backport from trunk r243193.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-1.c: Add test for
cmse_nonsecure_caller.
gcc/
Backport from trunk r243216.
2016-12-01 Jeff Law <law@redhat.com>
* config/arm/arm.c (arm_handle_cmse_nonsecure_call): Remove unused
variable main_variant.
Change-Id: Ibe821b25c811c214c51d5cbaceb4ea960c619633
Christophe Lyon [Tue, 10 Jan 2017 15:38:47 +0000 (16:38 +0100)]
gcc/testsuite/
Backport from trunk r243973.
2016-12-29 Andrew Pinski <apinski@cavium.com>
* gcc.dg/atomic/c11-atomic-exec-5.c: Lower ITER_COUNT to 100
for AARCH64.
Change-Id: I78595ce9d2187fe883987a304cd277d98842c54b
Christophe Lyon [Tue, 10 Jan 2017 09:41:10 +0000 (10:41 +0100)]
gcc/
Backport from trunk r240117.
2016-09-13 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-builtins.c
(aarch64_init_simd_builtins): Fix builtin type signature printing.
gcc/
Backport from trunk r242914.
2016-11-28 Tamar Christina <tamar.christina@arm.com>
* config/arm/arm_neon.h (vget_lane_p64): New.
gcc/
Backport from trunk r242915.
2016-11-28 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-builtins.c (TYPES_SETREGP): Added poly type.
(TYPES_GETREGP): Likewise.
(TYPES_SHIFTINSERTP): Likewise.
(TYPES_COMBINEP): Likewise.
(TYPES_STORE1P): Likewise.
* config/aarch64/aarch64-simd-builtins.def
(combine): Added poly generator.
(get_dregoi): Likewise.
(get_dregci): Likewise.
(get_dregxi): Likewise.
(ssli_n): Likewise.
(ld1): Likewise.
(st1): Likewise.
* config/aarch64/arm_neon.h
(poly64x1x2_t, poly64x1x3_t): New.
(poly64x1x4_t, poly64x2x2_t): Likewise.
(poly64x2x3_t, poly64x2x4_t): Likewise.
(poly64x1_t): Likewise.
(vcreate_p64, vcombine_p64): Likewise.
(vdup_n_p64, vdupq_n_p64): Likewise.
(vld2_p64, vld2q_p64): Likewise.
(vld3_p64, vld3q_p64): Likewise.
(vld4_p64, vld4q_p64): Likewise.
(vld2_dup_p64, vld3_dup_p64): Likewise.
(vld4_dup_p64, vsli_n_p64): Likewise.
(vsliq_n_p64, vst1_p64): Likewise.
(vst1q_p64, vst2_p64): Likewise.
(vst3_p64, vst4_p64): Likewise.
(__aarch64_vdup_lane_p64, __aarch64_vdup_laneq_p64): Likewise.
(__aarch64_vdupq_lane_p64, __aarch64_vdupq_laneq_p64): Likewise.
(vget_lane_p64, vgetq_lane_p64): Likewise.
(vreinterpret_p8_p64, vreinterpretq_p8_p64): Likewise.
(vreinterpret_p16_p64, vreinterpretq_p16_p64): Likewise.
(vreinterpret_p64_f16, vreinterpret_p64_f64): Likewise.
(vreinterpret_p64_s8, vreinterpret_p64_s16): Likewise.
(vreinterpret_p64_s32, vreinterpret_p64_s64): Likewise.
(vreinterpret_p64_f32, vreinterpret_p64_u8): Likewise.
(vreinterpret_p64_u16, vreinterpret_p64_u32): Likewise.
(vreinterpret_p64_u64, vreinterpret_p64_p8): Likewise.
(vreinterpretq_p64_f64, vreinterpretq_p64_s8): Likewise.
(vreinterpretq_p64_s16, vreinterpretq_p64_s32): Likewise.
(vreinterpretq_p64_s64, vreinterpretq_p64_f16): Likewise.
(vreinterpretq_p64_f32, vreinterpretq_p64_u8): Likewise.
(vreinterpretq_p64_u16, vreinterpretq_p64_u32): Likewise.
(vreinterpretq_p64_u64, vreinterpretq_p64_p8): Likewise.
(vreinterpret_f16_p64, vreinterpretq_f16_p64): Likewise.
(vreinterpret_f32_p64, vreinterpretq_f32_p64): Likewise.
(vreinterpret_f64_p64, vreinterpretq_f64_p64): Likewise.
(vreinterpret_s64_p64, vreinterpretq_s64_p64): Likewise.
(vreinterpret_u64_p64, vreinterpretq_u64_p64): Likewise.
(vreinterpret_s8_p64, vreinterpretq_s8_p64): Likewise.
(vreinterpret_s16_p64, vreinterpret_s32_p64): Likewise.
(vreinterpretq_s32_p64, vreinterpret_u8_p64): Likewise.
(vreinterpret_u16_p64, vreinterpretq_u16_p64): Likewise.
(vreinterpret_u32_p64, vreinterpretq_u32_p64): Likewise.
(vset_lane_p64, vsetq_lane_p64): Likewise.
(vget_low_p64, vget_high_p64): Likewise.
(vcombine_p64, vst2_lane_p64): Likewise.
(vst3_lane_p64, vst4_lane_p64): Likewise.
(vst2q_lane_p64, vst3q_lane_p64): Likewise.
(vst4q_lane_p64, vget_lane_p64): Likewise.
(vget_laneq_p64, vset_lane_p64): Likewise.
(vset_laneq_p64, vcopy_lane_p64): Likewise.
(vcopy_laneq_p64, vdup_n_p64): Likewise.
(vdupq_n_p64, vdup_lane_p64): Likewise.
(vdup_laneq_p64, vld1_p64): Likewise.
(vld1q_p64, vld1_dup_p64): Likewise.
(vld1q_dup_p64, vld1q_dup_p64): Likewise.
(vmov_n_p64, vmovq_n_p64): Likewise.
(vst3q_p64, vst4q_p64): Likewise.
(vld1_lane_p64, vld1q_lane_p64): Likewise.
(vst1_lane_p64, vst1q_lane_p64): Likewise.
(vcopy_laneq_p64, vcopyq_laneq_p64): Likewise.
(vdupq_laneq_p64): Likewise.
gcc/
Backport from trunk r242916.
2016-11-28 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-simd-builtins.def
(BSL_P): Added di and v2di mode.
* config/aarch64/arm_neon.h
(vsriq_n_p64, vsri_n_p64): Added poly type.
(vextq_p64, vext_p64): Likewise.
(vceq_p64, vbslq_p64, vbsl_p64): Likewise.
gcc/testsuite/
Backport from trunk r242962.
2016-11-29 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(AARCH64_ONLY, CHECK_CRYPTO): New macros.
(Poly64x1_t, Poly64x2_t): Added types.
* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
(vmov_n_p64, vmovq_n_p64): Added.
(vld2_lane_p64, vld2q_lane_p64): Likewise.
(vld3_lane_p64, vld3q_lane_p64): Likewise.
(vld4_lane_p64, vld4q_lane_p64): Likewise.
(vst2_lane_p64, vst2q_lane_p64): Likewise.
(vst3_lane_p64, vst3q_lane_p64): Likewise.
(vst4_lane_p64, vst4q_lane_p64): Likewise.
(vget_lane_p64, vgetq_lane_p64): Likewise.
(vget_high_p64): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c:
Added AArch64 flags.
(vreint_vector, vreint_vector_res): Moved to header.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c:
Added Aarch64 flags.
(vreint_vector, vreint_vector_res): Moved to header.
gcc/
Backport from trunk r243287.
2016-12-06 Tamar Christina <tamar.christina@arm.com>
* gcc/config/aarch64/arm_neon.h
(vreinterpretq_p8_p128, vreinterpretq_p16_p128): Added.
(vreinterpret_p64_p16, vreinterpretq_p64_p128): Likewise.
(vreinterpretq_p64_p16, vreinterpretq_p128_p8): Likewise.
(vreinterpretq_p128_p16, vreinterpretq_p128_f16): Likewise.
(vreinterpretq_p128_f32, vreinterpretq_p128_p64): Likewise.
(vreinterpretq_p128_s64, vreinterpretq_p128_u64): Likewise.
(vreinterpretq_p128_s8, vreinterpretq_p128_s16): Likewise.
(vreinterpretq_p128_s32, vreinterpretq_p128_u8): Likewise.
(vreinterpretq_p128_u16, vreinterpretq_p128_u32): Likewise.
(vreinterpretq_f16_p128, vreinterpretq_f32_p128): Likewise.
(vreinterpretq_s64_p128, vreinterpretq_u64_p128): Likewise.
(vreinterpretq_s8_p128, vreinterpretq_s16_p128): Likewise.
(vreinterpretq_s32_p128, vreinterpretq_u8_p128): Likewise.
(vreinterpretq_u16_p128, vreinterpretq_u32_p128): Likewise.
gcc/testsuite/
Backport from trunk r243430.
2016-12-08 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(CHECK_CRYPTO): Remove.
(expected_poly64x1_t, expected_poly64x2_t): Remove
Change-Id: Id2d62aace7d11db1bcd66d239aa5f6c3cdf25a55
Christophe Lyon [Tue, 10 Jan 2017 14:13:12 +0000 (15:13 +0100)]
gcc/
Backport from trunk r242869.
2016-11-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
PR tree-optimization/77673
* tree-ssa-math-opts.c (struct symbolic_number): Add new src field.
(init_symbolic_number): Initialize src field from src parameter.
(perform_symbolic_merge): Select most dominated statement as the
source statement. Set src field of resulting n structure from the
input src with the lowest address.
(find_bswap_or_nop): Rename source_stmt into ins_stmt.
(bswap_replace): Rename src_stmt into ins_stmt. Initially get source
of load from src field rather than insertion statement. Cancel
optimization if statement analyzed is not dominated by the insertion
statement.
(pass_optimize_bswap::execute): Rename src_stmt to ins_stmt. Compute
dominance information.
gcc/testsuite/
Backport from trunk r242869.
2016-11-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
PR tree-optimization/77673
* gcc.dg/pr77673.c: New test.
gcc/
Backport from trunk r242870.
2016-11-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* tree-ssa-math-opts.c (struct symbolic_number): Improve comment.
Change-Id: I79c6f848a9b7d80130b151cb62c4f2f0c672053b
Yvan Roux [Mon, 9 Jan 2017 20:09:13 +0000 (21:09 +0100)]
Merge branches/gcc-6-branch rev 244220.
Change-Id: I9f2d907c75595859355f909019b9109011440154
Yvan Roux [Wed, 14 Dec 2016 15:11:17 +0000 (16:11 +0100)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: Id430e1b5a65024a895839e11db0662d0d90af206
Yvan Roux [Wed, 14 Dec 2016 13:47:07 +0000 (14:47 +0100)]
Make Linaro GCC Snapshot 6.2-2016.12.
gcc/
* LINARO-VERSION: Update.
Change-Id: Ic2b94e93d8261afe8017ada35d36f7c780298a7c
Yvan Roux [Tue, 13 Dec 2016 15:40:03 +0000 (16:40 +0100)]
Merge branches/gcc-6-branch rev 243594.
Change-Id: I681a233c1e96ce184d241bab38b61cd8ac8f08a8
Yvan Roux [Fri, 9 Dec 2016 11:54:22 +0000 (12:54 +0100)]
./
Backport from trunk r240949.
2016-10-10 Andreas Tobler <andreast@gcc.gnu.org>
* configure.ac: Add aarch64-*-freebsd*.
* configure: Regenerate.
gcc/
Backport from trunk r240949.
2016-10-10 Andreas Tobler <andreast@gcc.gnu.org>
* config.gcc: Add aarch64-*-freebsd* support.
* config.host: Likewise.
* config/aarch64/aarch64-freebsd.h: New file.
* config/aarch64/t-aarch64-freebsd: Ditto.
libgcc/
Backport from trunk r240949.
2016-10-10 Andreas Tobler <andreast@gcc.gnu.org>
* config.host: Add support for aarch64-*-freebsd*.
Change-Id: I7d3ce4b84d08de4f71d5e3e5076a66b462df1bf9
Yvan Roux [Fri, 9 Dec 2016 12:02:02 +0000 (13:02 +0100)]
gcc/
Backport from trunk r241791.
2016-11-26 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64-simd.md (aarch64_crypto_sha1hv4si):
New pattern.
(aarch64_be_crypto_sha1hv4si): New pattern.
Change-Id: Icf45bee1114d9ac5097ac38477ae1fb7a1b470e1
Yvan Roux [Fri, 9 Dec 2016 11:55:15 +0000 (12:55 +0100)]
gcc/
Backport from trunk r241116, 241119.
2016-10-13 Richard Earnshaw <rearnsha@arm.com>
* arm.h (TARGET_VFP): Unconditionally define to 1.
(arm_fpu_desc): Remove 'model' field.
(TARGET_FPU_MODEL): Delete.
* arm.c (all_fpus): Don't initialize the model field.
(arm_can_inline_p): Don't check the FPU model.
* arm-fpus.def: Remove redundant model field from all FPU
descriptions.
gcc/
Backport from trunk r241118, 241119.
2016-10-13 Richard Earnshaw <rearnsha@arm.com>
* arm.h (TARGET_VFP): Delete.
(TARGET_VFPD32): Remove references to TARGET_VFP.
(TARGET_VFP3, TARGET_VFP5): Likewise.
(TARGET_VFP_SINGLE, TARGET_VFP_DOUBLE): Likewise.
(TARGET_NEON_FP16): Likewise.
(TARGET_FMA): Likewise.
(TARGET_CRYPTO): Likewise.
(TARGET_NEON): Likewise.
(SECONDARY_OUTPUT_RELOAD_CLASS): Likewise.
(FUNCTION_ARG_REGNO_P): Likewise.
* arm.c (arm_option_check_internal): Likewise.
(arm_option_override): Likewise.
(use_return_insn): Likewise.
(arm_function_value_regno_p): Likewise.
(arm_apply_result_size): Likewise.
(use_vfp_abi): Likewise.
(arm_legitimate_address_outer_p): Likewise.
(thumb2_legitimate_address_p): Likewise.
(arm_legitimate_index_p): Likewise.
(thumb2_legitimate_index_p): Likewise.
(arm_legitimate_address): Likewise.
(arm_get_vfp_saved_size): Likewise.
(arm_emit_vfp_multi_reg_pop): Likewise.
(arm_get_frame_offsets): Likewise.
(arm_save_coproc_regs): Likewise.
(arm_hard_regno_mode_ok): Likewise.
(arm_expand_epilogue_apcs_frame): Likewise.
(arm_expand_epilogue): Likewise.
(arm_file_start): Likewise.
(arm_conditional_register_usage): Likewise.
(arm_validize_comparison): Use vfp_compare_operand directly.
* arm-builtins.c (arm_init_builtins): Remove references to TARGET_VFP.
(arm_expand_vfp_builtin): Use TARGET_HARD_FLOAT for detecting
unsupported usage.
(arm_atomic_assign_expand_fenv): Likewise.
* arm.md (divsf3): Likewise.
(arm_negsi2): Likewise.
(absdf2): Likewise.
(arm_movdi): Likewise.
(arm_movt): Likewise.
(cbranchsf4): Change predicate to vfp_compare_operand.
(cbranchdf4): Change predicate to vfp_compare_operand.
(cstorehf4): Change predicate to vfp_compare_operand.
(cstoresf4): Change predicate to vfp_compare_operand.
(cstoredf4): Change predicate to vfp_compare_operand.
(vfp_pop_multiple_with_writeback): Remove references to TARGET_VFP.
(movhi_insn_arch4, movhi_bytes): Likewise.
* constraints.md (Dt): Likewise.
(Dp): Likewise.
* iterators.md (SDF): Likewise.
* predicates.md (arm_float_compare_operand): Delete.
(const_double_vcvt_power_of_two_reciprocal): Remove references to
TARGET_VFP.
(const_double_vcvt_power_of_two): Likewise.
* thumb2.md thumb2_movsi_insn): Likewise.
* vfp.md (arm_movhi_vfp, thumb2_movhi_vfp): Likewise.
(movhf_vfp): Likewise.
(arm_movsi_vfp, thumb2_movsi_vfp): Likewise.
(movdi_vfp, movdi_vfp_cortexa8): Likewise.
(movsf_vfp, thumb2_movsf_vfp): Likewise.
(movdf_vfp, thumb2_movdf_vfp): Likewise.
(movsfcc_vfp, abssf2_vfp, negsf2_vfp, addsf3_vfp): Likewise.
(subsf3_vfp, divsf3_vfp): Likewise.
(mulsf3_vfp, mulsf3negsf_vfp, negmulsf3_vfp): Likewise.
(mulsf3addsf_vfp, (mulsf3subsf_vfp, mulsf3negsfaddsf_vfp): Likewise.
(mulsf3negsfsubsf_vfp): Likewise.
(truncsisf2_vfp, fixuns_truncsfsi2, floatsisf2_vfp): Likewise.
(floatunssisf2, sqrtsf2_vfp): Likewise.
(movcc_vfp): Likewise.
(cmpsf_split_vfp, cmpsf_trap_split_vfp): Likewise.
(cmpsf_vfp, cmpsf_trap_vfp): Likewise.
(push_multi_vfp): Likewise.
(set_fpscr, get_fpscr): Likewise.
* arm-c.c (arm_cpu_builtins): Unconditionally define __VFP_FP__.
Change-Id: Ia31339f87b894f8ef9944e782ac6a8db17feb3ed
Yvan Roux [Fri, 9 Dec 2016 12:00:26 +0000 (13:00 +0100)]
gcc/
Backport from trunk r241736.
2016-11-01 Bilyan Borisov <bilyan.borisov@arm.com>
Tamar Christina <tamar.christina@arm.com>
* config/arm/arm-c.c (arm_cpu_builtins): New macro definition.
* config/arm/arm_neon.h (vmaxnm_f32): New intrinsinc.
(vmaxnmq_f32): Likewise.
(vminnm_f32): Likewise.
(vminnmq_f32): Likewise.
* config/arm/arm_neon_builtins.def (vmaxnm): New builtin.
(vminnm): Likewise.
* config/arm/neon.md (neon_<fmaxmin_op><mode>, VCVTF): New
expander.
gcc/testsuite/
Backport from trunk r241736.
2016-11-01 Bilyan Borisov <bilyan.borisov@arm.com>
* gcc.target/arm/simd/vmaxnm_f32_1.c: New.
* gcc.target/arm/simd/vmaxnmq_f32_1.c: Likewise.
* gcc.target/arm/simd/vminnm_f32_1.c: Likewise.
* gcc.target/arm/simd/vminnmq_f32_1.c: Likewise.
gcc/testsuite/
Backport from trunk r241797.
2016-11-01 Tamar Christina <tamar.christina@arm.com>
* gcc.target/arm/simd/vmaxnm_f32_1.c (dg-require-effective-target):
Check for arm_v8_neon_hw.
* gcc.target/arm/simd/vmaxnmq_f32_1.c (dg-require-effective-target):
Likewise.
* gcc.target/arm/simd/vminnm_f32_1.c (dg-require-effective-target):
Likewise.
* gcc.target/arm/simd/vminnmq_f32_1.c(dg-require-effective-target):
Likewise.
Change-Id: I30c7b57e133fa41a3ea0ada0e5819ec645d28b45
Yvan Roux [Mon, 12 Dec 2016 13:19:10 +0000 (14:19 +0100)]
gcc/testsuite/
Backport from trunk r241957.
2016-11-08 Tamar Christina <tamar.christina@arm.com>
PR testsuite/78136
* gcc.dg/cpp/trad/trad.exp
(dg-runtest): Added $srcdir/$subdir/ to Include dirs.
* gcc.dg/cpp/trad/include.c: Use local header file.
gcc/testsuite/
Backport from trunk r242500.
2016-11-16 Tamar Christina <tamar.christina@arm.com>
PR testsuite/78136
* gcc.dg/cpp/trad/trad.exp
(dg-runtest): Moved $srcdir/$subdir/ to
DEFAULT_TRADCPPFLAGS.
Change-Id: I5271fc97361a49196ea7f5f57c4bdff8a1988405
Yvan Roux [Fri, 9 Dec 2016 11:56:39 +0000 (12:56 +0100)]
gcc/
Backport from trunk r241229.
2016-10-17 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR tree-optimization/71636
* match.pd (x & ((1 << b) - 1) -> x & ~(~0 << b)): New pattern.
gcc/testsuite/
Backport from trunk r241229.
2016-10-17 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* gcc.dg/pr71636-1.c: New test-case.
* gcc.dg/pr71636-2.c: Likewise.
Change-Id: Ie3ef5051eea791320865f339cb978a2c9e94aa0f
Yvan Roux [Fri, 9 Dec 2016 12:03:30 +0000 (13:03 +0100)]
gcc/
Backport from trunk r241958.
2016-11-08 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/t-aarch64 (aarch64-c.o): Depend on TARGET_H.
Change-Id: I7ffb83dbae1adc8b69a4e8b53f8df1ef2b28a43a
Yvan Roux [Fri, 9 Dec 2016 12:01:48 +0000 (13:01 +0100)]
gcc/
Backport from trunk r241790.
2016-11-02 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.md (add<mode>3): Remove
redundant code. Don't split frame based additions.
Change-Id: Icf72194a952010ebfa4b24a9941f587a30cd38ed
Yvan Roux [Fri, 9 Dec 2016 12:01:27 +0000 (13:01 +0100)]
gcc/
Backport from trunk r241777.
2016-11-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_register_saved_on_entry): Add
function comment.
(aarch64_next_callee_save): Likewise.
(aarch64_pushwb_single_reg): Likewise.
(aarch64_gen_storewb_pair): Likewise.
(aarch64_push_regs): Likewise.
(aarch64_gen_loadwb_pair): Likewise.
(aarch64_pop_regs): Likewise.
(aarch64_gen_store_pair): Likewise.
(aarch64_gen_load_pair): Likewise.
(aarch64_save_callee_saves): Likewise.
(aarch64_restore_callee_saves): Likewise.
Change-Id: I837088871c2b9bbe651818bfd5b362ea2925e75f
Yvan Roux [Fri, 9 Dec 2016 11:59:52 +0000 (12:59 +0100)]
gcc/
Backport from trunk r241686.
2016-10-30 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* config/arm/arm.c (arm_const_not_ok_for_debug_p): Use VAR_P.
Change-Id: I5b5356a7878821d4cc26bfb7b0d61bb9f663fbe4
Yvan Roux [Fri, 9 Dec 2016 11:59:02 +0000 (12:59 +0100)]
gcc/
Backport from trunk r241508.
2016-10-25 Wilco Dijkstra <wdijkstr@arm.com>
PR target/78041
* config/arm/neon.md (ashldi3_neon): Add "r 0 i" and "&r r i" variants.
Remove partial overlap check for shift by 1.
(ashldi3_neon): Likewise.
gcc/testsuite/
Backport from trunk r241508.
2016-10-25 Wilco Dijkstra <wdijkstr@arm.com>
PR target/78041
* gcc.target/arm/pr78041.c: New test.
Change-Id: I6f5331910f3f20e8d6f0f7a00a5c855a2acfdee2
Yvan Roux [Fri, 9 Dec 2016 11:58:32 +0000 (12:58 +0100)]
gcc/
Backport from trunk r241419.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_layout_frame):
Align FP callee-saves.
gcc/
Backport from trunk r241420.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_add_constant_internal):
Add extra argument to allow emitting the move immediate.
Use add/sub with positive immediate.
(aarch64_add_constant): Add inline function.
(aarch64_add_sp): Likewise.
(aarch64_sub_sp): Likewise.
(aarch64_expand_prologue): Call aarch64_sub_sp.
(aarch64_expand_epilogue): Call aarch64_add_sp.
Decide when to leave out move.
(aarch64_output_mi_thunk): Call aarch64_add_constant.
gcc/testsuite/
Backport from trunk r241420.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/aarch64/test_frame_17.c: New test.
gcc/testsuite/
Backport from trunk r241421.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/aarch64/test_frame_17.c: New test.
Change-Id: Ie080d3e66942f0a37b2f376bc2445f88eb079f7d
Yvan Roux [Fri, 9 Dec 2016 11:53:54 +0000 (12:53 +0100)]
gcc/
Backport from trunk r240846.
2016-10-06 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-cores.def: Add a comment before each
set of cores.
Change-Id: I123f8b902d5b5b5b2df7fce82815610ac8a3b7d6
Yvan Roux [Fri, 9 Dec 2016 11:53:10 +0000 (12:53 +0100)]
gcc/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* defaults.h (TARGET_FLT_EVAL_METHOD_NON_DEFAULT): Remove.
* system.h (TARGET_FLT_EVAL_METHOD_NON_DEFAULT): Poison.
gcc/ada/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* gcc-interface/misc.c (gnat_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard.
gcc/c-family/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* c-opts.c (c_common_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard
in C++.
gcc/fortran/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* options.c (gfc_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard.
gcc/java/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* lang.c (java_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard.
Change-Id: Ibed9daab2babc566ab0213077e682be5b40c28b1
Yvan Roux [Fri, 9 Dec 2016 11:52:42 +0000 (12:52 +0100)]
gcc/
Backport from trunk r240568.
2016-09-28 Wilco Dijkstra <wdijkstr@arm.com>
PR tree-optimization/61056
* gimple-fold.c (gimple_fold_builtin_strchr):
New function to optimize strchr (s, 0) to strlen.
(gimple_fold_builtin): Add BUILT_IN_STRCHR case.
gcc/testsuite/
Backport from trunk r240568.
2016-09-28 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.dg/strlenopt-20.c: Update test.
* gcc.dg/strlenopt-21.c: Likewise.
* gcc.dg/strlenopt-22.c: Likewise.
* gcc.dg/strlenopt-22g.c: Likewise.
* gcc.dg/strlenopt-26.c: Likewise.
* gcc.dg/strlenopt-5.c: Likewise.
* gcc.dg/strlenopt-7.c: Likewise.
* gcc.dg/strlenopt-9.c: Likewise.
gcc/
Backport from trunk r240585.
2016-09-28 Wilco Dijkstra <wdijkstr@arm.com>
* gimple-fold.c (gimple_fold_builtin): After failing to fold
strchr, also try the generic folding.
Change-Id: Ie8831d320766ac5083da722a36e92d7a44051597
Yvan Roux [Fri, 9 Dec 2016 11:52:03 +0000 (12:52 +0100)]
gcc/testsuite/
Backport from trunk r240314.
2016-09-21 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/fp16-aapcs-3.c: New.
* gcc.target/arm/fp16-aapcs-4.c: New.
* gcc.target/arm/aapcs/aapcs/vfp22.c: New.
* gcc.target/arm/aapcs/aapcs/vfp23.c: New.
* gcc.target/arm/aapcs/aapcs/vfp24.c: New.
* gcc.target/arm/aapcs/aapcs/vfp25.c: New.
Change-Id: I1473ed7fc6736a8d3e77a43c47607e1ab139abac
Yvan Roux [Fri, 9 Dec 2016 11:51:10 +0000 (12:51 +0100)]
contrib/
Backport from trunk r240288.
2016-09-20 Christophe Lyon <christophe.lyon@linaro.org>
* compare_tests: Take ERROR messages into account when
comparing.
contrib/
Backport from trunk r240289.
2016-09-20 Christophe Lyon <christophe.lyon@linaro.org>
* dg-extract-results.py: Report DejaGnu error in the final
summary.
* dg-extract-results.sh: Likewise.
Change-Id: Ib15f783dedc6b017a94e01f09b1e350b0459a890
Yvan Roux [Mon, 21 Nov 2016 11:34:20 +0000 (12:34 +0100)]
gcc/
Backport from trunk r239561.
2016-08-18 Tamar Christina <tamar.christina@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* varasm.c (default_use_anchors_for_symbol_p): Reject too large decls.
gcc/
Backport from trunk r242555.
2016-11-17 Jakub Jelinek <jakub@redhat.com>
PR middle-end/78201
* varasm.c (default_use_anchors_for_symbol_p): Fix a comment typo.
Don't test decl != NULL. Don't look at DECL_SIZE, but DECL_SIZE_UNIT
instead, return false if it is NULL, or doesn't fit into uhwi, or
is larger or equal to targetm.max_anchor_offset.
gcc/testsuite/
Backport from trunk r242555.
2016-11-17 Jakub Jelinek <jakub@redhat.com>
PR middle-end/78201
* g++.dg/opt/pr78201.C: New test.
Change-Id: I7fcc9d768209fac74de3ab6a80a8ccd880bbd185
Yvan Roux [Thu, 17 Nov 2016 14:27:08 +0000 (15:27 +0100)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: I0ad4888f81ce7cbdfa7794c160018c659995cb86
Yvan Roux [Thu, 17 Nov 2016 12:33:24 +0000 (13:33 +0100)]
Make Linaro GCC Snapshot 6.2-2016.11.
gcc/
* LINARO-VERSION: Update.
Change-Id: I841560d60fa1d992a033f16229f30d75108f9132
Yvan Roux [Mon, 14 Nov 2016 10:08:49 +0000 (11:08 +0100)]
Merge branches/gcc-6-branch rev 242371.
Change-Id: Ia4fb8e9e94629da786722b5e68605dc8bb971741
Yvan Roux [Wed, 9 Nov 2016 20:56:21 +0000 (21:56 +0100)]
gcc/
Revert backport from trunk r239561.
2016-08-18 Tamar Christina <tamar.christina@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* varasm.c (default_use_anchors_for_symbol_p): Reject too large
* decls.
This reverts commit
11879870dc041028bcb8d078d9ddbd7e400dd03f.
Change-Id: Iae5d442cf1a80e74f6f07817d337ce63bdf05234
Yvan Roux [Mon, 17 Oct 2016 13:36:19 +0000 (15:36 +0200)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: I7c4e31f7d1db307449b3712f92b0b723d9f91716
Yvan Roux [Mon, 17 Oct 2016 12:01:19 +0000 (14:01 +0200)]
Make Linaro GCC Snapshot 6.2-2016.10.
gcc/
* LINARO-VERSION: Update.
Change-Id: I6e28b34c67b38df0cd59c7260c1ef6ef3afc3ae5
Yvan Roux [Sun, 16 Oct 2016 18:12:52 +0000 (20:12 +0200)]
Merge branches/gcc-6-branch rev 241214.
Change-Id: I2fc7e5fc01a9015199e9be293b8a7b503fd5a829
Yvan Roux [Fri, 14 Oct 2016 12:51:34 +0000 (14:51 +0200)]
gcc/
Backport from trunk r240398.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-arches.def ("armv8.1-a"): Add FL_CRC32.
("armv8.2-a"): New.
("armv8.2-a+fp16"): New.
* config/arm/arm-protos.h (FL2_ARCH8_2): New.
(FL2_FP16INST): New.
(FL2_FOR_ARCH8_2A): New.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm.c (arm_arch8_2): New.
(arm_fp16_inst): New.
(arm_option_override): Set arm_arch8_2 and arm_fp16_inst. Check
for incompatible fp16-format settings.
* config/arm/arm.h (TARGET_VFP_FP16INST): New.
(TARGET_NEON_FP16INST): New.
(arm_arch8_2): Declare.
(arm_fp16_inst): Declare.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add entries for
march=armv8.2-a and march=armv8.2-a+fp16.
* config/arm/t-aprofile (Arch Matches): Add entries for armv8.2-a
and armv8.2-a+fp16.
* doc/invoke.texi (ARM Options): Add "-march=armv8.1-a",
"-march=armv8.2-a" and "-march=armv8.2-a+fp16".
gcc/
Backport from trunk r240400.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* doc/sourcebuild.texi (ARM-specific attributes): Add entries for
arm_fp16_alternative_ok and arm_fp16_none_ok.
gcc/testsuite/
Backport from trunk r240400.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* g++.dg/ext/arm-fp16/arm-fp16-ops-3.C: Use
arm_fp16_alternative_ok.
* g++.dg/ext/arm-fp16/arm-fp16-ops-4.C: Likewise.
* gcc.dg/torture/arm-fp16-int-convert-alt.c: Likewise.
* gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c: Likewise.
* gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c: Likewise.
* gcc.target/arm/fp16-compile-alt-1.c: Likewise.
* gcc.target/arm/fp16-compile-alt-10.c: Likewise.
* gcc.target/arm/fp16-compile-alt-11.c: Likewise.
* gcc.target/arm/fp16-compile-alt-12.c: Likewise.
* gcc.target/arm/fp16-compile-alt-2.c: Likewise.
* gcc.target/arm/fp16-compile-alt-3.c: Likewise.
* gcc.target/arm/fp16-compile-alt-4.c: Likewise.
* gcc.target/arm/fp16-compile-alt-5.c: Likewise.
* gcc.target/arm/fp16-compile-alt-6.c: Likewise.
* gcc.target/arm/fp16-compile-alt-7.c: Likewise.
* gcc.target/arm/fp16-compile-alt-8.c: Likewise.
* gcc.target/arm/fp16-compile-alt-9.c: Likewise.
* gcc.target/arm/fp16-compile-none-1.c: Use arm_fp16_none_ok.
* gcc.target/arm/fp16-compile-none-2.c: Likewise.
* gcc.target/arm/fp16-rounding-alt-1.c: Use
arm_fp16_alternative_ok.
* lib/target-supports.exp
(check_effective_target_arm_fp16_alternative_ok_nocache): New.
(check_effective_target_arm_fp16_alternative_ok): New.
(check_effective_target_arm_fp16_none_ok_nocache): New.
(check_effective_target_arm_fp16_none_ok): New.
gcc/
Backport from trunk r240401.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* doc/sourcebuild.texi (ARM-specific attributes): Add anchor for
arm_v8_1a_neon_ok. Add entries for arm_v8_2a_fp16_scalar_ok,
arm_v8_2a_fp16_scalar_hw, arm_v8_2a_fp16_neon_ok and
arm_v8_2a_fp16_neon_hw.
(Add options): Add entries for arm_v8_1a_neon, arm_v8_2a_scalar,
arm_v8_2a_neon.
gcc/testsuite/
Backport from trunk r240401.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* lib/target-supports.exp (add_options_for_arm_v8_2a_fp16_scalar):
New.
(add_options_for_arm_v8_2a_fp16_neon): New.
(check_effective_target_arm_arch_v8_2a_ok): Auto-generate.
(add_options_for_arm_arch_v8_2a): Auto-generate.
(check_effective_target_arm_arch_v8_2a_multilib): Auto-generate.
(check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): New.
(check_effective_target_arm_v8_2a_fp16_scalar_ok): New.
(check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): New.
(check_effective_target_arm_v8_2a_fp16_neon_ok): New.
(check_effective_target_arm_v8_2a_fp16_scalar_hw): New.
(check_effective_target_arm_v8_2a_fp16_neon_hw): New.
gcc/
Backport from trunk r240402.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-c.c (arm_cpu_builtins): Define
"__ARM_FEATURE_FP16_SCALAR_ARITHMETIC" and
"__ARM_FEATURE_FP16_VECTOR_ARITHMETIC".
gcc/testsuite/
Backport from trunk r240402.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/attr-fp16-arith-1.c: New.
gcc/
Backport from trunk r240403.
2016-09-23 Jiong Wang <jiong.wang@arm.com>
Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm.c (output_move_vfp): Weaken assert to allow
HImode.
(arm_hard_regno_mode_ok): Allow HImode values in VFP registers.
* config/arm/arm.md (*movhi_bytes): Disable when VFP registers are
available. Also fix some white-space.
* config/arm/vfp.md (*arm_movhi_vfp): New.
(*thumb2_movhi_vfp): New.
gcc/testsuite/
Backport from trunk r240403.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/short-vfp-1.c: New.
gcc/
Backport from trunk r240404.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm.c (arm_evpc_neon_vuzp): Add support for V8HF and
V4HF modes.
(arm_evpc_neon_vtrn): Likewise.
(arm_evpc_neon_vrev): Likewise.
(arm_evpc_neon_vext): Likewise.
* config/arm/arm_neon.h (vbsl_f16): New.
(vbslq_f16): New.
(vdup_n_f16): New.
(vdupq_n_f16): New.
(vdup_lane_f16): New.
(vdupq_lane_f16): New.
(vext_f16): New.
(vextq_f16): New.
(vmov_n_f16): New.
(vmovq_n_f16): New.
(vrev64_f16): New.
(vrev64q_f16): New.
(vtrn_f16): New.
(vtrnq_f16): New.
(vuzp_f16): New.
(vuzpq_f16): New.
(vzip_f16): New.
(vzipq_f16): New.
* config/arm/arm_neon_buillins.def (vdup_n): New (v8hf, v4hf variants).
(vdup_lane): New (v8hf, v4hf variants).
(vext): New (v8hf, v4hf variants).
(vbsl): New (v8hf, v4hf variants).
* config/arm/iterators.md (VDQWH): New.
(VH): New.
(V_double_vector_mode): Add V8HF and V4HF. Fix white-space.
(Scalar_mul_8_16): Fix white-space.
(Is_d_reg): Add V4HF and V8HF.
* config/arm/neon.md (neon_vdup_lane<mode>_internal): New.
(neon_vdup_lane<mode>): New.
(neon_vtrn<mode>_internal): Replace VDQW with VDQWH.
(*neon_vtrn<mode>_insn): Likewise.
(neon_vzip<mode>_internal): Likewise. Also fix white-space.
(*neon_vzip<mode>_insn): Likewise
(neon_vuzp<mode>_internal): Likewise.
(*neon_vuzp<mode>_insn): Likewise
* config/arm/vec-common.md (vec_perm_const<mode>): New.
gcc/testsuite/
Backport from trunk r240404.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(FP16_SUPPORTED): New
(expected-hfloat-16x4): Make conditional on __fp16 support.
(expected-hfloat-16x8): Likewise.
(vdup_n_f16): Disable for non-AArch64 targets.
* gcc.target/aarch64/advsimd-intrinsics/vbsl.c: Add __fp16 tests,
conditional on FP16_SUPPORTED.
* gcc.target/aarch64/advsimd-intrinsics/vdup-vmov.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vext.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrev.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: Add support
for testing __fp16.
* gcc.target/aarch64/advsimd-intrinsics/vtrn.c: Add __fp16 tests,
conditional on FP16_SUPPORTED.
* gcc.target/aarch64/advsimd-intrinsics/vuzp.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vzip.c: Likewise.
gcc/
Backport from trunk r240407.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
Jiong Wang <jiong.wang@arm.com>
* config/arm/arm.c (coproc_secondary_reload_class): Make HFmode
available when FP16 instructions are available.
(output_move_vfp): Add support for 16-bit data moves.
(arm_validize_comparison): Fix some white-space. Support HFmode
by conversion to SFmode.
* config/arm/arm.md (truncdfhf2): Fix a comment.
(extendhfdf2): Likewise.
(cstorehf4): New.
(movsicc): Fix some white-space.
(movhfcc): New.
(movsfcc): Fix some white-space.
(*cmovhf): New.
* config/arm/vfp.md (*arm_movhi_vfp): Disable when VFP FP16
instructions are available.
(*thumb2_movhi_vfp): Likewise.
(*arm_movhi_fp16): New.
(*thumb2_movhi_fp16): New.
(*movhf_vfp_fp16): New.
(*movhf_vfp_neon): Disable when VFP FP16 instructions are
available.
(*movhf_vfp): Likewise.
(extendhfsf2): Enable when VFP FP16 instructions are available.
(truncsfhf2): Enable when VFP FP16 instructions are available.
gcc/testsuite/
Backport from trunk r240407.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/armv8_2_fp16-move-1.c: New.
* gcc.target/arm/fp16-aapcs-1.c: Update expected output.
gcc/
Backport from trunk r240411.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/iterators.md (Code iterators): Fix some white-space
in the comments.
(GLTE): New.
(ABSNEG): New
(FCVT): Moved from vfp.md.
(VCVT_HF_US_N): New.
(VCVT_SI_US_N): New.
(VCVT_HF_US): New.
(VCVTH_US): New.
(FP16_RND): New.
(absneg_str): New.
(FCVTI32typename): Moved from vfp.md.
(sup): Add UNSPEC_VCVTA_S, UNSPEC_VCVTA_U, UNSPEC_VCVTM_S,
UNSPEC_VCVTM_U, UNSPEC_VCVTN_S, UNSPEC_VCVTN_U, UNSPEC_VCVTP_S,
UNSPEC_VCVTP_U, UNSPEC_VCVT_HF_S_N, UNSPEC_VCVT_HF_U_N,
UNSPEC_VCVT_SI_S_N, UNSPEC_VCVT_SI_U_N, UNSPEC_VCVTH_S_N,
UNSPEC_VCVTH_U_N, UNSPEC_VCVTH_S and UNSPEC_VCVTH_U.
(vcvth_op): New.
(fp16_rnd_str): New.
(fp16_rnd_insn): New.
* config/arm/unspecs.md (UNSPEC_VCVT_HF_S_N): New.
(UNSPEC_VCVT_HF_U_N): New.
(UNSPEC_VCVT_SI_S_N): New.
(UNSPEC_VCVT_SI_U_N): New.
(UNSPEC_VCVTH_S): New.
(UNSPEC_VCVTH_U): New.
(UNSPEC_VCVTA_S): New.
(UNSPEC_VCVTA_U): New.
(UNSPEC_VCVTM_S): New.
(UNSPEC_VCVTM_U): New.
(UNSPEC_VCVTN_S): New.
(UNSPEC_VCVTN_U): New.
(UNSPEC_VCVTP_S): New.
(UNSPEC_VCVTP_U): New.
(UNSPEC_VCVTP_S): New.
(UNSPEC_VCVTP_U): New.
(UNSPEC_VRND): New.
(UNSPEC_VRNDA): New.
(UNSPEC_VRNDI): New.
(UNSPEC_VRNDM): New.
(UNSPEC_VRNDN): New.
(UNSPEC_VRNDP): New.
(UNSPEC_VRNDX): New.
* config/arm/vfp.md (<absneg_str>hf2): New.
(neon_vabshf): New.
(neon_v<fp16_rnd_str>hf): New.
(neon_vrndihf): New.
(addhf3): New.
(subhf3): New.
(divhf3): New.
(mulhf3): New.
(*mulsf3neghf_vfp): New.
(*negmulhf3_vfp): New.
(*mulsf3addhf_vfp): New.
(*mulhf3subhf_vfp): New.
(*mulhf3neghfaddhf_vfp): New.
(*mulhf3neghfsubhf_vfp): New.
(fmahf4): New.
(neon_vfmahf): New.
(fmsubhf4_fp16): New.
(neon_vfmshf): New.
(*fnmsubhf4): New.
(*fnmaddhf4): New.
(neon_vsqrthf): New.
(neon_vrsqrtshf): New.
(FCVT): Move to iterators.md.
(FCVTI32typename): Likewise.
(neon_vcvth<sup>hf): New.
(neon_vcvth<sup>si): New.
(neon_vcvth<sup>_nhf_unspec): New.
(neon_vcvth<sup>_nhf): New.
(neon_vcvth<sup>_nsi_unspec): New.
(neon_vcvth<sup>_nsi): New.
(neon_vcvt<vcvth_op>h<sup>si): New.
(neon_<fmaxmin_op>hf): New.
gcc/testsuite/
Backport from trunk r240411.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/armv8_2-fp16-arith-1.c: New.
* gcc.target/arm/armv8_2-fp16-conv-1.c: New.
gcc/
Backport from trunk r240415.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/iterators.md (VCVTHI): New.
(NEON_VCMP): Add UNSPEC_VCLT and UNSPEC_VCLE. Fix a long line.
(NEON_VAGLTE): New.
(VFM_LANE_AS): New.
(VH_CVTTO): New.
(V_reg): Add HF, V4HF and V8HF. Fix white-space.
(V_HALF): Add V4HF. Fix white-space.
(V_if_elem): Add HF, V4HF and V8HF. Fix white-space.
(V_s_elem): Likewise.
(V_sz_elem): Fix white-space.
(V_elem_ch): Likewise.
(VH_elem_ch): New.
(scalar_mul_constraint): Add V8HF and V4HF.
(Is_float_mode): Fix white-space.
(Is_d_reg): Add V4HF and V8HF. Fix white-space.
(q): Add HF. Fix white-space.
(float_sup): New.
(float_SUP): New.
(cmp_op_unsp): Add UNSPEC_VCALE and UNSPEC_VCALT.
(neon_vfm_lane_as): New.
* config/arm/neon.md (add<mode>3_fp16): New.
(sub<mode>3_fp16): New.
(mul<mode>3add<mode>_neon): New.
(fma<VH:mode>4_intrinsic): New.
(fmsub<VCVTF:mode>4_intrinsic): Fix white-space.
(fmsub<VH:mode>4_intrinsic): New.
(<absneg_str><mode>2): New.
(neon_v<absneg_str><mode>): New.
(neon_v<fp16_rnd_str><mode>): New.
(neon_vrsqrte<mode>): New.
(neon_vpaddv4hf): New.
(neon_vadd<mode>): New.
(neon_vsub<mode>): New.
(neon_vmulf<mode>): New.
(neon_vfma<VH:mode>): New.
(neon_vfms<VH:mode>): New.
(neon_vc<cmp_op><mode>): New.
(neon_vc<cmp_op><mode>_fp16insn): New
(neon_vc<cmp_op_unsp><mode>_fp16insn_unspec): New.
(neon_vca<cmp_op><mode>): New.
(neon_vca<cmp_op><mode>_fp16insn): New.
(neon_vca<cmp_op_unsp><mode>_fp16insn_unspec): New.
(neon_vc<cmp_op>z<mode>): New.
(neon_vabd<mode>): New.
(neon_v<maxmin>f<mode>): New.
(neon_vp<maxmin>fv4hf: New.
(neon_<fmaxmin_op><mode>): New.
(neon_vrecps<mode>): New.
(neon_vrsqrts<mode>): New.
(neon_vrecpe<mode>): New (VH variant).
(neon_vdup_lane<mode>_internal): New.
(neon_vdup_lane<mode>): New.
(neon_vcvt<sup><mode>): New (VCVTHI variant).
(neon_vcvt<sup><mode>): New (VH variant).
(neon_vcvt<sup>_n<mode>): New (VH variant).
(neon_vcvt<sup>_n<mode>): New (VCVTHI variant).
(neon_vcvt<vcvth_op><sup><mode>): New.
(neon_vmul_lane<mode>): New.
(neon_vmul_n<mode>): New.
* config/arm/unspecs.md (UNSPEC_VCALE): New
(UNSPEC_VCALT): New.
(UNSPEC_VFMA_LANE): New.
(UNSPECS_VFMS_LANE): New.
gcc/testsuite/
Backport from trunk r240415.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/armv8_2-fp16-arith-1.c: Use arm_v8_2a_fp16_neon
options. Add tests for float16x4_t and float16x8_t.
gcc/
Backport from trunk r240416.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-builtins.c (arm_init_neon_builtin): New.
(arm_init_builtins): Move body of a loop to the standalone
function arm_init_neon_builtin.
(arm_expand_neon_builtin_1): New. Update comment. Function body
moved from arm_neon_builtin with some white-space fixes.
(arm_expand_neon_builtin): Move code into the standalone function
arm_expand_neon_builtin_1.
gcc/
Backport from trunk r240421.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-builtins.c (hf_UP): New.
(si_UP): New.
(vfp_builtin_data): New. Update comment.
(enum arm_builtins): Include "arm_vfp_builtins.def".
(ARM_BUILTIN_VFP_PATTERN_START): New.
(arm_init_vfp_builtins): New.
(arm_init_builtins): Add arm_init_vfp_builtins.
(arm_expand_vfp_builtin): New.
(arm_expand_builtins): Update for arm_expand_vfp_builtin. Fix
long line.
* config/arm/arm_vfp_builtins.def: New file.
* config/arm/t-arm (arm.o): Add arm_vfp_builtins.def.
(arm-builtins.o): Likewise.
gcc/
Backport from trunk r240422.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm_neon_builtins.def (vadd): New (v8hf, v4hf
variants).
(vmulf): New (v8hf, v4hf variants).
(vfma): New (v8hf, v4hf variants).
(vfms): New (v8hf, v4hf variants).
(vsub): New (v8hf, v4hf variants).
(vcage): New (v8hf, v4hf variants).
(vcagt): New (v8hf, v4hf variants).
(vcale): New (v8hf, v4hf variants).
(vcalt): New (v8hf, v4hf variants).
(vceq): New (v8hf, v4hf variants).
(vcgt): New (v8hf, v4hf variants).
(vcge): New (v8hf, v4hf variants).
(vcle): New (v8hf, v4hf variants).
(vclt): New (v8hf, v4hf variants).
(vceqz): New (v8hf, v4hf variants).
(vcgez): New (v8hf, v4hf variants).
(vcgtz): New (v8hf, v4hf variants).
(vcltz): New (v8hf, v4hf variants).
(vclez): New (v8hf, v4hf variants).
(vabd): New (v8hf, v4hf variants).
(vmaxf): New (v8hf, v4hf variants).
(vmaxnm): New (v8hf, v4hf variants).
(vminf): New (v8hf, v4hf variants).
(vminnm): New (v8hf, v4hf variants).
(vpmaxf): New (v4hf variant).
(vpminf): New (v4hf variant).
(vpadd): New (v4hf variant).
(vrecps): New (v8hf, v4hf variants).
(vrsqrts): New (v8hf, v4hf variants).
(vabs): New (v8hf, v4hf variants).
(vneg): New (v8hf, v4hf variants).
(vrecpe): New (v8hf, v4hf variants).
(vrnd): New (v8hf, v4hf variants).
(vrnda): New (v8hf, v4hf variants).
(vrndm): New (v8hf, v4hf variants).
(vrndn): New (v8hf, v4hf variants).
(vrndp): New (v8hf, v4hf variants).
(vrndx): New (v8hf, v4hf variants).
(vrsqrte): New (v8hf, v4hf variants).
(vmul_lane): Add v4hf and v8hf variants.
(vmul_n): Add v4hf and v8hf variants.
(vext): New (v8hf, v4hf variants).
(vcvts): New (v8hi, v4hi variants).
(vcvts): New (v8hf, v4hf variants).
(vcvtu): New (v8hi, v4hi variants).
(vcvtu): New (v8hf, v4hf variants).
(vcvts_n): New (v8hf, v4hf variants).
(vcvtu_n): New (v8hi, v4hi variants).
(vcvts_n): New (v8hi, v4hi variants).
(vcvtu_n): New (v8hf, v4hf variants).
(vbsl): New (v8hf, v4hf variants).
(vcvtas): New (v8hf, v4hf variants).
(vcvtau): New (v8hf, v4hf variants).
(vcvtms): New (v8hf, v4hf variants).
(vcvtmu): New (v8hf, v4hf variants).
(vcvtns): New (v8hf, v4hf variants).
(vcvtnu): New (v8hf, v4hf variants).
(vcvtps): New (v8hf, v4hf variants).
(vcvtpu): New (v8hf, v4hf variants).
gcc/
Backport from trunk r240423.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config.gcc (extra_headers): Add arm_fp16.h
* config/arm/arm_fp16.h: New.
* config/arm/arm_neon.h: Include "arm_fp16.h".
gcc/
Backport from trunk r240424.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm_neon.h (vabd_f16): New.
(vabdq_f16): New.
(vabs_f16): New.
(vabsq_f16): New.
(vadd_f16): New.
(vaddq_f16): New.
(vcage_f16): New.
(vcageq_f16): New.
(vcagt_f16): New.
(vcagtq_f16): New.
(vcale_f16): New.
(vcaleq_f16): New.
(vcalt_f16): New.
(vcaltq_f16): New.
(vceq_f16): New.
(vceqq_f16): New.
(vceqz_f16): New.
(vceqzq_f16): New.
(vcge_f16): New.
(vcgeq_f16): New.
(vcgez_f16): New.
(vcgezq_f16): New.
(vcgt_f16): New.
(vcgtq_f16): New.
(vcgtz_f16): New.
(vcgtzq_f16): New.
(vcle_f16): New.
(vcleq_f16): New.
(vclez_f16): New.
(vclezq_f16): New.
(vclt_f16): New.
(vcltq_f16): New.
(vcltz_f16): New.
(vcltzq_f16): New.
(vcvt_f16_s16): New.
(vcvt_f16_u16): New.
(vcvt_s16_f16): New.
(vcvt_u16_f16): New.
(vcvtq_f16_s16): New.
(vcvtq_f16_u16): New.
(vcvtq_s16_f16): New.
(vcvtq_u16_f16): New.
(vcvta_s16_f16): New.
(vcvta_u16_f16): New.
(vcvtaq_s16_f16): New.
(vcvtaq_u16_f16): New.
(vcvtm_s16_f16): New.
(vcvtm_u16_f16): New.
(vcvtmq_s16_f16): New.
(vcvtmq_u16_f16): New.
(vcvtn_s16_f16): New.
(vcvtn_u16_f16): New.
(vcvtnq_s16_f16): New.
(vcvtnq_u16_f16): New.
(vcvtp_s16_f16): New.
(vcvtp_u16_f16): New.
(vcvtpq_s16_f16): New.
(vcvtpq_u16_f16): New.
(vcvt_n_f16_s16): New.
(vcvt_n_f16_u16): New.
(vcvtq_n_f16_s16): New.
(vcvtq_n_f16_u16): New.
(vcvt_n_s16_f16): New.
(vcvt_n_u16_f16): New.
(vcvtq_n_s16_f16): New.
(vcvtq_n_u16_f16): New.
(vfma_f16): New.
(vfmaq_f16): New.
(vfms_f16): New.
(vfmsq_f16): New.
(vmax_f16): New.
(vmaxq_f16): New.
(vmaxnm_f16): New.
(vmaxnmq_f16): New.
(vmin_f16): New.
(vminq_f16): New.
(vminnm_f16): New.
(vminnmq_f16): New.
(vmul_f16): New.
(vmul_lane_f16): New.
(vmul_n_f16): New.
(vmulq_f16): New.
(vmulq_lane_f16): New.
(vmulq_n_f16): New.
(vneg_f16): New.
(vnegq_f16): New.
(vpadd_f16): New.
(vpmax_f16): New.
(vpmin_f16): New.
(vrecpe_f16): New.
(vrecpeq_f16): New.
(vrnd_f16): New.
(vrndq_f16): New.
(vrnda_f16): New.
(vrndaq_f16): New.
(vrndm_f16): New.
(vrndmq_f16): New.
(vrndn_f16): New.
(vrndnq_f16): New.
(vrndp_f16): New.
(vrndpq_f16): New.
(vrndx_f16): New.
(vrndxq_f16): New.
(vrsqrte_f16): New.
(vrsqrteq_f16): New.
(vrecps_f16): New.
(vrecpsq_f16): New.
(vrsqrts_f16): New.
(vrsqrtsq_f16): New.
(vsub_f16): New.
(vsubq_f16): New.
gcc/testsuite/
Backport from trunk r240425.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/armv8_2-fp16-neon-1.c: New.
* gcc.target/arm/armv8_2-fp16-scalar-1.c: New.
* gcc.target/arm/armv8_2-fp16-scalar-2.c: New.
* gcc.target/arm/attr-fp16-arith-1.c: Add a test of intrinsics
support.
gcc/testsuite/
Backport from trunk r240426.
2016-09-23 Jiong Wang <jiong.wang@arm.com>
Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/binary_scalar_op.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/unary_scalar_op.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/ternary_scalar_op.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c: New.
gcc/testsuite/
Backport from trunk r240427.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/advsimd-intrinsics/advsimd-intrinsics.exp: Enable
-march=armv8.2-a+fp16 when supported by the hardware.
* gcc.target/aarch64/advsimd-intrinsics/binary_op_float.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/binary_op_no64.inc:
Add F16 tests, enabled if macro HAS_FLOAT16_VARIANT is defined. Add
semi-colons to a macro invocations.
* gcc.target/aarch64/advsimd-intrinsics/cmp_fp_op.inc: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/cmp_op.inc: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/cmp_zero_op.inc: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vabd.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vabs.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vadd.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcage.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcagt.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcale.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcalt.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vceq.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vceqz_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcge.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vcgez_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcgt.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vcgtz_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcle.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vclez_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vclt.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vcltz_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcvt.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined. Also fix some white-space.
* gcc.target/aarch64/advsimd-intrinsics/vcvtX.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvta_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtm_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtp_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vfma.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined. Also fix some long lines and white-space.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vfms.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined. Also fix some long lines and white-space.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vmax.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vmaxnm_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vmin.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vminnm_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vmul.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vmul_n.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vneg.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vpXXX.inc: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vpadd.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vpmax.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vpmin.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrecpe.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrecps.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrnd.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrndX.inc: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrnda.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrndm.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrndn.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrndp.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrndx.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrsqrte.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrsqrts.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vsub.c:
Likewise.
gcc/
Backport from trunk r240541.
2016-09-27 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm.md (*arm_movsi_insn): Add "arch" attribute.
* config/arm/vfp.md (*arm_movhi_vfp): Likewise.
(*thumb2_movhi_vfp): Likewise.
(*arm_movhi_fp16): Remove predication operand from VMOV.F16
template. Expand predicable attribute to mark VMOV.F16 as not
predicable. Add "arch" attribute.
(*thumb2_movhi_fp16): Likewise.
(*arm_movsi_vfp): Break a long line. Add "arch" attribute.
(*thumb2_movsi_vfp): Add "arch" attribute.
missing/
Backport from trunk r240542.
gcc/testsuite/
Backport from trunk r240551.
2016-09-27 Jiong Wang <jiong.wang@arm.com>
* lib/target-supports.exp
(check_effective_target_arm_v8_2a_fp16_scalar_hw): Delete redundant word
in function comment.
gcc/
Backport from trunk r240622.
2016-09-29 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm.md (*arm_movsi_insn): Replace "t2" arch attribute
with "v6t2". Move "arch" attribute above "pool_range".
* config/arm/vfp.md (*arm_movhi_vfp): Replace "t2" arch attribute
with "v6t2".
(*thumb2_movhi_vfp): Likewise.
(*arm_movhi_fp16): Likewise.
(*thumb2_movhi_fp16): Likewise.
(*arm_movsi_vfp): Remove "arch" attribute.
(*thumb2_movsi_vfp): Likewise.
gcc/testsuite/
Backport from trunk r240921.
2016-10-10 Matthew Wahab <matthew.wahab@arm.com>
Jiong Wang <jiong.wang@arm.com>
* target-supports.exp (add_options_for_arm_v8_2a_fp16_scalar): Mention
AArch64 support.
(add_options_for_arm_v8_2a_fp16_neon): Likewise.
(check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): Support
AArch64 targets.
(check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): Support
AArch64 targets.
(check_effective_target_arm_v8_2a_fp16_scalar_hw): Support AArch64
targets.
(check_effective_target_arm_v8_2a_fp16_neon_hw): Likewise.
2016-10-10 Eric Botgazou <ebotcazou@adacore.com>
gcc/testsuite/
Backport from trunk r240922.
2016-10-10 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (FP16_SUPPORTED):
Enable AArch64.
* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: Add support for
vdup*_laneq.
* gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: New.
gcc/testsuite/
Backport from trunk r240923.
2016-10-10 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c: New.
gcc/testsuite/
Backport from trunk r240924.
2016-10-10 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/unary_scalar_op.inc: Support FMT64.
* gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c: New.
Change-Id: I4f2c1a2c934a8c101457de5a1ce7134baebe2fb0
Yvan Roux [Sat, 15 Oct 2016 19:51:57 +0000 (21:51 +0200)]
gcc/
Backport from trunk r240791.
2016-10-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* fold-const.c (native_encode_real): Fix logic for selecting offset
to write to when BYTES_BIG_ENDIAN.
Change-Id: I0ce72bead9880c0064f34a629499271b9337cdf8
Yvan Roux [Sat, 15 Oct 2016 09:20:32 +0000 (11:20 +0200)]
gcc/
Backport from trunk r240256.
2016-09-20 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/arm_neon.h: Add gnu_inline and artificial
attributes to all inlined functions and make them extern.
gcc/
Backport from trunk r240271.
2016-09-20 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/arm_neon.h
(vst2_s64, vst2_u64, vst2_f64, vst2_s8): Add missing attributes.
(vst3_s64, vst3_u64, vst3_f64, vst3_s8): Likewise.
(vst4_s64, vst4_u64, vst4_f64, vst4_s8): Likewise.
Change-Id: Iacc298c3d1cf6a713a2ed96e8331b0794b03708a
Yvan Roux [Thu, 15 Sep 2016 14:22:12 +0000 (16:22 +0200)]
gcc/
Backport from trunk r238000.
2016-07-05 Christophe Lyon <christophe.lyon@linaro.org>
* config/arm/neon-testgen.ml: Delete.
* config/arm/neon.ml: Delete.
gcc/testsuite/
Backport from trunk r238000.
2016-07-05 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/arm/neon/polytypes.c: Move to ...
* gcc.target/arm/polytypes.c: ... here.
* gcc.target/arm/neon/pr51534.c: Move to ...
* gcc.target/arm/pr51534.c: ... here.
* gcc.target/arm/neon/vect-vcvt.c: Move to ...
* gcc.target/arm/vect-vcvt.c: ... here.
* gcc.target/arm/neon/vect-vcvtq.c: Move to ...
* gcc.target/arm/vect-vcvtq.c: ... here.
* gcc.target/arm/neon/vfp-shift-a2t2.c: Move to ...
* gcc.target/arm/vfp-shift-a2t2.c: ... here.
* gcc.target/arm/neon/vst1Q_laneu64-1.c: Move to ...
* gcc.target/arm/vst1Q_laneu64-1.c: ... here. Fix foo() prototype.
* gcc.target/arm/neon/neon.exp: Delete.
* gcc.target/arm/neon/: Delete.
gcc/testsuite/
Backport from trunk r238046.
2016-07-06 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/arm/vst1Q_laneu64-1.c (foo): Use unsigned char*.
Change-Id: I000858c7a70325f7b6f5b00055b34d76955b8594
Yvan Roux [Fri, 14 Oct 2016 09:03:45 +0000 (11:03 +0200)]
gcc/
Backport from trunk r237002.
2016-06-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
* doc/sourcebuild.texi (arm_acq_rel): Document new effective target.
gcc/testsuite/
Backport from trunk r237002.
2016-06-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (check_effective_target_arm_acq_rel): New
procedure.
Change-Id: Iab8b0839cebaaf709e73aa30a42ad77f662e7d20
Yvan Roux [Thu, 15 Sep 2016 14:49:17 +0000 (16:49 +0200)]
gcc/
Backport from trunk r238079.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
link between this condition and the one in
libgcc/config/arm/lib1func.S.
gcc/testsuite/
Backport from trunk r238079.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
libgcc/
Backport from trunk r238079.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/bpabi-v6m.S: Clarify what architectures is the
implementation suitable for.
* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
for all Thumb-1 only targets.
(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__.
(EQUIV): Likewise.
(ARM_FUNC_ALIAS): Likewise.
(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
version.
(modsi3): Likewise.
(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
(clzdi2): Likewise.
(ctzsi2): Likewise.
(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
__ARM_ARCH_6M__ in guard for checking whether it is defined.
(final includes): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__ and add comment to indicate the connection between
this condition and the one in gcc/config/arm/elf.h.
* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
* config/arm/t-softfp: Likewise.
libgcc/
Backport from trunk r238080.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
and ARMv5t* rather than for a fixed list of architectures.
gcc/
Backport from trunk r238081.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
(FL_FOR_ARCH8M_MAIN): Likewise.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
armv8-m.main+dsp to BE8_LINK_SPEC.
* config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
(enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
* config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
Baseline and Mainline.
(arm_option_override_internal): Also disable arm_restrict_it when
!arm_arch_notm. Update comment for -munaligned-access to also cover
ARMv8-M Baseline.
(arm_file_start): Increase buffer size for printing architecture name.
* doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
and armv8-m.main+dsp.
(mno-unaligned-access): Clarify that this is disabled by default for
ARMv8-M Baseline architectures as well.
gcc/testsuite/
Backport from trunk r238081.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
ARMv8-M Mainline architectures.
libgcc/
Backport from trunk r238081.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.
gcc/
Backport from trunk r238082.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions.
gcc/
Backport from trunk r238083.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW availability
with TARGET_HAVE_MOVT.
(TARGET_HAVE_MOVT): Define.
* config/arm/arm.c (const_ok_for_op): Check MOVT/MOVW
availability with TARGET_HAVE_MOVT.
* config/arm/arm.md (arm_movt): Use TARGET_HAVE_MOVT to check MOVT
availability.
(addsi splitter): Use TARGET_THUMB && TARGET_HAVE_MOVT rather than
TARGET_THUMB2.
(symbol_refs movsi splitter): Remove TARGET_32BIT check.
(arm_movtas_ze): Use TARGET_HAVE_MOVT to check MOVT availability.
* config/arm/constraints.md (define_constraint "j"): Use
TARGET_HAVE_MOVT to check MOVT availability.
gcc/
Backport from trunk r238288.
2016-07-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.h (TARGET_HAVE_MOVT): Include ARMv8-M as having MOVT.
* config/arm/arm.c (arm_arch_name): (const_ok_for_op): Check MOVT/MOVW
availability with TARGET_HAVE_MOVT.
(thumb_legitimate_constant_p): Strip the high part of a label_ref.
(thumb1_rtx_costs): Also return 0 if setting a half word constant and
MOVW is available and replace (unsigned HOST_WIDE_INT) INTVAL by
UINTVAL.
(thumb1_size_rtx_costs): Make set of half word constant also cost 1
extra instruction if MOVW is available. Use a cost variable
incremented by COSTS_N_INSNS (1) when the condition match rather than
returning an arithmetic expression based on COSTS_N_INSNS. Make
constant with bottom half word zero cost 2 instruction if MOVW is
available.
* config/arm/arm.md (define_attr "arch"): Add v8mb.
(define_attr "arch_enabled"): Set to yes if arch value is v8mb and
target is ARMv8-M Baseline.
(arm_movt): New unpredicable alternative for ARMv8-M Baseline.
(arm_movtas_ze): Likewise.
* config/arm/thumb1.md (thumb1_movdi_insn): Add ARMv8-M Baseline only
alternative for constants satisfying j constraint.
(thumb1_movsi_insn): Likewise.
(movsi splitter for K alternative): Tighten condition to not trigger
if movt is available and j constraint is satisfied.
(Pe immediate splitter): Likewise.
(thumb1_movhi_insn): Add ARMv8-M Baseline only alternative for
constant fitting in an halfword to use MOVW.
* doc/sourcebuild.texi (arm_thumb1_movt_ok): Document new ARM
effective target.
gcc/testsuite/
Backport from trunk r238288.
2016-07-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (check_effective_target_arm_thumb1_movt_ok):
Define effective target.
* gcc.target/arm/pr42574.c: Require arm_thumb1_ok and
!arm_thumb1_movt_ok to exclude ARMv8-M Baseline.
* gcc.target/arm/movhi_movw.c: New test.
* gcc.target/arm/movsi_movw.c: Likewise.
* gcc.target/arm/movdi_movw.c: Likewise.
gcc/
Backport from trunk r238289.
2016-07-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.h (TARGET_HAVE_CBZ): Define.
(TARGET_IDIV): Set for all Thumb targets provided they have hardware
divide feature.
* config/arm/arm.md (divsi3): New unpredicable alternative for ARMv8-M
Baseline. Make initial alternative TARGET_32BIT only.
(udivsi3): Likewise.
* config/arm/thumb1.md (thumb1_cbz): New define_insn.
* doc/sourcebuild.texi (arm_thumb1_cbz_ok): Document new effective
target.
gcc/testsuite/
Backport from trunk r238289.
2016-07-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (check_effective_target_arm_thumb1_cbz_ok):
Add new arm_thumb1_cbz_ok effective target.
* gcc.target/arm/cbz.c: New test.
gcc/testsuite/
Backport from trunk r238331.
2016-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/pr42574.c: Add missing target keyword for the dg-do
selector and enclose boolean expression in curly braces.
gcc/
Backport from trunk r238348.
2016-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.h (TARGET_HAVE_LDACQ): Enable for ARMv8-M Mainline.
(TARGET_HAVE_LDACQD): New macro.
* config/arm/sync.md (atomic_loaddi): Use TARGET_HAVE_LDACQD rather
than TARGET_HAVE_LDACQ.
(arm_load_acquire_exclusivedi): Likewise.
(arm_store_release_exclusivedi): Likewise.
gcc/testsuite/
Backport from trunk r238348.
2016-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/atomic-comp-swap-release-acquire.c: Rename into ...
* gcc.target/arm/atomic-comp-swap-release-acquire-1.c: This.
* gcc.target/arm/atomic-op-acq_rel.c: Rename into ...
* gcc.target/arm/atomic-op-acq_rel-1.c: This.
* gcc.target/arm/atomic-op-acquire.c: Rename into ...
* gcc.target/arm/atomic-op-acquire-1.c: This.
* gcc.target/arm/atomic-op-char.c: Rename into ...
* gcc.target/arm/atomic-op-char-1.c: This.
* gcc.target/arm/atomic-op-consume.c: Rename into ...
* gcc.target/arm/atomic-op-consume-1.c: This.
* gcc.target/arm/atomic-op-int.c: Rename into ...
* gcc.target/arm/atomic-op-int-1.c: This.
* gcc.target/arm/atomic-op-relaxed.c: Rename into ...
* gcc.target/arm/atomic-op-relaxed-1.c: This.
* gcc.target/arm/atomic-op-release.c: Rename into ...
* gcc.target/arm/atomic-op-release-1.c: This.
* gcc.target/arm/atomic-op-seq_cst.c: Rename into ...
* gcc.target/arm/atomic-op-seq_cst-1.c: This.
* gcc.target/arm/atomic-op-short.c: Rename into ...
* gcc.target/arm/atomic-op-short-1.c: This.
* gcc.target/arm/atomic-comp-swap-release-acquire-2.c: New test.
* gcc.target/arm/atomic-op-acq_rel-2.c: Likewise.
* gcc.target/arm/atomic-op-acquire-2.c: Likewise.
* gcc.target/arm/atomic-op-char-2.c: Likewise.
* gcc.target/arm/atomic-op-consume-2.c: Likewise.
* gcc.target/arm/atomic-op-int-2.c: Likewise.
* gcc.target/arm/atomic-op-relaxed-2.c: Likewise.
* gcc.target/arm/atomic-op-release-2.c: Likewise.
* gcc.target/arm/atomic-op-seq_cst-2.c: Likewise.
* gcc.target/arm/atomic-op-short-2.c: Likewise.
gcc/
Backport from trunk r239888.
2016-08-31 Eric Botcazou <ebotcazou@adacore.com>
* config/arm/arm.c (thumb1_size_rtx_costs) <SET>: Add missing guard.
gcc/testsuite/
Backport from trunk r241086.
2016-10-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/movhi_movw.c: Enable test for ARM mode.
* gcc.target/arm/movsi_movw.c: Likewise.
* gcc.target/arm/movdi_movw.c: Likewise and adapt scan-assembler
directive to work on big endian targets.
Change-Id: I9fea67c44aa10d639644c90a4b436d4f809da9fc
Yvan Roux [Thu, 15 Sep 2016 14:19:44 +0000 (16:19 +0200)]
gcc/
Backport from trunk r237857.
2016-06-29 Jim Wilson <jim.wilson@linaro.org>
* config/aarch64/aarch64-cores.def (qdf24xx): Use qdf24xx tuning.
* config/aarch64/aarch64.c (qdf24xx_addrcost_table,
qdf24xx_regmove_cost, qdf24xx_tunings): New.
* config/arm/aarch64-cost-tables.h (qdf24xx_extra_costs): New.
* config/arm/arm-cores.def (qdf24xx): Use qdf24xx tuning.
* config/arm/arm.c (arm_qdf24xx_tune): New.
gcc/testsuite/
Backport from trunk r237857.
2016-06-29 Jim Wilson <jim.wilson@linaro.org>
* gcc.dg/asr_div1.c: Add aarch64 specific dg-options.
Change-Id: I6937b1e3ec6049a296ab700994cd79ea1c637979
Yvan Roux [Thu, 15 Sep 2016 11:47:52 +0000 (13:47 +0200)]
gcc/
Backport from trunk r238977.
2016-08-02 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-simd-builtins.def
(__builtin_aarch64_fmindf): Change BUILTIN_VDQF to BUILTIN_VDQF_DF.
(__builtin_aarch64_fmaxdf): Likewise.
(__builtin_aarch64_smin_nandf): Likewise.
(__builtin_aarch64_smax_nandf): Likewise.
* config/aarch64/aarch64-simd.md (<fmaxmin><mode>3): Remove.
* config/aarch64/aarch64.md (<fmaxmin><mode>3): Rename to...
(<fmaxmin><mode>3): ...this.
* config/aarch64/arm_neon.h (vmaxnm_f64): New.
(vminnm_f64): Likewise.
(vmin_f64): Likewise.
(vmax_f64): Likewise.
* config/aarch64/iterators.md (FMAXMIN): Merge with...
(FMAXMIN_UNS): ...this.
(fmaxmin): Merged with
(fmaxmin_op): ...this...
(maxmin_uns_op): ...in to this.
gcc/testsuite/
Backport from trunk r238977.
2016-08-02 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/vminmaxnm.c: New.
* gcc.target/aarch64/simd/vminmaxnm_1.c (main): Add float64x1_t
tests.
gcc/
Backport from trunk r238989.
2016-02-08 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/arm_neon.h (vminnm_f64): Add back missing 'f' from
__builtin_aarch64_fmindf.
Change-Id: Iedd92bb1d08f8e4ba47b0d01d8a66df8683056f9
Yvan Roux [Wed, 14 Sep 2016 09:45:43 +0000 (11:45 +0200)]
gcc/
Backport from trunk r240102.
2016-09-12 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-tuning-flags.def (SLOW_UNALIGNED_LDPW):
New tuning option.
* config/aarch64/aarch64.c (thunderx_tunings): Enable
AARCH64_EXTRA_TUNE_SLOW_UNALIGNED_LDPW.
(aarch64_operands_ok_for_ldpstp): Return false if
AARCH64_EXTRA_TUNE_SLOW_UNALIGNED_LDPW and the mode
was SImode and the alignment is less than 8 byte.
(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
gcc/testsuite/
Backport from trunk r240102.
2016-09-12 Andrew Pinski <apinski@cavium.com>
* gcc.target/aarch64/thunderxloadpair.c: New testcase.
* gcc.target/aarch64/thunderxnoloadpair.c: New testcase.
Change-Id: I8cc39d2082b5eb901979ca677965c18b4356383b
Yvan Roux [Wed, 14 Sep 2016 09:44:51 +0000 (11:44 +0200)]
libgcc/
Backport from trunk r240033.
2016-09-07 Joseph Myers <joseph@codesourcery.com>
PR libgcc/77519
* libgcc2.c (NOTRUNC): Invert settings.
Change-Id: I1e01681bbf86d99e9106e5c2fb60d2e6990415c0
Yvan Roux [Wed, 14 Sep 2016 09:43:29 +0000 (11:43 +0200)]
gcc/
Backport from trunk r239212.
2016-08-08 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* tree-ssa-ccp.c (extend_mask): New param sgn.
Remove ORing with wi::mask.
(get_default_value): Adjust call to extend_mask to pass sign.
(evaluate_stmt): Likewise.
Change-Id: Ia929df985c53ccc0b51d35d801f93d29c850a33d
Yvan Roux [Wed, 14 Sep 2016 09:45:12 +0000 (11:45 +0200)]
libgcc/
Backport from trunk r240043.
2016-09-09 James Greenhalgh <james.greenhalgh@arm.com>
PR target/63250
* Makefile.in (lib2funcs): Build _mulhc3 and _divhc3.
* libgcc2.h (LIBGCC_HAS_HF_MODE): Conditionally define.
(HFtype): Likewise.
(HCtype): Likewise.
(__divhc3): Likewise.
(__mulhc3): Likewise.
* libgcc2.c: Support _mulhc3 and _divhc3.
Change-Id: If5fe0cfd670daca59e709646c53545186663e956
Yvan Roux [Wed, 14 Sep 2016 09:42:43 +0000 (11:42 +0200)]
gcc/
Backport from trunk r238588.
2016-07-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* tree-ssa-strlen.c (strlen_dom_walker::before_dom_children): Fix typo
in comment.
Change-Id: I8f790b9069966539b73b737277404d935a806cfb
Yvan Roux [Wed, 14 Sep 2016 09:41:07 +0000 (11:41 +0200)]
gcc/
Backport from trunk r237475.
2016-06-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* ifcvt.c (bb_ok_for_noce_multiple_sets): Allow simple lowpart
register subregs in SET_SRC.
gcc/testsuite/
Backport from trunk r237475.
2016-06-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c: New test.
Change-Id: I4ec7ce4a8f1657808d37c8500e10661401ccecf4
Yvan Roux [Wed, 7 Sep 2016 22:01:01 +0000 (00:01 +0200)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: I705e185765e0ad3094bb62e98ce908b01e4d6a99
Yvan Roux [Wed, 7 Sep 2016 20:30:23 +0000 (22:30 +0200)]
Make Linaro GCC Snapshot 6.2-2016.09.
gcc/
* LINARO-VERSION: Update.
Change-Id: I960f312affa0f51c88097815dd5c0f24ff842a60
Yvan Roux [Tue, 6 Sep 2016 12:44:22 +0000 (14:44 +0200)]
gcc/testsuite/
Backport from trunk r239609.
2016-08-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* gcc.dg/cpp/warn-undef.c: Append "evaluates to 0" to dg-error.
* gcc.dg/cpp/warn-undef-2.c: Likewise.
libcpp/
Backport from trunk r239609.
2016-08-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* expr.c (eval_token): Append "evaluates to 0" to Wundef diagnostic.
Change-Id: I363be41700a632019b206fdda9b8d94a4a734432
Yvan Roux [Tue, 6 Sep 2016 12:41:14 +0000 (14:41 +0200)]
gcc/
Backport from trunk r236632.
2016-05-24 Richard Sandiford <richard.sandiford@arm.com>
* tree-vect-stmts.c (vectorizable_load): Reorder checks so that
load_lanes/grouped_load classification comes first. Don't check
whether the vectorization factor is a multiple of the group size
for load_lanes.
gcc/testsuite/
Backport from trunk r236632.
2016-05-24 Richard Sandiford <richard.sandiford@arm.com>
* gcc.dg/vect/vect-load-lanes-peeling-1.c: New test.
Change-Id: I990689cf9c5b4f1d721e51c4d76157d5670b97e5
Yvan Roux [Tue, 6 Sep 2016 12:37:40 +0000 (14:37 +0200)]
gcc/
Backport from trunk r239528.
2016-08-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/t-aprofile (MULTILIB_EXCEPTIONS): Rewrite into ...
(MULTILIB_REQUIRED): This by specifying multilib needing to be built
rather than those that should not be built.
Change-Id: I1f44a5d7ea4d48b0a73ad8f31eeaf5a97b6a7449
Yvan Roux [Tue, 6 Sep 2016 12:28:23 +0000 (14:28 +0200)]
gcc/
Backport from trunk r238960.
2016-08-01 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.h (aarch64_frame):
Remove padding0 and hardfp_offset. Add locals_offset,
initial_adjust, callee_adjust, callee_offset and final_adjust.
* config/aarch64/aarch64.c (aarch64_layout_frame):
Remove unused padding0 and hardfp_offset initializations.
Choose frame layout and set frame variables accordingly.
Use INVALID_REGNUM instead of FIRST_PSEUDO_REGISTER.
(aarch64_push_regs): Use INVALID_REGNUM, not FIRST_PSEUDO_REGISTER.
(aarch64_pop_regs): Likewise.
(aarch64_expand_prologue): Remove all decision code, just emit
prolog according to frame variables.
(aarch64_expand_epilogue): Remove all decision code, just emit
epilog according to frame variables.
(aarch64_initial_elimination_offset): Use offset to local/arg area.
gcc/testsuite/
Backport from trunk r238960.
2016-08-01 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/aarch64/test_frame_10.c: Fix test to check for a
single stack adjustment, no writeback.
* gcc.target/aarch64/test_frame_12.c: Likewise.
* gcc.target/aarch64/test_frame_13.c: Likewise.
* gcc.target/aarch64/test_frame_15.c: Likewise.
* gcc.target/aarch64/test_frame_6.c: Likewise.
* gcc.target/aarch64/test_frame_7.c: Likewise.
* gcc.target/aarch64/test_frame_8.c: Likewise.
* gcc.target/aarch64/test_frame_16.c: New test.
Change-Id: Id4fbbe13420b85d8cd466c4ae673206b799e7adc
Yvan Roux [Tue, 6 Sep 2016 12:27:14 +0000 (14:27 +0200)]
gcc/
Backport from trunk r238346.
2016-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
PR rtl-optimization/71878
* lra-constraints.c (match_reload): Pass information about other
output operands. Create new unique register value if matching input
operand shares same register value as output operand being considered.
(curr_insn_transform): Record output operands already processed.
Change-Id: Ib431825058891be8dd5b6e0c90742c4bdaeb9896
Yvan Roux [Mon, 5 Sep 2016 17:08:55 +0000 (19:08 +0200)]
gcc/
Backport from trunk r239859.
2016-08-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config.gcc (*-*-*musl*): Disable gnu-indirect-function.
gcc/
Backport from trunk r239860.
2016-08-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config/linux.c (linux_libc_has_function): Return true on musl.
Change-Id: Icd70e2db3b64b05fda721452e4a08c575e7a8832
Yvan Roux [Mon, 5 Sep 2016 17:08:24 +0000 (19:08 +0200)]
gcc/
Backport from trunk r239637.
2016-08-20 Kugan Vivekanandarajah <kuganv@linaro.org>
PR tree-optimization/61839
* tree-vrp.c (two_valued_val_range_p): New.
(simplify_stmt_using_ranges): Convert CST BINOP VAR where VAR is
two-valued to VAR == VAL1 ? (CST BINOP VAL1) : (CST BINOP VAL2).
Also Convert VAR BINOP CST where VAR is two-valued to
VAR == VAL1 ? (VAL1 BINOP CST) : (VAL2 BINOP CST).
gcc/testsuite/
Backport from trunk r239637.
2016-08-20 Kugan Vivekanandarajah <kuganv@linaro.org>
PR tree-optimization/61839
* gcc.dg/tree-ssa/pr61839_1.c: New test.
* gcc.dg/tree-ssa/pr61839_2.c: New test.
* gcc.dg/tree-ssa/pr61839_3.c: New test.
* gcc.dg/tree-ssa/pr61839_4.c: New test.
Change-Id: I9b7bb676ec7169d3052ee1e28c6208a9b3f94981
Yvan Roux [Mon, 5 Sep 2016 17:07:27 +0000 (19:07 +0200)]
gcc/
Backport from trunk r239162.
2016-08-05 Kugan Vivekanandarajah <kuganv@linaro.org>
* tree-vrp.c (extract_range_basic): Check cfun->after_inlining
before folding call to __builtin_constant_p with parameters to false.
Change-Id: Ic23b3a03d47cb7f4d5a816b1254af19b79f055fe
Yvan Roux [Mon, 5 Sep 2016 17:07:04 +0000 (19:07 +0200)]
gcc/
Backport from trunk r239118.
2016-08-04 Kugan Vivekanandarajah <kuganv@linaro.org>
* tree-inline.c (remap_ssa_name): Check for POINTER_TYPE_P before
accessing SSA_NAME_PTR_INFO.
Change-Id: I3a272801ed6b23fae600359cf3af668224bab1ea
Yvan Roux [Mon, 5 Sep 2016 17:06:04 +0000 (19:06 +0200)]
gcc/
Backport from trunk r238846.
2016-07-29 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/68217
* tree-vrp.c (extract_range_from_binary_expr_1): In case of signed
& sign-bit-CST, generate [-INF, 0] instead of [-INF, INF].
gcc/testsuite/
Backport from trunk r238846.
2016-07-29 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/68217
* gcc.dg/pr68217.c: New test.
Change-Id: Ieffe842d5a7969b2fb17f3515e223cccaea25f30
Yvan Roux [Mon, 5 Sep 2016 17:03:51 +0000 (19:03 +0200)]
gcc/
Backport from trunk r238337.
2016-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* expmed.c (mult_variant, choose_mult_variant): Move declaration to...
* expmed.h: ... Here.
gcc/
Backport from trunk r238340.
2016-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/65951
PR tree-optimization/70923
* tree-vect-patterns.c: Include mult-synthesis.h.
(target_supports_mult_synth_alg): New function.
(synth_lshift_by_additions): Likewise.
(apply_binop_and_append_stmt): Likewise.
(vect_synth_mult_by_constant): Likewise.
(target_has_vecop_for_code): Likewise.
(vect_recog_mult_pattern): Use above functions to synthesize vector
multiplication by integer constants.
gcc/testsuite/
Backport from trunk r238340.
2016-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/65951
PR tree-optimization/70923
* gcc.dg/vect/vect-mult-const-pattern-1.c: New test.
* gcc.dg/vect/vect-mult-const-pattern-2.c: Likewise.
* gcc.dg/vect/pr65951.c: Likewise.
* gcc.dg/vect/vect-iv-9.c: Remove ! vect_int_mult-specific scan.
Change-Id: I6ddfc66c4dcff8b8eb8e66b8945478bd9b50867a
Yvan Roux [Mon, 5 Sep 2016 17:03:07 +0000 (19:03 +0200)]
gcc/
Backport from trunk r238254, r238763.
2016-07-12 Nathan Sidwell <nathan@acm.org>
* config/arm/arm.c (arm_option_override): Set MASK_SINGLE_PIC_BASE
when -mno-pic-data-is-text-relative is in effect, by default.
* doc/invoke.texi (mpic-data-is-text-relative): Document new
behavior and clarify.
gcc/testsuite/
Backport from trunk r238254, r238763.
2016-07-12 Nathan Sidwell <nathan@acm.org>
* gcc.target/arm/data-rel-1.c: New.
* gcc.target/arm/data-rel-2.c: New.
* gcc.target/arm/data-rel-3.c: New.
Change-Id: Ic060a8302c039cf67a098618a539c14cd3589e23
Yvan Roux [Mon, 5 Sep 2016 17:02:37 +0000 (19:02 +0200)]
gcc/
Backport from trunk r238248.
2016-07-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR middle-end/71700
* expr.c (store_constructor): Mask sign-extended bits when widening
sub-word constructor element at the start of a word.
gcc/testsuite/
Backport from trunk r238248.
2016-07-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR middle-end/71700
* gcc.c-torture/execute/pr71700.c: New test.
Change-Id: Ib37452367e4ec169ca88ada2d233bc6a608c1045
Yvan Roux [Mon, 5 Sep 2016 17:00:39 +0000 (19:00 +0200)]
gcc/
Backport from trunk r238013.
2016-07-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR rtl-optimization/71594
* ifcvt.c (noce_convert_multiple_sets): Wrap new_val or old_val
into subregs of appropriate mode before trying to emit a conditional
move.
gcc/testsuite/
Backport from trunk r238013.
2016-07-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR rtl-optimization/71594
* gcc.dg/torture/pr71594.c: New test.
Change-Id: I0ee49c3987adc7ee7ef5d4d6baf9712e3659f885
Yvan Roux [Mon, 5 Sep 2016 17:00:05 +0000 (19:00 +0200)]
libstdc++-v3/
Backport from trunk r237879.
2016-06-30 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/29_atomics/atomic/65913.cc: Require atomic-builtins rather
than specific target.
Change-Id: Ib9a853136e48efd6843f07b6f8a3e0ae51397f78
Yvan Roux [Mon, 5 Sep 2016 16:58:45 +0000 (18:58 +0200)]
gcc/
Backport from trunk r237250.
2016-06-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* ifcvt.c (struct noce_if_info): Add transform_name field.
(noce_try_move): Set if_info->transform_name to the function name.
(noce_try_ifelse_collapse): Likewise.
(noce_try_store_flag): Likewise.
(noce_try_inverse_constants): Likewise.
(noce_try_store_flag_constants): Likewise.
(noce_try_addcc): Likewise.
(noce_try_store_flag_mask): Likewise.
(noce_try_cmove): Likewise.
(noce_try_cmove_arith): Likewise.
(noce_try_minmax): Likewise.
(noce_try_abs): Likewise.
(noce_try_sign_mask): Likewise.
(noce_try_bitop): Likewise.
(noce_convert_multiple_sets): Likewise.
(noce_process_if_block): Print if_info->transform_name to
dump_file if transformation succeeded.
Change-Id: I53c1da692ee6f51a06cba1310bf6b96bb9a9e3f7
Yvan Roux [Mon, 5 Sep 2016 12:11:02 +0000 (14:11 +0200)]
gcc/
Backport from trunk r239960.
2016-09-02 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* cfg.c (free_original_copy_tables): Replace second assignment of
bb_copy = NULL by bb_original = NULL.
Change-Id: I9699c79e5aed78014de3cb761873ac5cae6a3b60
Yvan Roux [Sun, 4 Sep 2016 21:34:11 +0000 (23:34 +0200)]
libstdc++-v3/
Backport from trunk r239955.
2016-09-02 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
* acinclude.m4 (GLIBCXX_CONFIGURE_TESTSUITE): Check for presence of
setrlimit on both native and cross targets.
* configure: Regenerate.
Change-Id: Ia32feb614e83cd8f1b4b75997da3b4123dad572c
projects / platform / upstream / linaro-gcc.git / log