platform/upstream/llvm.git
3 years ago[mlir][nfc] Fix indentation in LinalgOps.td.
Alexander Belyaev [Fri, 19 Feb 2021 12:02:58 +0000 (13:02 +0100)]
[mlir][nfc] Fix indentation in LinalgOps.td.

3 years ago[OPENMP][AMDGCN] Improvements to print_kernel_trace (bit mask)
Ron Lieberman [Thu, 18 Feb 2021 22:10:40 +0000 (17:10 -0500)]
[OPENMP][AMDGCN] Improvements to print_kernel_trace (bit mask)

allow bit masking to select various trace features.
  bit 0 => Launch tracing           (stderr)
  bit 1 => timing of runtime        (stdout)
  bit 2 => detailed launch tracing  (stderr)
  bit 3 => timing goes to stdout instead of stderr

  example: LIBOMPTARGET_KERNEL_TRACE=7     does it all
           LIBOMPTARGET_KERNEL_TRACE=5     Launch + details
           LIBOMPTARGET_KERNEL_TRACE=2     timings + launch to stderr
           LIBOMPTARGET_KERNEL_TRACE=10    timings + launch to stdout

Differential Revision: https://reviews.llvm.org/D96998

3 years ago[AMDGPU] WQM/WWM: Fix marking of partial definitions
Carl Ritson [Fri, 19 Feb 2021 11:12:03 +0000 (20:12 +0900)]
[AMDGPU] WQM/WWM: Fix marking of partial definitions

Track lanes when processing definitions for marking WQM/WWM.
If all lanes have been defined then marking can stop.
This prevents marking unnecessary instructions as WQM/WWM.

In particular this fixes a bug where values passing through
V_SET_INACTIVE would me marked as requiring WWM.

Reviewed By: piotr

Differential Revision: https://reviews.llvm.org/D95503

3 years ago[DCE] Don't remove non-willreturn calls
Nikita Popov [Thu, 18 Feb 2021 21:29:19 +0000 (22:29 +0100)]
[DCE] Don't remove non-willreturn calls

In both ADCE and BDCE (via DemandedBits) we should not remove
instructions that are not guaranteed to return. This issue was
pointed out by fhahn in the recent llvm-dev thread.

Differential Revision: https://reviews.llvm.org/D96993

3 years ago[flang][driver] Add debug measure-parse-tree and pre-fir-tree options
Faris Rehman [Wed, 17 Feb 2021 18:53:05 +0000 (18:53 +0000)]
[flang][driver] Add debug measure-parse-tree and pre-fir-tree options

Add the following options:
* -fdebug-measure-parse-tree
* -fdebug-pre-fir-tree

Summary of changes:
- Add 2 new frontend actions: DebugMeasureParseTreeAction and DebugPreFIRTreeAction
- Add MeasurementVisitor to FrontendActions.h
- Make reportFatalSemanticErrors return true if there are any fatal errors
- Port most of the `-fdebug-pre-fir-tree` tests to use the new driver if built, otherwise use f18.

Differential Revision: https://reviews.llvm.org/D96884

3 years agoRemove unnecessary "using namespace llvm" inside "namespace llvm". NFCI.
Simon Pilgrim [Fri, 19 Feb 2021 11:15:16 +0000 (11:15 +0000)]
Remove unnecessary "using namespace llvm" inside "namespace llvm". NFCI.

3 years ago[X86][AVX] getFauxShuffleMask - decode VBROADCAST(EXTRACT_VECTOR_ELT(V,0))
Simon Pilgrim [Fri, 19 Feb 2021 11:02:38 +0000 (11:02 +0000)]
[X86][AVX] getFauxShuffleMask - decode VBROADCAST(EXTRACT_VECTOR_ELT(V,0))

Handle the case where we're broadcasting a scalar extracted from another vector.

3 years ago[IR] Move willReturn() to Instruction
Nikita Popov [Thu, 18 Feb 2021 21:15:17 +0000 (22:15 +0100)]
[IR] Move willReturn() to Instruction

This moves the willReturn() helper from CallBase to Instruction,
so that it can be used in a more generic manner. This will make
it easier to fix additional passes (ADCE and BDCE), and will give
us one place to change if additional instructions should become
non-willreturn (e.g. there has been talk about handling volatile
operations this way).

I have also included the IntrinsicInst workaround directly in
here, so that it gets applied consistently. (As such this change
is not entirely NFC -- FuncAttrs will now use this as well.)

Differential Revision: https://reviews.llvm.org/D96992

3 years ago[BasicAA] Add simple depth limit to avoid stack overflow (PR49151)
Nikita Popov [Thu, 18 Feb 2021 22:13:33 +0000 (23:13 +0100)]
[BasicAA] Add simple depth limit to avoid stack overflow (PR49151)

This is a simpler variant of D96647. It just adds a straightforward
depth limit with a high cutoff, without introducing complex logic
for BatchAA consistency. It accepts that we may cache a sub-optimal
result if the depth limit is hit.

Eventually this should be more fully addressed by D96647 or similar,
but in the meantime this avoids stack overflows in a cheap way.

Differential Revision: https://reviews.llvm.org/D96996

3 years ago[mlir] Add a TensorLoadToMemref canonicalization
Nicolas Vasilache [Fri, 19 Feb 2021 09:33:56 +0000 (09:33 +0000)]
[mlir] Add a TensorLoadToMemref canonicalization

A folder of `tensor_load + tensor_to_memref` exists but it only applies when
source and destination memref types are the same.

This revision adds a canonicalize `tensor_load + tensor_to_memref` to `memref_cast`
when type mismatches prevent folding to kick in.

Differential Revision: https://reviews.llvm.org/D97038

3 years ago[docs] Fix the GlobalISel/GenericOpcode.rst
Djordje Todorovic [Fri, 19 Feb 2021 09:28:38 +0000 (10:28 +0100)]
[docs] Fix the GlobalISel/GenericOpcode.rst

This couses docs build to fail.
Introduced with D96890.

3 years ago[X86] Fix a codegen crash in getSetCCResultType
Wang, Pengfei [Fri, 19 Feb 2021 08:43:30 +0000 (16:43 +0800)]
[X86] Fix a codegen crash in getSetCCResultType

This patch fixes some crashes coming from
X86ISelLowering::getSetCCResultType, which would occasionally return
an EVT constructed from an invalid MVT, which has a null Type pointer.

This patch refers to D95434.

Differential Revision: https://reviews.llvm.org/D97036

3 years ago[AArch64] Add some missing Neoverse features
Sjoerd Meijer [Thu, 18 Feb 2021 14:26:09 +0000 (14:26 +0000)]
[AArch64] Add some missing Neoverse features

This enables AES fusion and the post RA scheduler for the Neoverse cores.
And while we are it also for the A55 that we had missed earlier.

Differential Revision: https://reviews.llvm.org/D96866

3 years ago[llvm-exegesis] Ignore instructions using custom inserter
Qiu Chaofan [Fri, 19 Feb 2021 09:04:27 +0000 (17:04 +0800)]
[llvm-exegesis] Ignore instructions using custom inserter

Some instructions defined in table-gen files sets usesCustomInserter
bit, which means it has to be lowered by target code and isn't actually
valid instruction at MC level. So we should treat them like pseudo
instructions.

Reviewed By: gchatelet

Differential Revision: https://reviews.llvm.org/D94898

3 years ago[llvm-exegesis] [PowerPC] Add basic LIT test
Qiu Chaofan [Fri, 19 Feb 2021 08:52:45 +0000 (16:52 +0800)]
[llvm-exegesis] [PowerPC] Add basic LIT test

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D94897

3 years ago[debuginfo-tests] Recommit test sret.cpp
OCHyams [Fri, 19 Feb 2021 08:44:32 +0000 (08:44 +0000)]
[debuginfo-tests] Recommit test sret.cpp

This test was accidently removed when the directory structure was shuffled
around for dexter in f78c236efda8.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D96968

3 years ago[NPM][LTO] Do not enable MemorySSA with LoopFullUnrollPass
David Green [Fri, 19 Feb 2021 08:35:11 +0000 (08:35 +0000)]
[NPM][LTO] Do not enable MemorySSA with LoopFullUnrollPass

As with the standard opt pipeline, we disable the MemorySSA dependency
in the LTO LPM pipeline as not all passes preserve MemorySSA.

3 years ago[mlir] Better support for rank-reducing subview / subtensor type inference.
Nicolas Vasilache [Thu, 18 Feb 2021 22:03:02 +0000 (22:03 +0000)]
[mlir] Better support for rank-reducing subview / subtensor type inference.

Differential Revision: https://reviews.llvm.org/D96995

3 years agoReland "[Debugify] Make the debugify aware of the original (-g) Debug Info"
Djordje Todorovic [Thu, 18 Feb 2021 17:49:44 +0000 (09:49 -0800)]
Reland "[Debugify] Make the debugify aware of the original (-g) Debug Info"

    As discussed on the RFC [0], I am sharing the set of patches that
    enables checking of original Debug Info metadata preservation in
    optimizations. The proof-of-concept/proposal can be found at [1].

    The implementation from the [1] was full of duplicated code,
    so this set of patches tries to merge this approach into the existing
    debugify utility.

    For example, the utility pass in the original-debuginfo-check
    mode could be invoked as follows:

      $ opt -verify-debuginfo-preserve -pass-to-test sample.ll

    Since this is very initial stage of the implementation,
    there is a space for improvements such as:
      - Add support for the new pass manager
      - Add support for metadata other than DILocations and DISubprograms

    [0] https://groups.google.com/forum/#!msg/llvm-dev/QOyF-38YPlE/G213uiuwCAAJ
    [1] https://github.com/djolertrk/llvm-di-checker

    Differential Revision: https://reviews.llvm.org/D82545

The test that was failing is now forced to use the old PM.

3 years agoLanguageRuntime can provide an UnwindPlan for special occasions
Jason Molenda [Fri, 19 Feb 2021 07:20:15 +0000 (23:20 -0800)]
LanguageRuntime can provide an UnwindPlan for special occasions

Add a facility in the LanguageRuntime to provide a special
UnwindPlan based on the register values in a RegisterContext,
instead of using the return-pc to find a function and use its
normal UnwindPlans.

Needed when the runtime has special stack frames that we want
to show the user, but aren't actually on the real stack.
Specifically for Swift asynchronous functions.

With feedback from Greg Clayton, Jonas Devlieghere, Dave Lee

<rdar://problem/70398009>

Differential Revision: https://reviews.llvm.org/D96839

3 years ago[mlir][sparse] assert fail on mismatch between rank and annotations array
Aart Bik [Fri, 19 Feb 2021 06:01:39 +0000 (22:01 -0800)]
[mlir][sparse] assert fail on mismatch between rank and annotations array

Rationale:
Providing the wrong number of sparse/dense annotations was silently
ignored or caused unrelated crashes. This minor change verifies that
the provided number matches the rank.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D97034

3 years ago[RISCV] Prune unneeded indexed load/store pseudo instructions.
Craig Topper [Fri, 19 Feb 2021 07:00:18 +0000 (23:00 -0800)]
[RISCV] Prune unneeded indexed load/store pseudo instructions.

We were creating more combinations of value and index lmul than
we needed.

I've copied the loop structure used here from VPseudoAMOEI with
all data sew values instead of just 32/64.

Similar can be done for segment loads/store.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D97008

3 years ago[CodeGen] Use range-based for loops (NFC)
Kazu Hirata [Fri, 19 Feb 2021 06:46:43 +0000 (22:46 -0800)]
[CodeGen] Use range-based for loops (NFC)

3 years ago[Support] Use static_assert instead of assert (NFC)
Kazu Hirata [Fri, 19 Feb 2021 06:46:41 +0000 (22:46 -0800)]
[Support] Use static_assert instead of assert (NFC)

Identified with misc-static-assert.

3 years ago[TableGen] Use ListSeparator (NFC)
Kazu Hirata [Fri, 19 Feb 2021 06:46:39 +0000 (22:46 -0800)]
[TableGen] Use ListSeparator (NFC)

3 years ago[mlir] Load dynamic libraries in JitRunner from absolute paths so that GDB can find...
Christian Sigg [Thu, 18 Feb 2021 21:11:20 +0000 (22:11 +0100)]
[mlir] Load dynamic libraries in JitRunner from absolute paths so that GDB can find the symbol tables.

Reviewed By: mehdi_amini, ftynse

Differential Revision: https://reviews.llvm.org/D96759

3 years ago[FPEnv][AArch64] Implement lowering of llvm.set.rounding
Serge Pavlov [Tue, 16 Feb 2021 13:14:21 +0000 (20:14 +0700)]
[FPEnv][AArch64] Implement lowering of llvm.set.rounding

Differential Revision: https://reviews.llvm.org/D96836

3 years ago[libc++] shared_ptr deleter requirements (LWG 2802).
zoecarver [Fri, 19 Feb 2021 05:31:07 +0000 (21:31 -0800)]
[libc++] shared_ptr deleter requirements (LWG 2802).

This patch implements 2802. Requires _Deleter to have call operator and be move constructible. Based on D62233.

Refs PR37637.

Differential Revision: https://reviews.llvm.org/D62274

3 years agoMark 2534 as Complete.
zoecarver [Fri, 19 Feb 2021 05:28:49 +0000 (21:28 -0800)]
Mark 2534 as Complete.

c90dee1 fixed LWG 1203 which supresses LWG 2534 as well.

Refs D62889.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D96885

3 years ago[HIP] Support device sanitizer
Yaxun (Sam) Liu [Tue, 16 Feb 2021 18:43:03 +0000 (13:43 -0500)]
[HIP] Support device sanitizer

Add option -fgpu-sanitize to enable sanitizer for AMDGPU target.

Since it is experimental, it is off by default.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D96835

3 years ago[ORC] Print CPU feature string in JITTargetMachineBuilder debugging output.
Lang Hames [Fri, 19 Feb 2021 03:36:15 +0000 (14:36 +1100)]
[ORC] Print CPU feature string in JITTargetMachineBuilder debugging output.

3 years ago[RISCV] Remove redundant test cases for index segment store (8/8).
Hsiangkai Wang [Fri, 19 Feb 2021 03:10:01 +0000 (11:10 +0800)]
[RISCV] Remove redundant test cases for index segment store (8/8).

Differential Revision: https://reviews.llvm.org/D97026

3 years ago[RISCV] Remove redundant test cases for index segment store (7/8).
Hsiangkai Wang [Fri, 19 Feb 2021 03:09:55 +0000 (11:09 +0800)]
[RISCV] Remove redundant test cases for index segment store (7/8).

Differential Revision: https://reviews.llvm.org/D97025

3 years ago[RISCV] Remove redundant test cases for index segment store (6/8).
Hsiangkai Wang [Fri, 19 Feb 2021 03:09:49 +0000 (11:09 +0800)]
[RISCV] Remove redundant test cases for index segment store (6/8).

Differential Revision: https://reviews.llvm.org/D97024

3 years ago[RISCV] Remove redundant test cases for index segment store (5/8).
Hsiangkai Wang [Fri, 19 Feb 2021 03:08:01 +0000 (11:08 +0800)]
[RISCV] Remove redundant test cases for index segment store (5/8).

Differential Revision: https://reviews.llvm.org/D97023

3 years ago[RISCV] Remove redundant test cases for index segment load (4/8).
Hsiangkai Wang [Fri, 19 Feb 2021 03:07:52 +0000 (11:07 +0800)]
[RISCV] Remove redundant test cases for index segment load (4/8).

3 years ago[RISCV] Remove redundant test cases for index segment load (3/8).
Hsiangkai Wang [Fri, 19 Feb 2021 03:07:42 +0000 (11:07 +0800)]
[RISCV] Remove redundant test cases for index segment load (3/8).

Differential Revision: https://reviews.llvm.org/D97022

3 years ago[RISCV] Remove redundant test cases for index segment load (2/8).
Hsiangkai Wang [Fri, 19 Feb 2021 03:07:36 +0000 (11:07 +0800)]
[RISCV] Remove redundant test cases for index segment load (2/8).

3 years ago[RISCV] Remove redundant test cases for index segment load (1/8).
Hsiangkai Wang [Fri, 19 Feb 2021 03:07:25 +0000 (11:07 +0800)]
[RISCV] Remove redundant test cases for index segment load (1/8).

Differential Revision: https://reviews.llvm.org/D97020

3 years ago[Coroutine] Relax CoroElide musttail check
Xun Li [Fri, 19 Feb 2021 03:36:11 +0000 (19:36 -0800)]
[Coroutine] Relax CoroElide musttail check

As discussed in D94834, we don't really need to do complicated analysis. It's safe to just drop the tail call attribute.

Differential Revision: https://reviews.llvm.org/D96926

3 years ago[RISCV] Split zvlsseg searchable table into 4 separate tables. Index by properties...
Craig Topper [Fri, 19 Feb 2021 03:00:48 +0000 (19:00 -0800)]
[RISCV] Split zvlsseg searchable table into 4 separate tables. Index by properties rather than intrinsic ID.

Intrinsic ID is a 32-bit value which made each row of the table 4
byte aligned. The remaining fields used 5 bytes. This meant 3 bytes
of padding per row.

This patch breaks the table into 4 separate tables and indexes them
by properties we know about the intrinsic. NF, masked,
strided, ordered, etc. The indexed load/store tables have no
padding in their rows now.

All together this reduces the size of llc binary by ~28K.

I'm considering adding similar tables for isel of non-segment
load/store as well to cut down the size of the isel table and
probably improve our isel performance. Those tables would need to
indexed from intrinsics, IR loads/stores, gathers/scatters, and
RISCVISD opcodes. So having a table that can be indexed without using
intrinsic ID is more flexible.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D96894

3 years ago[RISCV] Enable PrimaryKeyEarlyOut on RISCVVPseudosTable.
Craig Topper [Fri, 19 Feb 2021 02:50:58 +0000 (18:50 -0800)]
[RISCV] Enable PrimaryKeyEarlyOut on RISCVVPseudosTable.

This table is queried in RISCVMCInstLower without knowing
whether the instruction is a vector pseudo. Due to the way the
binary search works, we have to do log2(tablesize) checks just
to determine a non-vector instruction isn't in the table.

Conveniently, all the vector pseudos are pretty tightly
packed within the internal instruction enum. By enabling the
PrimaryKeyEarlyOut, tablegen will emit a check against the
beginning and end of the table before doing the binary search.
This gives a quick early out on the search for the majority
of non-vector instructions.

Differential Revision: https://reviews.llvm.org/D97016

3 years agoReset the EntryValue location flag in finalizeEntryValue.
Adrian Prantl [Fri, 19 Feb 2021 02:35:29 +0000 (18:35 -0800)]
Reset the EntryValue location flag in finalizeEntryValue.

This fixes an assertion error when entry values are combined with
DW_OP_LLVM_fragment.

3 years agoPR49239: Don't take shortcuts when constant evaluating in 'warn on UB'
Richard Smith [Fri, 19 Feb 2021 02:26:36 +0000 (18:26 -0800)]
PR49239: Don't take shortcuts when constant evaluating in 'warn on UB'
mode.

We use that mode when evaluating ICEs in C, and those shortcuts could
result in ICE evaluation producing the wrong answer, specifically if we
evaluate a statement-expression as part of evaluating the ICE.

3 years agoRevert "Modify TypePrinter to differentiate between anonymous struct and unnamed...
Shafik Yaghmour [Fri, 19 Feb 2021 02:17:08 +0000 (18:17 -0800)]
Revert "Modify TypePrinter to differentiate between anonymous struct and unnamed struct"

I missed clangd test suite and may need some time to get those working, so reverting for now.

This reverts commit ecb90b55454ee94733481247486729a504aa43a1.

3 years agoRevert "Fix for Modify TypePrinter to differentiate between anonymous struct and...
Shafik Yaghmour [Fri, 19 Feb 2021 02:16:12 +0000 (18:16 -0800)]
Revert "Fix for Modify TypePrinter to differentiate between anonymous struct and unnamed struct"

I missed clangd test suite and may need some time to get those working, so reverting for now.

This reverts commit 1e0819395657a9306f609849dcd3be9d7fb0c894.

3 years agoReland "[MLIR] Make structured op tests permutation invariant"
Geoffrey Martin-Noble [Fri, 19 Feb 2021 01:12:12 +0000 (17:12 -0800)]
Reland "[MLIR] Make structured op tests permutation invariant"

Relands with fix swapping DEPENDS for LINK_LIBS.

This reverts commit cd8cc00b9e2b2b2b10270f7485eb47759bc54cc1.

Differential Revision: https://reviews.llvm.org/D97011

3 years ago[OpenMP][NVPTX] Add the support for CUDA 11.2 and CUDA 11.1
Shilei Tian [Fri, 19 Feb 2021 02:04:32 +0000 (21:04 -0500)]
[OpenMP][NVPTX] Add the support for CUDA 11.2 and CUDA 11.1

CUDA 11.2 and CUDA 11.1 are all available now.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D97004

3 years agoFix for Modify TypePrinter to differentiate between anonymous struct and unnamed...
Shafik Yaghmour [Fri, 19 Feb 2021 01:56:59 +0000 (17:56 -0800)]
Fix for Modify TypePrinter to differentiate between anonymous struct and unnamed struct

One of the lldb tests needed additional fixes.

3 years agoFix MLIR Toy tutorial JIT example and add a test to cover it
Mehdi Amini [Fri, 19 Feb 2021 01:53:14 +0000 (01:53 +0000)]
Fix MLIR Toy tutorial JIT example and add a test to cover it

3 years ago[libcxx] adds concept `std::uniform_random_bit_generator`
Christopher Di Bella [Wed, 17 Feb 2021 02:52:17 +0000 (02:52 +0000)]
[libcxx] adds concept `std::uniform_random_bit_generator`

Implements parts of:
    - P0898R3 Standard Library Concepts
    - P1754 Rename concepts to standard_case for C++20, while we still can

Differential Revision: https://reviews.llvm.org/D96577

3 years agoAMDGPU/ELF: Sort MACHs by value and add missing reserved MACHs
Konstantin Zhuravlyov [Fri, 19 Feb 2021 01:44:54 +0000 (20:44 -0500)]
AMDGPU/ELF: Sort MACHs by value and add missing reserved MACHs

  - Sort MACHs by its value
  - Add missing reserved MACHs
    - EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3D
    - EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3E

Differential Revision: https://reviews.llvm.org/D97010

3 years agoModify TypePrinter to differentiate between anonymous struct and unnamed struct
Shafik Yaghmour [Fri, 19 Feb 2021 01:05:46 +0000 (17:05 -0800)]
Modify TypePrinter to differentiate between anonymous struct and unnamed struct

Currently TypePrinter lumps anonymous classes and unnamed classes in one group "anonymous" this is not correct and can be confusing in some contexts.

Differential Revision: https://reviews.llvm.org/D96807

3 years ago[android] Fix testing adb call
Vitaly Buka [Fri, 19 Feb 2021 01:22:32 +0000 (17:22 -0800)]
[android] Fix testing adb call

Looks like some debug leftover which force another retry.

3 years agoSwitch to using LEB encoding for key and data lengths in on-disk hash
Richard Smith [Fri, 19 Feb 2021 00:24:01 +0000 (16:24 -0800)]
Switch to using LEB encoding for key and data lengths in on-disk hash
tables.

This gives a modest AST file size reduction, while also fixing crashes
in cases where the key or data length doesn't fit into 16 bits.
Unfortunately, such situations tend to require huge test cases (such as
more than 16K modules or an overload set with 16K entries), and I
couldn't get a testcase to finish in a reasonable amount of time, so no
test is included for that bugfix.

No functionality change intended (other than the bugfix).

3 years agoDetect diagnostic groups that are defined in multiple 'def's.
Richard Smith [Wed, 17 Feb 2021 19:22:52 +0000 (11:22 -0800)]
Detect diagnostic groups that are defined in multiple 'def's.

Remove the three such groups that we've accumulated. These were causing
duplicated output to appear in generated the diagnostic reference.

3 years ago[SampleFDO] Stop repeated indirect call promotion for the same target.
Wei Mi [Sat, 13 Feb 2021 03:46:28 +0000 (19:46 -0800)]
[SampleFDO] Stop repeated indirect call promotion for the same target.

Found a problem in indirect call promotion in sample loader pass. Currently
if an indirect call is promoted for a target, and if the parent function is
inlined into some other function, the indirect call can be promoted for the
same target again. That is redundent which can harm performance and can cause
excessive compile time in some extreme case.

The patch fixes the issue. If a target is promoted for an indirect call, the
patch will write ICP metadata with the target call count being set to 0.
In the later ICP in sample profile loader, if it sees a target has 0 count
for an indirect call, it knows the target has been promoted and won't do
indirect call promotion for the indirect call.

The fix brings 0.1~0.2% performance on our search benchmark.

Differential Revision: https://reviews.llvm.org/D96806

3 years agoAdd DivOp to the Shape dialect
Jing Pu [Fri, 19 Feb 2021 00:58:47 +0000 (16:58 -0800)]
Add DivOp to the Shape dialect

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D96907

3 years agoRevert "[MLIR] Make structured op tests permutation invariant"
Mehdi Amini [Fri, 19 Feb 2021 00:15:51 +0000 (00:15 +0000)]
Revert "[MLIR] Make structured op tests permutation invariant"

This reverts commit b9ff67099ad6da931976e66f1510c5af2558a86e.
The build is broken with -DBUILD_SHARED_LIBS=ON

3 years ago[lldb] Check that files exists before handing them off to FileCollector
Jonas Devlieghere [Fri, 19 Feb 2021 00:13:28 +0000 (16:13 -0800)]
[lldb] Check that files exists before handing them off to FileCollector

The FileCollector asserts that paths passed to addDirectory are indeed
directories. For that to work, the file needs to actually exist. In the
downstream Swift fork we have tests that remove files during testing,
which resulted in this assertion getting triggered.

3 years agoMIR: Fix parser crash on syntax error on first character
Matt Arsenault [Thu, 18 Feb 2021 23:46:39 +0000 (18:46 -0500)]
MIR: Fix parser crash on syntax error on first character

This was calling the diagnostic printer before the context member was
initialized.

3 years ago[Polly] Update IslAstInfo::getNodePayload to use isl C++ interface. NFC.
Michael Kruse [Thu, 18 Feb 2021 23:08:41 +0000 (17:08 -0600)]
[Polly] Update IslAstInfo::getNodePayload to use isl C++ interface. NFC.

3 years ago[dfsan] Instrument origin variable and function definitions
Jianzhou Zhao [Thu, 18 Feb 2021 18:29:21 +0000 (18:29 +0000)]
[dfsan] Instrument origin variable and function definitions

This is a part of https://reviews.llvm.org/D95835.

Reviewed-by: morehouse, gbalats
Differential Revision: https://reviews.llvm.org/D96977

3 years ago[llvm][IR] Do not place constants with static relocations in a mergeable section
Leonard Chan [Wed, 10 Feb 2021 17:59:36 +0000 (09:59 -0800)]
[llvm][IR] Do not place constants with static relocations in a mergeable section

This patch provides two major changes:

1. Add getRelocationInfo to check if a constant will have static, dynamic, or
   no relocations. (Also rename the original needsRelocation to needsDynamicRelocation.)
2. Only allow a constant with no relocations (static or dynamic) to be placed
   in a mergeable section.

This will allow unused symbols that contain static relocations and happen to
fit in mergeable constant sections (.rodata.cstN) to instead be placed in
unique-named sections if -fdata-sections is used and subsequently garbage collected
by --gc-sections.

See https://lists.llvm.org/pipermail/llvm-dev/2021-February/148281.html.

Differential Revision: https://reviews.llvm.org/D95960

3 years ago[gn build] assert that goma_dir and sysroot are set for goma builds
Nico Weber [Thu, 18 Feb 2021 23:30:13 +0000 (18:30 -0500)]
[gn build] assert that goma_dir and sysroot are set for goma builds

3 years ago[CSSPGO] Use callsite sample counts to annotate indirect call sites.
Hongtao Yu [Thu, 18 Feb 2021 20:44:57 +0000 (12:44 -0800)]
[CSSPGO] Use callsite sample counts to annotate indirect call sites.

With CSSPGO all indirect call targets are counted torwards the original indirect call site in the profile, including both inlined and non-inlined targets. Therefore no need to look for callee entry counts. This also fixes the issue where callee entry count doesn't match callsite count due to the nature of CS sampling.

I'm also cleaning up the orginal code that called `findIndirectCallFunctionSamples` just to compute the sum, the return value of which was disgarded.

Reviewed By: wmi, wenlei

Differential Revision: https://reviews.llvm.org/D96990

3 years agoAMDGPU: Add regression testcase for bundle pressure issue
Matt Arsenault [Wed, 3 Feb 2021 19:16:40 +0000 (14:16 -0500)]
AMDGPU: Add regression testcase for bundle pressure issue

This is a somewhat reduced testcase that regressed, causing the revert
in 477e3fe4f874b1c4d5896f3bfaf7b3b8a6d38103.

This was producing a bundle that could not be allocated. This is a
tricky one to reduce/reproduce, but I do like having some sanity check
for this.

3 years ago[MLIR] Make structured op tests permutation invariant
Geoffrey Martin-Noble [Thu, 18 Feb 2021 20:56:42 +0000 (12:56 -0800)]
[MLIR] Make structured op tests permutation invariant

Extracts the relevant dimensions from the map under test to build up the
maps to test against in a permutation-invariant way.

This also includes a fix to the indexing maps used by
isColumnMajorMatmul. The maps as currently written do not describe a
column-major matmul. The linalg named op column_major_matmul has the
correct maps (and notably fails the current test).

If `C = matmul(A, B)` we want an operation that given A in column major
format and B in column major format produces C in column major format.
Given that for a matrix, faux column major is just transpose.
`column_major_matmul(transpose(A), transpose(B)) = transpose(C)`. If
`A` is `NxK` and `B` is `KxM`, then `C` is `NxM`, so `transpose(A)` is
`KxN`, `transpose(B)` is `MxK` and `transpose(C)` is `MxN`, not `NxM`
as these maps currently have.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96984

3 years ago[Coverage] Store compilation dir separately in coverage mapping
Petr Hosek [Wed, 10 Feb 2021 08:25:34 +0000 (00:25 -0800)]
[Coverage] Store compilation dir separately in coverage mapping

We currently always store absolute filenames in coverage mapping.  This
is problematic for several reasons. It poses a problem for distributed
compilation as source location might vary across machines.  We are also
duplicating the path prefix potentially wasting space.

This change modifies how we store filenames in coverage mapping. Rather
than absolute paths, it stores the compilation directory and file paths
as given to the compiler, either relative or absolute. Later when
reading the coverage mapping information, we recombine relative paths
with the working directory. This approach is similar to handling
ofDW_AT_comp_dir in DWARF.

Finally, we also provide a new option, -fprofile-compilation-dir akin
to -fdebug-compilation-dir which can be used to manually override the
compilation directory which is useful in distributed compilation cases.

Differential Revision: https://reviews.llvm.org/D95753

3 years agoGlobalISel: Merge some AMDGPU ABI lowering code to generic code
Matt Arsenault [Sun, 7 Feb 2021 17:12:31 +0000 (12:12 -0500)]
GlobalISel: Merge some AMDGPU ABI lowering code to generic code

AMDGPU currently has a lot of pre-processing code to pre-split
argument types into 32-bit pieces before passing it to the generic
code in handleAssignments. This is a bit sloppy and also requires some
overly fancy iterator work when building the calls. It's better if all
argument marshalling code is handled directly in
handleAssignments. This handles more situations like decomposing large
element vectors into sub-element sized pieces.

This should mostly be NFC, but does change the generated code by
shifting where the initial argument packing instructions are placed. I
think this is nicer looking, since it now emits the packing code
directly after the relevant copies, rather than after the copies for
the remaining arguments.

This doubles down on gfx6/gfx7 using the gfx8+ ABI for 16-bit
types. This is ultimately the better option, but incompatible with the
DAG. Fixing this requires more work, especially for f16.

3 years ago[BasicAA] Always strip single-argument phi nodes
Nikita Popov [Sun, 14 Feb 2021 20:24:36 +0000 (21:24 +0100)]
[BasicAA] Always strip single-argument phi nodes

We can always look through single-argument (LCSSA) phi nodes when
performing alias analysis. getUnderlyingObject() already does this,
but stripPointerCastsAndInvariantGroups() does not. We still look
through these phi nodes with the usual aliasPhi() logic, but
sometimes get sub-optimal results due to the restrictions on value
equivalence when looking through arbitrary phi nodes. I think it's
generally beneficial to keep the underlying object logic and the
pointer cast stripping logic in sync, insofar as it is possible.

With this patch we get marginally better results:

  aa.NumMayAlias | 5010069 | 5009861
  aa.NumMustAlias | 347518 | 347674
  aa.NumNoAlias | 27201336 | 27201528
  ...
  licm.NumPromoted | 1293 | 1296

I've renamed the relevant strip method to stripPointerCastsForAliasAnalysis(),
as we're past the point where we can explicitly spell out everything
that's getting stripped.

Differential Revision: https://reviews.llvm.org/D96668

3 years ago[mlir] Fold trivial subtensor / subtensor_insert ops.
Nicolas Vasilache [Thu, 18 Feb 2021 21:33:03 +0000 (21:33 +0000)]
[mlir] Fold trivial subtensor / subtensor_insert ops.

Static subtensor / subtensor_insert of the same size as the source / destination tensor and root @[0..0] with strides [1..1] are folded away.

Differential revision: https://reviews.llvm.org/D96991

3 years ago[libc] Add implementations of the remaining fenv functions.
Siva Chandra Reddy [Tue, 16 Feb 2021 06:36:55 +0000 (22:36 -0800)]
[libc] Add implementations of the remaining fenv functions.

Namely, implementations of fegetexceptfflag, fesetexceptflag,
fegetenv, fesetenv, feholdexcept and feupdateenv have been added.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D96935

3 years ago[DAG] getTruncatedUSUBSAT - always truncate operands. NFCI.
Simon Pilgrim [Thu, 18 Feb 2021 21:28:39 +0000 (21:28 +0000)]
[DAG] getTruncatedUSUBSAT - always truncate operands. NFCI.

As noticed on D96703, we're always truncating the operands so should use getNode(ISD::TRUNCATE) instead of getZExtOrTrunc.

3 years agoMove a second variable only used in an assert into the assert.
Sterling Augustine [Thu, 18 Feb 2021 21:25:37 +0000 (13:25 -0800)]
Move a second variable only used in an assert into the assert.

This prevents unused variable warnings when building without asserts.

3 years ago[DAGCombiner] Transform (zext (select c, load1, load2)) -> (select c, zextload1,...
Guozhi Wei [Thu, 18 Feb 2021 21:12:19 +0000 (13:12 -0800)]
[DAGCombiner] Transform (zext (select c, load1, load2)) -> (select c, zextload1, zextload2)

If extload is legal, following transform
    (zext (select c, load1, load2)) -> (select c, zextload1, zextload2)
can save one ext instruction.

Differential Revision: https://reviews.llvm.org/D95086

3 years ago[flang] Extension: forward refs to dummy args under IMPLICIT NONE
peter klausler [Thu, 18 Feb 2021 19:55:31 +0000 (11:55 -0800)]
[flang] Extension: forward refs to dummy args under IMPLICIT NONE

Most Fortran compilers accept the following benign extension,
and it appears in some applications:

  SUBROUTINE FOO(A,N)
    IMPLICIT NONE
    REAL A(N) ! N is used before being typed
    INTEGER N
  END

Allow it in f18 only for default integer scalar dummy arguments.

Differential Revesion: https://reviews.llvm.org/D96982

3 years ago[gn build] kind of merge f020544601
Nico Weber [Thu, 18 Feb 2021 21:12:04 +0000 (16:12 -0500)]
[gn build] kind of merge f020544601

Fixes check-llvm with a clean build dir.

3 years agoImplement -bundle_loader
Vy Nguyen [Wed, 3 Feb 2021 02:23:22 +0000 (21:23 -0500)]
Implement -bundle_loader

Differential Revision: https://reviews.llvm.org/D95913

Usage: -bundle_loader <executable>
This option specifies the executable that will load the build output file being linked.
When building a bundle, users can use the --bundle_loader  to specify an executable
that contains symbols referenced, but not implemented in the bundle.

3 years agoMove variable only used in an assert into the assert.
Sterling Augustine [Thu, 18 Feb 2021 21:00:49 +0000 (13:00 -0800)]
Move variable only used in an assert into the assert.

This prevents unused variable warnings when building without asserts.

3 years ago[DCE] Add tests for non-willreturn function being removed (NFC)
Nikita Popov [Thu, 18 Feb 2021 20:25:14 +0000 (21:25 +0100)]
[DCE] Add tests for non-willreturn function being removed (NFC)

3 years agoRevert "[Coverage] Store compilation dir separately in coverage mapping"
Petr Hosek [Thu, 18 Feb 2021 20:47:40 +0000 (12:47 -0800)]
Revert "[Coverage] Store compilation dir separately in coverage mapping"

This reverts commit 97ec8fa5bb07e3f5bf25ddcb216b545cd3d03b65 since
the test is failing on some bots.

3 years ago[mlir][Vector] Fold tensor_cast + vector.transfer_read
Nicolas Vasilache [Thu, 18 Feb 2021 20:26:14 +0000 (20:26 +0000)]
[mlir][Vector] Fold tensor_cast + vector.transfer_read

Differential Revision: https://reviews.llvm.org/D96988

3 years agoRemove redundent types in pr49185.ll
Ta-Wei Tu [Thu, 18 Feb 2021 20:44:27 +0000 (04:44 +0800)]
Remove redundent types in pr49185.ll

3 years ago[RISCV] Simplify VPseudoAMOEI multiclass. NFC
Craig Topper [Thu, 18 Feb 2021 20:35:23 +0000 (12:35 -0800)]
[RISCV] Simplify VPseudoAMOEI multiclass. NFC

lmul was already iterated in one of the loops. We don't need to recreate
it from a string.

3 years ago[AMDGPU] Correct gfx90c feature list
Stanislav Mekhanoshin [Thu, 18 Feb 2021 20:20:23 +0000 (12:20 -0800)]
[AMDGPU] Correct gfx90c feature list

Looks like we have forced FeatureXNACK and forgot
FeatureMadMacF32Insts.

Differential Revision: https://reviews.llvm.org/D96989

3 years agoRevert "[AArch64] Adding Neon Polynomial vadd Intrinsics"
Pengxuan Zheng [Thu, 18 Feb 2021 20:36:02 +0000 (12:36 -0800)]
Revert "[AArch64] Adding Neon Polynomial vadd Intrinsics"

Revert the patch due to buildbot failures.

This reverts commit d9645059c5deeacf264bea0cf50eab459cf8e5bb.

3 years agoPerform memory accesses in the same addrspace as the corresponding memref.
Andrew Pritchard [Thu, 18 Feb 2021 20:21:11 +0000 (12:21 -0800)]
Perform memory accesses in the same addrspace as the corresponding memref.

It's not necessarily the case on all architectures that all memory is
addressable in addrspace 0, so casting the pointer to addrspace 0 is
liable to cause problems.

Reviewed By: aartbik, ftynse, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96380

3 years ago[Coverage] Store compilation dir separately in coverage mapping
Petr Hosek [Wed, 10 Feb 2021 08:25:34 +0000 (00:25 -0800)]
[Coverage] Store compilation dir separately in coverage mapping

We currently always store absolute filenames in coverage mapping.  This
is problematic for several reasons. It poses a problem for distributed
compilation as source location might vary across machines.  We are also
duplicating the path prefix potentially wasting space.

This change modifies how we store filenames in coverage mapping. Rather
than absolute paths, it stores the compilation directory and file paths
as given to the compiler, either relative or absolute. Later when
reading the coverage mapping information, we recombine relative paths
with the working directory. This approach is similar to handling
ofDW_AT_comp_dir in DWARF.

Finally, we also provide a new option, -fprofile-compilation-dir akin
to -fdebug-compilation-dir which can be used to manually override the
compilation directory which is useful in distributed compilation cases.

Differential Revision: https://reviews.llvm.org/D95753

3 years ago[clang] bump VERSION_MAJOR
Nico Weber [Thu, 18 Feb 2021 20:23:23 +0000 (15:23 -0500)]
[clang] bump VERSION_MAJOR

Somewhat speculative, see https://reviews.llvm.org/D96816#2572431

3 years ago[MLIR][TOSA] Add lowering from TOSA to Linalg for math-based and elementwise ops
natashaknk [Thu, 18 Feb 2021 20:09:59 +0000 (12:09 -0800)]
[MLIR][TOSA] Add lowering from TOSA to Linalg for math-based and elementwise ops

This patch adds lowering to Linalg for the following TOSA ops: negate, rsqrt, mul, select, clamp and reluN and includes support for signless integer and floating point types

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D96924

3 years ago[llvm][TextAPI] add equality operator for InterfaceFile
Sam Powell [Thu, 18 Feb 2021 19:27:54 +0000 (11:27 -0800)]
[llvm][TextAPI] add equality operator for InterfaceFile

This patch adds functionality to compare for the equality between `InterfaceFile`s based on attributes specific to linking.

Reviewed By: cishida, steven_wu

Differential Revision: https://reviews.llvm.org/D96629

3 years ago[WebAssembly] Fix assert in lookup of section symbols
Wouter van Oortmerssen [Thu, 11 Feb 2021 01:34:05 +0000 (17:34 -0800)]
[WebAssembly] Fix assert in lookup of section symbols

Fixes assert in: https://bugs.llvm.org/show_bug.cgi?id=49036

getWasmSection creates sections if they don't exist, but doesn't add them to the Symbols table. This may cause problems in subsequent calls to getOrCreateSymbol which checks this table, the calls createSymbol assuming it doesn't exist, which then checks UsedNames and finds out it does exist, causing an assert on trying to rename a non-temp symbol.

I tried also fixing the somewhat unintuitive forced suffixing (adding `0`), but it turns out that WasmObjectWriter currently assumes these section symbols are unique, so that may have to be a separate fix: https://bugs.llvm.org/show_bug.cgi?id=49252

Also worth noting is that getWasmSection calling createSymbol may not be correct to start with, given that createSymbol seems to assume it is creating non-section symbols. But again, for a future fix.

Related: where some of this was introduced: https://github.com/llvm/llvm-project/commit/8d396acac3bc21f688ac707bb42e4698dbdcab7e

Differential Revision: https://reviews.llvm.org/D96473

3 years ago[RISCV] Add Zbb command lines to uadd/usub/sadd/ssub tests.
Craig Topper [Thu, 18 Feb 2021 19:24:04 +0000 (11:24 -0800)]
[RISCV] Add Zbb command lines to uadd/usub/sadd/ssub tests.

The expansions of the saturating intrinsics can make use of
the min(u)/max(u) instructions in Zbb.

3 years ago[Coverage] Emit gap region after conditions when macro is present.
Zequan Wu [Thu, 18 Feb 2021 02:16:40 +0000 (18:16 -0800)]
[Coverage] Emit gap region after conditions when macro is present.

3 years ago[gn build] try to fix libxml2 include path on mac after 0ec448194e29
Nico Weber [Thu, 18 Feb 2021 19:40:14 +0000 (14:40 -0500)]
[gn build] try to fix libxml2 include path on mac after 0ec448194e29

3 years ago[RISCV] Use XLenRI alias for RegInfoByHwMode instances
Jessica Clarke [Sat, 13 Feb 2021 16:26:08 +0000 (16:26 +0000)]
[RISCV] Use XLenRI alias for RegInfoByHwMode instances

This avoids tedious repetition and matches what we do for the
ValueTypeByHwMode uses.

Reviewed By: craig.topper, luismarques

Differential Revision: https://reviews.llvm.org/D96649

3 years ago[AArch64] Adding Neon Polynomial vadd Intrinsics
Pengxuan Zheng [Thu, 18 Feb 2021 19:32:35 +0000 (11:32 -0800)]
[AArch64] Adding Neon Polynomial vadd Intrinsics

This patch adds the following intrinsics:
            vadd_p8
            vadd_p16
            vadd_p64
            vaddq_p8
            vaddq_p16
            vaddq_p64
            vaddq_p128

Reviewed By: t.p.northover, DavidSpickett

Differential Revision: https://reviews.llvm.org/D96825

3 years agofix comment typos to cycle bots
Nico Weber [Thu, 18 Feb 2021 19:24:56 +0000 (14:24 -0500)]
fix comment typos to cycle bots

3 years agoPre-commit test case
Guozhi Wei [Thu, 18 Feb 2021 19:05:29 +0000 (11:05 -0800)]
Pre-commit test case

Pre-commit test case for https://reviews.llvm.org/D95086, so that patch
can show the actual diff.