Karol Herbst [Tue, 4 Apr 2023 00:38:31 +0000 (02:38 +0200)]
rusticl/platform: move getter into the type
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
Karol Herbst [Mon, 3 Apr 2023 23:36:10 +0000 (01:36 +0200)]
rusticl/platform: rename _cl_platform_id to Platform
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
Karol Herbst [Mon, 3 Apr 2023 22:50:16 +0000 (00:50 +0200)]
rusticl: split platform into core and api parts
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
Samuel Pitoiset [Wed, 12 Apr 2023 12:35:45 +0000 (14:35 +0200)]
radv: cleanup after splitting radv_pipeline.c
I moved to many things to radv_pipeline_graphics.c without checking.
Fixes:
7783b7f6977 ("radv: split radv_pipeline.c into radv_pipeline_{compute,graphics}.c")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22441>
Vitaliy Triang3l Kuzmin [Sun, 9 Apr 2023 20:05:12 +0000 (23:05 +0300)]
r600: Alpha to coverage dithering on Evergreen+
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22384>
Alyssa Rosenzweig [Thu, 30 Mar 2023 22:38:00 +0000 (18:38 -0400)]
pan/decode: Print compute job payloads
Noticed while debugging OpenCL. I think this was fallout from the CSF decode
rework?
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>
Alyssa Rosenzweig [Thu, 30 Mar 2023 22:09:34 +0000 (18:09 -0400)]
panfrost: Allocate shared memory in OpenCL
In OpenCL, we can have no shader-defined shared memory but some dispatch-time
variable memory. This is not reflected in ss->info.wls_size, so check the right
variable instead so we allocate the appropriate memory.
Fixes page faults accessing shared memory with Rusticl, e.g. in the vstore_local
test.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>
Alyssa Rosenzweig [Thu, 30 Mar 2023 22:00:27 +0000 (18:00 -0400)]
pan/bi: Use nir_lower_mem_access_bit_sizes
OpenCL can generate large loads and stores that we can't support, so we need to
lower. We can load/store up to 128-bits in a single go. We currently only handle
up to 32-bit components in the load and no more than vec4, so we split up
accordingly.
It's not clear to me what the requirements are for alignment on Valhall, so we
conservatively generate aligned access, at worst there's a performance penalty
in those cases. I think unaligned access is suppoerted, but likely with a
performance penalty of its own? So in the absence of hard data otherwise, let's
just use natural alignment.
Oddly, this shaves off a tiny bit of ALU in a few compute shaders on Valhall,
all in gfxbench. Seems to just be noise from the RA lottery.
total instructions in shared programs: 2686768 -> 2686756 (<.01%)
instructions in affected programs: 584 -> 572 (-2.05%)
helped: 6
HURT: 0
Instructions are helped.
total cvt in shared programs: 14644.33 -> 14644.14 (<.01%)
cvt in affected programs: 5.77 -> 5.58 (-3.25%)
helped: 6
HURT: 0
total quadwords in shared programs: 1455320 -> 1455312 (<.01%)
quadwords in affected programs: 56 -> 48 (-14.29%)
helped: 1
HURT: 0
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>
Alyssa Rosenzweig [Thu, 30 Mar 2023 21:51:29 +0000 (17:51 -0400)]
pan/bi: Respect swizzles for more vector ops
We need to respect the ALU swizzle, this takes a vector. Fixes incorrect
pack_64_2x32 translation hit when wiring up lower_mem_access_bit_sizes for
OpenCL.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>
Alyssa Rosenzweig [Thu, 23 Jun 2022 22:06:03 +0000 (18:06 -0400)]
pan/bi: Lower swizzles for 8-bit CSEL
With OpenCL we can generate stuff like CSEL.u32.eq r0.b0000, we need to handle
it when lowering swizzles.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>
Lionel Landwerlin [Mon, 3 Apr 2023 21:21:18 +0000 (00:21 +0300)]
anv: add utrace tracking of frame boundaries
Based on vkQueuePresentKHR calls. It just helps spotting the beginning
end of a frame in perfetto when apps are using 3/4 command buffers per
frame.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22276>
Lionel Landwerlin [Mon, 3 Apr 2023 21:20:39 +0000 (00:20 +0300)]
intel/ds: add a new timeline row for frames
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22276>
Lionel Landwerlin [Tue, 11 Apr 2023 18:15:13 +0000 (21:15 +0300)]
anv: exclude performance queries from blorp clears
The query buffer contains a batch to implement the multi pass
replay/accumulation of results. So we can't clear it with a memset.
An optimization for later would be to move the batches to the very end
of the query buffer so we can clear the query data without touching
the batches.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
4dc7256bf962 ("anv: reset query pools using blorp")
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22421>
Timur Kristóf [Tue, 11 Apr 2023 19:02:03 +0000 (21:02 +0200)]
ac/nir/ngg: Don't store primitive IDs from culled primitives.
Primitive export used the gs_accepted variable after culling,
so we overwrote this variable after vertex compaction to make
sure not to hang the GPU.
This had an unintended side effect when storing the primitive ID
to LDS on GS threads: the LDS store was done even on threads whose
triangle was culled; potentially causing issues.
As a fix, create a separate boolean variable that remembers
which invocations need to export a primitive; and don't store
the primitive ID to LDS when gs_accepted is false.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8805
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22424>
Ruijing Dong [Tue, 11 Apr 2023 18:59:05 +0000 (14:59 -0400)]
frontends/va: disable skip_frame_enable in vaapi interface.
skip_frame_enable is for preventing overshooting in some cases,
however the tests in FW were broken, and the output result shows
the functionality has not completed yet, which is the reason
this should be disabled at the moment until it has been fully
verified.
Cc: mesa-stable
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8178
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22428>
Oleksii Bozhenko [Wed, 12 Apr 2023 09:53:54 +0000 (12:53 +0300)]
wsi: remove get_sorted_vk_formats duplication
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/commit/
37a8b2d12ea97775b725172d1f89c1bd59fc98cf
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8727
Signed-off-by: Oleksii Bozhenko oleksii.bozhenko@globallogic.com
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22337>
Oleksii Bozhenko [Tue, 11 Apr 2023 12:08:41 +0000 (15:08 +0300)]
wsi: add rgb_component_bits_are_equal
Signed-off-by: Oleksii Bozhenko oleksii.bozhenko@globallogic.com
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22337>
Mike Blumenkrantz [Tue, 11 Apr 2023 21:05:52 +0000 (17:05 -0400)]
zink: handle swapchain handoffs around makecurrent
when a new resource is created for an extant swapchain, the existing
acquire (if any) should be transferred to the resource to ensure
expected behavior
this should be enough to fix piglit's glx-make-current
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22431>
Mike Blumenkrantz [Tue, 11 Apr 2023 21:02:54 +0000 (17:02 -0400)]
zink: track per-image swapchain layouts
this is important for handing off the swapchain between resources
on makecurrent since a context that is made not-current will have its
swapchain resources destroyed while the swapchain persists
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22431>
Bas Nieuwenhuizen [Fri, 31 Mar 2023 22:50:24 +0000 (00:50 +0200)]
radv: Reserve space for fast clear related writes.
Fixes:
9ee67467c9e ("radv: predicate cmask eliminate when using DCC.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
Bas Nieuwenhuizen [Sat, 11 Mar 2023 17:43:45 +0000 (18:43 +0100)]
radv: Reserve space for updating DCC metadata.
Fixes:
9ee67467c9e ("radv: predicate cmask eliminate when using DCC.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
Bas Nieuwenhuizen [Mon, 5 Dec 2022 01:11:51 +0000 (02:11 +0100)]
radv: Reserve space in si_cs_emit_cache_flush.
Fixes:
4c6f83006d4 ("radv: Synchronization for task shaders.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
Bas Nieuwenhuizen [Mon, 5 Dec 2022 01:02:36 +0000 (02:02 +0100)]
radv: Reserve space in conditional rendering functions.
Fixes:
e45ba51ea45 ("radv: add support for VK_EXT_conditional_rendering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
Bas Nieuwenhuizen [Mon, 5 Dec 2022 00:40:10 +0000 (01:40 +0100)]
radv: Reserve space in various streamout functions.
Fixes:
b4eb029062a ("radv: implement VK_EXT_transform_feedback")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
Bas Nieuwenhuizen [Sun, 4 Dec 2022 23:51:19 +0000 (00:51 +0100)]
radv: Reserve space in framebuffer emission.
In the execute secondary scenario nothing else does it for us.
Fixes:
203f60ebf2f ("radv: emit framebuffer state from primary if secondary doesn't inherit it")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
Georg Lehmann [Wed, 12 Apr 2023 13:33:49 +0000 (15:33 +0200)]
aco/tests: add missing dependency on generated header
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8820
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22442>
Emma Anholt [Tue, 11 Apr 2023 20:59:37 +0000 (13:59 -0700)]
etnaviv: Fix regression from if_uses change.
Flipped the condition in the conversion.
Fixes:
7f6491b76d51 ("nir: Combine if_uses with instruction uses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22430>
Timur Kristóf [Tue, 11 Apr 2023 14:22:49 +0000 (16:22 +0200)]
aco, radv: Remove redundant enable_mrt_output_nan_fixup from PS epilog info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>
Timur Kristóf [Wed, 15 Mar 2023 19:20:13 +0000 (12:20 -0700)]
aco, radv: Remove "key" from aco_compiler_options.
aco_compiler_options::key is a leftover from when aco used
the radv_pipeline_key struct, but aco_compiler_options::key was
never actually used as a cache key.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>
Timur Kristóf [Wed, 15 Mar 2023 18:54:49 +0000 (11:54 -0700)]
aco: Remove setup_*_variables and add setup_lds_size instead.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>
Timur Kristóf [Wed, 15 Mar 2023 18:25:55 +0000 (11:25 -0700)]
radv: Don't hardcode LDS granularity in gfx9_get_gs_info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>
Timur Kristóf [Wed, 15 Mar 2023 18:59:41 +0000 (11:59 -0700)]
ac, aco, radv: Clarify LDS size on GFX6, and NGG shaders.
This information was wrong in some places, let's fix it now.
GFX6:
The GPU has 64KB LDS, but only 32KB is usable by a workgroup.
NGG:
There was some misinformation about NGG only being able to
address 32 KB LDS, it turns out this is actually not true
and it can address the full 64K.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21935>
Mike Blumenkrantz [Tue, 11 Apr 2023 18:47:58 +0000 (14:47 -0400)]
zink: eliminate implicit feedback loops on rp begin
in a scenario like:
* bind fb
* clear
* bind fb attachment as sampler
* begin rp
* draw
* end rp
* flush
* bind new fs
* begin rp
* draw
the first draw will have an implicit feedback loop, but the second one will not
need a feedback loop. since no samplers or attachments are changed between
draws, however, the feedback loop will remain active for successive renderpasses,
which is problematic since the shader part of the driver (zink_update_barriers)
attempts to eliminate these same feedback loops, leading to layout desync
instead, add handling to attachment prep here to eliminate feedback loops
in the event that an attachment can be switched from a write layout to a read layout
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22423>
Mike Blumenkrantz [Tue, 11 Apr 2023 18:46:11 +0000 (14:46 -0400)]
zink: pre-convert attachment id to attachment idx
this is a little simpler and allows reuse
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22423>
Mike Blumenkrantz [Tue, 11 Apr 2023 18:38:33 +0000 (14:38 -0400)]
zink: break out feedback loop pipeline state flagging for reuse
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22423>
Mike Blumenkrantz [Tue, 11 Apr 2023 18:26:20 +0000 (14:26 -0400)]
zink: remove redundant 'blitting' check in zink_prep_fb_attachment()
this is a return conditional 2 lines above
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22423>
Samuel Pitoiset [Tue, 4 Apr 2023 13:01:33 +0000 (15:01 +0200)]
radv: fix pipeline creation feedback with imported graphics libs
Stages imported from graphics pipeline libraries are defined as
additional entries in the order they were imported. This is similar
to raytracing libraries.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22288>
Erik Faye-Lund [Tue, 11 Apr 2023 06:43:48 +0000 (08:43 +0200)]
zink: do not use sampled-image for buffers
In SPIR-V 1.6, sampled images with buffer dimensionality was disallowed.
The sampler that GLSL provides for buffer-textures is useless, and can
simply be ignored. So let's not treat them as samplers any more.
Fixes:
bd816084c6a ("zink: enable spir-v 1.6 for vulkan 1.3")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8808
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22407>
Samuel Pitoiset [Tue, 11 Apr 2023 13:10:55 +0000 (15:10 +0200)]
radv: split radv_pipeline.c into radv_pipeline_{compute,graphics}.c
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21811>
José Roberto de Souza [Wed, 16 Nov 2022 16:14:12 +0000 (08:14 -0800)]
loader: Add Xe KMD support
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22425>
José Roberto de Souza [Wed, 30 Nov 2022 20:25:38 +0000 (12:25 -0800)]
iris: Handle Xe syncronization with syncobjs
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22425>
José Roberto de Souza [Wed, 29 Mar 2023 20:47:16 +0000 (13:47 -0700)]
iris: Add function to close gem bos
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22425>
José Roberto de Souza [Tue, 11 Apr 2023 15:36:42 +0000 (08:36 -0700)]
anv: Fix vm bind of imported buffers
Imported buffers may be created in a device with different
memory alignment and this can cause vm bind to fail because bo
size can be smaller than the calculated vm bind range using the
importer device memory alignment.
So here adding actual_size to anv_bo, this will be set with the actual
size of the bo allocated by kmd for bos allocate in the current device.
For other bo the lseek or the Vulkan API size will be used.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22219>
Rob Clark [Tue, 11 Apr 2023 19:48:44 +0000 (12:48 -0700)]
freedreno/a6xx: Allow z24s8 format casts
Allow UBWC format casts between z24s8/x24s8/z24x8.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8816
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22427>
Dmitry Baryshkov [Tue, 11 Apr 2023 20:28:03 +0000 (23:28 +0300)]
freedreno/a5xx: add SP clock control register
Add GPMU_GPMU_SP_CLOCK_CONTROL register. Duplicated GPGMU is not a typo,
vendor kernel names it A5XX_GPMU_GPMU_SP_CLOCK_CONTROL.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22429>
Dmitry Baryshkov [Tue, 11 Apr 2023 20:26:09 +0000 (23:26 +0300)]
freedreno/a5xx: reorder GPMU registers
Severeal GPMU registers were places out of the order. Move them to be
ordered proprely.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22429>
Collabora's Gfx CI Team [Tue, 11 Apr 2023 00:06:03 +0000 (00:06 +0000)]
Uprev Piglit to
355ad6bcb2cb3d9e030b7c6eef2b076b0dfb4d63
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22325>
Samuel Pitoiset [Tue, 11 Apr 2023 06:31:27 +0000 (08:31 +0200)]
radv/ci: remove one RT test from the expected failures on RDNA3
It does pass.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22413>
Jesse Natalie [Tue, 11 Apr 2023 17:33:48 +0000 (10:33 -0700)]
dzn: Handle mismatches in bound descriptor set vs pipeline layout
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22420>
Kenneth Graunke [Mon, 27 Mar 2023 20:43:38 +0000 (13:43 -0700)]
iris: Hack around gbm_gralloc stride restrictions
gbm_bo_map returns a stride for the mapping, which may differ from the
stride of the underlying BO. Drivers may implement mappings via staging
blits, returning a map of a temporary resource instead. That temporary
may have fewer stride restrictions (i.e. it isn't used for display), and
thus be more tightly packed, saving memory.
However, gbm_gralloc has a design flaw where after calling gbm_bo_map,
it asserts that the stride exactly matches the original BO's stride:
assert(stride == gbm_bo_get_stride(bo));
This is a bad assumption, as the GBM API returns a stride explicitly
precisely because it -can- differ. But, this would require significant
changes to gbm_gralloc to fix. So, to work around it, we add a driver
hack for Android-only that forces staging maps of any external BO to use
the original resource's stride.
This should fix issues with mapping cursor planes and SW media codec
uploads on Android-x86.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7974
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22156>
Kenneth Graunke [Mon, 27 Mar 2023 20:21:45 +0000 (13:21 -0700)]
iris: Extend resource creation helpers to allow for explicit strides
We'll want to create temporary staging images with explicit strides
in the next commit. This extends iris_resource_create_with_modifiers
to have an explicit row_pitch_B parameter (0 continues to mean "let
ISL pick one").
Because resource_create_with_modifiers() is a driver hook, we can't
just add a parameter, so unfortunately we gain another wrapper layer.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22156>
Mike Blumenkrantz [Mon, 10 Apr 2023 13:34:17 +0000 (09:34 -0400)]
zink: fix GPL lib leaking
this was improperly added into the conditional for removing a prog from the
ctx hash when it had no relation to that code, leading to refcount
leaks that ended up leaking the whole thing
Fixes:
487ac6dbd60 ("zink: implement cross-program pipeline library sharing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22397>
Mike Blumenkrantz [Fri, 7 Apr 2023 21:14:08 +0000 (17:14 -0400)]
zink: free GPL input/output libs on context destroy to avoid leaking
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22397>
Jesse Natalie [Tue, 11 Apr 2023 15:20:26 +0000 (08:20 -0700)]
d3d12: Fix buffer reference leak for SO count staging buffer
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22417>
Karol Herbst [Sat, 24 Sep 2022 23:16:49 +0000 (01:16 +0200)]
rusticl: enable radeonsi
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19232>
Karol Herbst [Thu, 29 Sep 2022 01:00:38 +0000 (03:00 +0200)]
radeonsi: use default float mode for CL
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19232>
Karol Herbst [Fri, 18 Nov 2022 22:26:01 +0000 (23:26 +0100)]
radeonsi: implement get_compute_state_info
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19232>
Mike Blumenkrantz [Fri, 7 Apr 2023 19:22:54 +0000 (15:22 -0400)]
zink: unroll array loop when copying vars for passthrough shaders
wildcard derefs aren't supported in ntv
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22376>
Sil Vilerino [Tue, 11 Apr 2023 14:42:11 +0000 (10:42 -0400)]
d3d12: Video processor to only promote resources to permanent residency when there is work to be flushed
This fixes some cases where flush is called from the app without work being scheduled before, causing d3d12_promote_to_permanent_residency
to be called with garbage pointers/arguments.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22415>
Danylo Piliaiev [Fri, 7 Apr 2023 13:45:45 +0000 (15:45 +0200)]
vulkan: Sanitize pSampleMask in CmdSetSampleMaskEXT
ms.sample_mask is only 16b, while VkSampleMask is 32b and it is allowed
to have all of them set even if maximum 16 samples are supported.
E.g. happens with Zink running supertuxkart:
supertuxkart: ../../../source/mesa/src/vulkan/runtime/vk_graphics_state.c:2346: vk_common_CmdSetSampleMaskEXT: Assertion `(dyn)->ms.sample_mask == (*pSampleMask)' failed.
vk_common_CmdSetSampleMaskEXT (commandBuffer=0x5556e903f0, samples=VK_SAMPLE_COUNT_1_BIT, pSampleMask=0x5556819ccc) at vk_graphics_state.c:2346
zink_draw<(zink_multidraw)1, (zink_dynamic_state)5, true, false> (...) at zink_draw.cpp:639
zink_draw_vbo<(zink_multidraw)1, (zink_dynamic_state)5, true> (...) at zink_draw.cpp:922
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22360>
Mike Blumenkrantz [Wed, 29 Mar 2023 20:41:44 +0000 (16:41 -0400)]
zink: block oom flushes during unordered blits
this is broken beyond space and time
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22412>
Timur Kristóf [Mon, 10 Apr 2023 23:54:22 +0000 (01:54 +0200)]
radv/amdgpu: Place secondary CS without IB2 in non-WC GTT.
When using a secondary CS without IB2, we have to memcpy the
contents into the primary CS. Use these flags to improve perf
by preventing memcpy from VRAM.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Mon, 10 Apr 2023 23:49:28 +0000 (01:49 +0200)]
radv/amdgpu: Extract radv_amdgpu_cs_bo_create function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Sun, 9 Apr 2023 15:02:25 +0000 (17:02 +0200)]
radv/amdgpu: Add bool is_secondary argument to cs_create function.
Also save is_secondary to the CS object.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Sun, 9 Apr 2023 01:25:38 +0000 (03:25 +0200)]
radv: Allow task/mesh shaders with RADV_DEBUG=noibs.
The new submit code path should now be able to handle gang submit
even when chaining is not enabled.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Sun, 9 Apr 2023 01:16:33 +0000 (03:16 +0200)]
radv/amdgpu: Respect maximum number of submitted IBs per IP type.
In a gang submit, the maximum number of IBs is per IP type,
and is different for each queue. Let's respect that.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Fri, 7 Apr 2023 01:01:42 +0000 (03:01 +0200)]
radv/amdgpu: Clean up submission functions.
Remove a useless extra function call, and rename fallback to
internal because it is the only code path left.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Thu, 6 Apr 2023 12:47:14 +0000 (14:47 +0200)]
radv/amdgpu: Use fallback submit for queues that can't use IBs.
This commit consolidates the queue submit code paths into one.
Now we always allocate BOs for every CS, but when IBs aren't
allowed, we simply submit every BO to the kernel.
A microbenchmark done by Bas indicated that submitting more IBs to
the kernel only adds a negligible overhead. Additionally, this
allows us to stop copying the command buffer contents in system
memory and get rid of a lot of legacy code.
In order to be able to submit every BO, we make sure to add the
last BO to the old_ib_buffers array on cs_finalize. This also
necessitates some changes in cs_execute_secondary and other
functions.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Wed, 5 Apr 2023 22:13:34 +0000 (00:13 +0200)]
radv: Split submission in winsys instead of radv_queue.
This will still make it so that RADV_DEBUG=hang will only submit
one command buffer at a time, but otherwise let's pass all CS
objects into one submission and let the winsys split them if
necessary.
The winsys can do a better job at splitting them because
radv_queue has no knowledge of IBs and ignores chaining in the
splitting logic.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Mon, 3 Apr 2023 23:42:17 +0000 (01:42 +0200)]
radv: Fill continue preambles and postambles properly.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Fri, 7 Apr 2023 00:57:32 +0000 (02:57 +0200)]
radv/amdgpu: Split gang submissions correctly when not chained.
In a gang submit, the follower (typically ACE) and leader
(typically GFX) can have synchronization between each other.
We must ensure that these end up in the same submission,
otherwise we can deadlock the GPU.
We rely on radv_queue here to order follower before the leader
in the submitted CS array.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Thu, 6 Apr 2023 12:23:27 +0000 (14:23 +0200)]
radv/amdgpu: Add ability to submit non-chained CS to fallback.
When submitting a CS whose IP type doesn't support chaining,
let's submit all the IBs that this CS allocated.
This is going to be better than the sysmem code path because it
doesn't require the winsys to memcpy the contents of the command
buffers.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Tue, 4 Apr 2023 21:20:14 +0000 (23:20 +0200)]
radv/amdgpu: Add postambles to fallback submit.
Some new features, such as perf counters and gang submit use
postambles. Implement these properly.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Tue, 4 Apr 2023 21:14:10 +0000 (23:14 +0200)]
radv/amdgpu: Add continue preambles to fallback submit.
When splitting a larger submission into several smaller ones,
the flushing at the beginning of the initial preambles is not
really necessary, so it'll be better to use the continue
preambles for this purpose.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Mon, 3 Apr 2023 23:34:36 +0000 (01:34 +0200)]
radv/amdgpu: Allow multiple continue preambles.
For feature parity with initial preambles.
Previously, continue preambles were for GFX6 only, but this is
about to change in the next commits.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Tue, 4 Apr 2023 20:50:10 +0000 (22:50 +0200)]
radv/amdgpu: Rewrite fallback code path so it can split submissions.
Currently, radv_queue already splits submissions but we want to
change this and be able to split them in the winsys code as well.
Necessary because we want to split based on number of actual
IBs not number of command buffers, but radv_queue is not
aware of IBs.
Note that this commit does not actually take this new split into
use yet, that will be done in a following commit when it is ready,
this is why we set the max IB count higher than radv_queue here.
This commit is the first step in making "fallback" the default and
only submission code path.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Thu, 6 Apr 2023 11:35:19 +0000 (13:35 +0200)]
radv/amdgpu: Remove hw_can_chain in favour of use_ib.
They have the same meaning, but use_ib makes more sense because it
also takes the gfx_level into account.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Thu, 6 Apr 2023 14:31:35 +0000 (16:31 +0200)]
radv/amdgpu: Add a few assertions during submit.
These are useful when debugging the submission code.
- Ensure correct IB alignment
- Ensure we don't submit empty IBs
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Wed, 5 Apr 2023 21:15:58 +0000 (23:15 +0200)]
radv/amdgpu: Extract radv_amdgpu_cs_add_old_ib_buffer.
This function will be used elsewhere in a following commit.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Thu, 6 Apr 2023 11:15:10 +0000 (13:15 +0200)]
radv/amdgpu: Use correct alignment when creating CS BOs.
Shouldn't matter in practice because the kernel will likely
give us a page-aligned BO, but better to specify it just
in case.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Thu, 6 Apr 2023 11:08:27 +0000 (13:08 +0200)]
radv/amdgpu: Only allow IB BOs on graphics and compute queues.
This disallows IB BOs on eg. SDMA queues which was previously
mistakenly left out.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Sat, 8 Apr 2023 12:28:50 +0000 (14:28 +0200)]
radv/amdgpu: Fix mismatching return type of radv_amdgpu_cs_submit.
Fixes a warning that is reported by GCC 13.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Sun, 9 Apr 2023 01:06:07 +0000 (03:06 +0200)]
ac: Add maximum number of submitted IBs.
The number of IBs per submit isn't infinite, it depends on the IP type
(ie. some initial setup needed for a submit) and the packet size.
It can be calculated according to the kernel source code as:
(ring->max_dw - emit_frame_size) / emit_ib_size
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
Timur Kristóf [Mon, 3 Apr 2023 15:47:10 +0000 (17:47 +0200)]
radv: Create continue preamble on GFX6 even when no shader rings are used.
Skipping the continue preamble can allow other processes to mess
up some registers set by the current process.
Originally, we could omit generating the continue preamble when
no shader rings were used, because the register initialization
happened at the beginning of every main cmdbuf. However, this
isn't the case anymore.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
xurui [Mon, 10 Apr 2023 08:28:28 +0000 (16:28 +0800)]
zink: bs->dd.push_pool[1].pool should be freed
cc: mesa-stable
Signed-off-by: xurui <xurui@kylinos.cn>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22389>
Patrick Lerda [Fri, 7 Apr 2023 16:03:58 +0000 (18:03 +0200)]
egl: fix memory leak related to _eglRefreshDeviceList()
Indeed, the unnecessary drmDevice objects were not freed.
For instance, this issue could be triggered with: "piglit/bin/egl_ext_platform_device -auto -fbo":
SUMMARY: AddressSanitizer: 2796 byte(s) leaked in 12 allocation(s).
Fixes:
e39d72aec203 ("egl: only take render nodes into account when listing DRM devices")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22408>
David Heidelberg [Tue, 11 Apr 2023 12:36:00 +0000 (14:36 +0200)]
ci/amd: add draw.dynamic_rendering flake
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22411>
Eric Engestrom [Tue, 11 Apr 2023 11:52:27 +0000 (12:52 +0100)]
v3dv/ci: mark known dEQP-VK.wsi.xlib.surface.query_formats failure
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22410>
Bas Nieuwenhuizen [Sat, 25 Mar 2023 23:42:10 +0000 (00:42 +0100)]
radv: Align atomic values.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22121>
Bas Nieuwenhuizen [Sat, 25 Mar 2023 23:06:24 +0000 (00:06 +0100)]
util/disk_cache: Align atomic size.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22121>
Bas Nieuwenhuizen [Sat, 25 Mar 2023 23:03:30 +0000 (00:03 +0100)]
util: Add aligned int64_t types for x86(non 64).
To avoid split locks.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22121>
Samuel Pitoiset [Mon, 10 Apr 2023 07:38:09 +0000 (09:38 +0200)]
radv: fix re-emitting vertex user SGPRs when binding a graphics pipeline
The base SGPR and the number of SGPRs can be equal but it was incorrect
because one VS can have draw_id and one can have base_instance. Fix
this by invalidating the vertex user SGPRs unconditionally.
Though they should also be invalidated after executing secondaries,
otherwise nothing is invalidated if the same pipeline is bind to the
primary again.
This fixes dEQP-VK.dynamic_rendering.primary_cmd_buff.random.seed*.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21652>
Daniel Schürmann [Tue, 11 Apr 2023 10:16:47 +0000 (12:16 +0200)]
radv/ci: add 2 more Flakes for Navi21
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22030>
Daniel Schürmann [Tue, 21 Mar 2023 17:56:22 +0000 (18:56 +0100)]
radv: clean up pipeline-cache interface
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22030>
Daniel Schürmann [Sun, 19 Mar 2023 09:26:05 +0000 (10:26 +0100)]
radv: use vk_pipeline_cache
Replaces the RADV pipeline cache with an implementation
based on the common vk_pipeline_cache.
We use a dual-layer approach with two types of cache entries.
1. radv_shader:
- serialized as radv_shader_binary
- uses SHA1 of the binary as key
2. radv_pipeline_cache_object:
- contains pointers to associated radv_shaders
- serialized as list of SHA1
- uses the pipeline hash as key
In combination with single-file disk-cache, this reduces the cache size by ~60%.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22030>
Daniel Schürmann [Mon, 20 Mar 2023 13:34:35 +0000 (14:34 +0100)]
radv: implement radv_shader_create_cached()
This function takes a radv_shader_binary and writes it to the
disk cache before creating and returning a radv_shader cache entry.
The key of the cache entry is the full SHA1 hash of the binary.
This way, we will be able to deduplicate identical shaders.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22030>
Daniel Schürmann [Mon, 20 Mar 2023 00:02:53 +0000 (01:02 +0100)]
radv: add struct radv_pipeline_cache_object
This patch implements a per pipeline cache-entry which contains
pointers to the associated shaders.
The serialized format contains the binary hashes of the shaders.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22030>
Daniel Schürmann [Sat, 18 Mar 2023 15:16:08 +0000 (16:16 +0100)]
radv: add radv_shader_serialize() and radv_shader_deserialize() functions
These functions convert between radv_shader and radv_shader_binary.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22030>
Daniel Schürmann [Fri, 31 Mar 2023 14:08:59 +0000 (16:08 +0200)]
radv: unconditionally store the binary code in radv_shader
We will (temporarily) use it to serialize shader binaries
with the common vk_pipeline_cache.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22030>
Daniel Schürmann [Fri, 17 Mar 2023 10:35:33 +0000 (11:35 +0100)]
radv: derive struct radv_shader from vk_pipeline_cache_object
We will use radv_shader directly as cache entries.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22030>
projects / platform / upstream / mesa.git / log