Dave Airlie [Tue, 15 Aug 2017 05:17:38 +0000 (15:17 +1000)]
radv/gfx9: fix set predication packet.
The predication packet changed format on GFX9, update the driver.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Scott D Phillips [Fri, 4 Aug 2017 22:21:43 +0000 (22:21 +0000)]
intel/genxml: Fix gen10 BLEND_STATE variable length packing
BLEND_STATE packing was modified to be variable-length in:
9670124e31 genxml: Make BLEND_STATE command support variable length array.
The initial gen10.xml still had the old, fixed-length style
definition for BLEND_STATE. So gen10_upload_blend_state would
overwrite the packed BLEND_STATE_ENTRYs with its own fixed array
of all-zero entries when packing BLEND_STATE. This caused
BLEND_STATE upload to not work at all.
Fixes:
aa416f515a ("i965/genxml: Add gen10.xml")
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Timothy Arceri [Tue, 15 Aug 2017 10:42:29 +0000 (20:42 +1000)]
mesa: count uniform against storage when its bindless
Gallium drivers use this code path so we need to account for
bindless after all.
Fixes:
365d34540f33 ("mesa: correctly calculate the storage offset for i915")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Sun, 13 Aug 2017 17:22:06 +0000 (19:22 +0200)]
radeonsi: disable CE by default
It makes performance worse by a very small (hard to measure) amount.
We've done extensive profiling of this feature internally.
Cc: 17.1 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Christian König <christian.koenig@amd.com>
Dave Airlie [Mon, 14 Aug 2017 06:01:54 +0000 (07:01 +0100)]
radeonsi: initialise imported surface to 0.
For memobj imports we weren't setting the surface to 0, which
meant sometimes we'd end up with tile_swizzle garbage, which
would corrupt rendering.
This seems to fix the image corruption on the imported memory
objects in vrdashboard for me.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Tue, 1 Aug 2017 07:35:07 +0000 (17:35 +1000)]
st/mesa: correctly calculate the storage offset
When generating the storage offset for struct members we need
to skip opaque types as they no longer have backing storage.
Fixes:
fcbb93e86024 ("mesa: stop assigning unused storage for non-bindless opaque types")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101983
Reviewed-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Tue, 1 Aug 2017 07:35:06 +0000 (17:35 +1000)]
mesa: correctly calculate the storage offset for i915
When generating the storage offset for struct members we need
to skip opaque types as they no longer have backing storage.
Fixes:
fcbb93e86024 ("mesa: stop assigning unused storage for non-bindless opaque types")
V2: simplify since bindless will never be supported in this code
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101983
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ben Widawsky [Tue, 30 May 2017 11:54:06 +0000 (17:24 +0530)]
i965: Advertise the CCS modifier
v2: Rename modifier to be more smart (Jason)
FINISHME: Use the kernel's final choice for the fb modifier
bwidawsk@norris2:~/intel-gfx/kmscube (modifiers $) ~/scripts/measure_bandwidth.sh ./kmscube none
Read bandwidth: 603.91 MiB/s
Write bandwidth: 615.28 MiB/s
bwidawsk@norris2:~/intel-gfx/kmscube (modifiers $) ~/scripts/measure_bandwidth.sh ./kmscube ytile
Read bandwidth: 571.13 MiB/s
Write bandwidth: 555.51 MiB/s
bwidawsk@norris2:~/intel-gfx/kmscube (modifiers $) ~/scripts/measure_bandwidth.sh ./kmscube ccs
Read bandwidth: 259.34 MiB/s
Write bandwidth: 337.83 MiB/s
v2: Move all references to the new fourcc code(s) to this patch.
v3: Rebase, remove Yf_CCS (Daniel)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Tue, 13 Jun 2017 21:27:37 +0000 (14:27 -0700)]
i965/miptree: More conservatively resolve external images
Instead of always doing a full resolve, only resolve the bits that are
needed. This means that we only do a partial resolve when the miptree
modifier is I915_FORMAT_MOD_Y_TILED_CCS.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Ben Widawsky [Tue, 30 May 2017 11:53:59 +0000 (17:23 +0530)]
i965: Pretend that CCS modified images are two planes
v2: move is_aux into if block. (Jason)
Use else block instead of goto (Jason)
v3: Fix up logic for is_aux (Ben)
Fix up size calculations and add FIXME (Ben)
v4 (Jason Ekstrand):
Use the aux_pitch in the image instead of calculating it
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Fri, 14 Jul 2017 22:53:26 +0000 (15:53 -0700)]
i965/screen: Support import and export of surfaces with CCS
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Ben Widawsky [Tue, 30 May 2017 11:53:50 +0000 (17:23 +0530)]
i965/miptree: Allocate mcs_buf for an image's CCS
This code will disable actually creating these buffers for the scanout,
but it puts the allocation in place.
Primarily this patch is split out for review, it can be squashed in
later if preferred.
v2:
assert(mt->offset == 0) in ccs creation (as requested by Topi)
Remove bogus is_scanout check in miptree_release
v3:
Remove is_scanout assert in intel_miptree_create. It doesn't work with
latest codebase - not sure it ever should have worked.
v4:
assert(mt->last_level == 0) and assert(mt->first_level == 0) in ccs setup
(Topi)
v5 (Jason Ekstrand):
- Base the decision to allocate a CCS on the image modifier
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Ben Widawsky [Tue, 30 May 2017 11:53:50 +0000 (17:23 +0530)]
i965: Support images with aux buffers
Previously images did not support any auxiliary compression surfaces
(CCS, MCS, or HiZ). That's about to change. This patch just adds the
fields to __DRIimageRec to make auxiliary surfaces possible.
v2 (Jason Ekstrand):
- Add an aux_pitch parameter as well as aux_offset
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Tue, 13 Jun 2017 19:06:49 +0000 (12:06 -0700)]
intel/isl: Add support for I915_FORMAT_MOD_Y_TILED_CCS
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Mon, 14 Aug 2017 17:08:14 +0000 (10:08 -0700)]
i965/screen: Stop redefining DRM_FORMAT_MOD_(INVALID|LINEAR)
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Jason Ekstrand [Mon, 14 Aug 2017 17:03:43 +0000 (10:03 -0700)]
drm-uapi/forcc: Pull in new modifiers
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Scott D Phillips [Wed, 9 Aug 2017 22:52:30 +0000 (15:52 -0700)]
i965/blorp: Correct type of src_format in call to intel_miptree_texture_aux_usage
intel_miptree_texture_aux_usage() takes an isl_format, but we are
passing a mesa_format. clang warns:
brw_blorp.c:305:52: warning: implicit conversion from enumeration
type 'mesa_format' to different enumeration type
'enum isl_format' [-Wenum-conversion]
intel_miptree_texture_aux_usage(brw, src_mt, src_format);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^~~~~~~~~~
Fixes:
fc1639e46d ("i965/blorp: Use texture/render_aux_usage for blits")
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Julien Isorce [Tue, 25 Jul 2017 14:31:28 +0000 (15:31 +0100)]
st/va: change frame_idx from array to hash table
The picture_id was assumed to be a frame number so in 0-31.
But the vaapi client gstreamer-vaapi uses the surfaces handles
as identifier which are unsigned int.
This bug can happen when using a lot of vaapi surfaces within
the same process. Indeed Mesa/st/va increments a counter for the
surface ID: mesa/util/u_handle_table.c::handle_table_add which
starts from 0 and incremented by 1 at each call.
So creating more than 32 surfaces was a problem.
The following bug contains a test that reproduces the problem
by running a couple of vaapih264enc in the same process. The
above also explains why there was no pb when running them in
separated processes.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102006
Signed-off-by: Julien Isorce <jisorce@oblong.com>
Tested-by: Tomas Rataj <rataj28@gmail.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-and-tested-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Michel Dänzer [Tue, 8 Aug 2017 07:20:55 +0000 (16:20 +0900)]
configure: Trust LLVM >= 4.0 llvm-config --libs for shared libraries
No need to manually look for the library files anymore with current
LLVM. This sidesteps the manual method failing when LLVM was built with
-DLLVM_APPEND_VC_REV=ON.
(This might already work with older versions of LLVM)
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Ilia Mirkin [Sat, 12 Aug 2017 17:43:34 +0000 (13:43 -0400)]
nv50/ir: clean up saturated values immediately
Since we don't iterate to a fixed point, we can end up in situations
where we have a SAT instruction + a long immediate. This is not legal.
However since it's immediately computable, just run unary straight away
to handle the situation.
Fixes:
24a799ad35a82 ("nv50/ir: fix ConstantFolding with saturation")
Reported-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Ilia Mirkin [Sat, 12 Aug 2017 04:02:34 +0000 (00:02 -0400)]
nvc0/ir: unlink values pre- and post-call to division function
While technically correct, this can lead to e.g. getImmediate assuming
that it can walk up the value chain. It could be fixed to not do this,
but it seems easier and less error-prone to just not link the two values
to save on one LValue object.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Kenneth Graunke [Fri, 11 Aug 2017 04:10:31 +0000 (21:10 -0700)]
i965: Guard GetBufferSubData's streaming memcpy load with USE_SSE41
This should hopefully fix build issues on 32-bit Android-x86.
v2: s/USE_SSE4_1/USE_SS41/, caught by Gražvydas Ignotas.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102050
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Kenneth Graunke [Fri, 11 Aug 2017 03:47:53 +0000 (20:47 -0700)]
i965: Clean up intel_batchbuffer_init().
Passing screen lets us get the kernel features, devinfo, and bufmgr,
without needing container_of.
This use of container_of could cause crashes due to issues with the
"sample" macro parameter.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102062
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Marek Olšák [Thu, 10 Aug 2017 10:22:33 +0000 (12:22 +0200)]
gallium/radeon: only pass shader-specific debug flags to the disk shader cache
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Thu, 10 Aug 2017 19:50:59 +0000 (21:50 +0200)]
radeonsi/gfx9: fix the scissor bug workaround
otherwise there is corruption in most apps.
Fixes: 0fe0320 radeonsi: use optimal packet order when doing a pipeline sync
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 10 Aug 2017 20:29:54 +0000 (22:29 +0200)]
radeonsi/gfx9: use the VI codepath for clamping Z
This fixes corrupted shadows in Unigine Valley.
The corruption disappeared when I stopped setting IMG_DATA_FORMAT_24_8
for depth.
Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Daniel Stone [Mon, 31 Jul 2017 14:08:29 +0000 (15:08 +0100)]
egl: Update headers from Khronos
Taken from egl-registry
7d68647c4dab.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Daniel Stone [Mon, 31 Jul 2017 17:34:57 +0000 (18:34 +0100)]
egl/dri2: Allow modifiers to add FDs to imports
When using dmabuf import, make sure that the modifier is actually
allowed to add planes to the base format, as implied by the comment.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Iago Toral Quiroga [Fri, 21 Jul 2017 08:26:31 +0000 (10:26 +0200)]
intel/compiler: properly size attribute wa_flags array for Vulkan
Mesa will map user defined vertex input attributes to slots
starting at VERT_ATTRIB_GENERIC0 which gives us room for only 16
slots (up to GL_VERT_ATTRIB_MAX). This sufficient for GL, where
we expose exactly 16 vertex attributes for user defined inputs, but
in Vulkan we can expose up to 28 (which are also mapped from
VERT_ATTRIB_GENERIC0 onwards) so we need to account for this when
we scope the size of the array of attribute workaround flags
that is used during the brw_vertex_workarounds NIR pass. This
prevents out-of-bounds accesses in that array for NIR shaders
that use more than 16 vertex input attributes.
Fixes:
dEQP-VK.pipeline.vertex_input.max_attributes.*
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Wed, 9 Aug 2017 03:34:07 +0000 (13:34 +1000)]
glsl: stop cloning builtin fuctions _mesa_glsl_find_builtin_function()
The cloning was introduced in
f81ede469910d to fix a problem with
shaders including IR that was owned by builtins.
However the approach of cloning the whole function each time we
reference a builtin lead to a significant reduction in the GLSL
IR compilers performance.
The previous patch fixes the ownership problem in a more precise
way. So we can now remove this cloning.
Testing on a Ryzen 7 1800X shows a ~15% decreases in compiling the
Deus Ex: Mankind Divided shaders on radeonsi (which take 5min+ on
some machines). Looking just at the GLSL IR compiler the speed up
is ~40%.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Thu, 10 Aug 2017 10:42:29 +0000 (20:42 +1000)]
glsl: pass mem_ctx to constant_expression_value(...) and friends
The main motivation for this is that threaded compilation can fall
over if we were to allocate IR inside constant_expression_value()
when calling it on a builtin. This is because builtins are shared
across the whole OpenGL context.
f81ede469910d worked around the problem by cloning the entire
builtin before constant_expression_value() could be called on
it. However cloning the whole function each time we referenced
it lead to a significant reduction in the GLSL IR compiler
performance. This change along with the following patch
helps fix that performance regression.
Other advantages are that we reduce the number of calls to
ralloc_parent(), and for loop unrolling we free constants after
they are used rather than leaving them hanging around.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Timothy Arceri [Wed, 9 Aug 2017 03:34:09 +0000 (13:34 +1000)]
glsl: use ralloc_str_append() rather than ralloc_asprintf_rewrite_tail()
The Deus Ex: Mankind Divided shaders go from spending ~20 seconds
in the GLSL IR compilers front-end down to ~18.5 seconds on a
Ryzen 1800X.
Tested by compiling once with shader-db then deleting the index file
from the shader cache and compiling again.
v2:
- fix rebasing issue in v1
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Timothy Arceri [Wed, 9 Aug 2017 03:34:08 +0000 (13:34 +1000)]
util/ralloc: add ralloc_str_append() helper
This function differs from ralloc_strcat() and ralloc_strncat()
in that it does not do any strlen() calls which can become
costly on large strings.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Timothy Arceri [Wed, 9 Aug 2017 03:34:05 +0000 (13:34 +1000)]
glsl: remove unused field from ir_call
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Timothy Arceri [Wed, 9 Aug 2017 03:34:04 +0000 (13:34 +1000)]
glsl: stop copying struct and interface member names
We are currently copying the name for each member dereference
but we can just share a single instance of the string provided
by the type.
This change also stops us recalculating the field index
repeatedly.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Timothy Arceri [Wed, 9 Aug 2017 03:34:03 +0000 (13:34 +1000)]
glsl: tidy up get_num_operands()
Also add a comment that this should only be used by the ir_reader
interface for testing purposes.
v2:
- fix grammar in comment
- use unreachable rather than assert
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Timothy Arceri [Wed, 9 Aug 2017 03:34:02 +0000 (13:34 +1000)]
glsl: calculate number of operands in an expression once
Extra validation is added to ir_validate to make sure this is
always updated to the correct numer of operands, as passes like
lower_instructions modify the instructions directly rather then
generating a new one.
The reduction in time is so small that it is not really
measurable. However callgrind was reporting this function as
being called just under 34 million times while compiling the
Deus Ex shaders (just pre-linking was profiled) with 0.20%
spent in this function.
v2:
- make num_operands a unit8_t
- fix unsigned/signed mismatches
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Kenneth Graunke [Wed, 9 Aug 2017 18:31:48 +0000 (11:31 -0700)]
isl: Validate row pitch of stencil surfaces.
Also, silence an obnoxious finishme that started occurring for all
GL applications which use stencil after the i965 ISL conversion.
v2: Check against 3DSTATE_STENCIL_BUFFER's pitch bits when using
separate stencil, and 3DSTATE_DEPTH_BUFFER's bits when using
combined depth-stencil.
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Emil Velikov [Tue, 8 Aug 2017 14:55:36 +0000 (15:55 +0100)]
egl: avoid eglCreatePlatform*Surface{EXT,} crash with invalid dpy
If we have an invalid display fed into the functions, the display lookup
will return NULL. Thus as we attempt to get the platform type, we'll
deref. it leading to a crash.
Keep in mind that this will not happen if Mesa is built without X11 or
when the legacy eglCreate*Surface codepaths are used.
A similar check was added with earlier commit
5e97b8f5ce9 ("egl: Fix
crashes in eglCreate*Surface), although it was only applicable when the
surfaceless platform is built.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Emil Velikov [Fri, 4 Aug 2017 23:25:53 +0000 (00:25 +0100)]
egl/drm: rename dri2_drm_create_surface()
The function can handle only window surfaces, so let's rename it
accordingly, killing the wrapper around it.
v2: Use native_window in the function args. list.
Suggested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Fri, 4 Aug 2017 23:25:52 +0000 (00:25 +0100)]
egl/drm: remove unreachable code in dri2_drm_create_surface()
The function can be called only when the type is EGL_WINDOW_BIT.
Remove the unneeded switch statement.
v2: Rename the local variable window to surface (Eric)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Emil Velikov [Fri, 4 Aug 2017 23:25:51 +0000 (00:25 +0100)]
egl/x11: pass NULL instead of XCB_WINDOW_NONE as native_surface
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Matt Turner [Fri, 4 Aug 2017 23:25:50 +0000 (00:25 +0100)]
egl: Clean up native_type vs drawable mess
The next patch is going to stop passing XCB_WINDOW_NONE (of type
xcb_window_enum_t) as an argument where these functions expect a void *,
which clang does not appreciate.
This patch cleans things up to better convince me and reviewers that
it's safe to do that.
v2: Emil Velikov: rebase/integrate with series
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Emil Velikov [Fri, 4 Aug 2017 23:25:48 +0000 (00:25 +0100)]
egl: handle BAD_NATIVE_PIXMAP further up the stack
The basic (null) check is identical across all backends.
Just move it to the top.
v2:
- Split the WINDOW vs PIXMAP into separate patches
- Move check after the dpy and config - dEQP expects so
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Fri, 4 Aug 2017 23:25:47 +0000 (00:25 +0100)]
egl: drop unreachable BAD_NATIVE_WINDOW conditions
The code in _eglCreateWindowSurfaceCommon() already has a NULL check
which handles the condition. There's no point in checking again further
down the stack.
v2: Split the WINDOW vs PIXMAP into separate patches
v3: Resolve typos, s/EGL_PIXMAP_BIT_BIT/EGL_PIXMAP_BIT/
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Emil Velikov [Fri, 4 Aug 2017 23:25:46 +0000 (00:25 +0100)]
egl: add dri2_setup_swap_interval helper
The current two implementations - X11 and Wayland were identical,
barrind the upper limit.
Instead of having same code twice - introduce a helper and pass the
limit as an argument.
Thus as Android/DRM/others get support - they only need to call the
function ;-)
v2: Rebase on top of keeping ::swap_available
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (v1)
Tim Rowley [Thu, 10 Aug 2017 17:58:57 +0000 (12:58 -0500)]
configure: remove trailing "-a" in swr architecture test
Fixes "configure: line 27326: test: argument expected"
CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Matt Turner <mattst88@gmail.com>
Matt Turner [Wed, 9 Aug 2017 18:24:18 +0000 (14:24 -0400)]
build: Fix up spirv_info.Plo
spirv_info.c existed as a static file until commit
2dd4e2ece32f began
generating it as part of the build process. autotools is incapable of
coping, and so a build-tree from before this commit would then fail with
it:
[4]: *** No rule to make target '../../../mesa/src/compiler/spirv/spirv_info.c', needed by 'spirv/spirv_info.lo'. Stop.
Add a few lines to configure.ac to update the broken build files.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Marek Olšák [Wed, 9 Aug 2017 20:30:28 +0000 (22:30 +0200)]
ac: fail shader compilation if libelf is replaced by an incompatible version
UE4Editor has this issue.
This commit prevents hangs (release build) or assertion failures (debug
build). It doesn't fix the editor, but catastrophic scenarios are
prevented.
Cc: 17.1 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Thomas Hellstrom [Wed, 9 Aug 2017 09:25:10 +0000 (11:25 +0200)]
dri: Introduce SWAP_METHOD tokens
We shouldn't be using GLX tokens in the dri subsystem, so define dri
SWAP_METHOD tokens and translate when necessary. Unfortunately the X server
uses the dri swap method value untranslated as the GLX fbconfig swapMethod,
so we can't enumerate these tokens arbitrarily, but rather need to make them
have the same values as the corresponding GLX tokens.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Thomas Hellstrom [Wed, 9 Aug 2017 09:19:18 +0000 (11:19 +0200)]
glx: Fix swap method config matching
Due to bugs in dri swap method reporting, neither the fbconfigs received from
the server nor the value reported from driconfigs were correct. Now that's been
fixed and we can enable config swapmethod matching again.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Thomas Hellstrom [Wed, 9 Aug 2017 09:00:16 +0000 (11:00 +0200)]
glx: Work around X servers reporting bogus values of GLX_SWAP_METHOD_OML
Due to the recently fixed bug where dri drivers didn't report a correct
__DRI_ATTRIB_SWAP_METHOD value, and the fact that X servers just forward this
incorrect value (from the AIGLX dri driver) untranslated as
GLX_SWAP_METHOD_OML, the latter value might be undefined when old dri AIGLX
drivers are used, which breaks client fbconfig matching with server fbconfigs.
So work around this by assuming GLX_SWAP_METHOD_UNDEFINED when a bogus value
is read.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Thomas Hellstrom [Wed, 9 Aug 2017 08:50:23 +0000 (10:50 +0200)]
dri: Fix __DRIconfig reporting of __DRI_ATTRIB_SWAP_METHOD
The attribMap had two entries for this attribute, and
driGetConfigAttribIndex didn't return a proper value for this attribute.
Fix this, and also make sure we return SWAP_UNDEFINED for single-buffer
configs as required by the GLX_OML_swap_method spec.
Finally bump the dri core extension version to 2, indicating that we
correctly report __DRI_ATTRIB_SWAP_METHOD.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Dave Airlie [Wed, 26 Jul 2017 03:37:53 +0000 (04:37 +0100)]
radv: force cs/ps/l2 flush at end of command stream. (v2)
This seems like a workaround, but we don't see the bug on CIK/VI.
On SI with the dEQP-VK.memory.pipeline_barrier.host_read_transfer_dst.*
tests, when one tests complete, the first flush at the start of the next
test causes a VM fault as we've destroyed the VM, but we end up flushing
the compute shader then, and it must still be in the process of doing
something.
Could also be a kernel difference between SI and CIK.
v2: hit this with a bigger hammer. This fixes a bunch of hangs
in the vk cts with the robustness tests.
Fixes:
f4e499ec791 ("radv: add initial non-conformant radv vulkan driver")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101334
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Karol Herbst [Sun, 30 Jul 2017 15:51:22 +0000 (17:51 +0200)]
nv50/ir: fix ConstantFolding with saturation
For mul(a, +-1) codegen can generate OP_MOV with a saturation flag
set which is ignored at emission. The same can happen with add(a, 0),
and others.
Adding an assert for detecting more of such issues.
Fixes wrongly rendered water in Hitman Absolution running under wine.
Also a few shaders in Mad Max and Alien Isolation produce such MOVs.
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
[imirkin: generalize the fix for other cases]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Rob Herring [Tue, 8 Aug 2017 16:42:02 +0000 (11:42 -0500)]
st/dri2: fix kms_swrast driconf option handling
Commit
e794f8bf8bdb ("gallium: move loading of drirc to pipe-loader")
moved the option cache to the pipe_loader_device. However, the
screen->dev pointer is not set when dri_init_options() is called. Move
the call to after the pipe_loader_sw_probe_kms() call so screen->dev is
set. This mirrors the code flow for dri2_init_screen().
Fixes:
e794f8bf8bdb ("gallium: move loading of drirc to pipe-loader")
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Samuel Pitoiset [Mon, 7 Aug 2017 10:41:37 +0000 (12:41 +0200)]
radeonsi: drop two unused variables in create_function()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Eric Engestrom [Tue, 8 Aug 2017 15:17:13 +0000 (16:17 +0100)]
egl: whitespace cleanup in eglapi.c
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Iago Toral Quiroga [Mon, 7 Aug 2017 04:18:24 +0000 (06:18 +0200)]
TextureStorage1D should return INVALID_OPERATION if target is not a 1D texture
Previous behavior was inconsistent with other texture targets so this has been
fixed in OpenGL 4.6.
Fixes:
KHR-GL45.direct_state_access.textures_storage_errors
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Mon, 7 Aug 2017 04:18:23 +0000 (06:18 +0200)]
Update TextureParameter* error for incompatible texture targets
The OpenGL 4.6 specs have been updated so that GetTextureParameter*
with a texture object with an incompatible TEXTURE_TARGET should now
report INVALID_OPERATION instead of INVALID_ENUM.
Fixes:
KHR-GL45.direct_state_access.textures_parameter_errors
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tapani Pälli [Tue, 8 Aug 2017 07:52:26 +0000 (10:52 +0300)]
egl/dri2: refactor dri2_query_surface, swrastGetDrawableInfo
Currently swrastGetDrawableInfo always initializes w and h, patch
refactors function as x11_get_drawable_info that returns success and
sets the values only if no error happened. Add swrastGetDrawableInfo
wrapper function as expected by DRI extension.
v2: init w,y,w,h in swrastGetDrawableInfo (Eric)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reported-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Kenneth Graunke [Thu, 3 Aug 2017 01:06:05 +0000 (18:06 -0700)]
i965/bufmgr: Set bo->idle after waiting.
After a successful wait, we know the buffer ought to be idle.
Chris points out that: "The only caveat here is that bo is global, and
we have a very unlikely (and probably unnoticeable) race condition with
multiple contexts."
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Thu, 3 Aug 2017 07:41:37 +0000 (00:41 -0700)]
i965: Don't use ggtt_bo for Gen8+ streamout offset buffer.
RELOC_NEEDS_GGTT is only meaningful on Sandybridge - it's skipped on
other generations - so this has no purpose. Just use rw_bo().
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Thu, 3 Aug 2017 07:37:29 +0000 (00:37 -0700)]
i965: Simplify *_bo() helpers.
With the reloc domains gone, most of these are basically the same,
and the names don't make much sense anymore. Simplify them to ro_bo(),
rw_bo(), and ggtt_bo().
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Thu, 3 Aug 2017 07:33:47 +0000 (00:33 -0700)]
i965: Get rid of KSP_ro
The GPU reads the shader kernel from the program cache BO. It never
writes it, so using a read-write BO reference makes no sense.
Just make KSP read-only, and drop KSP_ro.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Connor Abbott [Mon, 7 Aug 2017 22:56:50 +0000 (15:56 -0700)]
ac/nir: fix saturate emission
The .f32 was already getting added by emit_intrin_2f_param(). Noticed
when enabling LLVM module verification.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Jason Ekstrand [Mon, 31 Jul 2017 20:33:45 +0000 (13:33 -0700)]
i965: Only call create_for_planar_image for multiple planes
Before, we ended up always calling miptree_create_for_planar_image in
almost all cases because most images have image->planar_format != NULL.
This commit makes us only take that path if we have a multi-planar
format.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Timothy Arceri [Wed, 26 Jul 2017 01:11:02 +0000 (11:11 +1000)]
mesa: don't error check the default buffer object
An allocation check is already done when the buffer is created at
context creation.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Wed, 26 Jul 2017 01:11:01 +0000 (11:11 +1000)]
mesa: check default buffer object creation was successful
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Wed, 26 Jul 2017 01:11:00 +0000 (11:11 +1000)]
mesa: add NULL checking to free_shared_state()
This will allow us to call this function from
_mesa_alloc_shared_state() in the case that we run out of memory
part way through allocating the state.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Ilia Mirkin [Sun, 6 Aug 2017 14:39:06 +0000 (10:39 -0400)]
glapi: per the extension spec, the EXT-suffixed function should be used
We already expose glMultiDrawElementsBaseVertexEXT as part of the
EXT_draw_elements_base_vertex chunk, so this one can just be removed.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Ilia Mirkin [Sun, 6 Aug 2017 14:33:30 +0000 (10:33 -0400)]
include: update GLES gl2ext header to no longer reference bad function
There was a previous error in the gl.xml and generated files that
referenced glMultiDrawElementsBaseVertexOES. This function should not
exist, only the EXT-suffixed version should.
Leaving the other headers alone to avoid conflicts with GL 4.6 work.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Mon, 7 Aug 2017 22:01:47 +0000 (00:01 +0200)]
radv: remove semicolon in if(...);
Trivial.
Fixes:
a6a6146aa91 "radv: Don't allow fmask swizzling for shareable images."
Alex Smith [Thu, 3 Aug 2017 14:32:46 +0000 (15:32 +0100)]
radv: Fix decompression on multisampled depth buffers
Need to take the sample count into account in the depth decompress and
resummarize pipelines and render pass.
Fixes:
f4e499ec791 ("radv: add initial non-conformant radv vulkan driver")
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Bas Nieuwenhuizen [Mon, 7 Aug 2017 21:34:00 +0000 (23:34 +0200)]
radv: Don't allow fmask swizzling for shareable images.
Also adds an assert because you never know how the winsys changes, and
multiprocess format differences are annoying.
Fixes:
1e696b962b7 "radv: add separate fmask tile swizzle counter."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Mon, 7 Aug 2017 20:51:45 +0000 (22:51 +0200)]
radeonsi: fix a compile failure due to disabled asserts
Marek Olšák [Fri, 4 Aug 2017 15:38:57 +0000 (17:38 +0200)]
radeonsi: use optimal packet order when doing a pipeline sync
Process most new SET packets in parallel with previous draw calls, then
flush caches and wait, start the draw, and do L2 prefetches last.
This decreases the [CP busy / SPI busy] ratio (verified with GRBM perf
counters). In other words, the time window when shaders are idle (between
(the wait and the draw) is much shorter now.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 13:26:55 +0000 (15:26 +0200)]
radeonsi: expose the number of decompress calls to the HUD
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 13:19:24 +0000 (15:19 +0200)]
gallium/radeon: rename GPU-dma-busy -> GPU-cp-dma-busy
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 01:26:38 +0000 (03:26 +0200)]
radeonsi: rename shader_userdata -> shader_pointers where appropriate
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 15:26:58 +0000 (17:26 +0200)]
radeonsi: prefetch VBO descriptors after the first VGT shader
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 15:10:58 +0000 (17:10 +0200)]
radeonsi: add a separate dirty mask for prefetches
so that we don't rely on si_pm4_state_enabled_and_changed, allowing us
to move prefetches after draw calls.
v2: ckear the dirty mask after unbinding shaders
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Marek Olšák [Fri, 4 Aug 2017 15:06:24 +0000 (17:06 +0200)]
radeonsi: add and use si_pm4_state_enabled_and_changed
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 29 Jul 2017 19:07:23 +0000 (21:07 +0200)]
radeonsi: de-atomize L2 prefetch
I'd like to be able to move the prefetch call site around.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 1 Aug 2017 12:26:21 +0000 (14:26 +0200)]
radeonsi: align all CE dumps to L2 cache line size
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 2 Aug 2017 22:01:49 +0000 (00:01 +0200)]
radeonsi: remove a tautology sctx->framebuffer.nr_samples >= 1
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 00:08:54 +0000 (02:08 +0200)]
gallium/radeon: print all members of radeon_info with R600_DEBUG=info
also set max_alignment on amdgpu.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Samuel Pitoiset [Wed, 2 Aug 2017 11:52:04 +0000 (13:52 +0200)]
glsl: update the extensions/functions that are enabled for 460
Other ones are either unsupported or don't have any helper
function checks.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Gurchetan Singh [Tue, 1 Aug 2017 21:51:40 +0000 (14:51 -0700)]
egl/dri2: add image extension such it's usable by swrast driver
Otherwise, this extension is not visible to the EGL users who
use the swrast driver.
This will allow the swrast driver to use eglCreateImageKHR,
provided the target is EGL_GL_TEXTURE_2D_KHR or
EGL_GL_RENDERBUFFER_KHR. Note we still have to implement the
create from render buffer path.
v2: add it to optional_core_extensions instead of swrast_core_extensions,
so it's not a requirement (Emil)
v3: Merge egl/dri2 changes together, also add support for
platform_wayland (Emil)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
Gurchetan Singh [Tue, 1 Aug 2017 21:49:33 +0000 (14:49 -0700)]
st/dri: add drisw image extension
Since the revelant functions have been moved to dri_helpers,
drisw.c can make use of the extension. Note we have version 6
of the extension, since we want to support createImageFromTexture.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Gurchetan Singh [Fri, 28 Jul 2017 03:48:22 +0000 (20:48 -0700)]
st/dri: move some image functions to dri_helpers.c
These functions will be used both by drisw.c and
dri2.c. This patch also moves some headers that can
be shared.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Gurchetan Singh [Fri, 28 Jul 2017 03:48:08 +0000 (20:48 -0700)]
st/dri: organize order of includers in dri_helpers
Although it doesn't seem like a strict requirement of the
code base, we do it when possible and it looks nice.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Gurchetan Singh [Fri, 28 Jul 2017 03:47:51 +0000 (20:47 -0700)]
st/dri: change dri_extensions to dri_helpers
These files provide helper structs and functions for dri2.c and drisw.c,
and name change better conveys that.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Jason Ekstrand [Thu, 3 Aug 2017 16:48:55 +0000 (09:48 -0700)]
i965/miptree: Set supports_fast_clear = false in make_shareable
The make_shareable function deletes the aux buffer and then whacks
aux_usage to ISL_AUX_USAGE_NONE but not unsetting supports_fast_clear.
Since we only look at supports_fast_clear to decide whether or not to do
fast clears, this was causing assertion failures.
Reported-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101925
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 18:50:12 +0000 (11:50 -0700)]
i965/miptree: Rework create flags
The only one of the three remaining flags that has anything whatsoever
to do with layout is TILING_NONE. This commit renames them to
MIPTREE_CREATE_*, documents the meaning of each flag, and makes the
create functions take an actual enum type so GDB will print them nicely.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 18:28:02 +0000 (11:28 -0700)]
i965/miptree: Delete MIPTREE_LAYOUT_TILING_(Y|ANY)
The only force tiling flag we really care about is LAYOUT_TILING_NONE.
The others don't actually do anything but add confusion.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 18:22:34 +0000 (11:22 -0700)]
i965/miptree: Delete an unused function declaration
The implementation of brw_miptree_layout was removed in
bf24c3539e4b69.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 18:07:36 +0000 (11:07 -0700)]
i965/miptree: Call alloc_aux in create_for_bo
Originally, I had moved it to the caller to make some things easier when
adding the CCS modifier. However, this broke DRI2 because
intel_process_dri2_buffer calls intel_miptree_create_for_bo but never
calls intel_miptree_alloc_aux. Also, in hindsight, it should be pretty
easy to make the CCS modifier stuff work even if create_for_bo allocates
the CCS when DISABLE_AUX is not set.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 2 Aug 2017 17:54:44 +0000 (10:54 -0700)]
i965/miptree: Delete MIPTREE_LAYOUT_FOR_SCANOUT
The flag hasn't affected actual surface layout for some time. The only
purpose it served was to set bo->cache_coherent = false on the BO used
to create the miptree. This is fairly silly because we can just set
that directly from the caller where it makes much more sense.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 17:48:58 +0000 (10:48 -0700)]
i965/miptree: Delete some unused layout flags
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>