Alyssa Rosenzweig [Mon, 5 Jul 2021 03:27:01 +0000 (23:27 -0400)]
agx: Handle txl
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Mon, 5 Jul 2021 03:26:07 +0000 (23:26 -0400)]
agx: Legalize LOD sources to be 16-bit only
I'm not convinced this is /right/ but it's a step.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Mon, 5 Jul 2021 03:25:36 +0000 (23:25 -0400)]
agx: Fix lod_mode shift
Was zero before so didn't notice the bug.
Fixes:
9f555388342 ("agx: Pack texture ops")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Mon, 5 Jul 2021 03:24:52 +0000 (23:24 -0400)]
agx: Pack LOD descriptors
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Mon, 5 Jul 2021 03:24:37 +0000 (23:24 -0400)]
agx: Fix LOD_MIN enum
Fixes:
2470a080d29 ("agx: Stub NIR backend compiler")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 4 Jul 2021 22:44:34 +0000 (18:44 -0400)]
agx: Fix 32-bit bitwise shifts
Fixes dEQP-GLES2.functional.shaders.functions.qualifiers.const_int_fragment
Fixes:
e50bae00f48 ("agx: Add 32-bit bitwise shifts")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 4 Jul 2021 22:33:26 +0000 (18:33 -0400)]
asahi: Add ASAHI_MESA_DEBUG=no16 option
A lot of dEQP failures go away with 32-bit forced...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 4 Jul 2021 22:25:36 +0000 (18:25 -0400)]
asahi: Generalize varying linking
Handles matrices now. Fixes
dEQP-GLES2.functional.shaders.matrix.add.dynamic_mediump_mat4_float_fragment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 4 Jul 2021 22:10:33 +0000 (18:10 -0400)]
asahi: Remove spurious varying assignment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 4 Jul 2021 20:24:24 +0000 (16:24 -0400)]
asahi: Remove spurious assignment
Doesn't seem necessary.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 26 Jun 2021 16:05:52 +0000 (12:05 -0400)]
asahi: Implement colour buffer reloads
Gets glmark2 -bdesktop working.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 4 Jul 2021 20:20:58 +0000 (16:20 -0400)]
asahi: Set fragment key for non-U8NORM render targets
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 4 Jul 2021 20:20:36 +0000 (16:20 -0400)]
asahi: Add internal (renderable) formats to the table
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 26 Jun 2021 19:23:34 +0000 (15:23 -0400)]
asahi: Save zsbuf ptr
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 26 Jun 2021 19:23:17 +0000 (15:23 -0400)]
asahi: Add zsbuf to batch
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 26 Jun 2021 19:23:03 +0000 (15:23 -0400)]
asahi: Handle Z16_UNORM textures
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 26 Jun 2021 18:05:02 +0000 (14:05 -0400)]
asahi: Always flush when setting framebuffer state
We don't have batch tracking yet.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 26 Jun 2021 16:05:21 +0000 (12:05 -0400)]
asahi: Guard for overflow when packing
I'm not convinced this is right.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Tue, 22 Jun 2021 02:10:27 +0000 (22:10 -0400)]
asahi: Fix random *2
Accidentally committed at some point.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 13 Jun 2021 15:28:59 +0000 (11:28 -0400)]
asahi: Wire in tgsi_to_nir
Gets GALLIUM_HUD working.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 26 Jun 2021 15:10:37 +0000 (11:10 -0400)]
agx: Track logical control flow graph
Logic lifted from the Bifrost compiler, which was a copypaste of the Midgard
compiler, which was based on a faulty understanding of the v3d compiler,
which...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 23 May 2021 18:25:25 +0000 (14:25 -0400)]
agx: Lift agx_block_add_successor from Panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 19 Jun 2021 18:33:12 +0000 (14:33 -0400)]
agx: Count write registers, not components
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 19 Jun 2021 17:56:28 +0000 (13:56 -0400)]
agx: Mark sources that kill
Trivially computed during liveness analysis (already a byproduct!) and required
for efficient register allocation.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 19 Jun 2021 17:48:03 +0000 (13:48 -0400)]
agx: Add liveness analysis pass
Based on the Panfrost one, scalarized and with some silly things fixed.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 19 Jun 2021 17:47:52 +0000 (13:47 -0400)]
agx: Add agx_exit_block helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 19 Jun 2021 17:23:25 +0000 (13:23 -0400)]
agx: Pull out agx_write_components
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 13 Jun 2021 00:57:36 +0000 (20:57 -0400)]
asahi: Unify varying linking code with vertex shaders
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 13 Jun 2021 00:47:45 +0000 (20:47 -0400)]
agx: Remap fragment shader varyings explicitly
Needed to handle fragcoord.z correctly, for example. Step 1, at least.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 13 Jun 2021 00:46:51 +0000 (20:46 -0400)]
agx: Rename agx_pack to agx_pack_binary
Conflicts with GenXML.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 6 Jun 2021 18:05:20 +0000 (14:05 -0400)]
agx: Implement ld_vary_flat
Not clear what any of this is for but let's be nice and match the blob.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 6 Jun 2021 18:03:54 +0000 (14:03 -0400)]
agx: Implement nir_intrinsic_load_frag_coord
Depends on matching ABI.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 6 Jun 2021 17:28:02 +0000 (13:28 -0400)]
agx: Rename remap_varyings -> remap_varyings_vs
Want to do the same for fragment shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 6 Jun 2021 17:22:50 +0000 (13:22 -0400)]
asahi: Identify varying descriptor fields
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 16 May 2021 18:14:49 +0000 (14:14 -0400)]
agx: Add ld_vary_flat opcode
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sun, 16 May 2021 18:13:04 +0000 (14:13 -0400)]
agx: Update ld_vary encoding mask
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 5 Jun 2021 20:20:11 +0000 (16:20 -0400)]
agx: Add perspective bit to ld_var
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Sat, 5 Jun 2021 20:19:58 +0000 (16:19 -0400)]
agx: Add agx_immediate_f helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Alyssa Rosenzweig [Mon, 5 Jul 2021 20:42:54 +0000 (16:42 -0400)]
agx: Mark components as ASSERTED
Prevents a release build warning.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
Thomas H.P. Andersen [Sun, 4 Jul 2021 22:27:24 +0000 (00:27 +0200)]
lavapipe: remove initialization override
These are duplicates from a few lines up
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11703>
Thomas H.P. Andersen [Sun, 4 Jul 2021 22:03:45 +0000 (00:03 +0200)]
zink: remove initialization override
These are duplicates from a few lines up
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11703>
Bas Nieuwenhuizen [Fri, 30 Apr 2021 12:22:15 +0000 (14:22 +0200)]
radv: Support address capture and replay.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10570>
Bas Nieuwenhuizen [Mon, 23 Nov 2020 02:13:18 +0000 (03:13 +0100)]
radv/winsys: Add support for a fixed VA address for replay.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10570>
Bas Nieuwenhuizen [Wed, 28 Apr 2021 00:10:57 +0000 (02:10 +0200)]
radv/winsys: Return vulkan errors for buffer creation.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10570>
Bas Nieuwenhuizen [Fri, 2 Jul 2021 13:29:52 +0000 (15:29 +0200)]
meson: Bump libdrm for amdgpu to 2.4.107.
For capture/replay va stability.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10570>
Danylo Piliaiev [Wed, 29 Apr 2020 11:08:48 +0000 (14:08 +0300)]
glsl: Prohibit implicit conversion of mem parameter in atomicOP functions
Per OpenGL Shading Language, section 8.11. "Atomic Memory Functions"
first argument "mem" of all atomicOP functions is inout.
The same is true for ARB_shader_storage_buffer_object and
GL_INTEL_shader_atomic_float_minmax
For implicit conversion of inout parameters it is required for type
to support bi-directional conversion, since there is no such types
in glsl - implicit conversion is effectively prohibited.
Alternatively we could have marked atomic_var parameter of built-in
atomicOP functions as inout, however it opens another can of worms
during NIR lowerings.
Fixes:
ea0a1f5beb22982a886ba862ba95f92c9e35165a
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2837
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4887>
Mike Blumenkrantz [Mon, 5 Jul 2021 13:52:29 +0000 (09:52 -0400)]
zink: ci updates for wideline fails
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11041>
Mike Blumenkrantz [Thu, 27 May 2021 12:02:21 +0000 (08:02 -0400)]
lavapipe: wideLines support
easy enough
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11041>
Tomeu Vizoso [Fri, 4 Jun 2021 08:25:24 +0000 (10:25 +0200)]
panvk: Add vkEvents support
Use syncobjs to implement vkEvents (as suggested by Boris).
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11709>
Tomeu Vizoso [Mon, 5 Jul 2021 10:13:44 +0000 (12:13 +0200)]
panfrost: Specify alignment for the Job Header descriptor
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11709>
Tomeu Vizoso [Mon, 5 Jul 2021 09:57:35 +0000 (11:57 +0200)]
panvk: Make panvk_queue_transfer_sync more generic
Have it accept a syncobj so it can be used in a future commit.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11709>
Tomeu Vizoso [Thu, 3 Jun 2021 14:28:15 +0000 (16:28 +0200)]
panvk: Support calls to CreateDescriptorSetLayout without bindings
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11709>
Rohan Garg [Tue, 15 Jun 2021 09:55:10 +0000 (11:55 +0200)]
ci: Don't artifact rendered images when job succeeds
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11088>
Samuel Pitoiset [Mon, 5 Jul 2021 08:35:19 +0000 (10:35 +0200)]
ci: remove few CTS that are now skipped with RADV
Some expected list of failures were actually outdated.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11712>
Samuel Pitoiset [Mon, 5 Jul 2021 08:22:46 +0000 (10:22 +0200)]
ci: update list of expected failures against CTS 1.2.6.2 for RADV
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11712>
Mike Blumenkrantz [Fri, 2 Jul 2021 14:37:47 +0000 (10:37 -0400)]
lavapipe: implement VK_EXT_line_rasterization
rectangular and strict lines aren't supported in this, and multisampling
must be disabled for correct line rasterization
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11066>
Mike Blumenkrantz [Fri, 2 Jul 2021 14:36:04 +0000 (10:36 -0400)]
lavapipe: store the geometry shader prim type to render state
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11066>
Mike Blumenkrantz [Fri, 2 Jul 2021 14:36:38 +0000 (10:36 -0400)]
lavapipe: store whether the geometry shader outputs GL_LINES
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11066>
Tomeu Vizoso [Thu, 3 Jun 2021 13:03:21 +0000 (15:03 +0200)]
panvk: Add VkCommandPool support
Mostly just copied from turnip.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11695>
Boris Brezillon [Fri, 2 Jul 2021 09:30:48 +0000 (11:30 +0200)]
panvk: Support returning BOs allocated by panvk_pool to a 'free BO' pool
So all CommandBuffers in a given CommandPool can reuse BOs for their
memory pools.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11695>
Tomeu Vizoso [Fri, 2 Jul 2021 08:41:02 +0000 (10:41 +0200)]
panfrost: Fork pan_pool for Gallium and Vulkan
This commit adds the actual implementations, allowing to diverge while
still sharing code that depends on pool functionality.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11695>
Boris Brezillon [Thu, 1 Jul 2021 17:26:56 +0000 (19:26 +0200)]
panfrost: Start splitting the panfrost pool logic
The Gallium and Vulkan drivers will soon use different memory pool
implementation, but some pieces in libpanfrost depend on pan_pool. Let's
split the implementation so we have common bits still available while
letting the drivers implement what really matters: the allocation logic.
All the generic pieces are prefixed pan_pool, and what will become the
gallium implementation is prefixed panfrost_pool. We'll then duplicate
the panfrost_pool bits in panvk and prefix it with panvk_pool, and
implementations will start diverging from there.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11695>
Boris Brezillon [Thu, 1 Jul 2021 17:19:17 +0000 (19:19 +0200)]
panvk: Use the desc alloctor when we can
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11695>
Boris Brezillon [Thu, 1 Jul 2021 17:08:03 +0000 (19:08 +0200)]
panfrost: Allocate WRITE_VALUE jobs with panfrost_pool_alloc_desc()
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11695>
Boris Brezillon [Thu, 1 Jul 2021 15:56:59 +0000 (17:56 +0200)]
panfrost: Add alignment info to write-value and cache-flush jobs
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11695>
Boris Brezillon [Wed, 2 Jun 2021 07:44:51 +0000 (09:44 +0200)]
panfrost: Pass a memory pool to pan_blit_ctx_init()
Pass a memory pool to pan_blit_ctx_init() instead of creating a new pool.
Useful for Vulkan since the descriptor pool is at the command buffer
level and is thus shared by all blit batches. Doing this will save us a
BO ownership transfer.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11695>
Boris Brezillon [Wed, 2 Jun 2021 07:49:24 +0000 (09:49 +0200)]
panfrost: Don't add blit context BOs twice
The transient_bo has already been added to the BO list, no need to call
panfrost_batch_add_bo() a second time on the same BO.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11695>
Dave Airlie [Mon, 5 Jul 2021 04:52:36 +0000 (14:52 +1000)]
crocus: restrict prim_restart on index buffer check to pre-hsw
This code has no use on hsw or chv
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11707>
Dave Airlie [Sun, 4 Jul 2021 20:54:35 +0000 (06:54 +1000)]
crocus: reorder version checks on indirect xfb
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11707>
Dave Airlie [Sun, 4 Jul 2021 20:35:50 +0000 (06:35 +1000)]
crocus: inline group_index<->bti
this is on a fastpath for ubo emission
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11707>
Dave Airlie [Sun, 4 Jul 2021 19:11:26 +0000 (05:11 +1000)]
crocus: optimise bo_unref path a little.
This just splits it into the atomic/non-atomic paths
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11707>
Dave Airlie [Sun, 4 Jul 2021 20:54:15 +0000 (06:54 +1000)]
crocus: don't update draw parameters unless needed
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11707>
Dave Airlie [Fri, 2 Jul 2021 20:36:32 +0000 (06:36 +1000)]
crocus: inline the d/s resource handling functions
These are pretty simple, so inlining is fine and helps drawoverhead
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11707>
Dave Airlie [Wed, 26 May 2021 05:53:46 +0000 (15:53 +1000)]
draw/tess: write correct primitive id into vertices
The code was using a prim assembler after the tess stage, however
tess prims aren't necessarily the output prim types, so just put
the prim ids into the vertices at tess stage, and skip prim assembly.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11000>
Dave Airlie [Wed, 26 May 2021 04:27:14 +0000 (14:27 +1000)]
draw: fix tessellation output vertex size calculation
This ensures space for the extra outputs is calculated in the
tes vertex outputs.
dEQP-VK.pipeline.misc.primitive_id_from_tess
Fixes:
dacf8f5f5c82 ("draw: hook up final bits of tessellation")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11000>
Dave Airlie [Mon, 5 Jul 2021 02:45:13 +0000 (12:45 +1000)]
crocus: fixup index buffer dirtying.
This fixes a possible problem if a non-indexed draw comes in first
in a new batch, then the batch might not emit the index buffer.
I'm unsure if we see this, I just spotted it trying to fix alacritty
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11705>
Dave Airlie [Mon, 5 Jul 2021 01:43:52 +0000 (11:43 +1000)]
crocus: fix crash on index buffer rebinding.
This was crashing in plasmashell.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11704>
Dave Airlie [Thu, 1 Jul 2021 02:23:09 +0000 (12:23 +1000)]
crocus/gen5: enable support for GL_EXT_gpu_shader4
There has been a few requests for this and I've got patches for glamor
to use this to speed up the paths that use GLSL 1.30 now.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11693>
Dave Airlie [Thu, 1 Jul 2021 00:52:52 +0000 (10:52 +1000)]
crocus: expose ARB_blend_func_extended on gen 45/50
In theory the docs say 965gm can support this but the original
965 can't, but we can't distinguish that yet.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11693>
Dave Airlie [Fri, 2 Jul 2021 06:12:03 +0000 (16:12 +1000)]
crocus: cleanup some deadcode in the gen5 blend emit
The rt->blend_enable is always 1 at this point, and the gen5
specific code isn't being used anymore, it just looked like it
was.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11693>
Thomas H.P. Andersen [Mon, 28 Jun 2021 22:54:40 +0000 (00:54 +0200)]
nir/ifind_msb_rev: fix input check
ifind_msb_rev was introduced in
a5747f8ab357ff00c630b937b221e5fb59d90289.
ifind_msb_rev guards against src0 being both 0 or -1 at the same time.
That is always true. This patch changes it to check for those values
individually.
Spotted from a compile warning.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes:
a5747f8ab35 (\"nir: add opcodes for *find_msb_rev and lowering\")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11630>
Dave Airlie [Sat, 3 Jul 2021 00:04:47 +0000 (10:04 +1000)]
iris: make iris_bind_reserve_3d and Wa_1604061319 only check for dirty render bindings
+ 9.31% drawover:gdrv0 iris_dri.so [.] iris_binder_reserve_3d
+ 2.36% drawover:gdrv0 iris_dri.so [.] iris_binder_reserve_3d
If the app never uses compute, then the compute bindings bit will always
be dirty causing these two paths never get shortcuts.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11699>
Icecream95 [Wed, 19 May 2021 21:10:40 +0000 (09:10 +1200)]
panfrost: Only upload UBOs when needed
If all of the used values from a UBO are pushed, it doesn't need to be
uploaded.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11700>
Icecream95 [Thu, 20 May 2021 10:07:05 +0000 (22:07 +1200)]
pan/mdg: Create a mask of UBOs that need to be uploaded
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11700>
Icecream95 [Tue, 18 May 2021 02:19:57 +0000 (14:19 +1200)]
pan/bi: Create a mask of UBOs that need to be uploaded
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11700>
Icecream95 [Sat, 3 Jul 2021 07:52:21 +0000 (19:52 +1200)]
panfrost: Don't set dirty_mask for constant buffers
It is unused.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11700>
Zoltán Böszörményi [Fri, 2 Jul 2021 10:18:12 +0000 (12:18 +0200)]
crocus: Make the driver loader use PCI IDs for crocus
Add PCI IDs based in pci_ids/i965_pci_ids.h and move crocus before
iris in driver_map[].
This allows Xorg to load the crocus driver since iris would claim
the devices handled by crocus (because the i915 kernel driver is
used for all Intel devices) then fail during initialization.
Signed-off-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11694>
Zoltán Böszörményi [Fri, 2 Jul 2021 09:04:13 +0000 (11:04 +0200)]
crocus: Add pipe loader driver
Signed-off-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11694>
Kenneth Graunke [Thu, 1 Jul 2021 20:38:25 +0000 (13:38 -0700)]
vulkan/wsi: Fix prime blits to use system memory for the destination
The intention here was to pass VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT to
select_memory_types() when requesting device local memory, or simply
pass 0 for the prime blit destination which should be in system memory.
Unfortunately, that meant we did (type.propertyFlags & 0) == 0 which
was vacuously true, causing us to not filter out device local types.
Fixes hybrid display of Vulkan apps on Intel TGL+DG1 systems.
Tested-by: Luis Felipe Strano Moraes <luis.strano@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11680>
Emma Anholt [Thu, 1 Jul 2021 04:58:23 +0000 (21:58 -0700)]
i915g: Make sure the 1D texture Y channel is initialized.
Even with the wrap mode forced to REPEAT, we get undefined results in
CelShading when the Y channel is unwritten since the beginning of the
program.
I dropped the coords==0 case in the process, since that's not possible and
made the 1D case confusing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11457>
Emma Anholt [Fri, 18 Jun 2021 04:30:06 +0000 (21:30 -0700)]
i915g: Force 1D textures to use wrap mode for the Y coordinate.
There are no 1D textures in HW, so we use 2D, but at the shader level
there no Y coordinate to 1D sampling, so we need that value to be ignored.
WRAP mode can get us that.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11457>
Adam Jackson [Wed, 30 Jun 2021 13:44:26 +0000 (09:44 -0400)]
meson: Make prefer-{crocus,iris} always take effect
As written this would require that the driver be built before we looked
at the option. This is wrong because it affects code outside of the
driver, it's in libGL's PCI ID table. This is sort of harmless for
crocus at the moment, but for iris you would need to build it in order
to remove it from the table; if you built just i965 and tried to run it
against gen9, the libGL you just built would direct the loader to the
iris driver you just didn't, and setup would fail, which is: goofy.
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11655>
Kenneth Graunke [Mon, 28 Jun 2021 18:42:24 +0000 (11:42 -0700)]
iris: Delete unused bo->cache_coherent flag
This was used in the heuristics for deciding whether to CPU map,
but those have since been deleted, so this is now unused.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11644>
Kenneth Graunke [Mon, 28 Jun 2021 18:38:08 +0000 (11:38 -0700)]
iris: Fail BO allocation if we can't enable snooping properly.
If the caller has asked for a coherent BO with snooping, and the kernel
fails to set it for whatever reason, we were happily returning them a
non-coherent buffer. This isn't what they wanted and could lead to
surprising results.
Better to simply fail the allocation. Probably.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11644>
Kenneth Graunke [Mon, 28 Jun 2021 18:31:50 +0000 (11:31 -0700)]
iris: Stop calling I915_GEM_SET_CACHING on discrete GPUs
On integrated GPUs without LLC, we enable snooping when someone requests
coherency for a buffer. (With LLC, it's already coherent.)
For discrete GPUs...if someone requests coherency, we allocate the
buffer in SMEM and resort to WC maps rather than WB maps with CPU
caches enabled. There's no snooping to enable, and calling this ioctl
is nonsensical, and may fail.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11644>
Emma Anholt [Wed, 30 Jun 2021 21:13:35 +0000 (14:13 -0700)]
i915g: whitespace fixup from the cube map fix.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11668>
Emma Anholt [Wed, 30 Jun 2021 20:02:28 +0000 (13:02 -0700)]
i915g: Add support for per-vertex point size.
Closes: #4973
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11668>
Samuel Pitoiset [Mon, 5 Apr 2021 12:19:42 +0000 (14:19 +0200)]
radv: allow more fast clears for depth surfaces without TC-compat HTILE
With HTILE only, all values between 0.0 and 1.0 are fetchable.
This should allow more fast clears for depth surfaces where
TC-compat HTILE is disabled.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10035>
Samuel Pitoiset [Tue, 22 Jun 2021 12:13:36 +0000 (14:13 +0200)]
radv: prevent fast clearing HTILE depth for unrestricted ranges
VK_EXT_depth_range_unrestricted removes the restriction that the
clear value must be between 0.0 and 1.0.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10035>
Samuel Pitoiset [Mon, 5 Apr 2021 12:18:27 +0000 (14:18 +0200)]
radv: add support for more HTILE clear codes
The HTILE clear code is now computed based on the floating point value.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10035>
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