platform/kernel/linux-rpi.git
5 years agopinctrl: sunxi: a64: Rename function ts0 to ts
Chen-Yu Tsai [Mon, 3 Dec 2018 15:41:00 +0000 (23:41 +0800)]
pinctrl: sunxi: a64: Rename function ts0 to ts

The A64 only has one TS (transport stream) controller. The datasheet
also lists the function as TS_XXX instead of TS0_XXX.

Rename the function names now before any there are any users.

Fixes: 96851d391d02 ("drivers: pinctrl: add driver for Allwinner A64 SoC")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: sunxi: a64: Rename function csi0 to csi
Chen-Yu Tsai [Mon, 3 Dec 2018 15:40:59 +0000 (23:40 +0800)]
pinctrl: sunxi: a64: Rename function csi0 to csi

The A64 only has one CSI (camera sensor interface) controller. The
datasheet also lists the function as CSI_XXX instead of CSI0_XXX.

Rename the function names now before any there are any users.

Fixes: 96851d391d02 ("drivers: pinctrl: add driver for Allwinner A64 SoC")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: sx150x: handle failure case of devm_kstrdup
Nicholas Mc Guire [Sun, 2 Dec 2018 10:04:17 +0000 (11:04 +0100)]
pinctrl: sx150x: handle failure case of devm_kstrdup

devm_kstrdup() may return NULL if internal allocation failed.
Thus using  label, name  is unsafe without checking. Therefor
in the unlikely case of allocation failure, sx150x_probe() simply
returns -ENOMEM.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Fixes: 9e80f9064e73 ("pinctrl: Add SX150X GPIO Extender Pinctrl Driver")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: Change to use DEFINE_SHOW_ATTRIBUTE macro
Yangtao Li [Fri, 30 Nov 2018 16:36:17 +0000 (11:36 -0500)]
pinctrl: Change to use DEFINE_SHOW_ATTRIBUTE macro

Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: nuvoton: check for devm_kasprintf() failure
Nicholas Mc Guire [Fri, 23 Nov 2018 16:12:58 +0000 (17:12 +0100)]
pinctrl: nuvoton: check for devm_kasprintf() failure

devm_kasprintf() may return NULL on failure of internal allocation thus
the assignment to  .label  is not safe if not checked. On error
npcm7xx_gpio_of() returns negative values so -ENOMEM in the
(unlikely) failure case of devm_kasprintf() should be fine here.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Fixes: 3b588e43ee5c ("pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: qcom: spmi-gpio: add compatible for pms405 GPIO
Shawn Guo [Tue, 20 Nov 2018 05:45:22 +0000 (13:45 +0800)]
pinctrl: qcom: spmi-gpio: add compatible for pms405 GPIO

Let's add "qcom,pms405-gpio" to match table, as commit ed80f6eb799a
("dt-bindings: pinctrl: qcom-pmic-gpio: Add pms405 support") already
adds the compatible.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agodt-bindings: pinctrl: fix qcom-pmic-gpio for pms405
Shawn Guo [Tue, 20 Nov 2018 05:45:21 +0000 (13:45 +0800)]
dt-bindings: pinctrl: fix qcom-pmic-gpio for pms405

Rather than gpio1-gpio11 for pms405, there are 12 GPIOs for pms405.
But gpio1, gpio9 and gpio10 are not available.  Fix the bindings doc
to make it correct for pms405.

Fixes: ed80f6eb799a ("dt-bindings: pinctrl: qcom-pmic-gpio: Add pms405 support")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agoMerge tag 'sh-pfc-for-v4.21-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Walleij [Sun, 25 Nov 2018 22:53:01 +0000 (23:53 +0100)]
Merge tag 'sh-pfc-for-v4.21-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.21

  - Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
  - Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
  - Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
  - Add QSPI pin groups on R-Car V3M and V3H,
  - Add VIN and CAN(FD) pin groups on R-Car M3-N,
  - Add I2C[035] pin groups on R-Car H3 and M3-W,
  - Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
  - Small cleanups,
  - Maintainership updates.

5 years agopinctrl: sunxi: add support for suniv F1C100s (newer F-series SoCs)
Mesih Kilinc [Sun, 25 Nov 2018 07:43:14 +0000 (10:43 +0300)]
pinctrl: sunxi: add support for suniv F1C100s (newer F-series SoCs)

The suniv F1C100s chip (several new F-series SoCs) of Allwinner has a
pin
controller like other SoCs from Allwinner.

Add support for it.

Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agodt-bindings: pinctrl: Add Allwinner suniv F1C100s pinctrl
Mesih Kilinc [Sun, 25 Nov 2018 07:43:13 +0000 (10:43 +0300)]
dt-bindings: pinctrl: Add Allwinner suniv F1C100s pinctrl

Add compatible string for Allwinner suniv F1C100s SoC's pinctrl.

Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: Add RZ/A2 pin and gpio controller
Chris Brandt [Thu, 15 Nov 2018 16:15:27 +0000 (11:15 -0500)]
pinctrl: Add RZ/A2 pin and gpio controller

Adds support for the pin and gpio controller found in R7S9210 (RZ/A2) SoCs.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agodt-bindings: pinctrl: Add RZ/A2 pinctrl and GPIO
Chris Brandt [Thu, 15 Nov 2018 16:15:28 +0000 (11:15 -0500)]
dt-bindings: pinctrl: Add RZ/A2 pinctrl and GPIO

Add device tree binding documentation and header file for Renesas R7S9210
(RZ/A2) SoCs.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: sh-pfc: r8a77980: Add QSPI pins, groups, and functions
Dmitry Shifrin [Mon, 19 Nov 2018 17:30:06 +0000 (20:30 +0300)]
pinctrl: sh-pfc: r8a77980: Add QSPI pins, groups, and functions

Add the QSPI{0|1} pins/groups/functions to the R8A77980 PFC driver.

[Sergei: ported to the upstream driver, fixed up the swapped QSPI0 SPCLK/
SSL pins, fixed up the comments, moved the QSPI pins/groups/functions to
be in the alphanumeric order, removed unneeded empty lines, renamed the
patch.]

Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: mediatek: Convert to using %pOFn instead of device_node.name
Rob Herring [Fri, 16 Nov 2018 22:05:40 +0000 (16:05 -0600)]
pinctrl: mediatek: Convert to using %pOFn instead of device_node.name

In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.

Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: linux-mediatek@lists.infradead.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: msm: Add sleep pinctrl state transitions
Evan Green [Fri, 16 Nov 2018 18:58:53 +0000 (10:58 -0800)]
pinctrl: msm: Add sleep pinctrl state transitions

Add PM suspend callbacks to the msm core driver that select the
sleep and default pinctrl states. Then wire those callbacks up
in the sdm845 driver, for those boards that may have GPIO hogs
that need to change state during suspend.

Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agodt-bindings: pinctrl: update bindings for MT7629 SoC
Ryder Lee [Mon, 12 Nov 2018 01:45:06 +0000 (09:45 +0800)]
dt-bindings: pinctrl: update bindings for MT7629 SoC

This updates bindings for MT7629 pinctrl driver.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Sean Wang <sean.wang@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: mediatek: add pinctrl support for MT7629 SoC
Ryder Lee [Mon, 12 Nov 2018 01:45:05 +0000 (09:45 +0800)]
pinctrl: mediatek: add pinctrl support for MT7629 SoC

This adds MT7629 pinctrl driver based on MediaTek pinctrl-moore core.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: imx: fix NO_PAD_CTL setting for MMIO pads
A.s. Dong [Mon, 12 Nov 2018 15:25:48 +0000 (15:25 +0000)]
pinctrl: imx: fix NO_PAD_CTL setting for MMIO pads

After patch b96eea718bf6 ("pinctrl: fsl: add scu based pinctrl support"),
NO_PAD_CTL pads map are not skipped anymore which results in
a possible memory corruption. As we actually only need to create config
maps for SCU pads and MMIO pads which are not using the default config
(a.k.a IMX_NO_PAD_CTL), so let's add a proper check before creating
the config maps. And during MMIO pads parsing, we also need update the
list_p point as SCU case to ensure the pin data next parsed is correct.

Cc: Linus Walleij <linus.walleij@linaro.org>
Fixes: b96eea718bf6 ("pinctrl: fsl: add scu based pinctrl support")
Reported-by: Martin Kaiser <martin@kaiser.cx>
Suggested-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Martin Kaiser <martin@kaiser.cx>
Tested-by: Leonard Crestez <leonard.crestez@nxp.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: actions: Add Actions Semi S700 pinctrl driver
Saravanan Sekar [Thu, 15 Nov 2018 12:47:47 +0000 (13:47 +0100)]
pinctrl: actions: Add Actions Semi S700 pinctrl driver

Add pinctrl and gpio driver for Actions Semi S700 SoC. The driver
supports pinctrl, pinmux, pinconf, gpio and interrupt functionalities
through a range of registers common to both gpio driver and pinctrl driver.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agodt-bindings: pinctrl: Add bindings for Actions Semi S700 SoC
Saravanan Sekar [Thu, 15 Nov 2018 12:47:46 +0000 (13:47 +0100)]
dt-bindings: pinctrl: Add bindings for Actions Semi S700 SoC

Add pinctrl and pio bindings for Actions Semi S700 SoC.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: actions: define pad control configurtion to SoC specific
Saravanan Sekar [Thu, 15 Nov 2018 12:47:45 +0000 (13:47 +0100)]
pinctrl: actions: define pad control configurtion to SoC specific

pad control for s900 and s700 are differs in number of
pull control configuraions
s900 has 4 pull controls - high impedence, pull up, pull down, repeater
s700, s500 has 2 pull controls - pull up and pull down

so pad control configuration has to SoC specific, moved out from pinctrl
common to s900 specific.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: actions: define constructor generic to Actions Semi SoC's
Saravanan Sekar [Thu, 15 Nov 2018 12:47:44 +0000 (13:47 +0100)]
pinctrl: actions: define constructor generic to Actions Semi SoC's

Move generic defines common to the Owl family out of S900 driver.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: stm32: protect configuration registers with a hwspinlock
Benjamin Gaignard [Tue, 13 Nov 2018 09:51:41 +0000 (10:51 +0100)]
pinctrl: stm32: protect configuration registers with a hwspinlock

If a hwspinlock if defined in device tree use it to protect
configuration registers.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agodt-bindings: pinctrl: stm32: Document hwlocks properties
Benjamin Gaignard [Tue, 13 Nov 2018 09:51:40 +0000 (10:51 +0100)]
dt-bindings: pinctrl: stm32: Document hwlocks properties

Add hwlocks as optional property

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: sh-pfc: r8a77990: Add CAN FD pins, groups and functions
Takeshi Kihara [Sun, 18 Nov 2018 17:29:03 +0000 (18:29 +0100)]
pinctrl: sh-pfc: r8a77990: Add CAN FD pins, groups and functions

This patch adds CAN FD{0,1} pins, groups and functions to the R8A77990
SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
[geert: Move canfd from common to automotive]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: sh-pfc: r8a77990: Add CAN pins, groups and functions
Takeshi Kihara [Sun, 18 Nov 2018 17:29:02 +0000 (18:29 +0100)]
pinctrl: sh-pfc: r8a77990: Add CAN pins, groups and functions

This patch adds CAN{0,1} pins, groups and functions to the R8A77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: sh-pfc: r8a77965: Add CAN FD pins, groups and functions
Takeshi Kihara [Sun, 18 Nov 2018 17:29:01 +0000 (18:29 +0100)]
pinctrl: sh-pfc: r8a77965: Add CAN FD pins, groups and functions

This patch adds CAN FD{0,1} pins, groups and functions to the R8A77965
SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: sh-pfc: r8a77965: Add CAN pins, groups and functions
Takeshi Kihara [Sun, 18 Nov 2018 17:29:00 +0000 (18:29 +0100)]
pinctrl: sh-pfc: r8a77965: Add CAN pins, groups and functions

This patch adds CAN{0,1} pins, groups and functions to the R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: sh-pfc: r8a7796: Add I2C{0,3,5} pins, groups and functions
Takeshi Kihara [Fri, 16 Nov 2018 07:20:51 +0000 (15:20 +0800)]
pinctrl: sh-pfc: r8a7796: Add I2C{0,3,5} pins, groups and functions

This patch adds I2C{0,3,5} pins, groups and functions to the R8A7796 SoC.

These pins are physically muxed with other pins. Therefore, setup of
MOD_SEL is needed for exclusive control with other pins.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: sh-pfc: r8a7795-es1: Add I2C{0,3,5} pins, groups and functions
Takeshi Kihara [Fri, 16 Nov 2018 07:20:50 +0000 (15:20 +0800)]
pinctrl: sh-pfc: r8a7795-es1: Add I2C{0,3,5} pins, groups and functions

This patch adds I2C{0,3,5} pins, groups and functions to
the R8A7795 ES1.x SoC.

These pins are physically muxed with other pins. Therefore, setup of
MOD_SEL is needed for exclusive control with other pins.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: sh-pfc: r8a7795: Add I2C{0,3,5} pins, groups and functions
Takeshi Kihara [Fri, 16 Nov 2018 07:20:49 +0000 (15:20 +0800)]
pinctrl: sh-pfc: r8a7795: Add I2C{0,3,5} pins, groups and functions

This patch adds I2C{0,3,5} pins, groups and functions to the R8A7795 SoC.

These pins are physically muxed with other pins. Therefore, setup of
MOD_SEL is needed for exclusive control with other pins.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: sh-pfc: Add physical pin multiplexing helper macros
Ulrich Hecht [Fri, 16 Nov 2018 07:20:48 +0000 (15:20 +0800)]
pinctrl: sh-pfc: Add physical pin multiplexing helper macros

Used by I2C controllers 0, 3 and 5 in R8A7795 and R8A7796 SoCs.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: sh-pfc: r8a77995: Remove unused PINMUX_IPSR_{MSEL2,PHYS}()
Geert Uytterhoeven [Mon, 19 Nov 2018 10:16:51 +0000 (11:16 +0100)]
pinctrl: sh-pfc: r8a77995: Remove unused PINMUX_IPSR_{MSEL2,PHYS}()

The PINMUX_IPSR_MSEL2() and PINMUX_IPSR_PHYS() macros are unused, and
will conflict with generic macros that are to be added.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
5 years agopinctrl: sh-pfc: r8a77990: Add HSCIF pins, groups, and functions
Takeshi Kihara [Thu, 15 Nov 2018 16:47:07 +0000 (01:47 +0900)]
pinctrl: sh-pfc: r8a77990: Add HSCIF pins, groups, and functions

This patch adds HSCIF{0,1,2,3,4} pins, groups and functions to
the R8A77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
5 years agopinctrl: rockchip: add rk3188 routes to switch between nand and emmc
Heiko Stuebner [Sun, 11 Nov 2018 21:00:47 +0000 (22:00 +0100)]
pinctrl: rockchip: add rk3188 routes to switch between nand and emmc

The rk3188 has pins that are not handled through the regular iomuxing
for handling either nand-flash or an emmc and are set through only one
specifal setting. So utilize the routing function to simply do that
setting depending on one of the core nand/emmc signals that are actually
regular pins handled through pinctrl.

Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
5 years agopinctrl: rockchip: allow specifying the regmap location for pin-routes
Heiko Stuebner [Sun, 11 Nov 2018 21:00:46 +0000 (22:00 +0100)]
pinctrl: rockchip: allow specifying the regmap location for pin-routes

Right now we expect the pin-rounting settings to be in the same area
as the iomux setting itself. And while that seems to be true for all
newer Rockchip socs, back in the wild west days of old this wasn't true.

Nowadays pin settings in the GRF normally stay in the GRF and the same
is true for pins configured from PMU registers. But old socs like the
rk3188 really sprinkle pin settings somewhat randomly through both
for its bank0.

Therefore add the option to specify a location for the route setting,
so that we can map older socs correctly. We'll keep "same" as the
default, so that we only need to specify a location in the corner-cases
described above.

Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
Reviewed-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: qcom: ssbi-gpio: fix gpio-hog related boot issues
Brian Masney [Sun, 11 Nov 2018 01:34:11 +0000 (20:34 -0500)]
pinctrl: qcom: ssbi-gpio: fix gpio-hog related boot issues

When attempting to setup up a gpio hog, device probing will repeatedly
fail with -EPROBE_DEFERED errors. It is caused by a circular dependency
between the gpio and pinctrl frameworks. If the gpio-ranges property is
present in device tree, then the gpio framework will handle the gpio pin
registration and eliminate the circular dependency.

See Christian Lamparter's commit a86caa9ba5d7 ("pinctrl: msm: fix
gpio-hog related boot issues") for a detailed commit message that
explains the issue in much more detail. The code comment in this commit
came from Christian's commit.

I did not test this change against any hardware supported by this
particular driver, however I was able to validate this same fix works
for pinctrl-spmi-gpio.c using a LG Nexus 5 (hammerhead) phone.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: bcm2835: Switch to SPDX identifier
Stefan Wahren [Sat, 10 Nov 2018 16:15:11 +0000 (17:15 +0100)]
pinctrl: bcm2835: Switch to SPDX identifier

Adopt the SPDX license identifier headers to ease license compliance
management.

Cc: Simon Arlott <simon@arlott.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: nuvoton: modify NPCM7xx pin configuration function
Tomer Maimon [Wed, 7 Nov 2018 13:44:34 +0000 (15:44 +0200)]
pinctrl: nuvoton: modify NPCM7xx pin configuration function

Modify GPIO direction setting in pin configuration function by using
generic GPIO functions to set the GPIO direction instead of direct
access to the GPIO direction register.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Tested-by: Kun Yi <kunyi@google.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: mediatek: Add initial pinctrl driver for MT6797 SoC
Manivannan Sadhasivam [Wed, 7 Nov 2018 17:48:44 +0000 (23:18 +0530)]
pinctrl: mediatek: Add initial pinctrl driver for MT6797 SoC

Add initial pinctrl driver for Mediatek MT6797 SoC supporting only
GPIO and pinmux configurations.

Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agodt-bindings: pinctrl: Add devicetree bindings for MT6797 SoC Pinctrl
Manivannan Sadhasivam [Wed, 7 Nov 2018 17:48:41 +0000 (23:18 +0530)]
dt-bindings: pinctrl: Add devicetree bindings for MT6797 SoC Pinctrl

Add devicetree bindings for Mediatek MT6797 SoC Pin Controller.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: meson-gxl: remove invalid GPIOX tsin_a pins
Neil Armstrong [Wed, 7 Nov 2018 10:42:38 +0000 (11:42 +0100)]
pinctrl: meson-gxl: remove invalid GPIOX tsin_a pins

The GPIOX tsin_a pins wrongly uses the SDCard pinctrl bits, this
patch completely removes these pins entries until we find out what
are the correct bits and registers to be used instead.

Fixes: 5a6ae9b80139 ("pinctrl: meson-gxl: add tsin_a pins")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: mediatek: Fix dependencies for EINT_MTK
Olof Johansson [Fri, 2 Nov 2018 02:57:28 +0000 (19:57 -0700)]
pinctrl: mediatek: Fix dependencies for EINT_MTK

Fixes the following config-time warning:

WARNING: unmet direct dependencies detected for EINT_MTK
  Depends on [n]: PINCTRL [=y] && (ARCH_MEDIATEK [=y] || COMPILE_TEST [=n]) && (PINCTRL_MTK [=n] || PINCTRL_MTK_MOORE [=n] || COMPILE_TEST [=n])
  Selected by [y]:
  - PINCTRL_MTK_PARIS [=y] && PINCTRL [=y] && OF [=y] && (ARCH_MEDIATEK [=y] || COMPILE_TEST [=n])

Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings")
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: sh-pfc: r8a77990: Add VIN[4|5] groups/functions
Jacopo Mondi [Thu, 8 Nov 2018 16:07:24 +0000 (17:07 +0100)]
pinctrl: sh-pfc: r8a77990: Add VIN[4|5] groups/functions

Add pin, mux and functions definitions for VIN4 and VIN5 for R-Car E3.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a77965: Add VIN[4|5] groups/functions
Jacopo Mondi [Thu, 8 Nov 2018 16:07:23 +0000 (17:07 +0100)]
pinctrl: sh-pfc: r8a77965: Add VIN[4|5] groups/functions

The VIN4 and VIN5 interfaces support parallel video input.
Add pin, mux and functions definitions for VIN4 and VIN5 for R-Car M3-N.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a7796: Fix VIN versioned groups
Jacopo Mondi [Thu, 8 Nov 2018 16:07:27 +0000 (17:07 +0100)]
pinctrl: sh-pfc: r8a7796: Fix VIN versioned groups

Versioned VIN groups can appear on different sets of pins. Using the
VIN_DATA_PIN_GROUP macro now supports proper naming of said groups
through an optional 'version' argument.

Use the 'version' argument for said macro to fix naming of versioned
groups for the R-Car M3-W R8A7796 SoC.

Fixes: a5c2949ff7bd ("pinctrl: sh-pfc: r8a7796: Deduplicate VIN4 pin definitions")
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a7795: Fix VIN versioned groups
Jacopo Mondi [Thu, 8 Nov 2018 16:07:26 +0000 (17:07 +0100)]
pinctrl: sh-pfc: r8a7795: Fix VIN versioned groups

Versioned VIN groups can appear on different sets of pins. Using the
VIN_DATA_PIN_GROUP macro now supports proper naming of said groups
through an optional 'version' argument.

Use the 'version' argument for said macro to fix naming of versioned
groups for the R-Car H3 R8A7795 SoC.

Fixes: 9942a5b52990 ("pinctrl: sh-pfc: r8a7795: Deduplicate VIN4 pin definitions")
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a7792: Fix VIN versioned groups
Jacopo Mondi [Thu, 8 Nov 2018 16:07:25 +0000 (17:07 +0100)]
pinctrl: sh-pfc: r8a7792: Fix VIN versioned groups

Versioned VIN groups can appear on different sets of pins. Using the
VIN_DATA_PIN_GROUP macro now supports proper naming of said groups
through an optional 'version' argument.

Use the 'version' argument for said macro to fix naming of versioned
groups for the R-Car V2H R8A7792 SoC.

Fixes: 7dd74bb1f058 ("pinctrl: sh-pfc: r8a7792: Add VIN pin groups")
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: Add optional arg to VIN_DATA_PIN_GROUP
Jacopo Mondi [Thu, 8 Nov 2018 16:07:22 +0000 (17:07 +0100)]
pinctrl: sh-pfc: Add optional arg to VIN_DATA_PIN_GROUP

VIN data groups may appear on different sets of pins, usually named
"vinX_data_[a|b]". The existing VIN_DATA_PIN_GROUP() does not support
appending the '_a' or '_b' suffix, leading to the definition of group
names not consistent with the ones defined using the SH_PFC_PIN_GROUP()
macro.

Fix this by making the VIN_DATA_PIN_GROUP macro a variadic one,
which accepts an optional 'version' argument.

Fixes: 423caa52534f ("pinctrl: sh-pfc: r8a779[01]: Move 'union vin_data' to shared header file")
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a77970: Add QSPI pins, groups, and functions
Dmitry Shifrin [Tue, 6 Nov 2018 18:52:55 +0000 (21:52 +0300)]
pinctrl: sh-pfc: r8a77970: Add QSPI pins, groups, and functions

Add the QSPI{0|1} pins/groups/functions to the R8A77970 PFC driver.

[Sergei: ported to the upstream driver, fixed up the swapped QSPI0 SPCLK/
SSL pins, fixed up the comments, moved the QSPI pins/groups/functions to
be in the alphanumeric order, removed unneeded empty lines, renamed the
patch.]

Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a77990: Add voltage switch operations for SDHI
Takeshi Kihara [Mon, 5 Nov 2018 21:40:12 +0000 (22:40 +0100)]
pinctrl: sh-pfc: r8a77990: Add voltage switch operations for SDHI

This patch supports the {get,set}_io_voltage operations of SDHI.

This operates the IOCTRL30 register on the R8A77990 SoC and makes
1.8V/3.3V signal voltage switch possible.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions
Takeshi Kihara [Mon, 5 Nov 2018 21:40:11 +0000 (22:40 +0100)]
pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions

This patch adds SDHI{0,1,3} pins, groups and functions to the R8A77990
SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: fsl: imx7ulp: change to use imx legacy binding
A.s. Dong [Fri, 2 Nov 2018 09:13:03 +0000 (09:13 +0000)]
pinctrl: fsl: imx7ulp: change to use imx legacy binding

We already had an earlier conclusion that all new i.MX Socs will keep
using the legacy i.MX Pinctrl bindings instead of generic pin config.
However, MX7ULP generic pin config binding support has already been in
tree before that time. Per SoC maintainers' suggestions, in order to
get a better consistency for all i.MX devices, we'd like to go back to
imx legacy binding for MX7ULP as well.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agodt-bindings: pinctrl: imx7ulp: back to imx legacy binding for consistency
A.s. Dong [Fri, 2 Nov 2018 09:12:58 +0000 (09:12 +0000)]
dt-bindings: pinctrl: imx7ulp: back to imx legacy binding for consistency

We already had an earlier conclusion that all new i.MX Socs will keep
using the legacy i.MX Pinctrl bindings instead of generic pin config.
However, MX7ULP generic pin config binding support has already been in
tree before that time. Per SoC maintainers' suggestions, in order to
get a better consistency for all i.MX devices, we'd like to go back to
imx legacy binding for MX7ULP as well.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: zynq: Use define directive for PIN_CONFIG_IO_STANDARD
Nathan Chancellor [Wed, 7 Nov 2018 08:56:40 +0000 (01:56 -0700)]
pinctrl: zynq: Use define directive for PIN_CONFIG_IO_STANDARD

Clang warns when one enumerated type is implicitly converted to another:

drivers/pinctrl/pinctrl-zynq.c:985:18: warning: implicit conversion from
enumeration type 'enum zynq_pin_config_param' to different enumeration
type 'enum pin_config_param' [-Wenum-conversion]
        {"io-standard", PIN_CONFIG_IOSTANDARD, zynq_iostd_lvcmos18},
        ~               ^~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/pinctrl-zynq.c:990:16: warning: implicit conversion from
enumeration type 'enum zynq_pin_config_param' to different enumeration
type 'enum pin_config_param' [-Wenum-conversion]
        = { PCONFDUMP(PIN_CONFIG_IOSTANDARD, "IO-standard", NULL, true),
            ~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
./include/linux/pinctrl/pinconf-generic.h:163:11: note: expanded from
macro 'PCONFDUMP'
        .param = a, .display = b, .format = c, .has_arg = d     \
                 ^
2 warnings generated.

It is expected that pinctrl drivers can extend pin_config_param because
of the gap between PIN_CONFIG_END and PIN_CONFIG_MAX so this conversion
isn't an issue. Most drivers that take advantage of this define the
PIN_CONFIG variables as constants, rather than enumerated values. Do the
same thing here so that Clang no longer warns.

Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: lpc18xx: Use define directive for PIN_CONFIG_GPIO_PIN_INT
Nathan Chancellor [Thu, 1 Nov 2018 15:00:08 +0000 (08:00 -0700)]
pinctrl: lpc18xx: Use define directive for PIN_CONFIG_GPIO_PIN_INT

Clang warns when one enumerated type is implicitly converted to another:

drivers/pinctrl/pinctrl-lpc18xx.c:643:29: warning: implicit conversion
from enumeration type 'enum lpc18xx_pin_config_param' to different
enumeration type 'enum pin_config_param' [-Wenum-conversion]
        {"nxp,gpio-pin-interrupt", PIN_CONFIG_GPIO_PIN_INT, 0},
        ~                          ^~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/pinctrl-lpc18xx.c:648:12: warning: implicit conversion
from enumeration type 'enum lpc18xx_pin_config_param' to different
enumeration type 'enum pin_config_param' [-Wenum-conversion]
        PCONFDUMP(PIN_CONFIG_GPIO_PIN_INT, "gpio pin int", NULL, true),
        ~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
./include/linux/pinctrl/pinconf-generic.h:163:11: note: expanded from
macro 'PCONFDUMP'
        .param = a, .display = b, .format = c, .has_arg = d     \
                 ^
2 warnings generated.

It is expected that pinctrl drivers can extend pin_config_param because
of the gap between PIN_CONFIG_END and PIN_CONFIG_MAX so this conversion
isn't an issue. Most drivers that take advantage of this define the
PIN_CONFIG variables as constants, rather than enumerated values. Do the
same thing here so that Clang no longer warns.

Link: https://github.com/ClangBuiltLinux/linux/issues/140
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: bcm2835: Use define directive for BCM2835_PINCONF_PARAM_PULL
Nathan Chancellor [Thu, 1 Nov 2018 00:46:54 +0000 (17:46 -0700)]
pinctrl: bcm2835: Use define directive for BCM2835_PINCONF_PARAM_PULL

Clang warns when one enumerated type is implicitly converted to another:

drivers/pinctrl/bcm/pinctrl-bcm2835.c:707:40: warning: implicit
conversion from enumeration type 'enum bcm2835_pinconf_param' to
different enumeration type 'enum pin_config_param' [-Wenum-conversion]
        configs[0] = pinconf_to_config_packed(BCM2835_PINCONF_PARAM_PULL, pull);
                     ~~~~~~~~~~~~~~~~~~~~~~~~ ^~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.

It is expected that pinctrl drivers can extend pin_config_param because
of the gap between PIN_CONFIG_END and PIN_CONFIG_MAX so this conversion
isn't an issue. Most drivers that take advantage of this define the
PIN_CONFIG variables as constants, rather than enumerated values. Do the
same thing here so that Clang no longer warns.

Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: sprd: Use define directive for sprd_pinconf_params values
Nathan Chancellor [Thu, 1 Nov 2018 00:44:10 +0000 (17:44 -0700)]
pinctrl: sprd: Use define directive for sprd_pinconf_params values

Clang warns when one enumerated type is implicitly converted to another:

drivers/pinctrl/sprd/pinctrl-sprd.c:845:19: warning: implicit conversion
from enumeration type 'enum sprd_pinconf_params' to different
enumeration type 'enum pin_config_param' [-Wenum-conversion]
        {"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0},
        ~                ^~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/sprd/pinctrl-sprd.c:846:22: warning: implicit conversion
from enumeration type 'enum sprd_pinconf_params' to different
enumeration type 'enum pin_config_param' [-Wenum-conversion]
        {"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0},
        ~                   ^~~~~~~~~~~~~~~~~~~~~~~~~~

It is expected that pinctrl drivers can extend pin_config_param because
of the gap between PIN_CONFIG_END and PIN_CONFIG_MAX so this conversion
isn't an issue. Most drivers that take advantage of this define the
PIN_CONFIG variables as constants, rather than enumerated values. Do the
same thing here so that Clang no longer warns.

Link: https://github.com/ClangBuiltLinux/linux/issues/138
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: max77620: Use define directive for max77620_pinconf_param values
Nathan Chancellor [Thu, 1 Nov 2018 00:50:21 +0000 (17:50 -0700)]
pinctrl: max77620: Use define directive for max77620_pinconf_param values

Clang warns when one enumerated type is implicitly converted to another:

drivers/pinctrl/pinctrl-max77620.c:56:12: warning: implicit conversion
from enumeration type 'enum max77620_pinconf_param' to different
enumeration type 'enum pin_config_param' [-Wenum-conversion]
                .param = MAX77620_ACTIVE_FPS_SOURCE,
                         ^~~~~~~~~~~~~~~~~~~~~~~~~~

It is expected that pinctrl drivers can extend pin_config_param because
of the gap between PIN_CONFIG_END and PIN_CONFIG_MAX so this conversion
isn't an issue. Most drivers that take advantage of this define the
PIN_CONFIG variables as constants, rather than enumerated values. Do the
same thing here so that Clang no longer warns.

Link: https://github.com/ClangBuiltLinux/linux/issues/139
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: qcom: spmi-gpio: fix gpio-hog related boot issues
Brian Masney [Thu, 1 Nov 2018 00:11:47 +0000 (20:11 -0400)]
pinctrl: qcom: spmi-gpio: fix gpio-hog related boot issues

When attempting to setup up a gpio hog, device probing would repeatedly
fail with -EPROBE_DEFERED errors. It was caused by a circular dependency
between the gpio and pinctrl frameworks. If the gpio-ranges property is
present in device tree, then the gpio framework will handle the gpio pin
registration and eliminate the circular dependency.

See Christian Lamparter's commit a86caa9ba5d7 ("pinctrl: msm: fix
gpio-hog related boot issues") for a detailed commit message that
explains the issue in much more detail. The code comment in this commit
came from Christian's commit.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: mediatek: clean up indentation issues, add missing tab
Colin Ian King [Wed, 31 Oct 2018 18:42:41 +0000 (18:42 +0000)]
pinctrl: mediatek: clean up indentation issues, add missing tab

Trivial fix to clean up indentation issues, add one level of
indentation on two if statements.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: sh-pfc: r8a77470: Add SDHI support
Fabrizio Castro [Tue, 16 Oct 2018 10:33:43 +0000 (11:33 +0100)]
pinctrl: sh-pfc: r8a77470: Add SDHI support

Add SH_PFC_PIN_CFG_IO_VOLTAGE definition for the SDHI pins
capable of switching voltage, also add pin groups and functions
for SDHI0 and SDHI1. Please note that with the RZ/G1C only 1
bit of the POC Control Register is used to control each interface.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agoMAINTAINERS: Remove Laurent Pinchart as Renesas pinctrl maintainer
Laurent Pinchart [Tue, 16 Oct 2018 10:33:39 +0000 (13:33 +0300)]
MAINTAINERS: Remove Laurent Pinchart as Renesas pinctrl maintainer

Geert Uytterhoeven has long taken over and I'm not involved anymore with
the Renesas pinctrl driver. Remove myself from the maintainers list.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: Reduce kernel size for narrow VIN channels
Geert Uytterhoeven [Tue, 16 Oct 2018 07:46:12 +0000 (09:46 +0200)]
pinctrl: sh-pfc: Reduce kernel size for narrow VIN channels

Some VIN channels support less than 24 lanes.  As union vin_data always
consumes space for 24 lanes, this wastes memory.

Hence introduce new smaller unions vin_data12 and vin_data16, to
accommodate VIN channels with only 12 or 16 lanes.

This reduces the static pin controller driver size by 320 bytes for
R-Car V2H, and by 96 bytes for R-Car E2.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
6 years agoMAINTAINERS: Add Renesas RZ/A and RZ/N files to Renesas pinctrl section
Geert Uytterhoeven [Tue, 16 Oct 2018 07:33:16 +0000 (09:33 +0200)]
MAINTAINERS: Add Renesas RZ/A and RZ/N files to Renesas pinctrl section

Add paths for the Renesas RZ/A and RZ/N series pin controller drivers,
as they are not under sh-pfc/, but still maintained with the other
Renesas pin controller drivers.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and functions
Takeshi Kihara [Mon, 15 Oct 2018 09:58:27 +0000 (11:58 +0200)]
pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and functions

This patch adds Audio SSI{0,1,2,3,4,5,6,7,8,9} pins, groups
and functions to the R8A77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[simon: rebase]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and functions
Takeshi Kihara [Mon, 15 Oct 2018 09:58:26 +0000 (11:58 +0200)]
pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and functions

This patch adds AUDIO_CLK{A,B,C}, AUDIO_CLKOUT, AUDIO_CLKOUT{1,2,3}
pins, groups and functions to the R8A77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[simon: rebase]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a77470: Add QSPI1 pin groups
Fabrizio Castro [Mon, 8 Oct 2018 09:30:19 +0000 (10:30 +0100)]
pinctrl: sh-pfc: r8a77470: Add QSPI1 pin groups

Add QSPI1 pin groups and function to the RZ/G1C (a.k.a. R8A77470)
pinctrl driver.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a77470: Add VIN pin groups
Fabrizio Castro [Mon, 8 Oct 2018 09:30:18 +0000 (10:30 +0100)]
pinctrl: sh-pfc: r8a77470: Add VIN pin groups

Add VIN[01] pin groups and functions to the RZ/G1C (a.k.a.
R8A77470) pinctrl driver.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a77470: Add DU1 pin groups
Fabrizio Castro [Mon, 8 Oct 2018 09:30:17 +0000 (10:30 +0100)]
pinctrl: sh-pfc: r8a77470: Add DU1 pin groups

Add DU1 pin groups and function to the RZ/G1C (a.k.a. R8A77470)
pinctrl driver.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: sh-pfc: r8a77470: Add remaining I2C pin groups
Fabrizio Castro [Mon, 8 Oct 2018 09:30:16 +0000 (10:30 +0100)]
pinctrl: sh-pfc: r8a77470: Add remaining I2C pin groups

This patch adds I2C[0123] groups and functions to the RZ/G1C
(a.k.a. R8A77470) pinctrl driver.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
6 years agopinctrl: bcm2835: Use raw spinlock for RT compatibility
Lukas Wunner [Sat, 27 Oct 2018 08:15:33 +0000 (10:15 +0200)]
pinctrl: bcm2835: Use raw spinlock for RT compatibility

The BCM2835 pinctrl driver acquires a spinlock in its ->irq_enable,
->irq_disable and ->irq_set_type callbacks.  Spinlocks become sleeping
locks with CONFIG_PREEMPT_RT_FULL=y, therefore invocation of one of the
callbacks in atomic context may cause a hard lockup if at least two GPIO
pins in the same bank are used as interrupts.  The issue doesn't occur
with just a single interrupt pin per bank because the lock is never
contended.  I'm experiencing such lockups with GPIO 8 and 28 used as
level-triggered interrupts, i.e. with ->irq_disable being invoked on
reception of every IRQ.

The critical section protected by the spinlock is very small (one bitop
and one RMW of an MMIO register), hence converting to a raw spinlock
seems a better trade-off than converting the driver to threaded IRQ
handling (which would increase latency to handle an interrupt).

Cc: Mathias Duckeck <m.duckeck@kunbus.de>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: imx: add imx8qxp driver
A.s. Dong [Tue, 30 Oct 2018 14:10:56 +0000 (14:10 +0000)]
pinctrl: imx: add imx8qxp driver

MX8QXP contains a system controller that is responsible for controlling
the pad setting of the IPs that are present. Communication between the
host processor running an OS and the system controller happens through
a SCU protocol. This patch adds the SCU based MX8QXP pinctrl driver.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: fsl: add scu based pinctrl support
A.s. Dong [Tue, 30 Oct 2018 14:10:51 +0000 (14:10 +0000)]
pinctrl: fsl: add scu based pinctrl support

Some i.MX SoCs (e.g. MX8QXP and MX8QM) contain a system controller
that is responsible for controlling the pad setting of the IPs that
are present. Communication between the host processor running an OS
and the system controller happens through a SCU protocol.

This patch classifies the pad settings into two categories: MMIO and SCU.
For the original MMIO method, no functional changes except organize them
into a few imx_*_mmio() functions. Besides that, we add the SCU based
Pad Mux and Pinconf setting support which are implemented in pinctrl-scu.c.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: pinctrl-at91-pio4: simplify getting .driver_data
Wolfram Sang [Sun, 21 Oct 2018 20:00:31 +0000 (22:00 +0200)]
pinctrl: pinctrl-at91-pio4: simplify getting .driver_data

We should get 'driver_data' from 'struct device' directly. Going via
platform_device is an unneeded step back and forth.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agopinctrl: pinctrl-amd: simplify getting .driver_data
Wolfram Sang [Sun, 21 Oct 2018 20:00:30 +0000 (22:00 +0200)]
pinctrl: pinctrl-amd: simplify getting .driver_data

We should get 'driver_data' from 'struct device' directly. Going via
platform_device is an unneeded step back and forth.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
6 years agoLinux 4.20-rc1
Linus Torvalds [Sun, 4 Nov 2018 23:37:52 +0000 (15:37 -0800)]
Linux 4.20-rc1

6 years agoMerge tag 'tags/upstream-4.20-rc1' of git://git.infradead.org/linux-ubifs
Linus Torvalds [Sun, 4 Nov 2018 22:46:04 +0000 (14:46 -0800)]
Merge tag 'tags/upstream-4.20-rc1' of git://git.infradead.org/linux-ubifs

Pull UBIFS updates from Richard Weinberger:

 - Full filesystem authentication feature, UBIFS is now able to have the
   whole filesystem structure authenticated plus user data encrypted and
   authenticated.

 - Minor cleanups

* tag 'tags/upstream-4.20-rc1' of git://git.infradead.org/linux-ubifs: (26 commits)
  ubifs: Remove unneeded semicolon
  Documentation: ubifs: Add authentication whitepaper
  ubifs: Enable authentication support
  ubifs: Do not update inode size in-place in authenticated mode
  ubifs: Add hashes and HMACs to default filesystem
  ubifs: authentication: Authenticate super block node
  ubifs: Create hash for default LPT
  ubfis: authentication: Authenticate master node
  ubifs: authentication: Authenticate LPT
  ubifs: Authenticate replayed journal
  ubifs: Add auth nodes to garbage collector journal head
  ubifs: Add authentication nodes to journal
  ubifs: authentication: Add hashes to index nodes
  ubifs: Add hashes to the tree node cache
  ubifs: Create functions to embed a HMAC in a node
  ubifs: Add helper functions for authentication support
  ubifs: Add separate functions to init/crc a node
  ubifs: Format changes for authentication support
  ubifs: Store read superblock node
  ubifs: Drop write_node
  ...

6 years agoMerge tag 'nfs-for-4.20-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs
Linus Torvalds [Sun, 4 Nov 2018 16:20:09 +0000 (08:20 -0800)]
Merge tag 'nfs-for-4.20-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs

Pull NFS client bugfixes from Trond Myklebust:
 "Highlights include:

  Bugfix:
   - Fix build issues on architectures that don't provide 64-bit cmpxchg

  Cleanups:
   - Fix a spelling mistake"

* tag 'nfs-for-4.20-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs:
  NFS: fix spelling mistake, EACCESS -> EACCES
  SUNRPC: Use atomic(64)_t for seq_send(64)

6 years agoMerge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 4 Nov 2018 16:15:15 +0000 (08:15 -0800)]
Merge branch 'timers-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull more timer updates from Thomas Gleixner:
 "A set of commits for the new C-SKY architecture timers"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  dt-bindings: timer: gx6605s SOC timer
  clocksource/drivers/c-sky: Add gx6605s SOC system timer
  dt-bindings: timer: C-SKY Multi-processor timer
  clocksource/drivers/c-sky: Add C-SKY SMP timer

6 years agoMerge tag 'ntb-4.20' of git://github.com/jonmason/ntb
Linus Torvalds [Sun, 4 Nov 2018 16:12:44 +0000 (08:12 -0800)]
Merge tag 'ntb-4.20' of git://github.com/jonmason/ntb

Pull NTB updates from Jon Mason:
 "Fairly minor changes and bug fixes:

  NTB IDT thermal changes and hook into hwmon, ntb_netdev clean-up of
  private struct, and a few bug fixes"

* tag 'ntb-4.20' of git://github.com/jonmason/ntb:
  ntb: idt: Alter the driver info comments
  ntb: idt: Discard temperature sensor IRQ handler
  ntb: idt: Add basic hwmon sysfs interface
  ntb: idt: Alter temperature read method
  ntb_netdev: Simplify remove with client device drvdata
  NTB: transport: Try harder to alloc an aligned MW buffer
  ntb: ntb_transport: Mark expected switch fall-throughs
  ntb: idt: Set PCIe bus address to BARLIMITx
  NTB: ntb_hw_idt: replace IS_ERR_OR_NULL with regular NULL checks
  ntb: intel: fix return value for ndev_vec_mask()
  ntb_netdev: fix sleep time mismatch

6 years agoMerge branch 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 4 Nov 2018 01:37:09 +0000 (18:37 -0700)]
Merge branch 'sched-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull scheduler fixes from Ingo Molnar:
 "A memory (under-)allocation fix and a comment fix"

* 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  sched/topology: Fix off by one bug
  sched/rt: Update comment in pick_next_task_rt()

6 years agoMerge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 4 Nov 2018 01:25:17 +0000 (18:25 -0700)]
Merge branch 'x86-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull x86 fixes from Ingo Molnar:
 "A number of fixes and some late updates:

   - make in_compat_syscall() behavior on x86-32 similar to other
     platforms, this touches a number of generic files but is not
     intended to impact non-x86 platforms.

   - objtool fixes

   - PAT preemption fix

   - paravirt fixes/cleanups

   - cpufeatures updates for new instructions

   - earlyprintk quirk

   - make microcode version in sysfs world-readable (it is already
     world-readable in procfs)

   - minor cleanups and fixes"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  compat: Cleanup in_compat_syscall() callers
  x86/compat: Adjust in_compat_syscall() to generic code under !COMPAT
  objtool: Support GCC 9 cold subfunction naming scheme
  x86/numa_emulation: Fix uniform-split numa emulation
  x86/paravirt: Remove unused _paravirt_ident_32
  x86/mm/pat: Disable preemption around __flush_tlb_all()
  x86/paravirt: Remove GPL from pv_ops export
  x86/traps: Use format string with panic() call
  x86: Clean up 'sizeof x' => 'sizeof(x)'
  x86/cpufeatures: Enumerate MOVDIR64B instruction
  x86/cpufeatures: Enumerate MOVDIRI instruction
  x86/earlyprintk: Add a force option for pciserial device
  objtool: Support per-function rodata sections
  x86/microcode: Make revision and processor flags world-readable

6 years agoMerge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 4 Nov 2018 01:13:43 +0000 (18:13 -0700)]
Merge branch 'perf-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull perf updates and fixes from Ingo Molnar:
 "These are almost all tooling updates: 'perf top', 'perf trace' and
  'perf script' fixes and updates, an UAPI header sync with the merge
  window versions, license marker updates, much improved Sparc support
  from David Miller, and a number of fixes"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (66 commits)
  perf intel-pt/bts: Calculate cpumode for synthesized samples
  perf intel-pt: Insert callchain context into synthesized callchains
  perf tools: Don't clone maps from parent when synthesizing forks
  perf top: Start display thread earlier
  tools headers uapi: Update linux/if_link.h header copy
  tools headers uapi: Update linux/netlink.h header copy
  tools headers: Sync the various kvm.h header copies
  tools include uapi: Update linux/mmap.h copy
  perf trace beauty: Use the mmap flags table generated from headers
  perf beauty: Wire up the mmap flags table generator to the Makefile
  perf beauty: Add a generator for MAP_ mmap's flag constants
  tools include uapi: Update asound.h copy
  tools arch uapi: Update asm-generic/unistd.h and arm64 unistd.h copies
  tools include uapi: Update linux/fs.h copy
  perf callchain: Honour the ordering of PERF_CONTEXT_{USER,KERNEL,etc}
  perf cs-etm: Correct CPU mode for samples
  perf unwind: Take pgoff into account when reporting elf to libdwfl
  perf top: Do not use overwrite mode by default
  perf top: Allow disabling the overwrite mode
  perf trace: Beautify mount's first pathname arg
  ...

6 years agoMerge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 4 Nov 2018 01:12:09 +0000 (18:12 -0700)]
Merge branch 'irq-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull irq fixes from Ingo Molnar:
 "An irqchip driver fix and a memory (over-)allocation fix"

* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/irq-mvebu-sei: Fix a NULL vs IS_ERR() bug in probe function
  irq/matrix: Fix memory overallocation

6 years agosched/topology: Fix off by one bug
Peter Zijlstra [Fri, 2 Nov 2018 13:22:25 +0000 (14:22 +0100)]
sched/topology: Fix off by one bug

With the addition of the NUMA identity level, we increased @level by
one and will run off the end of the array in the distance sort loop.

Fixed: 051f3ca02e46 ("sched/topology: Introduce NUMA identity node sched domain")
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
6 years agoMerge branch 'core/urgent' into x86/urgent, to pick up objtool fix
Ingo Molnar [Sat, 3 Nov 2018 22:42:16 +0000 (23:42 +0100)]
Merge branch 'core/urgent' into x86/urgent, to pick up objtool fix

Signed-off-by: Ingo Molnar <mingo@kernel.org>
6 years agoMerge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Linus Torvalds [Sat, 3 Nov 2018 19:13:57 +0000 (12:13 -0700)]
Merge tag 'armsoc-fixes' of git://git./linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A few fixes who have come in near or during the merge window:

   - Removal of a VLA usage in Marvell mpp platform code

   - Enable some IPMI options for ARM64 servers by default, helps
     testing

   - Enable PREEMPT on 32-bit ARMv7 defconfig

   - Minor fix for stm32 DT (removal of an unused DMA property)

   - Bugfix for TI OMAP1-based ams-delta (-EINVAL -> IRQ_NOTCONNECTED)"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: dts: stm32: update HASH1 dmas property on stm32mp157c
  ARM: orion: avoid VLA in orion_mpp_conf
  ARM: defconfig: Update multi_v7 to use PREEMPT
  arm64: defconfig: Enable some IPMI configs
  soc: ti: QMSS: Fix usage of irq_set_affinity_hint
  ARM: OMAP1: ams-delta: Fix impossible .irq < 0

6 years agoMerge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64...
Linus Torvalds [Sat, 3 Nov 2018 17:55:23 +0000 (10:55 -0700)]
Merge tag 'arm64-upstream' of git://git./linux/kernel/git/arm64/linux

Pull more arm64 updates from Catalin Marinas:

 - fix W+X page (mark RO) allocated by the arm64 kprobes code

 - Makefile fix for .i files in out of tree modules

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: kprobe: make page to RO mode when allocate it
  arm64: kdump: fix small typo
  arm64: makefile fix build of .i file in external module case

6 years agoMerge tag 'dma-mapping-4.20-2' of git://git.infradead.org/users/hch/dma-mapping
Linus Torvalds [Sat, 3 Nov 2018 17:53:33 +0000 (10:53 -0700)]
Merge tag 'dma-mapping-4.20-2' of git://git.infradead.org/users/hch/dma-mapping

Pull dma-mapping fix from Christoph Hellwig:
 "Avoid compile warnings on non-default arm64 configs"

* tag 'dma-mapping-4.20-2' of git://git.infradead.org/users/hch/dma-mapping:
  arm64: fix warnings without CONFIG_IOMMU_DMA

6 years agoMerge tag 'kbuild-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy...
Linus Torvalds [Sat, 3 Nov 2018 17:47:33 +0000 (10:47 -0700)]
Merge tag 'kbuild-v4.20-2' of git://git./linux/kernel/git/masahiroy/linux-kbuild

Pull Kbuild updates from Masahiro Yamada:

 - clean-up leftovers in Kconfig files

 - remove stale oldnoconfig and silentoldconfig targets

 - remove unneeded cc-fullversion and cc-name variables

 - improve merge_config script to allow overriding option prefix

* tag 'kbuild-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
  kbuild: remove cc-name variable
  kbuild: replace cc-name test with CONFIG_CC_IS_CLANG
  merge_config.sh: Allow to define config prefix
  kbuild: remove unused cc-fullversion variable
  kconfig: remove silentoldconfig target
  kconfig: remove oldnoconfig target
  powerpc: PCI_MSI needs PCI
  powerpc: remove CONFIG_MCA leftovers
  powerpc: remove CONFIG_PCI_QSPAN
  scsi: aha152x: rename the PCMCIA define

6 years agoMerge tag '4.20-rc1-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6
Linus Torvalds [Sat, 3 Nov 2018 17:45:55 +0000 (10:45 -0700)]
Merge tag '4.20-rc1-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6

Pull cifs fixes and updates from Steve French:
 "Three small fixes (one Kerberos related, one for stable, and another
  fixes an oops in xfstest 377), two helpful debugging improvements,
  three patches for cifs directio and some minor cleanup"

* tag '4.20-rc1-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6:
  cifs: fix signed/unsigned mismatch on aio_read patch
  cifs: don't dereference smb_file_target before null check
  CIFS: Add direct I/O functions to file_operations
  CIFS: Add support for direct I/O write
  CIFS: Add support for direct I/O read
  smb3: missing defines and structs for reparse point handling
  smb3: allow more detailed protocol info on open files for debugging
  smb3: on kerberos mount if server doesn't specify auth type use krb5
  smb3: add trace point for tree connection
  cifs: fix spelling mistake, EACCESS -> EACCES
  cifs: fix return value for cifs_listxattr

6 years agoMerge branch 'work.afs' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Linus Torvalds [Sat, 3 Nov 2018 17:35:52 +0000 (10:35 -0700)]
Merge branch 'work.afs' of git://git./linux/kernel/git/viro/vfs

Pull 9p fix from Al Viro:
 "Regression fix for net/9p handling of iov_iter; broken by braino when
  switching to iov_iter_is_kvec() et.al., spotted and fixed by Marc"

* 'work.afs' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  iov_iter: Fix 9p virtio breakage

6 years agoMerge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Linus Torvalds [Sat, 3 Nov 2018 17:34:03 +0000 (10:34 -0700)]
Merge tag 'scsi-misc' of git://git./linux/kernel/git/jejb/scsi

Pull more SCSI updates from James Bottomley:
 "This is a set of minor small (and safe changes) that didn't make the
  initial pull request plus some bug fixes"

* tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
  scsi: mvsas: Remove set but not used variable 'id'
  scsi: qla2xxx: Remove two arguments from qlafx00_error_entry()
  scsi: qla2xxx: Make sure that qlafx00_ioctl_iosb_entry() initializes 'res'
  scsi: qla2xxx: Remove a set-but-not-used variable
  scsi: qla2xxx: Make qla2x00_sysfs_write_nvram() easier to analyze
  scsi: qla2xxx: Declare local functions 'static'
  scsi: qla2xxx: Improve several kernel-doc headers
  scsi: qla2xxx: Modify fall-through annotations
  scsi: 3w-sas: 3w-9xxx: Use unsigned char for cdb
  scsi: mvsas: Use dma_pool_zalloc
  scsi: target: Don't request modules that aren't even built
  scsi: target: Set response length for REPORT TARGET PORT GROUPS

6 years agoMerge branch 'akpm' (patches from Andrew)
Linus Torvalds [Sat, 3 Nov 2018 17:21:43 +0000 (10:21 -0700)]
Merge branch 'akpm' (patches from Andrew)

Merge more updates from Andrew Morton:

 - more ocfs2 work

 - various leftovers

* emailed patches from Andrew Morton <akpm@linux-foundation.org>:
  memory_hotplug: cond_resched in __remove_pages
  bfs: add sanity check at bfs_fill_super()
  kernel/sysctl.c: remove duplicated include
  kernel/kexec_file.c: remove some duplicated includes
  mm, thp: consolidate THP gfp handling into alloc_hugepage_direct_gfpmask
  ocfs2: fix clusters leak in ocfs2_defrag_extent()
  ocfs2: dlmglue: clean up timestamp handling
  ocfs2: don't put and assigning null to bh allocated outside
  ocfs2: fix a misuse a of brelse after failing ocfs2_check_dir_entry
  ocfs2: don't use iocb when EIOCBQUEUED returns
  ocfs2: without quota support, avoid calling quota recovery
  ocfs2: remove ocfs2_is_o2cb_active()
  mm: thp: relax __GFP_THISNODE for MADV_HUGEPAGE mappings
  include/linux/notifier.h: SRCU: fix ctags
  mm: handle no memcg case in memcg_kmem_charge() properly

6 years agomemory_hotplug: cond_resched in __remove_pages
Michal Hocko [Fri, 2 Nov 2018 22:48:46 +0000 (15:48 -0700)]
memory_hotplug: cond_resched in __remove_pages

We have received a bug report that unbinding a large pmem (>1TB) can
result in a soft lockup:

  NMI watchdog: BUG: soft lockup - CPU#9 stuck for 23s! [ndctl:4365]
  [...]
  Supported: Yes
  CPU: 9 PID: 4365 Comm: ndctl Not tainted 4.12.14-94.40-default #1 SLE12-SP4
  Hardware name: Intel Corporation S2600WFD/S2600WFD, BIOS SE5C620.86B.01.00.0833.051120182255 05/11/2018
  task: ffff9cce7d4410c0 task.stack: ffffbe9eb1bc4000
  RIP: 0010:__put_page+0x62/0x80
  Call Trace:
   devm_memremap_pages_release+0x152/0x260
   release_nodes+0x18d/0x1d0
   device_release_driver_internal+0x160/0x210
   unbind_store+0xb3/0xe0
   kernfs_fop_write+0x102/0x180
   __vfs_write+0x26/0x150
   vfs_write+0xad/0x1a0
   SyS_write+0x42/0x90
   do_syscall_64+0x74/0x150
   entry_SYSCALL_64_after_hwframe+0x3d/0xa2
  RIP: 0033:0x7fd13166b3d0

It has been reported on an older (4.12) kernel but the current upstream
code doesn't cond_resched in the hot remove code at all and the given
range to remove might be really large.  Fix the issue by calling
cond_resched once per memory section.

Link: http://lkml.kernel.org/r/20181031125840.23982-1-mhocko@kernel.org
Signed-off-by: Michal Hocko <mhocko@suse.com>
Acked-by: Johannes Thumshirn <jthumshirn@suse.de>
Cc: Dan Williams <dan.j.williams@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
6 years agobfs: add sanity check at bfs_fill_super()
Tetsuo Handa [Fri, 2 Nov 2018 22:48:42 +0000 (15:48 -0700)]
bfs: add sanity check at bfs_fill_super()

syzbot is reporting too large memory allocation at bfs_fill_super() [1].
Since file system image is corrupted such that bfs_sb->s_start == 0,
bfs_fill_super() is trying to allocate 8MB of continuous memory. Fix
this by adding a sanity check on bfs_sb->s_start, __GFP_NOWARN and
printf().

[1] https://syzkaller.appspot.com/bug?id=16a87c236b951351374a84c8a32f40edbc034e96

Link: http://lkml.kernel.org/r/1525862104-3407-1-git-send-email-penguin-kernel@I-love.SAKURA.ne.jp
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Reported-by: syzbot <syzbot+71c6b5d68e91149fc8a4@syzkaller.appspotmail.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Tigran Aivazian <aivazian.tigran@gmail.com>
Cc: Matthew Wilcox <willy@infradead.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
6 years agokernel/sysctl.c: remove duplicated include
Michael Schupikov [Fri, 2 Nov 2018 22:48:38 +0000 (15:48 -0700)]
kernel/sysctl.c: remove duplicated include

Remove one include of <linux/pipe_fs_i.h>.
No functional changes.

Link: http://lkml.kernel.org/r/20181004134223.17735-1-michael@schupikov.de
Signed-off-by: Michael Schupikov <michael@schupikov.de>
Reviewed-by: Richard Weinberger <richard@nod.at>
Acked-by: Luis Chamberlain <mcgrof@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
6 years agokernel/kexec_file.c: remove some duplicated includes
zhong jiang [Fri, 2 Nov 2018 22:48:35 +0000 (15:48 -0700)]
kernel/kexec_file.c: remove some duplicated includes

We include kexec.h and slab.h twice in kexec_file.c. It's unnecessary.
hence just remove them.

Link: http://lkml.kernel.org/r/1537498098-19171-1-git-send-email-zhongjiang@huawei.com
Signed-off-by: zhong jiang <zhongjiang@huawei.com>
Reviewed-by: Bhupesh Sharma <bhsharma@redhat.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Acked-by: Baoquan He <bhe@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
6 years agomm, thp: consolidate THP gfp handling into alloc_hugepage_direct_gfpmask
Michal Hocko [Fri, 2 Nov 2018 22:48:31 +0000 (15:48 -0700)]
mm, thp: consolidate THP gfp handling into alloc_hugepage_direct_gfpmask

THP allocation mode is quite complex and it depends on the defrag mode.
This complexity is hidden in alloc_hugepage_direct_gfpmask from a large
part currently. The NUMA special casing (namely __GFP_THISNODE) is
however independent and placed in alloc_pages_vma currently. This both
adds an unnecessary branch to all vma based page allocation requests and
it makes the code more complex unnecessarily as well. Not to mention
that e.g. shmem THP used to do the node reclaiming unconditionally
regardless of the defrag mode until recently. This was not only
unexpected behavior but it was also hardly a good default behavior and I
strongly suspect it was just a side effect of the code sharing more than
a deliberate decision which suggests that such a layering is wrong.

Get rid of the thp special casing from alloc_pages_vma and move the
logic to alloc_hugepage_direct_gfpmask. __GFP_THISNODE is applied to the
resulting gfp mask only when the direct reclaim is not requested and
when there is no explicit numa binding to preserve the current logic.

Please note that there's also a slight difference wrt MPOL_BIND now. The
previous code would avoid using __GFP_THISNODE if the local node was
outside of policy_nodemask(). After this patch __GFP_THISNODE is avoided
for all MPOL_BIND policies. So there's a difference that if local node
is actually allowed by the bind policy's nodemask, previously
__GFP_THISNODE would be added, but now it won't be. From the behavior
POV this is still correct because the policy nodemask is used.

Link: http://lkml.kernel.org/r/20180925120326.24392-3-mhocko@kernel.org
Signed-off-by: Michal Hocko <mhocko@suse.com>
Acked-by: Vlastimil Babka <vbabka@suse.cz>
Cc: Alex Williamson <alex.williamson@redhat.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: David Rientjes <rientjes@google.com>
Cc: "Kirill A. Shutemov" <kirill@shutemov.name>
Cc: Mel Gorman <mgorman@techsingularity.net>
Cc: Stefan Priebe - Profihost AG <s.priebe@profihost.ag>
Cc: Zi Yan <zi.yan@cs.rutgers.edu>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>