platform/kernel/u-boot.git
2 years agodt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
Aswath Govindraju [Tue, 25 Jan 2022 15:26:38 +0000 (20:56 +0530)]
dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC

There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES
lane mux can select upto 4 different IPs. Define all the possible
functions.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2 years agoboard: ti: j721s2: Add board support for J721S2
David Huang [Tue, 25 Jan 2022 15:26:37 +0000 (20:56 +0530)]
board: ti: j721s2: Add board support for J721S2

Add board support for J721S2 SoC.

Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2 years agosoc: ti: k3-socinfo: Add entry for J721S2 SoC
David Huang [Tue, 25 Jan 2022 15:26:36 +0000 (20:56 +0530)]
soc: ti: k3-socinfo: Add entry for J721S2 SoC

Add support for J721S2 SoC identification.

Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2 years agoram: k3-ddrss: Add support for J721S2 SoC
David Huang [Tue, 25 Jan 2022 15:26:35 +0000 (20:56 +0530)]
ram: k3-ddrss: Add support for J721S2 SoC

Add support for DDR subsystem in J721S2 SoC.

Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2 years agopower: domain: ti: Add support for J721S2 SoC
David Huang [Tue, 25 Jan 2022 15:26:34 +0000 (20:56 +0530)]
power: domain: ti: Add support for J721S2 SoC

Add support for J721S2 SoC.

Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agoclk: clk-k3: Add support for J721S2 SoC
David Huang [Tue, 25 Jan 2022 15:26:33 +0000 (20:56 +0530)]
clk: clk-k3: Add support for J721S2 SoC

Add support for J721S2 SoC.

Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2 years agodrivers: dma: Add support for J721S2
David Huang [Tue, 25 Jan 2022 15:26:32 +0000 (20:56 +0530)]
drivers: dma: Add support for J721S2

Add support for DMA in J721S2 SoC.

Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2 years agoarm: K3: Add basic support for J721S2 SoC definition
David Huang [Tue, 25 Jan 2022 15:26:31 +0000 (20:56 +0530)]
arm: K3: Add basic support for J721S2 SoC definition

Add basic support for J721S2 SoC definition

Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
2 years agoram: k3-ddrss: Add support for configuring MSMC subsystem in case of Multiple DDR...
Aswath Govindraju [Tue, 25 Jan 2022 15:26:30 +0000 (20:56 +0530)]
ram: k3-ddrss: Add support for configuring MSMC subsystem in case of Multiple DDR subsystems

In Multi DDR subystems with interleaving support, the following needs to
configured,

- interleaving granular size and region
- EMIFs to be enabled
- EMIFs with ecc to be enabled
- EMIF separated or interleaved
- number of cycles of unsuccessful EMIF arbitration to wait before
  arbitrating for a different EMIF port, by default set to 3

Add support for configuring all the above by using a MSMC device

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2 years agoram: k3-ddrss: Add support for multiple instances of DDR subsystems
Aswath Govindraju [Tue, 25 Jan 2022 15:26:29 +0000 (20:56 +0530)]
ram: k3-ddrss: Add support for multiple instances of DDR subsystems

The current driver only supports single instance of DRR subsystem. Add
support for probing multiple instances of DDR subsystem.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2 years agoram: k3-ddrss: lpddr4_structs_if.h: Add a pointer to ddr instance
Aswath Govindraju [Tue, 25 Jan 2022 15:26:28 +0000 (20:56 +0530)]
ram: k3-ddrss: lpddr4_structs_if.h: Add a pointer to ddr instance

Add a pointer to ddr instance int the lpddr4_privatedata_s structure for
supporting mutliple instances of DDR in the drivers.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2 years agoremoteproc: k3_system_controller: Support optional boot_notification channel
Nishanth Menon [Tue, 25 Jan 2022 15:26:27 +0000 (20:56 +0530)]
remoteproc: k3_system_controller: Support optional boot_notification channel

If there is an optional boot notification channel that an SoC uses
separate from the rx path, use the same.

Signed-off-by: Nishanth Menon <nm@ti.com>
2 years agoMerge tag 'u-boot-imx-20220207' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Mon, 7 Feb 2022 17:13:53 +0000 (12:13 -0500)]
Merge tag 'u-boot-imx-20220207' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20211022
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/10887

- imx8 : Toradex Verdin MX8M Plus
 Kontron pitx-imx8m
- imx8ulp: several fixes and improvements
- imx6ull fixes
- switching to binman

2 years agoapalis/colibri_imx6: move setting bootcmd to defconfig
Oleksandr Suvorov [Mon, 7 Feb 2022 12:19:18 +0000 (14:19 +0200)]
apalis/colibri_imx6: move setting bootcmd to defconfig

Move setting the default boot command to the
apalis/colibri_imx6_defconfig. It allows replacing the command
without code modification.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoboard: toradex: add verdin imx8m plus support
Marcel Ziswiler [Mon, 7 Feb 2022 10:54:13 +0000 (11:54 +0100)]
board: toradex: add verdin imx8m plus support

This adds initial support for the Toradex Verdin iMX8M Plus Quad 4GB WB
IT V1.0B module. They are strapped to boot from eFuses which are factory
fused to properly boot from their on-module eMMC. U-Boot supports
booting from the on-module eMMC only, SDP support is disabled for now
due to missing i.MX 8M Plus USB support.

Functionality wise the following is known to be working:
- eMMC, 8-bit and 4-bit MMC/SD card slots
- Ethernet both on-module eQoS and FEC (requires PHY on carrier board)
- GPIOs
- I2C

Boot sequence is:
SPL ---> ATF (TF-A) ---> U-boot proper

ATF, U-boot proper and u-boot.dtb images are packed into a FIT image,
loaded by SPL.

Boot:
U-Boot SPL 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100)
Quad die, dual rank failed, attempting dual die, single rank configuration.
Normal Boot
WDT:   Started watchdog@30280000 with servicing (60s timeout)
Trying to boot from BOOTROM
Find img info 0x&48025a00, size 872
Need continue download 1024
Download 779264, Total size 780424
NOTICE:  BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-5-g835a8f67b
NOTICE:  BL31: Built : 16:52:37, Aug 26 2021

U-Boot 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100)

CPU:   Freescale i.MX8MP[8] rev1.1 at 1200 MHz
Reset cause: POR
DRAM:  8 GiB
Core:  78 devices, 18 uclasses, devicetree: separate
WDT:   Started watchdog@30280000 with servicing (60s timeout)
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Model: Toradex Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT V1.0B, Serial# 06817281
Carrier: Toradex Verdin Development Board V1.1A, Serial# 10807609
Setting variant to wifi
Net:   Hard-coding pdata->enetaddr
eth1: ethernet@30be0000, eth0: ethernet@30bf0000 [PRIME]
Hit any key to stop autoboot:  0
Verdin iMX8MP #

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoMerge tag 'efi-2022-04-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sat, 5 Feb 2022 21:16:38 +0000 (16:16 -0500)]
Merge tag 'efi-2022-04-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc2-2

UEFI

* add unit test for RISCV_EFI_BOOT_PROTOCOL
* disable UEFI for Colibri VF610
* add handle for UART
* fix printing of Unicode strings
* simplify enumeration of block devices

2 years agotools: mkeficapsule: dont use malloc.h
Heinrich Schuchardt [Sat, 5 Feb 2022 19:10:03 +0000 (20:10 +0100)]
tools: mkeficapsule: dont use malloc.h

malloc() functions are declared via stdlib.h. Including  malloc.h can lead
to build errors e.g. on OS-X.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agoefi: Drop unnecessary calls to blk_find_device()
Simon Glass [Sat, 29 Jan 2022 21:58:39 +0000 (14:58 -0700)]
efi: Drop unnecessary calls to blk_find_device()

When we have the block descriptor we can simply access the device. Drop
the unnecessary function call.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2 years agoefi: Use device_get_uclass_id() where appropriate
Simon Glass [Sat, 29 Jan 2022 21:58:38 +0000 (14:58 -0700)]
efi: Use device_get_uclass_id() where appropriate

Use this function rather than following the pointers, since it is there
for this purpose.

Add the uclass name to the debug call at the end of dp_fill() since it is
quite useful.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2 years agoefi: Add debugging to efi_set_bootdev()
Simon Glass [Sat, 29 Jan 2022 21:58:37 +0000 (14:58 -0700)]
efi: Add debugging to efi_set_bootdev()

The operation of this function can be confusing. Add some debugging so
we can see what it is doing and when it is called.

Also drop the preprocessor usage.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: heinrich Schuchardt <xypron.glpk@gmx.de>
2 years agoefi_loader: add handle for UART
Heinrich Schuchardt [Fri, 4 Feb 2022 19:47:09 +0000 (20:47 +0100)]
efi_loader: add handle for UART

When loading an EFI binary via the UART we assign a UART device path to it.
But we lack a handle with that device path.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agoefi_loader: fix text output for Uart() DP nodes
Heinrich Schuchardt [Fri, 4 Feb 2022 15:36:49 +0000 (16:36 +0100)]
efi_loader: fix text output for Uart() DP nodes

The UEFI specification concerning Uart() device path nodes has been
clarified:

Parity and stop bits can either both use keywords or both use
numbers but numbers and keywords should not be mixed.

Let's go for keywords as this is what EDK II does. For illegal
values fall back to numbers.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agoefi_loader: use %zu to print efi_uintn_t in FMP driver
Heinrich Schuchardt [Thu, 3 Feb 2022 19:13:17 +0000 (20:13 +0100)]
efi_loader: use %zu to print efi_uintn_t in FMP driver

For printing an unsigned value we should use %u and not %d.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agoefi_loader: use %zu not %zd to print efi_uintn_t
Heinrich Schuchardt [Thu, 3 Feb 2022 21:21:51 +0000 (22:21 +0100)]
efi_loader: use %zu not %zd to print efi_uintn_t

efi_uintnt_t is an unsigned type. We should avoid showing negative numbers.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agoefi_loader: fix device path to text protocol
Heinrich Schuchardt [Sat, 29 Jan 2022 18:01:07 +0000 (19:01 +0100)]
efi_loader: fix device path to text protocol

The printing of a file path node must properly handle:

* odd length of the device path node
* UTF-16 character only partially contained in device path node
* buffer overflow due to very long file path

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agotest: test UTF-16 truncation in snprintf()
Heinrich Schuchardt [Sat, 29 Jan 2022 17:28:08 +0000 (18:28 +0100)]
test: test UTF-16 truncation in snprintf()

Check that snprintf() returns the correct required buffer length and prints
the correct string for UTF-16 strings.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agolib: fix snprintf() for UTF-16 strings
Heinrich Schuchardt [Sat, 29 Jan 2022 15:43:20 +0000 (16:43 +0100)]
lib: fix snprintf() for UTF-16 strings

snprintf() must return the required buffer length.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agoefi_selftest: merge FDT and RISC-V tests
Heinrich Schuchardt [Sat, 5 Feb 2022 07:45:55 +0000 (08:45 +0100)]
efi_selftest: merge FDT and RISC-V tests

The test for the RISCV_EFI_BOOT_PROTOCOL retrieves the boot hart id via the
protocol and compares it to the value of the boot hart id in the device
tree. The boot hart id is already retrieved from the device tree in the FDT
test.

Merge the two tests to avoid code duplication.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agoefi_selftest: unit test for RISCV_EFI_BOOT_PROTOCOL
Sunil V L [Fri, 28 Jan 2022 15:18:45 +0000 (20:48 +0530)]
efi_selftest: unit test for RISCV_EFI_BOOT_PROTOCOL

Add a test for the RISCV_EFI_BOOT_PROTOCOL.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2 years agoconfigs: disable UEFI for Colibri VF610
Heinrich Schuchardt [Fri, 14 Jan 2022 22:29:09 +0000 (23:29 +0100)]
configs: disable UEFI for Colibri VF610

The size of the board file is limited to 520192 bytes. This conflicts with
the size requirement for the UEFI code.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoARM: imx6: dh-imx6: Add update_sf script to install U-Boot into SF
Marek Vasut [Sun, 28 Nov 2021 02:52:35 +0000 (03:52 +0100)]
ARM: imx6: dh-imx6: Add update_sf script to install U-Boot into SF

Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoboard: kontron: pitx-imx8m: Add Kontron pitx-imx8m board support
Heiko Thiery [Mon, 31 Jan 2022 16:30:45 +0000 (17:30 +0100)]
board: kontron: pitx-imx8m: Add Kontron pitx-imx8m board support

The Kontron pitx-imx8m is an NXP i.MX8MQ based board in the pITX form factor.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2 years agomach-imx: iomux-v3: add a define for the SION bit
Angus Ainslie [Wed, 2 Feb 2022 22:22:00 +0000 (14:22 -0800)]
mach-imx: iomux-v3: add a define for the SION bit

SION (Software Input On Field) - force the select mode input path

Signed-off-by: Angus Ainslie <angus@akkea.ca>
2 years agoarm: dts: imx8mq kernel dts updates
Angus Ainslie [Wed, 2 Feb 2022 15:31:43 +0000 (07:31 -0800)]
arm: dts: imx8mq kernel dts updates

Update to the 5.16 imx8mq dts files and dt bindings

Changes since v1:

Dropped rfkill.h that is not in linux mainline yet.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agomx6: crm_regs: drop BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ
Dario Binacchi [Mon, 31 Jan 2022 07:50:06 +0000 (08:50 +0100)]
mx6: crm_regs: drop BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ

Commit 97c16dc8bf098 ("imx: mx6ull: update the REFTOP_VBGADJ setting")
made this macro unused. Then remove it.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoimx: mx6ull: fix REFTOP_VBGADJ setting
Dario Binacchi [Mon, 31 Jan 2022 07:50:05 +0000 (08:50 +0100)]
imx: mx6ull: fix REFTOP_VBGADJ setting

The previous code wrote the contents of the fuse as is in the
REFTOP_VBGADJ[2:0], but this was wrong if you consider the contents of
the table in the code comment. This table is also different from the
table in the commit description. But then, which of the two is correct?
If it is assumed that an unprogrammed fuse has a value of 0 then for
backward compatibility of the code REFTOP_VBGADJ[2:0] must be set to
6 (b'110). Therefore, the table in the code comment can be considered
correct as well as this patch.

Fixes: 97c16dc8bf098 ("imx: mx6ull: update the REFTOP_VBGADJ setting")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2 years agoconfigs/*imxrt10*: remove [SPL_]CLK_COMPOSITE_CCF
Heiko Thiery [Sun, 30 Jan 2022 06:38:14 +0000 (07:38 +0100)]
configs/*imxrt10*: remove [SPL_]CLK_COMPOSITE_CCF

This option is selected implicitly when [SPL_]CLK_IMXRT10{20|50} is selected.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2 years agoclk: imx: select [SPL_]CLK_COMPOSITE_CCF for imxrt10{20|50}
Heiko Thiery [Sun, 30 Jan 2022 06:38:12 +0000 (07:38 +0100)]
clk: imx: select [SPL_]CLK_COMPOSITE_CCF for imxrt10{20|50}

The clock composite is required when using the clock framework. So
select it automatically.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2 years agoarm64: dts: imx8mm: Add the pcie support
Richard Zhu [Fri, 28 Jan 2022 03:41:04 +0000 (04:41 +0100)]
arm64: dts: imx8mm: Add the pcie support

Add the PCIe support on i.MX8MM platforms.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de> # Pick from Linux 854a4766ac12 ("arm64: dts: imx8mm: Add the pcie support")
2 years agoarm64: dts: imx8mm: Add the pcie phy support
Richard Zhu [Fri, 28 Jan 2022 03:41:03 +0000 (04:41 +0100)]
arm64: dts: imx8mm: Add the pcie phy support

Add the PCIe PHY support on iMX8MM platforms.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de> # Pick from Linux b9ec888f636f ("arm64: dts: imx8mm: Add the pcie phy support")
2 years agodt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy
Richard Zhu [Fri, 28 Jan 2022 03:41:02 +0000 (04:41 +0100)]
dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy

Add binding for reference clock PAD modes of the i.MX8 PCIe PHY.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1638432158-4119-2-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de> # Pick from Linux f6f787874aa5 ("dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy")
2 years agoimx: imx8mn_beacon: Remove redundant code
Adam Ford [Thu, 27 Jan 2022 21:10:01 +0000 (15:10 -0600)]
imx: imx8mn_beacon: Remove redundant code

The function to return the default MMC device for the environment
already has a __weak instance doing exactly the same thing.  Remove
the superfluous one.

Signed-off-by: Adam Ford <aford173@gmail.com>
2 years agoimx: imx8mm_beacon: Remove redundant code
Adam Ford [Thu, 27 Jan 2022 21:10:00 +0000 (15:10 -0600)]
imx: imx8mm_beacon: Remove redundant code

The function to return the default MMC device for the environment
already has a __weak instance doing exactly the same thing.  Remove
the superfluous one.

Signed-off-by: Adam Ford <aford173@gmail.com>
2 years agoimx: imx8qm_rm7720: adjust fdt_addr
Oliver Graute [Wed, 26 Jan 2022 21:56:07 +0000 (22:56 +0100)]
imx: imx8qm_rm7720: adjust fdt_addr

The Linux Kernel Image size for arm64 is still growing.
A Kernel with 54 MB at load address 0x80280000 overlaps
with fdt_addr at 0x83000000. So let's increase it to 0x84000000

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2 years agoimx: imx8qm_rom7720: Increase CONFIG_SYS_BOOTM_LEN to 64MB
Oliver Graute [Wed, 26 Jan 2022 21:55:08 +0000 (22:55 +0100)]
imx: imx8qm_rom7720: Increase CONFIG_SYS_BOOTM_LEN to 64MB

Increase CONFIG_SYS_BOOTM_LEN to 64MB

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2 years agoimx: imx8mn_beacon: Fix USB booting
Adam Ford [Wed, 26 Jan 2022 18:25:23 +0000 (12:25 -0600)]
imx: imx8mn_beacon: Fix USB booting

The i.MX8M Nano can boot over USB using the boot ROM instead of
adding extra code to SPL to support USB drivers, etc.  However,
when booting from USB, the environment doesnt' know where to load
and causes a hang.  Fix this hang by supporting CONFIG_ENV_IS_NOWHERE=y.
It only falls back to this condition when booting from USB, so it
does not impact MMC booting.

Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoarm: dts: add imx8mp-rsb3720-a1 dts file
Ying-Chun Liu (PaulLiu) [Wed, 26 Jan 2022 12:33:02 +0000 (20:33 +0800)]
arm: dts: add imx8mp-rsb3720-a1 dts file

Add board dts for Advantech's imx8mp-rsb3720-a1

Signed-off-by: Darren Huang <darren.huang@advantech.com.tw>
Signed-off-by: Kevin12.Chen <Kevin12.Chen@advantech.com.tw>
Signed-off-by: Phill.Liu <Phill.Liu@advantech.com.tw>
Signed-off-by: Tim Liang <tim.liang@advantech.com.tw>
Signed-off-by: wei.zeng <wei.zeng@advantech.com.cn>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
2 years agoarm64: dts: imx8mm: Add missing MX8MM_IOMUXC_NAND_READY_B_SD3_RESET_B
Marek Vasut [Tue, 25 Jan 2022 02:49:22 +0000 (03:49 +0100)]
arm64: dts: imx8mm: Add missing MX8MM_IOMUXC_NAND_READY_B_SD3_RESET_B

The i.MX8M Mini Application Processor Reference Manual, Rev. 3, 11/2020
documents AF MX8MM_IOMUXC_NAND_READY_B_SD3_RESET_B , add it into the
pinmux tables.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoarm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
Oliver Stäbler [Tue, 25 Jan 2022 02:48:54 +0000 (03:48 +0100)]
arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0

Fix address of the pad control register
(IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2.  This seems
to be a typo but it leads to an exception when pinctrl is applied due to
wrong memory address access.

Signed-off-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")
Fixes: 748f908cc882 ("arm64: add basic DTS for i.MX8MQ")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de> # Picked from Linux 5cfad4f45806f ("arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0")
2 years agoARM: imx: imx8m: Add PLL 1.4 GHz, 1.5 GHz, 1.6 GHz, 1.8 GHz options
Marek Vasut [Tue, 25 Jan 2022 02:48:06 +0000 (03:48 +0100)]
ARM: imx: imx8m: Add PLL 1.4 GHz, 1.5 GHz, 1.6 GHz, 1.8 GHz options

Add PLL 1.4 GHz, 1.5 GHz, 1.6 GHz, 1.8 GHz options for iMX8M SoCs
in case they should be operated faster, e.g. to improve boot time.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2 years agoARM: imx: imx8m: Align PLL 1.2 GHz option with Linux
Marek Vasut [Tue, 25 Jan 2022 02:48:05 +0000 (03:48 +0100)]
ARM: imx: imx8m: Align PLL 1.2 GHz option with Linux

Linux uses slightly different divider settings for the 1.2 GHz PLL
configuration, adjust the coefficients to match Linux.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2 years agoregulator: bd718x7: Bypass bogus warnings
Marek Vasut [Tue, 25 Jan 2022 02:46:52 +0000 (03:46 +0100)]
regulator: bd718x7: Bypass bogus warnings

When regulator consumer attempts to set enabled DVS regulator voltage,
the driver aborts with "Only DVS bucks can be changed when enabled".
In case the regulator is already set to specified voltage, do nothing
instead of failing outright.

When regulator consumer attempts to set enables regulator which cannot
be controlled because it is already always enabled, the driver aborts
with -EINVAL. Again, do nothing in such case and return 0, because the
request is really fulfilled, the regulator is enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
2 years agoimx8m: lock id_swap_bypass bit in tzc380 enable
Andrey Zhizhikin [Mon, 24 Jan 2022 20:48:09 +0000 (21:48 +0100)]
imx8m: lock id_swap_bypass bit in tzc380 enable

According to TRM for i.MX8M Nano and Plus, GPR10 register contains lock
bit for TZASC_ID_SWAP_BYPASS bit. This bit is required to be set in
order to avoid AXI bus errors when GPU is enabled on the platform.
TZASC_ID_SWAP_BYPASS bit is alread set for all imx8m applicable
derivatives, but is missing a lock settings to be applied.

Set the TZASC_ID_SWAP_BYPASS_LOCK bit for those derivatives which have
it implemented.

Since we're here, provide also names to bits from TRM instead of using
BIT() macro in the code.

Fixes: deca6cfbf5d7 ("imx8mn: set BYPASS ID SWAP to avoid AXI bus errors")
Fixes: a07c7181296f ("imx8mp: set BYPASS ID SWAP to avoid AXI bus errors")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Peng Fan <peng.fan@nxp.com>
2 years agoimx: imx8mn_beacon: Enable TrustZone
Adam Ford [Mon, 24 Jan 2022 15:24:17 +0000 (09:24 -0600)]
imx: imx8mn_beacon: Enable TrustZone

When the board was added, enabling tzc380 was left off by
mistake.

Signed-off-by: Adam Ford <aford173@gmail.com>
2 years agoimx: imx8mm_beacon: Enable USB
Adam Ford [Sat, 22 Jan 2022 18:27:34 +0000 (12:27 -0600)]
imx: imx8mm_beacon: Enable USB

With the updated device tree's having USB support, enable in
U-Boot.  This also requires the addition of the imx8m power
domain, since the USB is gated by the power domain controller.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoarm: dts: imx8mm-beacon: Resync dtsi with Kernel 5.17-rc1
Adam Ford [Sat, 22 Jan 2022 18:27:33 +0000 (12:27 -0600)]
arm: dts: imx8mm-beacon: Resync dtsi with Kernel 5.17-rc1

Resync the SOM and baseboar files with the device trees that will
be included in 5.17-RC1 when it's cut.  This will improve pinmuxing
for USDHC1 and add USB functionality.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agosmegw01: Update DDR initialization
Fabio Estevam [Tue, 18 Jan 2022 20:39:50 +0000 (17:39 -0300)]
smegw01: Update DDR initialization

Sync with the latest DDR initialization from Phytec, which
uses version 1.2 of NXP's i.MX7D DRAM Register Programming Aid
spreadsheet.

This updated DDR initialization fixes occasional system freeze.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2 years agoimx8mn-ddr4-evk: generate single bootable image
Andrey Zhizhikin [Mon, 17 Jan 2022 22:04:07 +0000 (23:04 +0100)]
imx8mn-ddr4-evk: generate single bootable image

As suggested in commit 028abfd9b157 ("imx8mm-evk: Generate a single
bootable flash.bin again") for imx8mm_evk, it is possible to produce
single bootable image via binman. This restores the original behavior in
distros, where only one boot container is used to create target image.

Perform similar adaptions in order to provide single bootable image for
imx8mn-ddr4-evk derivate.

Update documentation to drop additional step of copying u-boot.itb

Fixes: 353dfe4b4359 ("imx8mn-ddr4-evk: switch to use binman")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoimx: ventana: correct splashimage load address
Andrey Zhizhikin [Mon, 17 Jan 2022 11:31:46 +0000 (12:31 +0100)]
imx: ventana: correct splashimage load address

Commit 72d81360aabd ("global: Convert CONFIG_LOADADDR to
CONFIG_SYS_LOADADDR") dropped the usage of LOADADDR and replaced it with
SYS_LOADADDR.

Use the correct macro in environment by replacing CONFIG_LOADADDR with
CONFIG_SYS_LOADADDR.

Fixes: d75ebf3482c3 ("imx: ventana: fix splash logo drawing")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-By: Tim Harvey <tharvey@gateworks.com>
2 years agoimx8mq_evk: configs: add/cleanup variables for distro boot
Andrey Zhizhikin [Sun, 16 Jan 2022 21:38:31 +0000 (22:38 +0100)]
imx8mq_evk: configs: add/cleanup variables for distro boot

Add fdt_addr_r fdtfile which used by distro boot, and cleanup legacy
environment variables.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2 years agoarm64: dts: imx8mq-u-boot.dtsi: improve odd blob-ext naming
Patrick Wildt [Thu, 13 Jan 2022 14:22:41 +0000 (15:22 +0100)]
arm64: dts: imx8mq-u-boot.dtsi: improve odd blob-ext naming

Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoarm64: dts: imx8mm-u-boot.dtsi: use dash for node names
Patrick Wildt [Thu, 13 Jan 2022 14:22:17 +0000 (15:22 +0100)]
arm64: dts: imx8mm-u-boot.dtsi: use dash for node names

Some of the nodes were named using a underscore, so rectify this and
consistenly use dashes.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoarm64: dts: imx8mq-u-boot.dtsi: explicitly add spl filename
Patrick Wildt [Thu, 13 Jan 2022 14:21:47 +0000 (15:21 +0100)]
arm64: dts: imx8mq-u-boot.dtsi: explicitly add spl filename

Explicitly add SPL aka u-boot-spl.bin filename.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoarm64: dts: imx8mq-u-boot.dtsi: alphabetically re-order properties
Patrick Wildt [Thu, 13 Jan 2022 14:21:24 +0000 (15:21 +0100)]
arm64: dts: imx8mq-u-boot.dtsi: alphabetically re-order properties

Alphabetically re-order properties.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agodoc: verdin-imx8mm: Remove ATF_LOAD_ADDR export
Fabio Estevam [Wed, 12 Jan 2022 20:49:46 +0000 (17:49 -0300)]
doc: verdin-imx8mm: Remove ATF_LOAD_ADDR export

imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.

Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2 years agodoc: sl-mx8mm: Remove ATF_LOAD_ADDR export
Fabio Estevam [Wed, 12 Jan 2022 20:49:45 +0000 (17:49 -0300)]
doc: sl-mx8mm: Remove ATF_LOAD_ADDR export

imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.

Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2 years agodoc: imx8mm_evk: Remove ATF_LOAD_ADDR export
Fabio Estevam [Wed, 12 Jan 2022 20:49:44 +0000 (17:49 -0300)]
doc: imx8mm_evk: Remove ATF_LOAD_ADDR export

imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.

Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2 years agoimx: imx8mm: imx8mm-kontron-n801x-s: add common board u-boot.dtsi
Heiko Thiery [Wed, 12 Jan 2022 08:57:57 +0000 (09:57 +0100)]
imx: imx8mm: imx8mm-kontron-n801x-s: add common board u-boot.dtsi

When using a board variant that selects the lvds specific dtb the
*.u-boot.dtsi file will not be included. To have a lvds dtb specific
u-boot.dtsi file move this part to a common board u-boot.dtsi file and
include this in the board base u-boot.dtsi and create an additional one
for the lvds variant.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2 years agoimx: imx8mm: imx8mm-kontron-n801x-s: convert options to Kconfig
Heiko Thiery [Wed, 12 Jan 2022 08:57:55 +0000 (09:57 +0100)]
imx: imx8mm: imx8mm-kontron-n801x-s: convert options to Kconfig

CONFIG_SPL_MMC and CONFIG_SPL_SERIAL

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2 years agocmd: bcb: fix bcb struct alignment issue
Gary Bisson [Tue, 11 Jan 2022 17:06:06 +0000 (18:06 +0100)]
cmd: bcb: fix bcb struct alignment issue

Without this patch the bcb struct could be located at an odd address
which resulted in data not being copied to the buffer.

Here was the repro steps (from Mattijs):
=> mmc dev 1
=> bcb load 1 misc
=> bcb dump command
00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
=> part start mmc 1 misc misc_start
=> mmc read ${loadaddr} ${misc_start} 4
=> bcb load 1 misc
=> bcb dump command
00000000: 62 6f 6f 74 6f 6e 63 65 2d 62 6f 6f 74 6c 6f 61
00000010: 64 65 72 00 00 00 00 00 00 00 00 00 00 00 00 00

This behavior was observed on an Amlogic A311D (ARM64) platform with a
recent GCC toolchain (11.2.0) but is most likely affecting other
platforms.

To avoid issues the structure is aligned on DMA minimum alignment value
as it is passed directly to the read function.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on khadas vim3
2 years agoconfigs: imx8mm-cl-iot-gate: update dfu_alt_info for single flash.bin
Ying-Chun Liu (PaulLiu) [Tue, 11 Jan 2022 16:38:04 +0000 (00:38 +0800)]
configs: imx8mm-cl-iot-gate: update dfu_alt_info for single flash.bin

We changed to single flash.bin now. So dfu_alt_info should be modified
to reflect this change.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agocmd_nandbcb: Support secondary boot address of imx8mn
Michael Trimarchi [Fri, 7 Jan 2022 17:27:17 +0000 (18:27 +0100)]
cmd_nandbcb: Support secondary boot address of imx8mn

Add support of secondary boot address for imx8mn. The secondary
boot address is hardcoded in the fuse. The value is calculated
from there according to the following description:

The fuse IMG_CNTN_SET1_OFFSET (0x490[22:19]) is defined as follows:
- Secondary boot is disabled if fuse value is bigger than 10, n = fuse
  value bigger than 10.
- n == 0: Offset = 4MB
- n == 2: Offset = 1MB
- Others & n <= 10 : Offset = 1MB*2^n
- For FlexSPI boot, the valid values are: 0, 1, 2, 3, 4, 5, 6, and 7.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2 years agoimx: Enable ACTLR.SMP in SPL for i.MX6/7
Sven Schwermer [Sun, 2 Jan 2022 19:36:56 +0000 (20:36 +0100)]
imx: Enable ACTLR.SMP in SPL for i.MX6/7

Similar to what has been done before with c5437e5b for u-boot proper, we
enable the SMP bit for SPL as well. This is necessary when SDP booting
straight into Linux, i.e. falcon boot. When SDP boot mode is active, the
ROM code does not set this bit which makes the caches not work once
activated in Linux.

On an i.MX6ULL (528MHz), this reduces a minimal kernel's boot time into
an initramfs shell from ~6.1s down to ~1.2s.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoMakefile: imx: Do not call arch/arm/mach-imx flash.bin generation if BINMAN enabled
Marek Vasut [Sat, 1 Jan 2022 18:50:39 +0000 (19:50 +0100)]
Makefile: imx: Do not call arch/arm/mach-imx flash.bin generation if BINMAN enabled

Skip running arch/arm/mach-imx flash.bin generation in case BINMAN is
enabled, otherwise the target in arch/arm/mach-imx/Makefile regenerates
the flash.bin again and produces corrupted result.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoARM: dts: imx: Synchronize iMX6QDL DHCOM PDK2 DTs with Linux 5.15.12
Marek Vasut [Thu, 30 Dec 2021 23:58:08 +0000 (00:58 +0100)]
ARM: dts: imx: Synchronize iMX6QDL DHCOM PDK2 DTs with Linux 5.15.12

Synchronize DH DHCOM DTs with Linux commit 25960cafa06e ("Linux 5.15.12").
There is no functional change to the resulting DTs. The imx6qdl-dhcom-pdk2.dtsi
had to be adjusted with additional headers, gpio.h, pwm.h, input.h, else
the DT cannot be compiled, the same change is likely necessary in Linux.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoARM: dts: imx: Add labels to remaining anatop regulators
Marek Vasut [Thu, 30 Dec 2021 23:58:07 +0000 (00:58 +0100)]
ARM: dts: imx: Add labels to remaining anatop regulators

Add labels to remaining anatop regulators, so their supplies can be
assigned in board DTs. This is similar to Linux kernel commit
93385546ba369 ("ARM: dts: imx6qdl-sabresd: Assign corresponding power supply for LDOs")
except it does not contain the unrelated sabresd changes.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoarm: dts: Enable support for USB on XEA (imx28) board
Lukasz Majewski [Mon, 27 Dec 2021 10:46:41 +0000 (11:46 +0100)]
arm: dts: Enable support for USB on XEA (imx28) board

This change enables the support for USB with DM on the XEA (imx28)
board.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2 years agoarm: xea: config: Provide special defconfig for a single binary u-boot
Lukasz Majewski [Mon, 27 Dec 2021 10:46:40 +0000 (11:46 +0100)]
arm: xea: config: Provide special defconfig for a single binary u-boot

The new configs/imx28_xea_sb_defconfig is introduced to facilitate
building the single binary u-boot.sb fox XEA board.

The biggest distinction from "normal" XEA imx28_xea_sb_defconfig is
support for USB mass storage devices (pen drives).

To achieve that, the CONFIG_DM_USB is enabled and supported.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2 years agoxea: dts: Update the SPI-NOR flash memory partitions description
Lukasz Majewski [Mon, 27 Dec 2021 10:46:38 +0000 (11:46 +0100)]
xea: dts: Update the SPI-NOR flash memory partitions description

Now the dts information corresponds to the one available in the kernel.
With this patch applied the 'mtd list' shows proper names and
offsets for MTD partitions.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2 years agoarm: xea: Modify board code to generate single binary u-boot
Lukasz Majewski [Mon, 27 Dec 2021 10:38:21 +0000 (11:38 +0100)]
arm: xea: Modify board code to generate single binary u-boot

This change provides the possibility to build XEA (imx287 based) board
U-Boot as a single binary (without support for CONFIG_SPL_FRAMEWORK).

The generated u-boot.sb can be used in the factory environment to for
example perform initial setup or HW testing.

It can be used with 'uuu' utility
(SDPS: boot -f /srv/tftp/xea/u-boot.sb)

In the configs/imx28_xea_defconfig one needs to disable following configs:
# CONFIG_SPL_BLK is not set
# CONFIG_SPL_FRAMEWORK is not set

The board_init_ll() is used in arch/arm/cpu/arm926ejs/mxs/start.S, which
is utilized when CONFIG_SPL_FRAMEWORK is disabled.

However, when it is enabled - the arch/arm/cpu/arm926ejs/start.S is used,
which requires the lowlevel_init() function.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2 years agospl: Provide more space to be used for storing SPL on imx28 OCRAM
Lukasz Majewski [Fri, 17 Dec 2021 15:41:25 +0000 (16:41 +0100)]
spl: Provide more space to be used for storing SPL on imx28 OCRAM

With the current configuration provided in mxsimage{-spl}.mx28.cfg the
size of SPL binary has been constrained to 32 KiB, due to "LOAD IVT"
command with 0x8000 offset.

The problem was that, the imx28 ROM takes the u-boot.sb and then
extracts from it the IVT header and places it on the 0x8000 OCRAM offset
overwriting any valid (i.e. loaded from eMMC or SPI-NOR) SPL code. This
bug was unnoticed as the overwrite size was just 32 bytes, so the
probability that some important code is altered was low.

However, in the XEA board (where the SPL size is ~39KiB), the overwritten
data was `(struct dm_spi_ops *) 0x800c <mxs_spi_ops>`, which is used
during the boot process.

As a result the SPL execution code hanged with "undefined instruction"
abort as callbacks (with wrong addresses) from it were called.

The fix is to change the OCRAM's offset where IVT is loaded to 0xE000,
so the SPL can grow up to ~57KiB (the maximal size of OCRAM memory
available is 0xE3FC).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2 years agoARM: dts: imx6ull: Use the correct name for ESAI_TX0
Fabio Estevam [Fri, 17 Dec 2021 11:09:19 +0000 (08:09 -0300)]
ARM: dts: imx6ull: Use the correct name for ESAI_TX0

According to the i.MX6ULL Reference Manual, pad CSI_DATA07 may
have the ESAI_TX0 functionality, not ESAI_T0.

Also, NXP's i.MX Config Tools 10.0 generates dtsi with the
MX6ULL_PAD_CSI_DATA07__ESAI_TX0 naming, so fix it accordingly.

There are no devicetree users in mainline that use the old name,
so just remove the old entry.

Fixes: f8ca22b8de32 ("arm: dts: imx6ull: add pinctrl defines")
Reported-by: George Makarov <georgemakarov1@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2 years agomx6: Use imx6_src_get_boot_mode() to check boot device
Harald Seiler [Wed, 1 Dec 2021 09:11:47 +0000 (10:11 +0100)]
mx6: Use imx6_src_get_boot_mode() to check boot device

Use imx6_src_get_boot_mode() instead of manually reading SBMR1.  The
existing function has proper handling for software overrides of the
bootdevice which can happen, for example, when booting from an alternate
source using `bmode`.

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoARM: dts: imx6q-dhcom: Use 1G ethernet on the PDK2 board
Christoph Niedermaier [Sun, 28 Nov 2021 02:53:18 +0000 (03:53 +0100)]
ARM: dts: imx6q-dhcom: Use 1G ethernet on the PDK2 board

The PDK2 board is capable of running both 100M and 1G ethernet. However,
the i.MX6 has only one ethernet MAC, so it is possible to configure
either 100M or 1G Ethernet. In case of 100M option, the PHY is on the
SoM and the signals are routed to a RJ45 port. For 1G the PHY is on
the PDK2 board with another RJ45 port. 100M and 1G ethernet use
different signal pins from the i.MX6, but share the MDIO bus.

This SoM board combination is used to demonstrate how to enable 1G
ethernet configuration.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
2 years agotools/mxsimage: Remove fclose on empty FILE pointer
Mattias Hansson [Wed, 24 Nov 2021 12:10:49 +0000 (13:10 +0100)]
tools/mxsimage: Remove fclose on empty FILE pointer

If `sb_load_cmdfile()` fails to open the configuration file it will jump
to error handling where the code will try to `fclose()` the FILE pointer
which is NULL causing `mkimage` to segfault.

This patch removes the label for error handling and instead returns
immediately which skips the `fclose()` and prevents the segfault. The
errno is also described in the error message to guide users.

Signed-off-by: Mattias Hansson <hansson.mattias@gmail.com>
Reviewed-by: Wolfgang Denk <wd@denx.de>
2 years agoimx8mn_var_som: Add support for Variscite VAR-SOM-MX8M-NANO board
Ariel D'Alessandro [Tue, 23 Nov 2021 16:33:30 +0000 (13:33 -0300)]
imx8mn_var_som: Add support for Variscite VAR-SOM-MX8M-NANO board

Add support for iMX8MN VAR-SOM-MX8M-NANO board. Enables support for:

- 1GiB DDR4 RAM
- 16 GiB eMMC
- SD card
- Gigabit ethernet
- USBOTG1 peripheral - fastboot

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agocolibri-imx8x: add on-module gpio expander fxl6408
Oleksandr Suvorov [Sun, 21 Nov 2021 16:05:17 +0000 (18:05 +0200)]
colibri-imx8x: add on-module gpio expander fxl6408

The FXL6408 GPIO expander manages critical devices,
including on-module USB hub. Configure the expander to
switch the USB hub into bypass mode, allowing to use
on-carrier-board USB hub.

Signed-off-by: Oleksandr Suvorov <cryosay@gmail.com>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2 years agoGPIO: fxl6408: Add support for FXL6408 GPIO expander
Oleksandr Suvorov [Sun, 21 Nov 2021 16:05:16 +0000 (18:05 +0200)]
GPIO: fxl6408: Add support for FXL6408 GPIO expander

Initial support for Fairchild's 8 bit I2C gpio expander FXL6408.
The CONFIG_FXL6408_GPIO define enables support for such devices.

Based on: https://patchwork.kernel.org/patch/9148419/

Signed-off-by: Oleksandr Suvorov <cryosay@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2 years agoimx8mm-cl-iot-gate-optee: add CONFIG_SPL_MMC and CONFIG_SPL_SERIAL
Ying-Chun Liu (PaulLiu) [Mon, 15 Nov 2021 09:44:07 +0000 (17:44 +0800)]
imx8mm-cl-iot-gate-optee: add CONFIG_SPL_MMC and CONFIG_SPL_SERIAL

Previously these two options are called CONFIG_SPL_MMC_SUPPORT
and CONFIG_SPL_SERIAL_SUPPORT. During the transition they are
removed by accident. Thus adding them back.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agospi: mxc_spi: remove redundant code in spi_xchg_single()
Haolin Li [Sat, 6 Nov 2021 10:03:34 +0000 (03:03 -0700)]
spi: mxc_spi: remove redundant code in spi_xchg_single()

The value of cnt is overwritten without being used.

Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoarm: imx8m: imx8mm-cl-iot-gate: detect extension board
Ying-Chun Liu (PaulLiu) [Fri, 5 Nov 2021 09:13:25 +0000 (17:13 +0800)]
arm: imx8m: imx8mm-cl-iot-gate: detect extension board

Extension boards can be added to Compulab's iot-gate-imx8mm.
We implement extension board manager for detecting the extension
boards.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
2 years agoarm: dts: imx8mm-cl-iot-gate: add Compulab's ied overlays
Ying-Chun Liu (PaulLiu) [Fri, 5 Nov 2021 09:13:24 +0000 (17:13 +0800)]
arm: dts: imx8mm-cl-iot-gate: add Compulab's ied overlays

add the following overlays:
 - IED extension board
 - CAN/TPM/ADC extension board on IED board.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
2 years agoimx8ulp: ddr: Fix DDR frequency request issue
Ye Li [Fri, 29 Oct 2021 01:46:34 +0000 (09:46 +0800)]
imx8ulp: ddr: Fix DDR frequency request issue

After acking the requested frequency, should wait the ack bit clear
by DDR controller and check the DFS interrupt for next request polling.
Otherwise, the next polling of request bit will get previous value
that DDR controller have not cleared it, so a wrong request frequency
is used.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx8ulp:ddr: saving the dram config timing data into sram
Jacky Bai [Fri, 29 Oct 2021 01:46:33 +0000 (09:46 +0800)]
imx8ulp:ddr: saving the dram config timing data into sram

On i.MX8ULP, The dram config timing need to be saved into sram for
ddr retention when APD enter PD mode, so add this support on i.MX8ULP.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx8ulp: implement to obtain the SoC current temperature
Alice Guo [Fri, 29 Oct 2021 01:46:32 +0000 (09:46 +0800)]
imx8ulp: implement to obtain the SoC current temperature

Obatin the SoC current temperature in print_cpuinfo().

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx8ulp: clock: Handle the DDRLOCKED when setting DDR clock
Ye Li [Fri, 29 Oct 2021 01:46:30 +0000 (09:46 +0800)]
imx8ulp: clock: Handle the DDRLOCKED when setting DDR clock

The DDRLOCKED bit in CGC2 DDRCLK will auto lock up and down by HW
according to DDR DIV updating or DDR CLK halt status change. So DDR
PCC disable/enable will trigger the lock up/down flow. We
need wait until unlock to ensure clock is ready.

And before configuring the DDRCLK DIV, we need polling the DDRLOCKED
until it is unlocked. Otherwise writing ti DIV bits will not set.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx8ulp: clock: Support to enable/disable the ADC1 clock
Alice Guo [Fri, 29 Oct 2021 01:46:29 +0000 (09:46 +0800)]
imx8ulp: clock: Support to enable/disable the ADC1 clock

This patch implements enable_adc1_clk() to enable or disable the ADC1
clock on i.MX8ULP.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx8ulp: Update ethernet mac to get from fuse
Ye Li [Fri, 29 Oct 2021 01:46:28 +0000 (09:46 +0800)]
imx8ulp: Update ethernet mac to get from fuse

Get the MAC address from fuse bank5 word 3 and 4. It has
MSB first at lowest address, so have a reverse order with other
iMX used in mac.c

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx8ulp: clock: Support to reset DCNano and MIPI DSI
Ye Li [Fri, 29 Oct 2021 01:46:27 +0000 (09:46 +0800)]
imx8ulp: clock: Support to reset DCNano and MIPI DSI

When LPAV is allocated to RTD, the LPAV won't be reset. So we have to
reset DCNano and MIPI DSI in u-boot before enabling the drivers

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx8ulp: clock: Reset DDR controller before clock enable
Ye Li [Fri, 29 Oct 2021 01:46:26 +0000 (09:46 +0800)]
imx8ulp: clock: Reset DDR controller before clock enable

The LPAV is not allocated to APD when dual boot, so LPAV won't
reset when APD is reset. We have to explicitly reset the DDR,
otherwise its initialization will fail.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>