platform/upstream/llvm.git
2 years ago[SelectionDAG][RISCV] Make RegsForValue::getCopyToRegs explicitly zero_extend constants.
Craig Topper [Sat, 19 Mar 2022 01:33:30 +0000 (18:33 -0700)]
[SelectionDAG][RISCV] Make RegsForValue::getCopyToRegs explicitly zero_extend constants.

ComputePHILiveOutRegInfo assumes that constant incoming values to
Phis will be zero extended if they aren't a legal type. To guarantee
that we should zero_extend rather than any_extend constants.

This fixes a bug for RISCV where any_extend of constants can be
treated as a sign_extend.

Differential Revision: https://reviews.llvm.org/D122053

2 years ago[RISCV] Add test case for miscompile caused by treating ANY_EXTEND of constants as...
Craig Topper [Sat, 19 Mar 2022 01:32:23 +0000 (18:32 -0700)]
[RISCV] Add test case for miscompile caused by treating ANY_EXTEND of constants as SIGN_EXTEND.

The code that inserts AssertZExt based on predecessor information assumes
constants are zero extended for phi incoming values this allows
AssertZExt to be created in blocks consuming a Phi.
SelectionDAG::getNode treats any_extend of i32 constants as sext for RISCV.
The code that creates phi incoming values in the predecessors creates an
any_extend for the constants which then gets treated as a sext by getNode.
This makes the AssertZExt incorrect and can cause zexts to be
incorrectly removed.

This bug was introduced by D105918

Differential Revision: https://reviews.llvm.org/D122052

2 years ago[slp,tests] Consolidate two test files into one
Philip Reames [Sun, 20 Mar 2022 01:23:03 +0000 (18:23 -0700)]
[slp,tests] Consolidate two test files into one

There are some slight changes to the test lines due to different cost threshold choices in the two command lines, but I don't believe these to be interesting the purpose of the tests.

2 years ago[bazel][mlir] Add MLIR PDLL LSP server target
Jacques Pienaar [Sun, 20 Mar 2022 00:53:37 +0000 (17:53 -0700)]
[bazel][mlir] Add MLIR PDLL LSP server target

Add targets for PDLL LSP server.

2 years ago[tests, SLP] Add coverage for missing dependencies for stacksave intrinsics
Philip Reames [Sun, 20 Mar 2022 01:03:57 +0000 (18:03 -0700)]
[tests, SLP] Add coverage for missing dependencies for stacksave intrinsics

The existing scheduling doesn't account for the scheduling restrictions implied by inalloca allocas combined with stacksave/stackrestore.  This adds coverage including one currently miscompiling case.

2 years agoRevert "[amdgpu][nfc] Pass function instead of module to allocateModuleLDSGlobal"
Jon Chesterfield [Sun, 20 Mar 2022 00:57:20 +0000 (00:57 +0000)]
Revert "[amdgpu][nfc] Pass function instead of module to allocateModuleLDSGlobal"
Reconsidered, better to handle per-function state in the constructor as before.
This reverts commit 98e474c1b3210d90e313457bf6a6e39a7edb4d2b.

2 years agomlir: set CMAKE_INCLUDE_CURRENT_DIR to fix out-of-tree builds
Will Dietz [Sat, 19 Mar 2022 21:53:59 +0000 (16:53 -0500)]
mlir: set CMAKE_INCLUDE_CURRENT_DIR to fix out-of-tree builds

This option tells CMake to add current source and binary
directories to the include path for each directory[1].

Required include directories from build tree (for generated
files) were previously added in `mlir_tablegen` but this was
changed in 03078ec20b12605fd4dfd9fe9c98a26c9d2286d7 .

These are still needed, however, for out-of-tree builds
that don't build as part of LLVM (via LLVM_ENABLE_PROJECTS).
Building as part of LLVM works regardless, AFAICT,
because LLVM sets this option and so the MLIR build inherits it.

FWIW, various other (in-tree) LLVM projects set this as well.

And of course this fixes the out-of-tree
mlir-by-itself build scenario I'm using.

[1] https://cmake.org/cmake/help/latest/variable/CMAKE_INCLUDE_CURRENT_DIR.html

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D122088

2 years ago[mlir:PDLL][NFC] Remove a dead comment about constant params
River Riddle [Sat, 19 Mar 2022 20:38:27 +0000 (13:38 -0700)]
[mlir:PDLL][NFC] Remove a dead comment about constant params

These were removed, and the FIXME is no longer relevant.

2 years ago[SLP] Respect control dependence within a block during scheduling
Philip Reames [Fri, 18 Mar 2022 22:25:10 +0000 (15:25 -0700)]
[SLP] Respect control dependence within a block during scheduling

This fixes an active miscompile visible in the test changes.  The basic problem is that the scheduling dependency graph didn't have any edges for control dependence within a single basic block.  The result is that we could (and in some rare cases *did*) perform reorderings within a block which could introduce new undefined behavior along paths which didn't previously contain any.

Impact wise, we have two major cases where control is not guaranteed to reach a later instruction in the block: may throw calls, and calls containing infinite loops.
* The former case was mostly covered by the memory dependencies, and to trigger require a function which can throw, but not write to memory.  In theory, such a case is possible, but not likely in practice.
* The later case is likely more of an issue in practice.  After this code was first written, we changed the IR semantics to allow well defined infinite loops without satisifying mustprogress.  Even for C/C++ - which do imply mustprogress - recent changes to how we treat atomics (e.g. an atomic read does not always imply a write) could expose this issue.  I'm a bit shocked we don't seem to have a bug report which hit this in real code actually.

Compile time wise, this results in a single extra scan of the scheduling window in the common case.  Since we stop scanning at the next instruction which isn't guaranteed to execute, no matter what order we traverse instructions in, we scan the block once.  The exception to this is that when we extend the scheduling window downwards, we invalidate all dependencies, and thus rescan.  So the potentially expensive case is when we a call in a big schedule window which is frequently extended.  We could optimize this case (by caching the last instruction not guaranteeed to transfer execution and scanning only the extended window) and starting there), but I decided to leave the complexity until it mattered.  That same case is already degenerate with memory dependences which is more expensive than the control dependence scan.

We could also consider combining the memory dependence and control dependence sets to reduce memory usage, but since it complicates the code slightly and makes debugging a bit harder, I went with the simplest scheme for now.

This was noticed while trying to understand the failures reported against D118538, but is not otherwise related to that change.

2 years ago[libSupport] make CallBacksToRun static local
Tal Kedar [Sat, 19 Mar 2022 19:08:02 +0000 (19:08 +0000)]
[libSupport] make CallBacksToRun static local

In order to allow compiling with -Werror=global-constructors with c++20 and above.

Discussion: https://discourse.llvm.org/t/llvm-lib-support-signals-cpp-fails-to-compile-due-to-werror-global-constructors/61070

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D122067

2 years ago[mlir:PDL] Remove the ConstantParams support from native Constraints/Rewrites
River Riddle [Mon, 14 Mar 2022 05:09:20 +0000 (22:09 -0700)]
[mlir:PDL] Remove the ConstantParams support from native Constraints/Rewrites

This support has never really worked well, and is incredibly clunky to
use (it effectively creates two argument APIs), and clunky to generate (it isn't
clear how we should actually expose this from PDL frontends). Treating these
as just attribute arguments is much much cleaner in every aspect of the stack.
If we need to optimize lots of constant parameters, it would be better to
investigate internal representation optimizations (e.g. batch attribute creation),
that do not affect the user (we want a clean external API).

Differential Revision: https://reviews.llvm.org/D121569

2 years ago[mlir][PDLL] Add signature help to the PDLL language server
River Riddle [Fri, 11 Mar 2022 08:38:17 +0000 (00:38 -0800)]
[mlir][PDLL] Add signature help to the PDLL language server

This commit adds signature support to the language server,
and initially supports providing help for: operation operands and results,
and constraint/rewrite calls.

Differential Revision: https://reviews.llvm.org/D121545

2 years ago[mlir][PDLL] Add code completion to the PDLL language server
River Riddle [Fri, 11 Mar 2022 08:32:49 +0000 (00:32 -0800)]
[mlir][PDLL] Add code completion to the PDLL language server

This commit adds code completion support to the language server,
and initially supports providing completions for: Member access,
attributes/constraint/dialect/operation names, and pattern metadata.

Differential Revision: https://reviews.llvm.org/D121544

2 years ago[mlir][PDLL] Add symbol support to the PDLL language server
River Riddle [Fri, 11 Mar 2022 08:23:39 +0000 (00:23 -0800)]
[mlir][PDLL] Add symbol support to the PDLL language server

This adds support for documenting the top-level "symbols",
e.g. patterns, constraints, rewrites, etc., within a PDLL file.

Differential Revision: https://reviews.llvm.org/D121543

2 years ago[mlir][PDLL] Add hover support to the PDLL language server
River Riddle [Fri, 11 Mar 2022 08:18:44 +0000 (00:18 -0800)]
[mlir][PDLL] Add hover support to the PDLL language server

This adds support for providing information when hovering over
operation names, variables, patters, constraints, and rewrites.

Differential Revision: https://reviews.llvm.org/D121542

2 years ago[mlir][PDLL] Add an initial language server for PDLL
River Riddle [Fri, 11 Mar 2022 07:44:53 +0000 (23:44 -0800)]
[mlir][PDLL] Add an initial language server for PDLL

This commits adds a basic language server for PDLL to enable providing
language features in IDEs such as VSCode. This initial commit only
adds support for tracking definitions, references, and diagnostics, but
followup commits will build upon this to provide more significant behavior.

In addition to the server, this commit also updates mlir-vscode to support
the PDLL language and invoke the server.

Differential Revision: https://reviews.llvm.org/D121541

2 years ago[LV] Remove unnecessary uses of Loop* (NFC).
Florian Hahn [Sat, 19 Mar 2022 20:18:47 +0000 (20:18 +0000)]
[LV] Remove unnecessary uses of Loop* (NFC).

Update functions that previously took a loop pointer but only to get the
pre-header. Instead, pass the block directly. This removes the
requirement for the loop object to be created up-front.

2 years ago[X86] Rename FeatureCMPXCHG8B/FeatureCMPXCHG16B to FeatureCX8/CX16 to match CPUID.
Craig Topper [Sat, 19 Mar 2022 19:31:12 +0000 (12:31 -0700)]
[X86] Rename FeatureCMPXCHG8B/FeatureCMPXCHG16B to FeatureCX8/CX16 to match CPUID.

Rename hasCMPXCHG16B() to canUseCMPXCHG16B() to make it less like other
feature functions. Add a similar canUseCMPXCHG8B() that aliases
hasCX8() to keep similar naming.

Differential Revision: https://reviews.llvm.org/D121978

2 years ago[X86] Add some initial test coverage for PR35908 add/sub + bittest patterns
Simon Pilgrim [Sat, 19 Mar 2022 19:20:12 +0000 (19:20 +0000)]
[X86] Add some initial test coverage for PR35908 add/sub + bittest patterns

2 years ago[OpenMP][FIX] Do not crash when kernels are debug wrapper functions
Johannes Doerfert [Fri, 18 Mar 2022 21:53:40 +0000 (16:53 -0500)]
[OpenMP][FIX] Do not crash when kernels are debug wrapper functions

With debug information enabled (-g) Clang will wrap the actual target
region into a new function which is called from the "kernel". The problem
is that the "kernel" is now basically a wrapper without all the things
we expect. More importantly, if we end up asking for an AAKernelInfo
for the "target region function" we might try to turn it into SPMD mode.
That used to cause an assertion as that function doesn't have an
appropriately named `_exec_mode` global. While the global is going away
soon we still need to make sure to properly handle this case, e.g.,
perform optimizations reliably.

Differential Revision: https://reviews.llvm.org/D122043

2 years ago[docs] Fix a couple of typos
Itay Bookstein [Sat, 19 Mar 2022 18:24:38 +0000 (20:24 +0200)]
[docs] Fix a couple of typos

Signed-off-by: Itay Bookstein <ibookstein@gmail.com>
2 years ago[X86] combineAddOrSubToADCOrSBB - pull out repeated Y.getOperand(1) calls. NFC.
Simon Pilgrim [Sat, 19 Mar 2022 17:56:06 +0000 (17:56 +0000)]
[X86] combineAddOrSubToADCOrSBB - pull out repeated Y.getOperand(1) calls. NFC.

2 years ago[libc++] Prepare string tests for constexpr
Nikolas Klauser [Thu, 10 Mar 2022 19:15:23 +0000 (20:15 +0100)]
[libc++] Prepare string tests for constexpr

These are the lastâ„¢ changes to the tests for constexpr preparation.

Reviewed By: Quuxplusone, #libc, Mordante

Spies: Mordante, EricWF, libcxx-commits

Differential Revision: https://reviews.llvm.org/D120951

2 years ago[docs] Fixed minor ordering issue
Alisamar Husain [Sat, 19 Mar 2022 16:49:13 +0000 (22:19 +0530)]
[docs] Fixed minor ordering issue

Differential Revision: https://reviews.llvm.org/D122073

2 years ago[X86] createShuffleMaskFromVSELECT - handle BLENDV constant masks as well as VSELECT...
Simon Pilgrim [Sat, 19 Mar 2022 16:51:00 +0000 (16:51 +0000)]
[X86] createShuffleMaskFromVSELECT - handle BLENDV constant masks as well as VSELECT constant masks

Handle constant masks for both vselect nodes (mask != 0) and blendv nodes (mask < 0)

2 years ago[SLP,tests] Add coverage showing need for control dependencies during scheduling
Philip Reames [Sat, 19 Mar 2022 16:41:14 +0000 (09:41 -0700)]
[SLP,tests] Add coverage showing need for control dependencies during scheduling

2 years ago[amdgpu][nfc] Pass function instead of module to allocateModuleLDSGlobal
Jon Chesterfield [Sat, 19 Mar 2022 16:10:05 +0000 (16:10 +0000)]
[amdgpu][nfc] Pass function instead of module to allocateModuleLDSGlobal

2 years ago[X86] combineSelect - don't constant fold BLENDV nodes like VSELECT
Simon Pilgrim [Sat, 19 Mar 2022 16:31:15 +0000 (16:31 +0000)]
[X86] combineSelect - don't constant fold BLENDV nodes like VSELECT

If a X86ISD::BLENDV op appears before legalization (in this test case due to the icmp_slt x, 0) its constant mask was being treated as a vselect mask (mask != 0) instead of blendv (mask < 0)

This just prevents constant folding entirely for non-VSELECT ops.

2 years ago[X86] Add test showing a bug where a BLENDV mask is being constant folded as VSELECT...
Simon Pilgrim [Sat, 19 Mar 2022 16:26:20 +0000 (16:26 +0000)]
[X86] Add test showing a bug where a BLENDV mask is being constant folded as VSELECT mask

combineSelect doesn't expect X86ISD::BLENDV ops to appear before legalization and is treating the constant mask as a vselect mask (mask != 0) instead of blendv (mask < 0)

2 years ago[VPlan] Improve pattern in vplan-printing.ll check line.
Florian Hahn [Sat, 19 Mar 2022 16:02:41 +0000 (16:02 +0000)]
[VPlan] Improve pattern in vplan-printing.ll check line.

The existing pattern only matched a single value, which breaks if the
numbering slightly changes.

2 years ago[X86] Update remaining AVX512 VBMI2 VL intrinsic tests to avoid adds
Simon Pilgrim [Sat, 19 Mar 2022 15:41:25 +0000 (15:41 +0000)]
[X86] Update remaining AVX512 VBMI2 VL intrinsic tests to avoid adds

As noticed in D119654, by adding the masked intrinsics results together we can end up with the selects being canonicalized away from the intrinsic - this isn't what we want to test here so replace with a insertvalue chain into a aggregate instead to retain all the results.

2 years ago[X86] LowerAndToBT - fold BT(NOT(X),Y) -> BT(X,Y) and flip the CondCode
Simon Pilgrim [Sat, 19 Mar 2022 14:03:03 +0000 (14:03 +0000)]
[X86] LowerAndToBT - fold BT(NOT(X),Y) -> BT(X,Y) and flip the CondCode

2 years ago[X86][SSE] Add initial support for extracting non-constant bool vector elements
Simon Pilgrim [Sat, 19 Mar 2022 13:31:05 +0000 (13:31 +0000)]
[X86][SSE] Add initial support for extracting non-constant bool vector elements

We can use MOVMSK+TEST/BT to extract individual bool elements even if the index isn't constant

This relies on combineBitcastvxi1 so some AVX512 cases still aren't optimized as they avoid MOVMSK usage.

2 years ago[X86][SSE] Add tests for non-constant bool vector extractions
Simon Pilgrim [Sat, 19 Mar 2022 13:25:21 +0000 (13:25 +0000)]
[X86][SSE] Add tests for non-constant bool vector extractions

We should be able to perform this with MOVMSK+TEST/BT instead of spilling to stack

2 years ago[AArch64] Combine ISD::SETCC into AArch64ISD::ANDS
chenglin.bi [Sat, 19 Mar 2022 12:54:44 +0000 (12:54 +0000)]
[AArch64] Combine ISD::SETCC into AArch64ISD::ANDS

When N > 12, (2^N -1) is not a legal add immediate (isLegalAddImmediate will return false).
ANd if SetCC input use this number, DAG combiner will generate one more SRL instruction.
So combine [setcc (srl x, imm), 0, ne] to [setcc (and x, (-1 << imm)), 0, ne] to get better optimization in emitComparison
Fix https://github.com/llvm/llvm-project/issues/54283

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D121449

2 years ago[AArch64] Fix incorrect getSetCCInverse usage within trySwapVSelectOperands.
Paul Walker [Thu, 17 Mar 2022 21:55:55 +0000 (21:55 +0000)]
[AArch64] Fix incorrect getSetCCInverse usage within trySwapVSelectOperands.

When inverting the compare predicate trySwapVSelectOperands is
incorrectly using the type of the select's cond operand rather
than the type of cond's operands. This means we're treating all
inversions as if they're integer.

Differential Revision: https://reviews.llvm.org/D121968

2 years ago[libc++][test] Improves handle formatter.
Mark de Wever [Thu, 3 Mar 2022 16:21:17 +0000 (17:21 +0100)]
[libc++][test] Improves handle formatter.

Before it only accepted one output iterator type. Now it accepts all
output iterator types as required by BasicFormatter.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D120916

2 years ago[NFC] Remove unused parameters for SubtargetEmitter::ParseFeaturesFunction
Shengchen Kan [Sat, 19 Mar 2022 11:14:22 +0000 (19:14 +0800)]
[NFC] Remove unused parameters for SubtargetEmitter::ParseFeaturesFunction

2 years ago[trace][intelpt][docs] Added intel-pt build instructions for lldb
Alisamar Husain [Thu, 17 Mar 2022 17:55:05 +0000 (23:25 +0530)]
[trace][intelpt][docs] Added intel-pt build instructions for lldb

Differential Revision: https://reviews.llvm.org/D121935

2 years ago[Xcore] Set Int_MemBarrier as a meta-instruction
Shengchen Kan [Sat, 19 Mar 2022 08:27:39 +0000 (16:27 +0800)]
[Xcore] Set Int_MemBarrier as a meta-instruction

Reviewed By: nigelp-xmos

Differential Revision: https://reviews.llvm.org/D121982

2 years ago[SelectionDAG] Use APInt::zextOrSelf instead of zextOrTrunc in ComputePHILiveOutRegInfo
Craig Topper [Sat, 19 Mar 2022 06:25:35 +0000 (23:25 -0700)]
[SelectionDAG] Use APInt::zextOrSelf instead of zextOrTrunc in ComputePHILiveOutRegInfo

The width never decreases here.

2 years agoAdd DXIL triple
Chris Bieneman [Sat, 19 Mar 2022 05:06:20 +0000 (00:06 -0500)]
Add DXIL triple

This patch adds triple support for:

* dxil architecture
* shadermodel OS (with version parsing)
* shader stages as environment

Reviewed By: MaskRay, pete

Differential Revision: https://reviews.llvm.org/D122031

2 years ago[lldb/test] Fix typo in eventlistener.py (NFC)
Med Ismail Bennani [Sat, 19 Mar 2022 04:58:38 +0000 (21:58 -0700)]
[lldb/test] Fix typo in eventlistener.py (NFC)

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2 years ago[CMake] Update cache file for Win to ARM Linux cross toolchain builders. NFC.
Vladimir Vereschaka [Sat, 19 Mar 2022 04:16:08 +0000 (21:16 -0700)]
[CMake] Update cache file for Win to ARM Linux cross toolchain builders. NFC.

* fixed remote test script arguments for libc++/compiler-rt libraries.
* disabled shared libc++abi libraries (to let remote tests get passed).

2 years ago[MLIR][SCF] Place hoisted scf.if->select prior to the remaining if
William S. Moses [Fri, 18 Mar 2022 19:14:16 +0000 (15:14 -0400)]
[MLIR][SCF] Place hoisted scf.if->select prior to the remaining if

This patch slightly updates the behavior of scf.if->select to
place any hoisted select statements prior to the remaining scf.if body.

This allows better composition with other canonicalization passes, such as
scf.if nested merging.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D122027

2 years agoEnsure that APIRecords get destroyed correctly.
Daniel Grumberg [Fri, 18 Mar 2022 23:54:56 +0000 (23:54 +0000)]
Ensure that APIRecords get destroyed correctly.

Implements an APISet specific unique ptr type that has a custom deleter
that just calls the underlying APIRecord subclass destructor.

2 years ago[flang] Error recovery improvement in runtime (IOMSG=)
Peter Klausler [Mon, 14 Mar 2022 20:39:50 +0000 (13:39 -0700)]
[flang] Error recovery improvement in runtime (IOMSG=)

Some refactoring and related fixes for more accurate
user program error recovery in the I/O runtime, especially
for error recovery with IOMSG= character values.

1) Move any work in an EndIoStatement() implementation
that may raise an error into a new CompleteOperation()
member function.  This allows error handling APIs like
GetIoMsg() to complete a pending I/O statement and harvest
any errors that may result.

2) Move the pending error code from ErroneousIoStatementState
to a new pendingError_ data member in IoErrorHandler.
This allows IoErrorHandler::InError() to return a correct
result when there is a pending error that will be recovered
from so that I/O list data transfers don't crash in the meantime.

3) Don't create and leak a unit for a failed OPEN(NEWUNIT=n)
with error recovery, and don't modify 'n'.  (Depends on
changes to API call ordering in lowering, in a separate patch;
code was added to ensure that OPEN statement control list
specifiers, e.g. SetFile(), must be passed before GetNewUnit().)

4) Fix the code that calls a form of strerror to fill an
IOMSG= variable so that it actually works for Fortran's
character type: blank fill with no null or newline termination.

Differential Revision: https://reviews.llvm.org/D122036

2 years ago[flang] Accept legacy aliases for intrinsic function names
Peter Klausler [Fri, 11 Mar 2022 19:17:01 +0000 (11:17 -0800)]
[flang] Accept legacy aliases for intrinsic function names

Support the names AND, OR, and XOR for the generic intrinsic
functions IAND, IOR, and IEOR respectively.

Differential Revision: https://reviews.llvm.org/D122034

2 years ago[flang] Convert RUNTIME_CHECK to better error for user errors in transformational.cpp
Peter Klausler [Tue, 15 Mar 2022 20:28:03 +0000 (13:28 -0700)]
[flang] Convert RUNTIME_CHECK to better error for user errors in transformational.cpp

In flang/runtime/transformational.cpp, there are many RUNTIME_CHECK assertions
for errors that should have been caught in semantics, but there are alno others
that signify program errors that in principle cannot be detected until
execution.  Convert this second group into readable fatal error messages.
Also clean up some missing braces and incorrect printf formats found
along the way.

Differential Revision: https://reviews.llvm.org/D122037

2 years ago[lldb/test] Add events listener helper class to lldbtest
Med Ismail Bennani [Fri, 18 Mar 2022 23:35:24 +0000 (16:35 -0700)]
[lldb/test] Add events listener helper class to lldbtest

This patch introduces a generic helper class that will listen for
event in a background thread and match it against a source broadcaster.

If the event received matches the source broadcaster, the event is
queued up in a list that the user can access later on.

The motivation behind this is to easily test new kinds of events
(i.e. Swift type-system progress events). However, this patch also
updates `TestProgressReporting.py` and `TestDiagnosticReporting.py`
to make use of this new helper class.

Differential Revision: https://reviews.llvm.org/D121977

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2 years ago[flang] Add explanatory messages to grammar for language extensions
Peter Klausler [Mon, 14 Mar 2022 22:23:49 +0000 (15:23 -0700)]
[flang] Add explanatory messages to grammar for language extensions

Extend "extension<LanguageFeature>()" to incorporate an explanatory
message better than the current generic "nonstandard usage:".

Differential Revision: https://reviews.llvm.org/D122035

2 years ago[ARM] Fix shouldExpandAtomicLoadInIR for subtargets without ldrexd.
Eli Friedman [Fri, 18 Mar 2022 22:36:20 +0000 (15:36 -0700)]
[ARM] Fix shouldExpandAtomicLoadInIR for subtargets without ldrexd.

Regression from 2f497ec3; we should not try to generate ldrexd on
targets that don't have it.

Also, while I'm here, fix shouldExpandAtomicStoreInIR, for consistency.
That doesn't really have any practical effect, though.  On Thumb targets
where we need to use __sync_* libcalls, there is no libcall for stores,
so SelectionDAG calls __sync_lock_test_and_set_8 anyway.

2 years agoAutogenerate llvm/test/CodeGen/ARM/atomic-load-store.ll
Eli Friedman [Fri, 18 Mar 2022 22:34:29 +0000 (15:34 -0700)]
Autogenerate llvm/test/CodeGen/ARM/atomic-load-store.ll

2 years ago[slp][tests] Add missing function attributes
Philip Reames [Fri, 18 Mar 2022 22:49:44 +0000 (15:49 -0700)]
[slp][tests] Add missing function attributes

SLP is currently assuming that control dependence in these cases is irrelevant.  This is only valid if none of the lib-funcs involved can throw or infinite loop in the scalar forms.  This appears to be true (or at least we infer the respective attributes) for the libfuncs I spot checked.  This change is mostly for shrunking the diff on an upcoming patch.

2 years ago[mlir] Remove incorrect builders for ExpandShapeOp
Thomas Raoux [Fri, 18 Mar 2022 17:00:58 +0000 (17:00 +0000)]
[mlir] Remove incorrect builders for ExpandShapeOp

ExpandShapeOp builder cannot infer the result type since it doesn't know
how the dimension needs to be split. Remove this builder so that it
doesn't get used accidently. Also remove one potential path using it in
generic fusion.

Differential Revision: https://reviews.llvm.org/D122019

2 years ago[AMDGPU] Add gfx940 run line to gfx90a mfma test. NFC.
Stanislav Mekhanoshin [Fri, 18 Mar 2022 22:22:27 +0000 (15:22 -0700)]
[AMDGPU] Add gfx940 run line to gfx90a mfma test. NFC.

2 years ago[X86] Adjust tests to run on gfni capable cpu levels
Simon Pilgrim [Fri, 18 Mar 2022 22:07:20 +0000 (22:07 +0000)]
[X86] Adjust tests to run on gfni capable cpu levels

AVX512BWVL capable cpus are required 512-bit gfni

2 years ago[X86] Fix typo in gfni funnel shift test
Simon Pilgrim [Fri, 18 Mar 2022 21:34:45 +0000 (21:34 +0000)]
[X86] Fix typo in gfni funnel shift test

We already have rotation coverage

2 years ago[GlobalOpt] Don't replace alias with aliasee if either alias/aliasee may be preemptible
Fangrui Song [Tue, 1 Feb 2022 18:41:16 +0000 (10:41 -0800)]
[GlobalOpt] Don't replace alias with aliasee if either alias/aliasee may be preemptible

Generalize D99629 for ELF. A default visibility non-local symbol is preemptible
in a -shared link. `isInterposable` is an insufficient condition.

Moreover, a non-preemptible alias may be referenced in a sub constant expression
which intends to lower to a PC-relative relocation. Replacing the alias with a
preemptible aliasee may introduce a linker error.

Respect dso_preemptable and suppress optimization to fix the abose issues. With
the change, `alias = 345` will not be rewritten to use aliasee in a `-fpic`
compile.
```
int aliasee;
extern int alias __attribute__((alias("aliasee"), visibility("hidden")));
void foo() { alias = 345; } // intended to access the local copy
```

While here, refine the condition for the alias as well.

For some binary formats like COFF, `isInterposable` is a sufficient condition.
But I think canonicalization for the changed case has little advantage, so I
don't bother to add the `Triple(M.getTargetTriple()).isOSBinFormatELF()` or
`getPICLevel/getPIELevel` complexity.

For instrumentations, it's recommended not to create aliases that refer to
globals that have a weak linkage or is preemptible. However, the following is
supported and the IR needs to handle such cases.
```
int aliasee __attribute__((weak));
extern int alias __attribute__((alias("aliasee")));
```

There are other places where GlobalAlias isInterposable usage may need to be
fixed.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D107249

2 years ago[NewPM] Don't skip SCCs not in current RefSCC
Arthur Eubanks [Wed, 16 Mar 2022 21:57:36 +0000 (14:57 -0700)]
[NewPM] Don't skip SCCs not in current RefSCC

With D107249 I saw huge compile time regressions on a module (150s ->
5700s). This turned out to be due to a huge RefSCC in
the module. As we ran the function simplification pipeline on functions
in the SCCs in the RefSCC, some of those SCCs would be split out to
their RefSCC, a child of the current RefSCC. We'd skip the remaining
SCCs in the huge RefSCC because the current RefSCC is now the RefSCC
just split out, then revisit the original huge RefSCC from the
beginning.  This happened many times because many functions in the
RefSCC were optimizable to the point of becoming their own RefSCC.

This patch makes it so we don't skip SCCs not in the current RefSCC so
that we split out all the child RefSCCs on the first iteration of
RefSCC. When we split out a RefSCC, we invalidate the original RefSCC
and add the remainder of the SCCs into a new RefSCC in
RCWorklist. This happens repeatedly until we finish visiting all
SCCs, at which point there is only one valid RefSCC in
RCWorklist from the original RefSCC containing all the SCCs that
were not split out, and we visit that.

For example, in the newly added test cgscc-refscc-mutation-order.ll,
we'd previously run instcombine in this order:
f1, f2, f1, f3, f1, f4, f1

Now it's:
f1, f2, f3, f4, f1

This can cause more passes to be run in some specific cases,
e.g. if f1<->f2 gets optimized to f1<-f2, we'd previously run f1, f2;
now we run f1, f2, f2.

This improves kimwitu++ compile times by a lot (12-15% for various -O3 configs):
https://llvm-compile-time-tracker.com/compare.php?from=2371c5a0e06d22b48da0427cebaf53a5e5c54635&to=00908f1d67400cab1ad7bcd7cacc7558d1672e97&stat=instructions

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D121953

2 years ago[RGT] StencilTest: Fix an assertion
Paul Robinson [Fri, 18 Mar 2022 20:40:02 +0000 (13:40 -0700)]
[RGT] StencilTest: Fix an assertion

ASSERT_THAT_EXPECTED implicitly calls takeError(), and calling
takeError() a second time returns nothing, so the check for the
content of the error text wasn't being executed.
Fixes Issue #48901

Found by the Rotten Green Tests project.

2 years ago[OpenMP] Initial parsing/sema for the 'omp target teams loop' construct
Mike Rice [Fri, 18 Mar 2022 18:02:02 +0000 (11:02 -0700)]
[OpenMP] Initial parsing/sema for the 'omp target teams loop' construct

 Adds basic parsing/sema/serialization support for the
 #pragma omp target teams loop directive.

Differential Revision: https://reviews.llvm.org/D122028

2 years agoFix computation of MadeChange bit in AtomicExpandPass.
Eli Friedman [Fri, 18 Mar 2022 20:26:37 +0000 (13:26 -0700)]
Fix computation of MadeChange bit in AtomicExpandPass.

Fixes llvm-clang-x86_64-expensive-checks-debian failure with 2f497ec3.

expandAtomicStore always modifies the function, so make sure we set
MadeChange unconditionally. Not sure how nobody else has stumbled over
this before.

2 years agoDriver: Make macOS the default target OS for -arch arm64
Duncan P. N. Exon Smith [Fri, 18 Mar 2022 20:08:26 +0000 (13:08 -0700)]
Driver: Make macOS the default target OS for -arch arm64

This is a follow up to 565603cc94d79a8d0de6df840fd53714899fb890,
which made macOS the default target OS for `-arch arm64` when
running on an Apple Silicon Mac. Now it'll be the default when
running on an Intel Mac too.

clang/test/Driver/apple-arm64-arch.c was a bit odd before: it was added
for the above commit, but tested the inverse behaviour and XFAIL'ed on
Apple Silicon. This inverts it to the (new) behaviour (that's now
correct regardless) and removes the XFAIL.

Radar-Id: rdar://90500294

2 years ago[AMDGPU] Added gfx940 mfma dst constraint test. NFC.
Stanislav Mekhanoshin [Fri, 18 Mar 2022 20:34:35 +0000 (13:34 -0700)]
[AMDGPU] Added gfx940 mfma dst constraint test. NFC.

2 years ago[AMDGPU] gfx940 basic speed model
Stanislav Mekhanoshin [Thu, 17 Mar 2022 22:24:00 +0000 (15:24 -0700)]
[AMDGPU] gfx940 basic speed model

This is incomplete and will handle more instructions as they are added.

Differential Revision: https://reviews.llvm.org/D121966

2 years ago[AMDGPU] Disable some MFMA instructions on gfx940
Stanislav Mekhanoshin [Thu, 17 Mar 2022 21:14:47 +0000 (14:14 -0700)]
[AMDGPU] Disable some MFMA instructions on gfx940

Differential Revision: https://reviews.llvm.org/D121956

2 years agoUpdate llvm-config.h.cmake for 7b983917d4
Sterling Augustine [Fri, 18 Mar 2022 19:58:14 +0000 (12:58 -0700)]
Update llvm-config.h.cmake for 7b983917d4

2 years ago[AMDGPU] reuse blgp as neg in 2 mfma operations on gfx940
Stanislav Mekhanoshin [Mon, 14 Mar 2022 20:32:56 +0000 (13:32 -0700)]
[AMDGPU] reuse blgp as neg in 2 mfma operations on gfx940

GFX940 repurposes BLGP as NEG only in DGEMM MFMA.

Differential Revision: https://reviews.llvm.org/D121745

2 years ago[scudo] Fix static and unused function type annotations
Dominic Chen [Wed, 16 Mar 2022 20:46:23 +0000 (13:46 -0700)]
[scudo] Fix static and unused function type annotations

Differential Revision: https://reviews.llvm.org/D121855

2 years ago[scudo] Don't assume preprocessor macro is defined
Dominic Chen [Wed, 16 Mar 2022 20:50:07 +0000 (13:50 -0700)]
[scudo] Don't assume preprocessor macro is defined

Differential Revision: https://reviews.llvm.org/D121857

2 years ago[ARM] Fix ARM backend to correctly use atomic expansion routines.
Eli Friedman [Thu, 17 Feb 2022 09:24:16 +0000 (01:24 -0800)]
[ARM] Fix ARM backend to correctly use atomic expansion routines.

Without this patch, clang would generate calls to __sync_* routines on
targets where it does not make sense; we can't assume the routines exist
on unknown targets. Linux has special implementations of the routines
that work on old ARM targets; other targets have no such routines. In
general, atomics operations which aren't natively supported should go
through libatomic (__atomic_*) APIs, which can support arbitrary atomics
through locks.

ARM targets older than v6, where this patch makes a difference, are rare
in practice, but not completely extinct. See, for example, discussion on
D116088.

This also affects Cortex-M0, but I don't think __sync_* routines
actually exist in any Cortex-M0 libraries. So in practice this just
leads to a slightly different linker error for those cases, I think.

Mechanically, this patch does the following:

- Ensures we run atomic expansion unconditionally; it never makes sense to
completely skip it.
- Fixes getMaxAtomicSizeInBitsSupported() so it returns an appropriate
number on all ARM subtargets.
- Fixes shouldExpandAtomicRMWInIR() and shouldExpandAtomicCmpXchgInIR() to
correctly handle subtargets that don't have atomic instructions.

Differential Revision: https://reviews.llvm.org/D120026

2 years agoReland "[gn build] (manually) port 6316129e066e"
Nico Weber [Fri, 18 Mar 2022 19:43:02 +0000 (15:43 -0400)]
Reland "[gn build] (manually) port 6316129e066e"

This reverts commit 21b97df74c15aa29a9d5ca54e3033eae6c97362d.
6316129e066e relanded in 7b983917d455.

2 years ago[libc++] Enable modernize-loop-convert
Nikolas Klauser [Tue, 8 Mar 2022 15:27:22 +0000 (16:27 +0100)]
[libc++] Enable modernize-loop-convert

Reviewed By: ldionne, Mordante, #libc

Spies: var-const, aheejin, libcxx-commits

Differential Revision: https://reviews.llvm.org/D121216

2 years ago[polly] Fix NPM unittests after D121566.
Michael Kruse [Fri, 18 Mar 2022 19:21:18 +0000 (14:21 -0500)]
[polly] Fix NPM unittests after D121566.

2 years agoAdd a cmake flag to turn `llvm_unreachable()` into builtin_trap() when assertions...
Mehdi Amini [Thu, 17 Mar 2022 22:19:33 +0000 (22:19 +0000)]
Add a cmake flag to turn `llvm_unreachable()` into builtin_trap() when assertions are disabled

This re-lands 6316129e066e after fixing the condition logic.

The new flag seems to not be working yet on Windows, where the builtin
trap isn't "no return".

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D121750

2 years agoUse llvm::append_range where applicable
Benjamin Kramer [Fri, 18 Mar 2022 19:05:12 +0000 (20:05 +0100)]
Use llvm::append_range where applicable

It knows the size, so no need to call reserve beforehand. NFCI.

2 years ago[CostModel][X86] Reduce cost of extracting bool vector elements
Simon Pilgrim [Fri, 18 Mar 2022 19:02:42 +0000 (19:02 +0000)]
[CostModel][X86] Reduce cost of extracting bool vector elements

For constant indices, these are now just a MOVMSK+TEST/BT

2 years ago[SLP] Add comment clarifying assumption that tripped me up [NFC]
Philip Reames [Fri, 18 Mar 2022 18:34:22 +0000 (11:34 -0700)]
[SLP] Add comment clarifying assumption that tripped me up [NFC]

I keep thinking this assumption is probably exploitable for a bug in the existing implementation, but all of my attempts at writing a test case have failed.  So for the moment, just document this very subtle assumption.

2 years ago[Vectorize] Fix an 'unused function' warning
Kazu Hirata [Fri, 18 Mar 2022 18:24:57 +0000 (11:24 -0700)]
[Vectorize] Fix an 'unused function' warning

This patch fixes:

  llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:3917:13: error:
  unused function 'needToScheduleSingleInstruction'
  [-Werror,-Wunused-function]

2 years ago[VE] Fix an 'unused variable' warning
Kazu Hirata [Fri, 18 Mar 2022 18:24:56 +0000 (11:24 -0700)]
[VE] Fix an 'unused variable' warning

This patch fixes:

  llvm/lib/Target/VE/VVPISelLowering.cpp:186:11: error: unused
  variable 'PassThru' [-Werror,-Wunused-variable]

2 years ago[Vectorize] Fix an 'unused variable' warning
Kazu Hirata [Fri, 18 Mar 2022 18:24:54 +0000 (11:24 -0700)]
[Vectorize] Fix an 'unused variable' warning

This patch fixes:

  llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:8148:18: error:
  unused variable 'SDTE' [-Werror,-Wunused-variable]

2 years ago[SCCP] do not clean up dead blocks that have their address taken
Nick Desaulniers [Fri, 18 Mar 2022 17:48:28 +0000 (10:48 -0700)]
[SCCP] do not clean up dead blocks that have their address taken

[SCCP] do not clean up dead blocks that have their address taken

Fixes a crash observed in IPSCCP.

Because the SCCPSolver has already internalized BlockAddresses as
Constants or ConstantExprs, we don't want to try to update their Values
in the ValueLatticeElement. Instead, continue to propagate these
BlockAddress Constants, continue converting BasicBlocks to unreachable,
but don't delete the "dead" BasicBlocks which happen to have their
address taken.  Leave replacing the BlockAddresses to another pass.

Fixes: https://github.com/llvm/llvm-project/issues/54238
Fixes: https://github.com/llvm/llvm-project/issues/54251

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D121744

2 years ago[libc++] Make shared_ptr move unique_ptr's deleter
Asher Mancinelli [Fri, 18 Mar 2022 17:36:25 +0000 (11:36 -0600)]
[libc++] Make shared_ptr move unique_ptr's deleter

Addresses LWG 3548 which mandates that when shared_ptr is being constructed from a unique_ptr, the unique_ptr's deleter should be moved and not copied.

Reviewed By: #libc, philnik, EricWF

Differential Revision: https://reviews.llvm.org/D119159

2 years agoRevert "[SLP] Optionally preserve MemorySSA"
Philip Reames [Fri, 18 Mar 2022 17:28:21 +0000 (10:28 -0700)]
Revert "[SLP] Optionally preserve MemorySSA"

This reverts commit 1cfa986d68e2f04854ef30c432b8aa28e13a9706.  See https://github.com/llvm/llvm-project/issues/54256 for why I'm discontinuing the project.

Seperately, it turns out that while this patch does correctly preserve MSSA, it's correct only at the end of the pass; not between vectorization attempts.  Even if we decide to resurrect this, we'll need to fix that before reapplying.

2 years ago[HWASan] do not replace lifetime intrinsics with tagged address.
Florian Mayer [Fri, 18 Mar 2022 17:06:04 +0000 (10:06 -0700)]
[HWASan] do not replace lifetime intrinsics with tagged address.

Quote from the LLVM Language Reference
  If ptr is a stack-allocated object and it points to the first byte of the
  object, the object is initially marked as dead. ptr is conservatively
  considered as a non-stack-allocated object if the stack coloring algorithm
  that is used in the optimization pipeline cannot conclude that ptr is a
  stack-allocated object.

By replacing the alloca pointer with the tagged address before this change,
we confused the stack coloring algorithm.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D121835

2 years ago[trace][intelpt] fix some test failures
Walter Erquinigo [Fri, 18 Mar 2022 16:22:27 +0000 (09:22 -0700)]
[trace][intelpt] fix some test failures

Minor fixes needed and now `./bin/lldb-dotest -p TestTrace` passes
correctly.

- There was an incorrect iteration.
- Some error messages changed.
- The way repeat commands are handled changed a bit, so I had to create
a new --continue arg in "thread trace dump instructions" to handle this
correctly.

Differential Revision: https://reviews.llvm.org/D122023

2 years agoRevert "[pseudo] Split greatergreater token."
Zequan Wu [Fri, 18 Mar 2022 17:15:05 +0000 (10:15 -0700)]
Revert "[pseudo] Split greatergreater token."

This reverts commit f66d3758bda99e9f57bfdad168212feda18792ae.

It breaks windows bot.

2 years agoImplement __cpuid and __cpuidex as Clang builtins
Alan Zhao [Fri, 18 Mar 2022 17:08:04 +0000 (18:08 +0100)]
Implement __cpuid and __cpuidex as Clang builtins

https://reviews.llvm.org/D23944 implemented the #pragma intrinsic from
MSVC. This causes the statement #pragma intrinsic(cpuid) to fail [0]
on Clang because cpuid is currently implemented in intrin.h instead
of a Clang builtin. Reimplementing cpuid (as well as it's releated
function, cpuidex) should resolve this.

[0]: https://crbug.com/1279344

Differential revision: https://reviews.llvm.org/D121653

2 years ago[CMake][Fuchsia] Drop Darwin architectures
Petr Hosek [Fri, 18 Mar 2022 17:02:46 +0000 (10:02 -0700)]
[CMake][Fuchsia] Drop Darwin architectures

We want to build all available ones.

Differential Revision: https://reviews.llvm.org/D122022

2 years ago[CMake][Fuchsia] Include llvm-undname
Petr Hosek [Fri, 18 Mar 2022 17:04:33 +0000 (10:04 -0700)]
[CMake][Fuchsia] Include llvm-undname

This is useful when developing on Windows.

Differential Revision: https://reviews.llvm.org/D122021

2 years agoRevert "[HWASan] do not replace lifetime intrinsics with tagged address."
Florian Mayer [Fri, 18 Mar 2022 17:04:19 +0000 (10:04 -0700)]
Revert "[HWASan] do not replace lifetime intrinsics with tagged address."

Failed on buildbot:

/home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/build/bin/llc: error: : error: unable to get target for 'aarch64-unknown-linux-android29', see --version and --triple.
FileCheck error: '<stdin>' is empty.
FileCheck command line:  /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/build/bin/FileCheck /home/buildbot/buildbot-root/llvm-project/llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll --check-prefix=COLOR

This reverts commit 208b923e74feeb986fe5114ca39a74b1d2032ed7.

2 years ago[MLIR][MemRef] Nested allocation scope inlining
William S. Moses [Fri, 18 Mar 2022 06:53:55 +0000 (02:53 -0400)]
[MLIR][MemRef] Nested allocation scope inlining

If a stack allocation is within a nested allocation scope
don't count that as an allocation of the outer allocation scope
that would prevent inlining.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D121981

2 years ago[runtimes] Detect changes to Tests.cmake
Petr Hosek [Mon, 14 Mar 2022 21:21:26 +0000 (14:21 -0700)]
[runtimes] Detect changes to Tests.cmake

This ensures that Tests.cmake is tracked by Ninja and any changes to
this file from the subbuilds are correctly detected.

Differential Revision: https://reviews.llvm.org/D121647

2 years ago[MLIR][SCF] Combine nested ifs with yields
William S. Moses [Thu, 17 Mar 2022 17:01:33 +0000 (13:01 -0400)]
[MLIR][SCF] Combine nested ifs with yields

This patch extends the existing combine nested if
combination canonicalization to also handle ifs which
yield values

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D121923

2 years ago[LICM] Add allowspeculation pass options.
Florian Hahn [Fri, 18 Mar 2022 16:51:56 +0000 (16:51 +0000)]
[LICM] Add allowspeculation pass options.

This adds a new option to control AllowSpeculation added in D119965 when
using `-passes=...`.

This allows reproducing #54023 using opt.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D121944

2 years ago[HWASan] do not replace lifetime intrinsics with tagged address.
Florian Mayer [Thu, 10 Mar 2022 23:17:26 +0000 (15:17 -0800)]
[HWASan] do not replace lifetime intrinsics with tagged address.

Quote from the LLVM Language Reference
  If ptr is a stack-allocated object and it points to the first byte of the
  object, the object is initially marked as dead. ptr is conservatively
  considered as a non-stack-allocated object if the stack coloring algorithm
  that is used in the optimization pipeline cannot conclude that ptr is a
  stack-allocated object.

By replacing the alloca pointer with the tagged address before this change,
we confused the stack coloring algorithm.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D121835

2 years ago[RISCV][NFC] Add tests to address invalid arch dependencies.
Zakk Chen [Fri, 18 Mar 2022 08:46:11 +0000 (01:46 -0700)]
[RISCV][NFC] Add tests to address invalid arch dependencies.

Improve test converage.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D121578

2 years ago[flang][Parser] Add a node for individual sections in sections construct
Shraiysh Vaishay [Fri, 18 Mar 2022 15:07:25 +0000 (20:37 +0530)]
[flang][Parser] Add a node for individual sections in sections construct

This patch adds parser nodes for each indivudual section in sections
construct. This should help with the translation to FIR. `!$omp section`
was not recognized as a construct and hence needed special handling.

`OpenMPSectionsConstruct` contains a list of `OpenMPConstruct`. Each
such `OpenMPConstruct` wraps an `OpenMPSectionConstruct`
(section, not sections). An `OpenMPSectionConstruct` is a wrapper around
a `Block`.

Reviewed By: kiranchandramohan, peixin

Differential Revision: https://reviews.llvm.org/D121680

2 years ago[ARM][AArch64] generate subtarget feature flags
Tomas Matheson [Wed, 23 Feb 2022 11:34:41 +0000 (11:34 +0000)]
[ARM][AArch64] generate subtarget feature flags

Reland of D120906 after sanitizer failures.

This patch aims to reduce a lot of the boilerplate around adding new subtarget
features. From the SubtargetFeatures tablegen definitions, a series of calls to
the macro GET_SUBTARGETINFO_MACRO are generated in
ARM/AArch64GenSubtargetInfo.inc.  ARMSubtarget/AArch64Subtarget can then use
this macro to define bool members and the corresponding getter methods.

Some naming inconsistencies have been fixed to allow this, and one unused
member removed.

This implementation only applies to boolean members; in future both BitVector
and enum members could also be generated.

Differential Revision: https://reviews.llvm.org/D120906