Stephen Boyd [Wed, 1 Jun 2016 23:15:27 +0000 (16:15 -0700)]
clk: si5351: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Sören Brinkmann <soren.brinkmann@xilinx.com>
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:26 +0000 (16:15 -0700)]
clk: si514: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Sören Brinkmann <soren.brinkmann@xilinx.com>
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:25 +0000 (16:15 -0700)]
clk: scpi: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:23 +0000 (16:15 -0700)]
clk: rk808: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:22 +0000 (16:15 -0700)]
clk: pwm: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Janusz Uzycki <j.uzycki@elproma.com.pl>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:21 +0000 (16:15 -0700)]
clk: palmas: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:20 +0000 (16:15 -0700)]
clk: nspire: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Daniel Tang <dt.tangr@gmail.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:18 +0000 (16:15 -0700)]
clk: moxart: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:17 +0000 (16:15 -0700)]
clk: mb86s7x: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:14 +0000 (16:15 -0700)]
clk: efm32gg: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:13 +0000 (16:15 -0700)]
clk: cs2000: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:12 +0000 (16:15 -0700)]
clk: clps711x: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:11 +0000 (16:15 -0700)]
clk: cdce925: Migrate to clk_hw based OF and provider APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:10 +0000 (16:15 -0700)]
clk: cdce: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:09 +0000 (16:15 -0700)]
clk: axm5516: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs. Make thing simple by using the
existing clk_hw array and implementing a custom DT clk provider
get function to map the clk spec id to a clk_hw pointer.
Cc: Anders Berg <anders.berg@lsi.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:08 +0000 (16:15 -0700)]
clk: axi-clkgen: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:07 +0000 (16:15 -0700)]
clk: asm9260: Migrate to clk_hw based registration and OF APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:05 +0000 (16:15 -0700)]
clk: bcm: kona: Migrate to clk_hw based registration and OF APIs
Now that we can use clk_hw pointers we don't need to have two
duplicate arrays holding the same mapping of clk index to clk_hw
pointer. Implement a custom clk_hw provider function to map the
OF specifier to the clk_hw instance for it.
Cc: Alex Elder <elder@linaro.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Purna Chandra Mandal [Tue, 17 May 2016 05:05:51 +0000 (10:35 +0530)]
clk: microchip: Initialize SOSC clock rate for PIC32MZDA.
Optional SOSC is an external fixed clock running at 32768HZ.
So Initialize SOSC rate as per PIC32MZDA datasheet.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Purna Chandra Mandal [Tue, 17 May 2016 05:05:50 +0000 (10:35 +0530)]
clk: microchip: use readl_poll_timeout() in pbclk_set_rate().
pbclk_set_rate() is using readl_poll_timeout_atomic() even
though spinlock is released. Fix it by replacing with
readl_poll_timeout().
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 24 Aug 2016 17:30:46 +0000 (10:30 -0700)]
Merge branch 'clk-meson-gxbb-ao' into clk-next
* clk-meson-gxbb-ao:
clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()
Wei Yongjun [Sat, 20 Aug 2016 15:31:05 +0000 (15:31 +0000)]
clk: mvebu: Remove redundant dev_err call in armada_3700_periph_clock_probe()
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Signed-off-by: Wei Yongjun <weiyj.lk@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Wei Yongjun [Mon, 22 Aug 2016 16:08:21 +0000 (16:08 +0000)]
clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()
sizeof() when applied to a pointer typed expression gives the
size of the pointer, not that of the pointed data.
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Fixes:
f8c11f79912d ("clk: meson: Add GXBB AO Clock and Reset controller driver")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Rajendra Nayak [Tue, 16 Aug 2016 07:25:48 +0000 (12:55 +0530)]
clk: qcom: gdsc: Add the missing BIMC gdsc for msm8996
Add BIMC gdsc data found in MMCC part of msm8996 family of devices.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Fabio Estevam [Fri, 12 Aug 2016 18:26:56 +0000 (15:26 -0300)]
clk: imx7d: Add SAI IPG clocks
The SAI_IPG clocks are enabled by the same bits that control SAI_ROOT_CLK
clocks, so represent them as shared clocks.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Fabio Estevam [Fri, 12 Aug 2016 18:26:55 +0000 (15:26 -0300)]
clk: imx: Introduce clk_register_gate2()
Introduce imx_clk_gate2_shared2() which is similar to the existing
imx_clk_gate2_shared() and passes CLK_OPS_PARENT_ENABLE flag, which
is useful for i.MX7 shared clocks.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Fabio Estevam [Fri, 12 Aug 2016 18:26:54 +0000 (15:26 -0300)]
clk: imx7d: Add the clock for SDMA
Add IMX7D_SDMA_CORE_CLK clock so that SDMA can be functional.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 19 Aug 2016 19:51:14 +0000 (12:51 -0700)]
Merge branch 'clk-meson-gxbb-ao' into clk-next
* clk-meson-gxbb-ao:
clk: meson: Add GXBB AO Clock and Reset controller driver
dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
Neil Armstrong [Thu, 18 Aug 2016 10:08:46 +0000 (12:08 +0200)]
clk: meson: Add GXBB AO Clock and Reset controller driver
Adds a Clock and Reset controller driver for the Always-On part
of the Amlogic Meson GXBB SoC.
It exports paired Clocks and Resets lines that will be used by
peripherals in the Always-On subsystem.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Neil Armstrong [Thu, 18 Aug 2016 10:08:47 +0000 (12:08 +0200)]
dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
Add documentations and dt-bindings headers for the AO clock and reset
controller.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Shunli Wang [Fri, 19 Aug 2016 05:34:53 +0000 (13:34 +0800)]
reset: mediatek: Add MT2701 reset controller dt-binding file
Dt-binding file about reset controller is used to provide
kinds of definition, which is referenced by dts file and
IC-specified reset controller driver code.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Shunli Wang [Fri, 19 Aug 2016 05:34:51 +0000 (13:34 +0800)]
clk: mediatek: Add dt-bindings for MT2701 clocks
Add MT2701 clock dt-bindings, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
James Liao [Fri, 19 Aug 2016 05:34:50 +0000 (13:34 +0800)]
dt-bindings: ARM: Mediatek: Document bindings for MT2701
This patch adds the binding documentation for apmixedsys, bdpsys,
ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and
vdecsys for Mediatek MT2701.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
James Liao [Fri, 19 Aug 2016 05:34:49 +0000 (13:34 +0800)]
clk: mediatek: Refine the makefile to support multiple clock drivers
Add a Kconfig to define clock configuration for each SoC, and
modify the Makefile to build drivers that only selected in config.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
James Liao [Tue, 16 Aug 2016 07:30:21 +0000 (15:30 +0800)]
clk: mediatek: remove __init from clk registration functions
Remove __init from functions that will be used by init functions
that support probe deferral.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:15 +0000 (16:15 -0700)]
clk: ls1x: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Kelvin Cheung <keguang.zhang@gmail.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tang Yuantian [Mon, 15 Aug 2016 07:28:20 +0000 (15:28 +0800)]
clk: qoriq: fix a register offset error
The offset of Core Cluster clock control/status register
on cluster group V3 version is different from others, and
should be plus 0x70000.
Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Reviewed-by: Scott Wood <oss@buserror.net>
Fixes:
9e19ca2f627e ("clk: qoriq: Add ls2080a support.")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 16 Aug 2016 22:38:56 +0000 (15:38 -0700)]
clk: max77686: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 18 Aug 2016 23:41:05 +0000 (16:41 -0700)]
Merge tag 'clk-renesas-for-v4.9-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into clk-next
Merge r8a7796 watchdog clk support from Geert Uytterhoeven:
Add all clocks related to the Watchdog Timer (WDT) controller on the
Renesas R-Car M3-W (r8a7796) SoC.
* tag 'clk-renesas-for-v4.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r8a7796: Add watchdog module clock
clk: renesas: r8a7796: Add watchdog core clocks
Stephen Boyd [Tue, 16 Aug 2016 22:40:52 +0000 (15:40 -0700)]
clk: berlin: Migrate to clk_hw based registration and OF APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs. We also remove some __init
markings in header files as they're useless and we're in the
area.
Tested-by: Jisheng Zhang <jszhang@marvell.com>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Markus Elfring [Tue, 16 Aug 2016 06:53:10 +0000 (08:53 +0200)]
clk: gcc-ipq4019: Delete unnecessary assignment for the field "owner"
The field "owner" is set by the core.
Thus delete an unneeded initialisation.
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Mon, 15 Aug 2016 23:09:04 +0000 (16:09 -0700)]
clk: qcom: Sort Makefile alphabetically
We've started getting out of order, fix it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Mon, 15 Aug 2016 23:08:49 +0000 (16:08 -0700)]
Merge branch 'clk-qcom-9615' into clk-next
* clk-qcom-9615:
dt-bindings: clock: Update bindings for MDM9615 GCC and LCC
clk: mdm9615: Add support for MDM9615 Clock Controllers
dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC
Neil Armstrong [Thu, 11 Aug 2016 12:48:05 +0000 (14:48 +0200)]
dt-bindings: clock: Update bindings for MDM9615 GCC and LCC
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Neil Armstrong [Thu, 11 Aug 2016 12:48:04 +0000 (14:48 +0200)]
clk: mdm9615: Add support for MDM9615 Clock Controllers
In order to support the Qualcomm MDM9615 SoC, add support for
the Global and LPASS Clock Controllers.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Neil Armstrong [Thu, 11 Aug 2016 12:48:03 +0000 (14:48 +0200)]
dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Mon, 15 Aug 2016 22:47:15 +0000 (15:47 -0700)]
Merge branch 'clk-meson-gxbb' into clk-next
* clk-meson-gxbb:
clk: gxbb: add MMC gate clocks, and expose for DT
Kevin Hilman [Tue, 2 Aug 2016 21:40:11 +0000 (14:40 -0700)]
clk: gxbb: add MMC gate clocks, and expose for DT
Add the SD/eMMC gate clocks and expose them for use by DT.
While at it, also explose FCLK_DIV2 since this is one of the input
clocks to the mux internal to each of the SD/eMMC blocks.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Laxman Dewangan [Fri, 17 Jun 2016 10:51:07 +0000 (16:21 +0530)]
clk: max77686: Add support for MAX77620 clocks
Maxim Max77620 has one 32KHz clock output and the clock HW
IP used on this PMIC is same as what it is there in the MAX77686.
Add clock driver support for MAX77620 on the MAX77686 driver.
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
CC: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Laxman Dewangan [Fri, 17 Jun 2016 10:51:06 +0000 (16:21 +0530)]
clk: max77686: Add DT binding details for PMIC MAX77620
Maxim has used the same clock IP on multiple PMICs like MAX77686,
MAX77802, MAX77620. Only differences are the number of clocks
from these PMICs like MAX77686 has 3 clocks output, MAX776802 have
two clock output and MAX77620 has one clock output.
Add clock binding details and DT example for the MAX77620.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
CC: Javier Martinez Canillas <javier@dowhile0.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Laxman Dewangan [Fri, 17 Jun 2016 10:51:05 +0000 (16:21 +0530)]
clk: Combine DT binding doc for max77686 and max77802
The clock IP used on the Maxim PMICs max77686 and max77802 are
same. The configuration of clock register is also same except
the number of clocks.
Define the common DT binding file for the clocks of Maxim PMICs
MAX77686 and MAX77802. For this, remove the separate DT binding
document file for maxim,max77802 and move all information to
maxim,max77686 DT binding document.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
CC: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Laxman Dewangan [Fri, 17 Jun 2016 10:51:04 +0000 (16:21 +0530)]
clk: max77686: Combine Maxim max77686 and max77802 driver
The clock IP used on the Maxim PMICs max77686 and max77802 are
same. The configuration of clock register is also same except
the number of clocks.
Part of common code utilisation, there is 3 files for these chips
clock driver, one for common and two files for driver registration.
Combine both drivers into single file and move common code into
same common file reduces the 2 files and make max77686 and max77802
clock driver in single fine. This driver does not depends on the
parent driver structure. The regmap handle is acquired through
regmap APIs for the register access.
This combination of driver helps on adding clock driver for different
Maxim PMICs which has similar clock IP like MAX77620 and MAX20024.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
CC: Javier Martinez Canillas <javier@dowhile0.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Sat, 13 Aug 2016 01:50:23 +0000 (18:50 -0700)]
clk: fixed-rate: Remove export symbol on setup function
This function is only called by builtin code, but we always
exported it and had marked it as __init before commit
e4eda8e0654c (clk: remove exported function from __init section,
2013-01-06) removed that marking. Given that it isn't used by
modules, lets unexport it and add back __init.
Cc: Denis Efremov <yefremov.denis@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Sat, 13 Aug 2016 01:50:22 +0000 (18:50 -0700)]
clk: fixed-factor: Remove export symbol on setup function
This function is marked __init, so it can't possibly need to be
exported to modules. Remove the marking.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Mon, 15 Aug 2016 21:32:23 +0000 (14:32 -0700)]
clk: Return errors from clk providers in __of_clk_get_from_provider()
Before commit
0861e5b8cf80 (clk: Add clk_hw OF clk providers,
2016-02-05) __of_clk_get_from_provider() would return an error
pointer of the provider's choosing if there was a provider
registered and EPROBE_DEFER otherwise. After that commit, it
would return EPROBE_DEFER regardless of whether or not the
provider returned an error. This is odd and can lead to behavior
where clk consumers keep probe deferring when they should be
seeing some other error.
Let's restore the previous behavior where we only return
EPROBE_DEFER when there isn't a provider in our of_clk_providers
list. Otherwise, return the error from the last provider we find
that matches the node.
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fixes:
0861e5b8cf80 ("clk: Add clk_hw OF clk providers")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Wei Yongjun [Mon, 8 Aug 2016 13:55:20 +0000 (13:55 +0000)]
clk: gxbb: use builtin_platform_driver to simplify the code
Use the builtin_platform_driver() macro to make the code simpler.
Signed-off-by: Wei Yongjun <weiyj.lk@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Gregory CLEMENT [Tue, 19 Jul 2016 13:42:22 +0000 (15:42 +0200)]
clk: mvebu: Add the peripheral clock driver for Armada 3700
These clocks are the ones which will be used as source for the
peripherals of the Armada 3700 SoC. On this SoC there is two blocks of
clocks: the North bridge one and the South bridge one.
Most of them are gatable. Most of the time their rate are their parent
rated divided by a ratio depending of two registers. Their parent can be
choose between the TBG clocks for most of them.
However, some of them can't choose their parent or directly depend of the
xtal clocks. Other ones do not use exactly the same pattern to find the
ratio between their parent rate and their rate.
For these reason each clock is a composite clock and the operations they
use are different depending of the clock.
According to the datasheet it would be possible to select the parent
clock and the ratio, however currently the driver does not support it.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Gregory CLEMENT [Tue, 19 Jul 2016 13:42:21 +0000 (15:42 +0200)]
dt-bindings: clock: add DT binding for the peripheral clocks on Armada 3700
This commit adds the DT binding documentation for the peripheral clocks
used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Gregory CLEMENT [Tue, 19 Jul 2016 13:42:20 +0000 (15:42 +0200)]
clk: mvebu Add the time base generator clocks for Armada 3700
These clocks are children of the xtal clock and each one can be selected
as a source for the peripheral clocks.
According to the datasheet it should be possible to modify their rate,
but currently it is not supported.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Gregory CLEMENT [Tue, 19 Jul 2016 13:42:19 +0000 (15:42 +0200)]
dt-bindings: clock: add DT binding for the TBG clocks on Armada 3700
This commit adds the DT binding documentation for the Time Base Generator
clock used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Gregory CLEMENT [Tue, 19 Jul 2016 13:42:18 +0000 (15:42 +0200)]
clk: mvebu: Add the xtal clock for Armada 3700 SoC
This clock is the parent of all the Armada 3700 clocks. It is a fixed
rate clock which depends on the gpio configuration read when resetting
the SoC.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Gregory CLEMENT [Tue, 19 Jul 2016 13:42:17 +0000 (15:42 +0200)]
dt-bindings: clock: add DT binding for the Xtal clock on Armada 3700
This commit adds the DT binding documentation for the the Xtal clock on
Armada 3700 used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Peter Ujfalusi [Mon, 30 May 2016 08:55:11 +0000 (11:55 +0300)]
clk: twl6040: Rename the driver and use consistent names in the code
The driver is to provide the functional clock to OMAP4/5 McPDM. The clock
is named as pdmclk in the documentations so change the function names,
structure names and variables to align with this.
At the same time rename the driver from "twl6040-clk" to "twl6040-pdmclk".
This can be done w/o regression since the clock driver is not in use at
the moment, the MFD core driver is not even registering the device for it.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Peter Ujfalusi [Mon, 30 May 2016 08:55:10 +0000 (11:55 +0300)]
clk: twl6040: Register the clock as of_clk_provider
In order ot be able to use the pdmclk clock via DT it need to be registered
as of_clk_provide.
Since the twl6040 clock driver does not have it's own DT node, use the
parent's node for registering.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Peter Ujfalusi [Mon, 30 May 2016 08:55:09 +0000 (11:55 +0300)]
clk: twl6040: Correct clk_ops
Since the drover only supports prepare callbacks, the use of is_enabled is
not correct, it should be handling is_prepared.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Grzegorz Jaszczyk [Thu, 21 Jul 2016 10:48:10 +0000 (12:48 +0200)]
clk: mvebu: armada-39x: add clk description for supported interfaces
Both SATA and second USB3.0 interface are supported in Armada-39x SoC
family. Add necessary clk description, so both xhci and sata drivers
can be correctly initialized.
The binding documentation has also been updated accordingly.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Masahiro Yamada [Tue, 19 Jul 2016 07:28:47 +0000 (16:28 +0900)]
clk: use ERR_CAST() for __clk_create_clk()
This code is clear enough, but the intention will be even clearer
with this.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ricardo Ribalda Delgado [Tue, 5 Jul 2016 16:23:34 +0000 (18:23 +0200)]
clk: fixed-rate: Convert into a module platform driver
Adds support for fixed-rate clock providers which have not been
enabled via of_clk_init().
This is required by Device trees overlays that introduce clocks
providers.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
[sboyd@codeaurora.org: Make new private function static, don't
check clk for NULL when unregistering in driver remove]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ricardo Ribalda Delgado [Tue, 5 Jul 2016 16:23:33 +0000 (18:23 +0200)]
clk: fixed-factor: Convert into a module platform driver
Adds support for fixed-factor clock providers which have not been
enabled via of_clk_init().
This is required by Device trees overlays that introduce clocks
providers.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
[sboyd@codeaurora.org: Make new private function static, don't
check clk for NULL when unregistering in driver remove]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ricardo Ribalda Delgado [Tue, 5 Jul 2016 16:23:32 +0000 (18:23 +0200)]
clk: core: Avoid double initialization of clocks
Some clock providers can be initialized via of_clk_init() and also via
platform device probe.
Avoid double initialization of them by setting the OF_POPULATED flag.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ricardo Ribalda Delgado [Tue, 5 Jul 2016 16:23:30 +0000 (18:23 +0200)]
clk: sunxi: apb0: Use new macro CLK_OF_DECLARE_DRIVER
This driver initializes a clock provider via sun8i_a23_apb0_setup
and then continues the initialization on sun8i_a23_apb0_clk_probe.
Use the new macro to notify the clk subsystem about this behaviour.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ricardo Ribalda Delgado [Tue, 5 Jul 2016 16:23:28 +0000 (18:23 +0200)]
clk: sunxi: mod0: Use new macro CLK_OF_DECLARE_DRIVER
This driver initializes a clock provider via sun4i_a10_mod0_setup
and then continues the initialization on sun4i_a10_mod0_clk_probe.
Use the new macro to notify the clk subsystem about this behaviour.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ricardo Ribalda Delgado [Tue, 5 Jul 2016 16:23:27 +0000 (18:23 +0200)]
clk: nxp: Use new macro CLK_OF_DECLARE_DRIVER
This driver initializes a clock provider via lpc18xx_creg_clk_init
and then continues the initialization on lpc18xx_creg_clk_probe.
Use the new macro to notify the clk subsystem about this behaviour.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
[sboyd@codeaurora.org: s/npx/nxp/ in subject]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ricardo Ribalda Delgado [Tue, 5 Jul 2016 16:23:26 +0000 (18:23 +0200)]
clk: axis: Use new macro CLK_OF_DECLARE_DRIVER
This driver initializes a clock provider via of_artpec6_clkctrl_setup
and then continues the initialization on artpec6_clkctrl_probe.
Use the new macro to notify the clk subsystem about this behaviour.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ricardo Ribalda Delgado [Tue, 5 Jul 2016 16:23:25 +0000 (18:23 +0200)]
clk: core: New macro CLK_OF_DECLARE_DRIVER
This will be used by drivers that requires initialization at
of_clk_init() time and also during platform device probing.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Geert Uytterhoeven [Fri, 12 Aug 2016 12:37:54 +0000 (14:37 +0200)]
clk: divider: Fix clk_divider_round_rate() to use clk_readl()
clk-divider uses clk_readl()/clk_writel() everywhere, except in
clk_divider_round_rate(), where plain readl() is used. Change this to
clk_readl(), as it makes a difference on powerpc.
Fixes:
e6d5e7d90be92cee ("clk-divider: Fix READ_ONLY when divider > 1")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Fabio Estevam [Fri, 15 Jul 2016 13:53:02 +0000 (10:53 -0300)]
clk: imx7d: do not set the parent of IMX7D_ENET_AXI_ROOT_SRC
Booting the kernel on a imx7s-warp leads to several warnings like these:
[ 0.000000] ------------[ cut here ]------------
[ 0.000000] WARNING: CPU: 0 PID: 0 at kernel/locking/lockdep.c:3536 lock_release+0x2f8/0x330
[ 0.000000] releasing a pinned lock
[ 0.000000] ------------[ cut here ]------------
[ 0.000000] WARNING: CPU: 0 PID: 0 at kernel/locking/lockdep.c:2722 trace_hardirqs_on_caller+0x1ac/0x1f4
[ 0.000000] DEBUG_LOCKS_WARN_ON(unlikely(early_boot_irqs_disabled))
[ 0.000000] ---[ end trace
cb88537fdc8fa201 ]---
[ 0.000000] bad: scheduling from the idle thread!
[ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 4.7.0-rc7-next-
20160715 #404
[ 0.000000] ------------[ cut here ]------------
[ 0.000000] WARNING: CPU: 0 PID: 0 at kernel/time/sched_clock.c:179 sched_clock_register+0x44/0x1f8
[ 0.000000] Modules linked in:
[ 0.000591] ------------[ cut here ]------------
[ 0.000610] WARNING: CPU: 0 PID: 0 at kernel/time/sched_clock.c:179 sched_clock_register+0x44/0x1f8
[ 0.002084] ------------[ cut here ]------------
[ 0.002104] WARNING: CPU: 0 PID: 0 at init/main.c:576 start_kernel+0x258/0x3b0
[ 0.002114] Interrupts were enabled early
This fix is along the same lines as
5e33ebff7edd ("clk: imx7d: do not
set parent of ethernet time/ref clocks") and the explanation from that
commit is:
"The reason for the warning is that setting the parent enables the ENET
PLL since we are using CLK_OPS_PARENT_ENABLE. Enabling the ENET PLL can
cause clk_pllv3_wait_lock to sleep. See also:
commit
fc8726a2c021 ("clk: core: support clocks which requires parents
enable (part 2)")."
imx7s-warp does not even use the FEC interface, so we should not really
configure the parent of IMX7D_ENET_AXI_ROOT_SRC in the common MX7 clock
driver code.
The dts file should use the assigned-clocks/assigned-clock-parents method,
so simply remove the configuration of IMX7D_ENET_AXI_ROOT_SRC parent.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 10 Aug 2016 22:32:53 +0000 (15:32 -0700)]
MAINTAINERS: Add linux-clk patchwork URL
The common clk framework has a patchwork associated with it.
Update the maintainers file to reflect this.
Cc: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Michael Turquette [Fri, 8 Jul 2016 23:32:10 +0000 (16:32 -0700)]
clk: migrate ref counts when orphans are reunited
It's always nice to see families reunited, and this is equally true when
talking about parent clocks and their children. However, if the orphan
clk had a positive prepare_count or enable_count, then we would not
migrate those counts up the parent chain correctly.
This has manifested with the recent critical clocks feature, which often
enables clocks very early, before their parents have been registered.
Fixed by replacing the call to clk_core_reparent with calls to
__clk_set_parent_{before,after}.
Cc: James Liao <jamesjj.liao@mediatek.com>
Cc: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
[sboyd@codeaurora.org: Recalc accuracies and rates too]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Yoshihiro Shimoda [Wed, 10 Aug 2016 07:29:43 +0000 (09:29 +0200)]
clk: renesas: r8a7795: Fix SD clocks
According to the datasheet, SDn clocks are from the SDSRC clock. And
the SDSRC has a 1/2 divider. So, we should have ".sdsrc" as an internal
core clock. Otherwise, since the sdhi driver will calculate clock for
a sd card using the wrong parent clock rate, and then performance will
be not good.
Fixes:
90c073e53909da85 ("clk: shmobile: r8a7795: Add SD divider support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: stable@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Chen-Yu Tsai [Thu, 14 Jul 2016 02:42:35 +0000 (10:42 +0800)]
clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock
The condition passed to read*_poll_timeout() is the break condition,
i.e. wait for this condition to happen and return success.
The original code assumed the opposite, resulting in a warning when
the PLL clock rate was changed but never lost it's lock as far as
the readout indicated. This was verified by checking the read out
register value.
Fixes:
1d80c14248d6 ("clk: sunxi-ng: Add common infrastructure")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Geert Uytterhoeven [Mon, 27 Jun 2016 14:51:14 +0000 (16:51 +0200)]
clk: renesas: r8a7796: Add watchdog module clock
Add the module clock for the Watchdog Timer (WDT) controller on the
Renesas R-Car M3-W (r8a7796) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Mon, 27 Jun 2016 14:48:07 +0000 (16:48 +0200)]
clk: renesas: r8a7796: Add watchdog core clocks
Add all core clocks related to the Watchdog Timer (WDT) controller on
the Renesas R-Car M3-W (r8a7796) SoC: OSC, Internal RCLK, and RCLK.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Linus Torvalds [Mon, 8 Aug 2016 01:18:00 +0000 (18:18 -0700)]
Linux 4.8-rc1
Linus Torvalds [Sun, 7 Aug 2016 23:38:45 +0000 (16:38 -0700)]
Merge branch 'for-linus' of git://git.kernel.dk/linux-block
Pull more block fixes from Jens Axboe:
"As mentioned in the pull the other day, a few more fixes for this
round, all related to the bio op changes in this series.
Two fixes, and then a cleanup, renaming bio->bi_rw to bio->bi_opf. I
wanted to do that change right after or right before -rc1, so that
risk of conflict was reduced. I just rebased the series on top of
current master, and no new ->bi_rw usage has snuck in"
* 'for-linus' of git://git.kernel.dk/linux-block:
block: rename bio bi_rw to bi_opf
target: iblock_execute_sync_cache() should use bio_set_op_attrs()
mm: make __swap_writepage() use bio_set_op_attrs()
block/mm: make bdev_ops->rw_page() take a bool for read/write
Linus Torvalds [Sun, 7 Aug 2016 23:35:08 +0000 (16:35 -0700)]
Merge tag 'drm-for-v4.8-zpos' of git://people.freedesktop.org/~airlied/linux
Pull drm zpos property support from Dave Airlie:
"This tree was waiting on some media stuff I hadn't had time to get a
stable branchpoint off, so I just waited until it was all in your tree
first.
It's been around a bit on the list and shouldn't affect anything
outside adding the generic API and moving some ARM drivers to using
it"
* tag 'drm-for-v4.8-zpos' of git://people.freedesktop.org/~airlied/linux:
drm: rcar: use generic code for managing zpos plane property
drm/exynos: use generic code for managing zpos plane property
drm: sti: use generic zpos for plane
drm: add generic zpos property
Jens Axboe [Fri, 5 Aug 2016 21:35:16 +0000 (15:35 -0600)]
block: rename bio bi_rw to bi_opf
Since commit
63a4cc24867d, bio->bi_rw contains flags in the lower
portion and the op code in the higher portions. This means that
old code that relies on manually setting bi_rw is most likely
going to be broken. Instead of letting that brokeness linger,
rename the member, to force old and out-of-tree code to break
at compile time instead of at runtime.
No intended functional changes in this commit.
Signed-off-by: Jens Axboe <axboe@fb.com>
Jens Axboe [Mon, 1 Aug 2016 15:39:23 +0000 (09:39 -0600)]
target: iblock_execute_sync_cache() should use bio_set_op_attrs()
The original commit missed this function, it needs to mark it a
write flush.
Cc: Mike Christie <mchristi@redhat.com>
Fixes:
e742fc32fcb4 ("target: use bio op accessors")
Signed-off-by: Jens Axboe <axboe@fb.com>
Jens Axboe [Mon, 1 Aug 2016 15:38:44 +0000 (09:38 -0600)]
mm: make __swap_writepage() use bio_set_op_attrs()
Cleaner than manipulating bio->bi_rw flags directly.
Signed-off-by: Jens Axboe <axboe@fb.com>
Jens Axboe [Fri, 5 Aug 2016 14:11:04 +0000 (08:11 -0600)]
block/mm: make bdev_ops->rw_page() take a bool for read/write
Commit
abf545484d31 changed it from an 'rw' flags type to the
newer ops based interface, but now we're effectively leaking
some bdev internals to the rest of the kernel. Since we only
care about whether it's a read or a write at that level, just
pass in a bool 'is_write' parameter instead.
Then we can also move op_is_write() and friends back under
CONFIG_BLOCK protection.
Reviewed-by: Mike Christie <mchristi@redhat.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
Linus Torvalds [Sun, 7 Aug 2016 14:23:17 +0000 (10:23 -0400)]
Merge tag 'doc-4.8-fixes' of git://git.lwn.net/linux
Pull documentation fixes from Jonathan Corbet:
"Three fixes for the docs build, including removing an annoying warning
on 'make help' if sphinx isn't present"
* tag 'doc-4.8-fixes' of git://git.lwn.net/linux:
DocBook: use DOCBOOKS="" to ignore DocBooks instead of IGNORE_DOCBOOKS=1
Documenation: update cgroup's document path
Documentation/sphinx: do not warn about missing tools in 'make help'
Linus Torvalds [Sun, 7 Aug 2016 14:13:14 +0000 (10:13 -0400)]
Merge tag 'binfmt-for-linus' of git://git./linux/kernel/git/jejb/binfmt_misc
Pull binfmt_misc update from James Bottomley:
"This update is to allow architecture emulation containers to function
such that the emulation binary can be housed outside the container
itself. The container and fs parts both have acks from relevant
experts.
To use the new feature you have to add an F option to your binfmt_misc
configuration"
From the docs:
"The usual behaviour of binfmt_misc is to spawn the binary lazily when
the misc format file is invoked. However, this doesn't work very well
in the face of mount namespaces and changeroots, so the F mode opens
the binary as soon as the emulation is installed and uses the opened
image to spawn the emulator, meaning it is always available once
installed, regardless of how the environment changes"
* tag 'binfmt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/binfmt_misc:
binfmt_misc: add F option description to documentation
binfmt_misc: add persistent opened binary handler for containers
fs: add filp_clone_open API
Eryu Guan [Tue, 2 Aug 2016 11:58:28 +0000 (19:58 +0800)]
fs: return EPERM on immutable inode
In most cases, EPERM is returned on immutable inode, and there're only a
few places returning EACCES. I noticed this when running LTP on
overlayfs, setxattr03 failed due to unexpected EACCES on immutable
inode.
So converting all EACCES to EPERM on immutable inode.
Acked-by: Dave Chinner <dchinner@redhat.com>
Signed-off-by: Eryu Guan <guaneryu@gmail.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 7 Aug 2016 14:01:14 +0000 (10:01 -0400)]
Merge branch 'for-linus-2' of git://git./linux/kernel/git/viro/vfs
Pull more vfs updates from Al Viro:
"Assorted cleanups and fixes.
In the "trivial API change" department - ->d_compare() losing 'parent'
argument"
* 'for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
cachefiles: Fix race between inactivating and culling a cache object
9p: use clone_fid()
9p: fix braino introduced in "9p: new helper - v9fs_parent_fid()"
vfs: make dentry_needs_remove_privs() internal
vfs: remove file_needs_remove_privs()
vfs: fix deadlock in file_remove_privs() on overlayfs
get rid of 'parent' argument of ->d_compare()
cifs, msdos, vfat, hfs+: don't bother with parent in ->d_compare()
affs ->d_compare(): don't bother with ->d_inode
fold _d_rehash() and __d_rehash() together
fold dentry_rcuwalk_invalidate() into its only remaining caller
Linus Torvalds [Sat, 6 Aug 2016 13:50:36 +0000 (09:50 -0400)]
Merge tag 'xfs-rmap-for-linus-4.8-rc1' of git://git./linux/kernel/git/dgc/linux-xfs
Pull more xfs updates from Dave Chinner:
"This is the second part of the XFS updates for this merge cycle, and
contains the new reverse block mapping feature for XFS.
Reverse mapping allows us to track the owner of a specific block on
disk precisely. It is implemented as a set of btrees (one per
allocation group) that track the owners of allocated extents.
Effectively it is a "used space tree" that is updated when we allocate
or free extents. i.e. it is coherent with the free space btrees we
already maintain and never overlaps with them.
This reverse mapping infrastructure is the building block of several
upcoming features - reflink, copy-on-write data, dedupe, online
metadata and data scrubbing, highly accurate bad sector/data loss
reporting to users, and significantly improved reconstruction of
damaged and corrupted filesystems. There's a lot of new stuff coming
along in the next couple of cycles,a nd it all builds in the rmap
infrastructure.
As such, it's a huge chunk of new code with new on-disk format
features and internal infrastructure. It warns at mount time as an
experimental feature and that it may eat data (as we do with all new
on-disk features until they stabilise). We have not released
userspace suport for it yet - userspace support currently requires
download from Darrick's xfsprogs repo and build from source, so the
access to this feature is really developer/tester only at this point.
Initial userspace support will be released at the same time kernel
with this code in it is released.
The new rmap enabled code regresses 3 xfstests - all are ENOSPC
related corner cases, one of which Darrick posted a fix for a few
hours ago. The other two are fixed by infrastructure that is part of
the upcoming reflink patchset. This new ENOSPC infrastructure
requires a on-disk format tweak required to keep mount times in
check - we need to keep an on-disk count of allocated rmapbt blocks so
we don't have to scan the entire btrees at mount time to count them.
This is currently being tested and will be part of the fixes sent in
the next week or two so users will not be exposed to this change"
* tag 'xfs-rmap-for-linus-4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dgc/linux-xfs: (52 commits)
xfs: move (and rename) the deferred bmap-free tracepoints
xfs: collapse single use static functions
xfs: remove unnecessary parentheses from log redo item recovery functions
xfs: remove the extents array from the rmap update done log item
xfs: in btree_lshift, only allocate temporary cursor when needed
xfs: remove unnecesary lshift/rshift key initialization
xfs: remove the get*keys and update_keys btree ops pointers
xfs: enable the rmap btree functionality
xfs: don't update rmapbt when fixing agfl
xfs: disable XFS_IOC_SWAPEXT when rmap btree is enabled
xfs: add rmap btree block detection to log recovery
xfs: add rmap btree geometry feature flag
xfs: propagate bmap updates to rmapbt
xfs: enable the xfs_defer mechanism to process rmaps to update
xfs: log rmap intent items
xfs: create rmap update intent log items
xfs: add rmap btree insert and delete helpers
xfs: convert unwritten status of reverse mappings
xfs: remove an extent from the rmap btree
xfs: add an extent to the rmap btree
...
Linus Torvalds [Sat, 6 Aug 2016 13:49:02 +0000 (09:49 -0400)]
Merge branch 'work.const-qstr' of git://git./linux/kernel/git/viro/vfs
Pull qstr constification updates from Al Viro:
"Fairly self-contained bunch - surprising lot of places passes struct
qstr * as an argument when const struct qstr * would suffice; it
complicates analysis for no good reason.
I'd prefer to feed that separately from the assorted fixes (those are
in #for-linus and with somewhat trickier topology)"
* 'work.const-qstr' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
qstr: constify instances in adfs
qstr: constify instances in lustre
qstr: constify instances in f2fs
qstr: constify instances in ext2
qstr: constify instances in vfat
qstr: constify instances in procfs
qstr: constify instances in fuse
qstr constify instances in fs/dcache.c
qstr: constify instances in nfs
qstr: constify instances in ocfs2
qstr: constify instances in autofs4
qstr: constify instances in hfs
qstr: constify instances in hfsplus
qstr: constify instances in logfs
qstr: constify dentry_init_security
Linus Torvalds [Sat, 6 Aug 2016 13:44:14 +0000 (09:44 -0400)]
Merge tag 'media/v4.8-6' of git://git./linux/kernel/git/mchehab/linux-media
Pull mailcap fixlets from Mauro Carvalho Chehab:
"A small fixup for my and Shuah's entries in .mailcap.
Basically, those entries were with a syntax that makes
get_maintainer.pl to do the wrong thing"
* tag 'media/v4.8-6' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
.mailmap: Correct entries for Mauro Carvalho Chehab and Shuah Khan
Linus Torvalds [Sat, 6 Aug 2016 13:20:13 +0000 (09:20 -0400)]
Merge tag 'for_linus' of git://git./linux/kernel/git/mst/vhost
Pull virtio/vhost updates from Michael Tsirkin:
- new vsock device support in host and guest
- platform IOMMU support in host and guest, including compatibility
quirks for legacy systems.
- misc fixes and cleanups.
* tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost:
VSOCK: Use kvfree()
vhost: split out vringh Kconfig
vhost: detect 32 bit integer wrap around
vhost: new device IOTLB API
vhost: drop vringh dependency
vhost: convert pre sorted vhost memory array to interval tree
vhost: introduce vhost memory accessors
VSOCK: Add Makefile and Kconfig
VSOCK: Introduce vhost_vsock.ko
VSOCK: Introduce virtio_transport.ko
VSOCK: Introduce virtio_vsock_common.ko
VSOCK: defer sock removal to transports
VSOCK: transport-specific vsock_transport functions
vhost: drop vringh dependency
vop: pull in vhost Kconfig
virtio: new feature to detect IOMMU device quirk
balloon: check the number of available pages in leak balloon
vhost: lockless enqueuing
vhost: simplify work flushing
Linus Torvalds [Sat, 6 Aug 2016 13:18:21 +0000 (09:18 -0400)]
Merge tag 'for-linus' of git://git./virt/kvm/kvm
Pull more KVM updates from Paolo Bonzini:
- ARM bugfix and MSI injection support
- x86 nested virt tweak and OOPS fix
- Simplify pvclock code (vdso bits acked by Andy Lutomirski).
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
nvmx: mark ept single context invalidation as supported
nvmx: remove comment about missing nested vpid support
KVM: lapic: fix access preemption timer stuff even if kernel_irqchip=off
KVM: documentation: fix KVM_CAP_X2APIC_API information
x86: vdso: use __pvclock_read_cycles
pvclock: introduce seqcount-like API
arm64: KVM: Set cpsr before spsr on fault injection
KVM: arm: vgic-irqfd: Workaround changing kvm_set_routing_entry prototype
KVM: arm/arm64: Enable MSI routing
KVM: arm/arm64: Enable irqchip routing
KVM: Move kvm_setup_default/empty_irq_routing declaration in arch specific header
KVM: irqchip: Convey devid to kvm_set_msi
KVM: Add devid in kvm_kernel_irq_routing_entry
KVM: api: Pass the devid in the msi routing entry
Linus Torvalds [Sat, 6 Aug 2016 13:13:11 +0000 (09:13 -0400)]
Merge branch 'upstream' of git://git.linux-mips.org/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
"This is the main pull request for MIPS for 4.8. Also includes is a
minor SSB cleanup as SSB code traditionally is merged through the MIPS
tree:
ATH25:
- MIPS: Add default configuration for ath25
Boot:
- For zboot, copy appended dtb to the end of the kernel
- store the appended dtb address in a variable
BPF:
- Fix off by one error in offset allocation
Cobalt code:
- Fix typos
Core code:
- debugfs_create_file returns NULL on error, so don't use IS_ERR for
testing for errors.
- Fix double locking issue in RM7000 S-cache code. This would only
affect RM7000 ARC systems on reboot.
- Fix page table corruption on THP permission changes.
- Use compat_sys_keyctl for 32 bit userspace on 64 bit kernels.
David says, there are no compatibility issues raised by this fix.
- Move some signal code around.
- Rewrite r4k count/compare clockevent device registration such that
min_delta_ticks/max_delta_ticks files are guaranteed to be
initialized.
- Only register r4k count/compare as clockevent device if we can
assume the clock to be constant.
- Fix MSA asm warnings in control reg accessors
- uasm and tlbex fixes and tweaking.
- Print segment physical address when EU=1.
- Define AT_VECTOR_SIZE_ARCH for ARCH_DLINFO.
- CP: Allow booting by VP other than VP 0
- Cache handling fixes and optimizations for r4k class caches
- Add hotplug support for R6 processors
- Cleanup hotplug bits in kconfig
- traps: return correct si code for accessing nonmapped addresses
- Remove cpu_has_safe_index_cacheops
Lantiq:
- Register IRQ handler for virtual IRQ number
- Fix EIU interrupt loading code
- Use the real EXIN count
- Fix build error.
Loongson 3:
- Increase HPET_MIN_PROG_DELTA and decrease HPET_MIN_CYCLES
Octeon:
- Delete built-in DTB pruning code for D-Link DSR-1000N.
- Clean up GPIO definitions in dlink_dsr-1000n.dts.
- Add more LEDs to the DSR-100n DTS
- Fix off by one in octeon_irq_gpio_map()
- Typo fixes
- Enable SATA by default in cavium_octeon_defconfig
- Support readq/writeq()
- Remove forced mappings of USB interrupts.
- Ensure DMA descriptors are always in the low 4GB
- Improve USB reset code for OCTEON II.
Pistachio:
- Add maintainers entry for pistachio SoC Support
- Remove plat_setup_iocoherency
Ralink:
- Fix pwm UART in spis group pinmux.
SSB:
- Change bare unsigned to unsigned int to suit coding style
Tools:
- Fix reloc tool compiler warnings.
Other:
- Delete use of ARCH_WANT_OPTIONAL_GPIOLIB"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (61 commits)
MIPS: mm: Fix definition of R6 cache instruction
MIPS: tools: Fix relocs tool compiler warnings
MIPS: Cobalt: Fix typo
MIPS: Octeon: Fix typo
MIPS: Lantiq: Fix build failure
MIPS: Use CPHYSADDR to implement mips32 __pa
MIPS: Octeon: Dlink_dsr-1000n.dts: add more leds.
MIPS: Octeon: Clean up GPIO definitions in dlink_dsr-1000n.dts.
MIPS: Octeon: Delete built-in DTB pruning code for D-Link DSR-1000N.
MIPS: store the appended dtb address in a variable
MIPS: ZBOOT: copy appended dtb to the end of the kernel
MIPS: ralink: fix spis group pinmux
MIPS: Factor o32 specific code into signal_o32.c
MIPS: non-exec stack & heap when non-exec PT_GNU_STACK is present
MIPS: Use per-mm page to execute branch delay slot instructions
MIPS: Modify error handling
MIPS: c-r4k: Use SMP calls for CM indexed cache ops
MIPS: c-r4k: Avoid small flush_icache_range SMP calls
MIPS: c-r4k: Local flush_icache_range cache op override
MIPS: c-r4k: Split r4k_flush_kernel_vmap_range()
...