Martin Storsjö [Fri, 30 Oct 2020 20:24:25 +0000 (22:24 +0200)]
[libcxx] Use the posix code for directory_entry::__do_refresh
This works just fine for windows, as all the functions it calls
are implemented and wrapped for windows.
Differential Revision: https://reviews.llvm.org/D91173
Eric Schweitz [Fri, 5 Feb 2021 18:35:32 +0000 (10:35 -0800)]
[flang][fir] Add FIR's vector type.
This patch adds support for `!fir.vector`, a rank one, constant length
data type.
https://github.com/flang-compiler/f18-llvm-project/pull/413
Differential Revision: https://reviews.llvm.org/D96162
Arthur O'Dwyer [Wed, 3 Feb 2021 22:54:13 +0000 (17:54 -0500)]
[libc++] Further improve the contiguous-iterator story, and fix some bugs.
- Quality-of-implementation: Avoid calling __unwrap_iter in constexpr contexts.
The user might conceivably write a contiguous iterator where normal iterator
arithmetic is constexpr-friendly but `std::to_address(it)` isn't.
- Bugfix: When you pass contiguous iterators to `std::copy`, you should get
back your contiguous iterator type, not a raw pointer. That means that
libc++ can't `__unwrap_iter` unless it also does `__rewrap_iter`.
Fortunately, this is implementable.
- Improve test coverage of the new `contiguous_iterator` test iterator.
This catches the bug described above.
- Tests: Stop testing that we can `std::copy` //into// an `input_iterator`.
Our test iterators may currently support that, but it seems nonsensical to me.
Differential Revision: https://reviews.llvm.org/D95983
Yaxun (Sam) Liu [Tue, 2 Feb 2021 23:06:33 +0000 (18:06 -0500)]
[CUDA][HIP] Fix device variable linkage
For -fgpu-rdc, shadow variables should not be internalized, otherwise
they cannot be accessed by other TUs. This is necessary because
the shadow variable of external device variables are always
emitted as undefined symbols, which need to resolve to a global
symbols.
Managed variables need to be emitted as undefined symbols
in device compilations.
Reviewed by: Artem Belevich
Differential Revision: https://reviews.llvm.org/D95901
Sanjay Patel [Fri, 5 Feb 2021 20:10:11 +0000 (15:10 -0500)]
Revert "[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics with calls to vector library"
This reverts commit
2303e93e666e13ebf6d24323729c28f520ecca37.
Investigating bot failures.
Craig Topper [Fri, 5 Feb 2021 19:55:11 +0000 (11:55 -0800)]
[RISCV] Correct types in tablegen multiclasses found by D95874.
Arthur Eubanks [Fri, 5 Feb 2021 19:14:12 +0000 (11:14 -0800)]
[NVPTX][NewPM] Temporarily disable NVPTX passes in new PM pipeline
These passes are causing numerical discrepancies after being added to
the pipeline. Disable while investigating.
Reviewed By: rupprecht
Differential Revision: https://reviews.llvm.org/D96166
zoecarver [Fri, 5 Feb 2021 19:24:38 +0000 (11:24 -0800)]
[lic++][docs] Explain noexcept policy for narrow contracts.
Adds documentation around libc++'s policy to add noexcept to things that cannot throw but aren't marked as noexcept.
Refs LWG 3518 and D95251.
Differential Revision: https://reviews.llvm.org/D95821
Sanjay Patel [Fri, 5 Feb 2021 19:05:29 +0000 (14:05 -0500)]
[PhaseOrdering] add test to show combined result of reassociate+instcombine+vectorizers; NFC
Sanjay Patel [Fri, 5 Feb 2021 18:42:03 +0000 (13:42 -0500)]
[Reassociate] add test for shl+or; NFC
Lukas Sommer [Thu, 4 Feb 2021 19:56:15 +0000 (14:56 -0500)]
[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics with calls to vector library
This patch adds a pass to replace calls to vector intrinsics
(i.e., LLVM intrinsics operating on vector operands) with
calls to a vector library.
Currently, calls to LLVM intrinsics are only replaced with
calls to vector libraries when scalar calls to intrinsics are
vectorized by the Loop- or SLP-Vectorizer.
With this pass, it is now possible to replace calls to LLVM
intrinsics already operating on vector operands, e.g., if
such code was generated by MLIR. For the replacement,
information from the TargetLibraryInfo, e.g., as specified
via -vector-library is used.
Differential Revision: https://reviews.llvm.org/D95373
Wouter van Oortmerssen [Fri, 8 Jan 2021 23:27:08 +0000 (15:27 -0800)]
[WebAssembly] locals can now be indirect in DWARF
This for example to indicate that byval args are represented by a pointer to a struct.
Followup to https://reviews.llvm.org/D94140
Differential Revision: https://reviews.llvm.org/D94347
Eric Schweitz [Fri, 5 Feb 2021 17:40:19 +0000 (09:40 -0800)]
[flang][NFC] Make KindTy consistent and consistently used.
Differential Revision: https://reviews.llvm.org/D96154
Eric Schweitz [Fri, 5 Feb 2021 16:53:32 +0000 (08:53 -0800)]
[flang][NFC] Update comments.
Differential Revision: https://reviews.llvm.org/D96152
Siva Chandra [Thu, 4 Feb 2021 06:49:32 +0000 (22:49 -0800)]
[libc] Add aarch64 flavors of floor, round, sqrt and trunc.
Only single and double precision flavors have been added.
Reviewed By: lntue, sdesmalen
Differential Revision: https://reviews.llvm.org/D95999
Thomas Preud'homme [Wed, 9 Dec 2020 22:18:32 +0000 (22:18 +0000)]
Stop traping on sNaN in __builtin_isnan
__builtin_isnan currently generates a floating-point compare operation
which triggers a trap when faced with a signaling NaN in StrictFP mode.
This commit uses integer operations instead to not generate any trap in
such a case.
Reviewed By: kpn
Differential Revision: https://reviews.llvm.org/D95948
Amy Huang [Fri, 5 Feb 2021 18:23:46 +0000 (10:23 -0800)]
[DebugInfo] Fix error from D95893, where I accidentally used an
unsigned int in a loop and it wraps around.
Follow up to https://reviews.llvm.org/D95893
Huihui Zhang [Fri, 5 Feb 2021 17:54:54 +0000 (09:54 -0800)]
[DAGCombiner][SVE] Fix invalid use of getVectorNumElements() in visitSRA.
Make sure scalable property is preserved by using getVectorElementCount().
Reviewed By: paulwalker-arm
Differential Revision: https://reviews.llvm.org/D95967
Amy Huang [Fri, 29 Jan 2021 20:08:35 +0000 (12:08 -0800)]
[CodeView][DebugInfo] Update the code for removing template arguments from the display name of a codeview function id.
Previously the code split the string at the first '<', which
incorrectly truncated names like `operator<`.
Differential Revision: https://reviews.llvm.org/D95893
Jianzhou Zhao [Wed, 3 Feb 2021 19:41:58 +0000 (19:41 +0000)]
[dfsan] Add thread registration
This is a part of https://reviews.llvm.org/D95835.
This change is to address two problems
1) When recording stacks in origin tracking, libunwind is not async signal safe. Inside signal callbacks, we need
to use fast unwind. Fast unwind needs threads
2) StackDepot used by origin tracking is not async signal safe, we set a flag per thread inside
a signal callback to prevent from using it.
The thread registration is similar to ASan and MSan.
Related MSan changes are
* https://github.com/llvm/llvm-project/commit/
98f5ea0dbae664a2e5f9381a64f2913fe1add208
* https://github.com/llvm/llvm-project/commit/
f653cda2695ac7390fe5663f2c0895213938334d
* https://github.com/llvm/llvm-project/commit/
5a7c3643437c262137bd3dac7f6a0f5b9e8501be
Some changes in the diff are used in the next diffs
1) The test case pthread.c is not very interesting for now. It will be
extended to test origin tracking later.
2) DFsanThread::InSignalHandler will be used by origin tracking later.
Reviewed-by: morehouse
Differential Revision: https://reviews.llvm.org/D95963
Fangrui Song [Fri, 5 Feb 2021 17:37:37 +0000 (09:37 -0800)]
[ELF] Improve --icf=safe diagnostic
The current diagnostic has confused users. The new wording is adapted from one suggested by Ian Lance Taylor.
Differential Revision: https://reviews.llvm.org/D95917
Wen-Heng (Jack) Chung [Thu, 4 Feb 2021 18:16:12 +0000 (12:16 -0600)]
[AMDGPU] Add Fiji target in fptosi/fptoui instruction-select MIR tests.
In response to review comments in D95964, add a target with f16 instructions.
Differential Revision: https://reviews.llvm.org/D96061
Arthur Eubanks [Fri, 5 Feb 2021 17:11:07 +0000 (09:11 -0800)]
[gn build] Turn on new pass manager by default
Matches cmake build
Arthur O'Dwyer [Thu, 4 Feb 2021 23:12:52 +0000 (18:12 -0500)]
Revert "Revert "[libc++] [P0879] constexpr std::nth_element, and rewrite its tests.""
This reverts commit
b6ffece32035a90d181101f356bd9c04ea1d3122.
The bug is now fixed (it was a stupid cut-and-paste kind of error),
and the regression test added. The new patch is also simpler than the old one!
Differential Revision: https://reviews.llvm.org/D96084
Simon Pilgrim [Fri, 5 Feb 2021 16:50:37 +0000 (16:50 +0000)]
[MSP430] Fix multiclass template parameter types. NFC.
Fixes TableGen parser errors reported by D95874.
Sam McCall [Thu, 4 Feb 2021 14:08:33 +0000 (15:08 +0100)]
[clangd] Trace queue state for each TUScheduler action.
The new trace event includes what's already in the queue when adding.
For tracers that follow contexts, the trace event will span the time that the action
spends in the queue.
For tracers that follow threads, the trace will be a tiny span on the enqueuing thread.
Differential Revision: https://reviews.llvm.org/D96027
Jonas Devlieghere [Fri, 5 Feb 2021 16:50:48 +0000 (08:50 -0800)]
[lldb] Emit type annotation in SWIG generated Python code.
The Python code generated by SWIG is compatible with both Python 2 and
Python 3. The -py3 option enables Python 2 incompatible features such as
function annotations and abstract base classes.
Differential revision: https://reviews.llvm.org/D96096
Denys Shabalin [Fri, 5 Feb 2021 16:25:44 +0000 (17:25 +0100)]
Drop LLVM_i1, LLVM_i8, LLVM_i32, LLVM_IntBase types
Those types are not needed any longer since LLVM dialect
has migrated to using MLIR's I1, I8, I32 types directly.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D96127
Michael Liao [Thu, 4 Feb 2021 16:05:35 +0000 (11:05 -0500)]
Recommit of
a2fdf9d4d734732a6fa9288f1ffdf12bf8618123.
- The failures are all cc1-based tests due to the missing `-aux-triple` options,
which is always prepared by the driver in CUDA/HIP compilation.
- Add extra check on the missing aux-targetinfo to prevent crashing.
[hip][cuda] Enable extended lambda support on Windows.
- On Windows, extended lambda has extra issues due to the numbering
schemes are different between the host compilation (Microsoft C++ ABI)
and the device compilation (Itanium C++ ABI. Additional device side
lambda number is required per lambda for the host compilation to
correctly mangle the device-side lambda name.
- A hybrid numbering context `MSHIPNumberingContext` is introduced to
number a lambda for both host- and device-compilations.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D69322
This reverts commit
4874ff02417916cc9ff994b34abcb5e563056546.
Sidharth Baveja [Fri, 5 Feb 2021 16:10:53 +0000 (16:10 +0000)]
LoopUnrollAndJam] Only allow loops with single exit(ing) blocks
Summary:
This resolves an issue posted on Bugzilla. https://bugs.llvm.org/show_bug.cgi?id=48764
In this issue, the loop had multiple exit blocks, which resulted in the
function getExitBlock to return a nullptr, which resulted in hitting the assert.
This patch ensures that loops which only have one exit block as allowed to be
unrolled and jammed.
Reviewed By: Whitney, Meinersbur, dmgreen
Differential Revision: https://reviews.llvm.org/D95806
Anton Zabaznov [Fri, 5 Feb 2021 15:40:53 +0000 (18:40 +0300)]
[OpenCL] Add macro definitions of OpenCL C 3.0 features
This patch adds possibility to define OpenCL C 3.0 feature macros
via command line option or target setting.
Reviewed By: Anastasia
Differential Revision: https://reviews.llvm.org/D95776
Stephen Kelly [Fri, 5 Feb 2021 15:10:10 +0000 (15:10 +0000)]
[ASTMatchers] Fix segfault when Action is nullptr
It can be nullptr in unit tests.
Yvan Roux [Fri, 5 Feb 2021 14:57:33 +0000 (15:57 +0100)]
[Test] Fix test case demonstrating oddities in behavior of LSR.
Add x86 targets requirement to fix bots which are not building these
targets.
Paul Robinson [Fri, 15 Jan 2021 16:40:47 +0000 (08:40 -0800)]
[RGT][ProfileData] Correct a test assertion
Found by the Rotten Green Tests project.
Differential Revision: https://reviews.llvm.org/D95258
Sven van Haastregt [Fri, 5 Feb 2021 13:46:17 +0000 (13:46 +0000)]
[OpenCL] Add cl_khr_subgroup_shuffle* to TableGen BIFs
Add the builtin functions brought by the cl_khr_subgroup_shuffle and
cl_khr_subgroup_shuffle_relative extensions to
`-fdeclare-opencl-builtins`.
Lei Zhang [Fri, 5 Feb 2021 14:12:24 +0000 (09:12 -0500)]
[mlir][vector] Add constant folding for fp16 to fp32 bitcast
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D96041
Lei Zhang [Fri, 5 Feb 2021 14:03:48 +0000 (09:03 -0500)]
[mlir][spirv] Add more vector conversion patterns
This patch introduces a few more straightforward patterns
to convert vector ops operating on 1-4 element vectors
to their corresponding SPIR-V counterparts.
This patch also enables converting vector<1xT> to T.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D96042
Akira Hatanaka [Mon, 25 Jan 2021 19:56:33 +0000 (11:56 -0800)]
[ObjC][ARC] Use operand bundle 'clang.arc.rv' instead of explicitly
emitting retainRV or claimRV calls in the IR
This reapplies
3fe3946d9a958b7af6130241996d9cfcecf559d4 without the
changes made to lib/IR/AutoUpgrade.cpp, which was violating layering.
Original commit message:
Background:
This patch makes changes to the front-end and middle-end that are
needed to fix a longstanding problem where llvm breaks ARC's autorelease
optimization (see the link below) by separating calls from the marker
instructions or retainRV/claimRV calls. The backend changes are in
https://reviews.llvm.org/D92569.
https://clang.llvm.org/docs/AutomaticReferenceCounting.html#arc-runtime-objc-autoreleasereturnvalue
What this patch does to fix the problem:
- The front-end adds operand bundle "clang.arc.rv" to calls, which
indicates the call is implicitly followed by a marker instruction and
an implicit retainRV/claimRV call that consumes the call result. In
addition, it emits a call to @llvm.objc.clang.arc.noop.use, which
consumes the call result, to prevent the middle-end passes from changing
the return type of the called function. This is currently done only when
the target is arm64 and the optimization level is higher than -O0.
- ARC optimizer temporarily emits retainRV/claimRV calls after the calls
with the operand bundle in the IR and removes the inserted calls after
processing the function.
- ARC contract pass emits retainRV/claimRV calls after the call with the
operand bundle. It doesn't remove the operand bundle on the call since
the backend needs it to emit the marker instruction. The retainRV and
claimRV calls are emitted late in the pipeline to prevent optimization
passes from transforming the IR in a way that makes it harder for the
ARC middle-end passes to figure out the def-use relationship between
the call and the retainRV/claimRV calls (which is the cause of
PR31925).
- The function inliner removes an autoreleaseRV call in the callee if
nothing in the callee prevents it from being paired up with the
retainRV/claimRV call in the caller. It then inserts a release call if
the call is annotated with claimRV since autoreleaseRV+claimRV is
equivalent to a release. If it cannot find an autoreleaseRV call, it
tries to transfer the operand bundle to a function call in the callee.
This is important since ARC optimizer can remove the autoreleaseRV
returning the callee result, which makes it impossible to pair it up
with the retainRV/claimRV call in the caller. If that fails, it simply
emits a retain call in the IR if the implicit call is a call to
retainRV and does nothing if it's a call to claimRV.
Future work:
- Use the operand bundle on x86-64.
- Fix the auto upgrader to convert call+retainRV/claimRV pairs into
calls annotated with the operand bundles.
rdar://
71443534
Differential Revision: https://reviews.llvm.org/D92808
Arnold Schwaighofer [Thu, 4 Feb 2021 18:51:23 +0000 (10:51 -0800)]
We can only move static allocas into the resume entry points
Dynamic allocas that still exist have been verified to be only used
'locally' not accross a suspend point.
rdar://
73903220
Differential Revision: https://reviews.llvm.org/D96071
Stephen Kelly [Tue, 22 Dec 2020 17:45:22 +0000 (17:45 +0000)]
[clang-tidy] Simplify implementation of container-size-empty
Use IgnoreUnlessSpelledInSource to make the matcher code smaller and
more visibly-related to the code.
Differential Revision: https://reviews.llvm.org/D91303
Stephen Kelly [Mon, 20 Jan 2020 21:55:10 +0000 (21:55 +0000)]
Add an API to simplify setting TraversalKind in clang-tidy matchers
Reviewers: sammccall
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D80623
Lei Zhang [Fri, 5 Feb 2021 13:55:32 +0000 (08:55 -0500)]
[mlir][vector] Add patterns to cast away leading 1-dim
This patch adds patterns to use vector.shape_cast to cast
away leading 1-dimensions from a few vector operations.
It allows exposing more canonical forms of vector.transfer_read,
vector.transfer_write, vector_extract_strided_slice, and
vector.insert_strided_slice. With this, we can have more
opportunity to cancelling extract/insert ops or forwarding
write/read ops.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D95873
Akira Hatanaka [Fri, 5 Feb 2021 14:00:05 +0000 (06:00 -0800)]
Revert "[ObjC][ARC] Use operand bundle 'clang.arc.rv' instead of explicitly"
This reverts commit
3fe3946d9a958b7af6130241996d9cfcecf559d4.
The commit violates layering by including a header from Analysis in
lib/IR/AutoUpgrade.cpp.
Akira Hatanaka [Mon, 25 Jan 2021 19:56:33 +0000 (11:56 -0800)]
[ObjC][ARC] Use operand bundle 'clang.arc.rv' instead of explicitly
emitting retainRV or claimRV calls in the IR
Background:
This patch makes changes to the front-end and middle-end that are
needed to fix a longstanding problem where llvm breaks ARC's autorelease
optimization (see the link below) by separating calls from the marker
instructions or retainRV/claimRV calls. The backend changes are in
https://reviews.llvm.org/D92569.
https://clang.llvm.org/docs/AutomaticReferenceCounting.html#arc-runtime-objc-autoreleasereturnvalue
What this patch does to fix the problem:
- The front-end adds operand bundle "clang.arc.rv" to calls, which
indicates the call is implicitly followed by a marker instruction and
an implicit retainRV/claimRV call that consumes the call result. In
addition, it emits a call to @llvm.objc.clang.arc.noop.use, which
consumes the call result, to prevent the middle-end passes from changing
the return type of the called function. This is currently done only when
the target is arm64 and the optimization level is higher than -O0.
- ARC optimizer temporarily emits retainRV/claimRV calls after the calls
with the operand bundle in the IR and removes the inserted calls after
processing the function.
- ARC contract pass emits retainRV/claimRV calls after the call with the
operand bundle. It doesn't remove the operand bundle on the call since
the backend needs it to emit the marker instruction. The retainRV and
claimRV calls are emitted late in the pipeline to prevent optimization
passes from transforming the IR in a way that makes it harder for the
ARC middle-end passes to figure out the def-use relationship between
the call and the retainRV/claimRV calls (which is the cause of
PR31925).
- The function inliner removes an autoreleaseRV call in the callee if
nothing in the callee prevents it from being paired up with the
retainRV/claimRV call in the caller. It then inserts a release call if
the call is annotated with claimRV since autoreleaseRV+claimRV is
equivalent to a release. If it cannot find an autoreleaseRV call, it
tries to transfer the operand bundle to a function call in the callee.
This is important since ARC optimizer can remove the autoreleaseRV
returning the callee result, which makes it impossible to pair it up
with the retainRV/claimRV call in the caller. If that fails, it simply
emits a retain call in the IR if the implicit call is a call to
retainRV and does nothing if it's a call to claimRV.
Future work:
- Use the operand bundle on x86-64.
- Fix the auto upgrader to convert call+retainRV/claimRV pairs into
calls annotated with the operand bundles.
rdar://
71443534
Differential Revision: https://reviews.llvm.org/D92808
Nicolas Vasilache [Fri, 5 Feb 2021 13:37:00 +0000 (13:37 +0000)]
[mlir][Linalg] NFC - Improve usage of mlir::linalg::isaContractionOpInterface
Alex Zinenko [Thu, 4 Feb 2021 10:53:10 +0000 (11:53 +0100)]
[mlir] Turn Linalg to LLVM into a partial conversion
Historically, Linalg To LLVM conversion subsumed numerous other conversions,
including (affine) loop lowerings to CFG and conversions from the Standard and
Vector dialects to the LLVM dialect. This was due to the insufficient support
for partial conversions in the infrastructure that essentially required
conversions that involve type change (in this case, !linalg.range to
!llvm.struct) to be performed in a single conversion sweep. This is no longer
the case so remove the subsumed conversions and run them as separate passes
when necessary.
Depends On D95317
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D96008
Kadir Cetinkaya [Wed, 3 Feb 2021 13:09:05 +0000 (14:09 +0100)]
[clangd] Deduplicate scopes in IncludeFixer queries
Differential Revision: https://reviews.llvm.org/D95942
Qiu Chaofan [Fri, 5 Feb 2021 12:33:56 +0000 (20:33 +0800)]
Revert "[PowerPC] [Clang] Enable float128 feature on P9 by default"
Commit
6bf29dbb enables float128 feature by default for Power9 targets.
But float128 may cause build failure in libcxx testing. Revert this
commit first to unblock LLVM 12 release.
Simon Pilgrim [Fri, 5 Feb 2021 12:32:45 +0000 (12:32 +0000)]
[LoopVectorize][ARM] Regenerate mve-gather-scatter-tailpred.ll test
Fix codegen after rG7fe41ac3dff2d44c3d2c31b28554fbe4a86eaa6c
Vladislav Vinogradov [Thu, 4 Feb 2021 11:12:05 +0000 (14:12 +0300)]
[mlir] Add `const` qualifiers to `AffineMap` methods
The `AffineMap` class follows the same semantic as Type and Attribute.
It is immutable object, so it make sence to mark its methods as const.
Also part of its API is already marked as const, this change just make the API consistent.
Reviewed By: ftynse, bondhugula
Differential Revision: https://reviews.llvm.org/D96026
Aaron Ballman [Fri, 5 Feb 2021 12:18:48 +0000 (07:18 -0500)]
Treat opencl_unroll_hint subject errors as semantic rather than parse errors
The attribute definition claimed the attribute was inheritable (which
only applies to declaration attributes) and not a statement attribute.
Further, it treats subject appertainment errors as being parse errors
rather than semantic errors, which leads to us accepting invalid code.
For instance, we currently fail to reject:
void foo() {
int i = 1000;
__attribute__((nomerge, opencl_unroll_hint(8)))
if (i) { foo(); }
}
This addresses the issues by clarifying that opencl_unroll_hint is a
statement attribute and handles its appertainment checks in the
semantic layer instead of the parsing layer. This changes the output of
the diagnostic text to be more consistent with other appertainment
errors.
Nicolas Vasilache [Fri, 5 Feb 2021 12:18:35 +0000 (12:18 +0000)]
[mlir][Linalg] Fix spurious test change
Nicolas Vasilache [Fri, 5 Feb 2021 11:48:16 +0000 (11:48 +0000)]
[mlir][Linalg] NFC - Refactor vectorization to be more composable
Differential Revision: https://reviews.llvm.org/D96116
Adrian Kuegel [Fri, 5 Feb 2021 11:51:03 +0000 (12:51 +0100)]
Revert "[LV] Unconditionally branch from middle to scalar preheader if the scalar loop must execute"
This reverts commit
3e5ce49e5371ce4feadbf97dd5c2b652d9db3d1d.
Tests started failing on PPC, for example:
http://lab.llvm.org:8011/#/builders/105/builds/5569
Max Kazantsev [Fri, 5 Feb 2021 11:27:42 +0000 (18:27 +0700)]
[Test] Add tests demonstrating missing case of usub with overflow usage
The test shows how "usub with overflow" opt gets or does not get applied
to increment of IV depending on its code placement, while two cases are
semantically equivalent.
Nicolas Vasilache [Fri, 5 Feb 2021 11:28:52 +0000 (11:28 +0000)]
[mlir][Linalg] Add option to anchor on func name in TestLinalgCodegenStrategy
Simon Pilgrim [Fri, 5 Feb 2021 11:38:09 +0000 (11:38 +0000)]
IROutliner.cpp - fix Wdocumentation warning. NFCI.
Remove duplicate param
Simon Pilgrim [Fri, 5 Feb 2021 11:34:43 +0000 (11:34 +0000)]
AArch64LowerHomogeneousPrologEpilog.cpp - fix Wdocumentation warning. NFCI.
Simon Pilgrim [Fri, 5 Feb 2021 11:31:17 +0000 (11:31 +0000)]
SampleProfile.cpp - fix Wdocumentation warning. NFCI.
Remove duplicate param
Simon Pilgrim [Fri, 5 Feb 2021 11:21:00 +0000 (11:21 +0000)]
IROutliner.cpp - fix Wdocumentation warnings. NFCI.
Simon Pilgrim [Fri, 5 Feb 2021 11:11:37 +0000 (11:11 +0000)]
CodeGenPassBuilder.h - fix Wdocumentation warning. NFCI.
void functions shouldn't have a \returns
Simon Pilgrim [Fri, 5 Feb 2021 10:51:30 +0000 (10:51 +0000)]
TypeMismatchCheck.cpp - fix Wdocumentation warning. NFCI.
Simon Pilgrim [Fri, 5 Feb 2021 10:43:36 +0000 (10:43 +0000)]
DWARFDebugFrame.h - fix Wdocumentation warning. NFCI.
Joe Ellis [Fri, 5 Feb 2021 10:43:06 +0000 (10:43 +0000)]
[AArch64][SVE] Coalesce ptrue instrinsic calls where possible
It is possible to eliminate redundant calls to the SVE ptrue intrinsic.
For example: suppose that we have two SVE ptrue intrinsic calls P1 and
P2. If P1 is at least as wide as P2, then P2 can be written as a
reinterpret P1 using the SVE reinterpret intrinsics.
Coalescing ptrue intrinsics can result in fewer ptrue instructions in
the codegen, and is conducive to better analysis further down the line.
This commit extends the aarch64-sve-intrinsic-opts pass to support
coalescing ptrue intrisic calls.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D94230
Aleksandr Platonov [Fri, 5 Feb 2021 09:32:47 +0000 (12:32 +0300)]
[clangd] Take into account what is in the index (symbols, references, etc.) at indexes merge
Current indexes merge logic skip data from the static index if the file is in the dynamic index, but sometimes the dynamic index does not contain references (e.g. preamble (dynamic) index vs background (static) index).
This problem is masked with the fact, that the preamble index file list consists of file URI's and other indexes file lists consist of file paths.
This patch introduces the index contents (symbols, references, etc.), which makes indexes merge more flexible and makes it able to use URI's for the index file list.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D94952
Guillaume Chatelet [Fri, 5 Feb 2021 10:09:51 +0000 (10:09 +0000)]
[NFC] Simplify expression
Guillaume Chatelet [Fri, 5 Feb 2021 10:09:17 +0000 (10:09 +0000)]
[NFC] inline variable
Fraser Cormack [Thu, 28 Jan 2021 15:31:27 +0000 (15:31 +0000)]
[RISCV] Support scalable-vector integer reduction intrinsics
This patch adds support for the integer reduction intrinsics supported
by RVV. This excludes "mul" which has no corresponding instruction.
The reduction instructions in RVV have slightly complicated type
constraints given they always produce a single "M1" vector register.
They are lowered to custom nodes including the second "scalar" reduction
operand to simplify the patterns and in the hope that they can be useful
for future DAG combines.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D95620
Fraser Cormack [Sat, 30 Jan 2021 16:53:32 +0000 (16:53 +0000)]
[RISCV] Optimize sign-extended EXTRACT_VECTOR_ELT nodes
This patch custom-legalizes all integer EXTRACT_VECTOR_ELT nodes where
SEW < XLEN to VMV_S_X nodes to help the compiler infer sign bits from
the result. This allows us to eliminate redundant sign extensions.
For parity, all integer EXTRACT_VECTOR_ELT nodes are legalized this way
so that we don't need TableGen patterns for some and not others.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D95741
Fraser Cormack [Thu, 4 Feb 2021 11:13:45 +0000 (11:13 +0000)]
[RISCV] Add patterns for scalable-vector fsqrt
This patch adds support for lowering the sqrt intrinsic to the RVV
vfsqrt instruction.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D96012
David Green [Fri, 5 Feb 2021 09:34:24 +0000 (09:34 +0000)]
[CostModel] Remove VF from IntrinsicCostAttributes
getIntrinsicInstrCost takes a IntrinsicCostAttributes holding various
parameters of the intrinsic being costed. It can either be called with a
scalar intrinsic (RetTy==Scalar, VF==1), with a vector instruction
(RetTy==Vector, VF==1) or from the vectorizer with a scalar type and
vector width (RetTy==Scalar, VF>1). A RetTy==Vector, VF>1 is considered
an error. Both of the vector modes are expected to be treated the same,
but because this is confusing many backends end up getting it wrong.
Instead of trying work with those two values separately this removes the
VF parameter, widening the RetTy/ArgTys by VF used called from the
vectorizer. This keeps things simpler, but does require some other
modifications to keep things consistent.
Most backends look like this will be an improvement (or were not using
getIntrinsicInstrCost). AMDGPU needed the most changes to keep the code
from
c230965ccf36af5c88c working. ARM removed the fix in
dfac521da1b90db683, webassembly happens to get a fixup for an SLP cost
issue and both X86 and AArch64 seem to now be using better costs from
the vectorizer.
Differential Revision: https://reviews.llvm.org/D95291
Raphael Isemann [Fri, 5 Feb 2021 09:12:27 +0000 (10:12 +0100)]
[lldb][NFC] Minor comment and inlining fixes for Args
The element count getter can just be in the header. Also doxygenify some of the
comments and document m_argv's terminating nullptr element that the other
comments keep mentioning.
James Henderson [Fri, 5 Feb 2021 08:36:31 +0000 (08:36 +0000)]
[llvm-objdump] Fix missing first line of license in header file
Nicolas Vasilache [Fri, 5 Feb 2021 08:11:23 +0000 (08:11 +0000)]
[mlir][linalg] Linalg.fill on tensor should not have side-effects
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D96094
Anton Zabaznov [Fri, 5 Feb 2021 08:15:56 +0000 (11:15 +0300)]
[OpenCL] Introduce new language options for OpenCL keywords.
OpenCL keywords 'pipe' and 'generic' are unconditionally
supported for OpenCL C 2.0 or in OpenCL C++ mode. In OpenCL C 3.0
these keywords are available if corresponding optional core
feature is supported.
Reviewed By: Anastasia, svenvh
Differential Revision: https://reviews.llvm.org/D95778
Pavel Labath [Thu, 4 Feb 2021 14:43:43 +0000 (15:43 +0100)]
[lldb/cmake] Reduce duplication in generation lldb-dotest
Use indirection to avoid duplicated long lists of variables.
Depends on D95261.
Differential Revision: https://reviews.llvm.org/D96034
Pavel Labath [Fri, 22 Jan 2021 20:48:17 +0000 (21:48 +0100)]
[lldb/test] Reduce API test tools configuration boilerplate
Replace the dotest command line options and various cmake variables,
which are used for passing the locations of llvm tools to the API tests
with a single variable, which points to the directory these tools are
placed in. Besides reducing repetition, this also makes things more
similar to how "normal" llvm tests are configured.
Differential Revision: https://reviews.llvm.org/D95261
Max Kazantsev [Fri, 5 Feb 2021 06:54:16 +0000 (13:54 +0700)]
[Test] Add more tests demonstrating oddities in behavior of LSR
These tests demonstrate that LSR does not insert IV increment
into the latch block (as it supposes to) when it can use an
existing Phi as IV rather than creating a new LSR IV.
Sourabh Singh Tomar [Thu, 4 Feb 2021 19:25:22 +0000 (00:55 +0530)]
[flang] Adapt mlir based error status handling in `tco` tool
Earlier scheme was using negative integers for communicating error status,
switch to canonical MLIR style.
f18 commit authored by @schweitz:
https://github.com/flang-compiler/f18-llvm-project/commit/
c1af08d6e70b66c08ee2fbf2e63c764ec2e006e5
Reviewed By: mehdi_amini, clementval, svedanayagam
Differential Revision: https://reviews.llvm.org/D96068
Kazu Hirata [Fri, 5 Feb 2021 05:18:05 +0000 (21:18 -0800)]
[Transforms/Scalar] Use range-based for loops (NFC)
Kazu Hirata [Fri, 5 Feb 2021 05:18:03 +0000 (21:18 -0800)]
[GlobalISel] Use ListSeparator (NFC)
Kazu Hirata [Fri, 5 Feb 2021 05:18:01 +0000 (21:18 -0800)]
[IR] Drop unnecessary const from return types (NFC)
Identified with const-return-type.
Fangrui Song [Fri, 5 Feb 2021 05:14:36 +0000 (21:14 -0800)]
LLVMgold.so: Fix tests after D95380
Emily Shi [Fri, 5 Feb 2021 05:03:25 +0000 (21:03 -0800)]
[Darwin] Switch to new logging api for sanitizers
Switch to new logging api added in [[ https://developer.apple.com/documentation/os/os_log_error | macOS 10.12 ]] that is more memory safe and enables us to label the log messages in the future. Falls back to old API if ran on older OS versions.
Commited by Dan Liew on behalf of Emily Shi.
rdar://
25181524
Reviewed By: delcypher, yln
Differential Revision: https://reviews.llvm.org/D95977
Fangrui Song [Fri, 5 Feb 2021 04:51:02 +0000 (20:51 -0800)]
[MC] Add isFPImm after D96091
Fangrui Song [Fri, 5 Feb 2021 04:46:18 +0000 (20:46 -0800)]
[VE] Fix allowsMisalignedMemoryAccesses after D96097
Fangrui Song [Fri, 5 Feb 2021 04:42:35 +0000 (20:42 -0800)]
[MC] Add createFPImm/isFPImm/setFPImm to smooth migration from FPImm to DFPImm after D96091
Fangrui Song [Fri, 5 Feb 2021 04:39:52 +0000 (20:39 -0800)]
[ARM][WebAssembly] Fix incorrect MCOperand::createDFPImm after D96091
Craig Topper [Fri, 5 Feb 2021 04:26:45 +0000 (20:26 -0800)]
[RISCV] Use LLVMScalarOrSameVectorWidth to make avoid needing to mention the index type for vrgatherei16 intrinsics.
Add .vv to the intrinsic name to be consistent with D95979.
Reviewed By: khchen
Differential Revision: https://reviews.llvm.org/D95981
Craig Topper [Fri, 5 Feb 2021 03:50:11 +0000 (19:50 -0800)]
[RISCV] Split vrgather intrinsics into separate vrgather.vv and vrgather.vx intrinsics.
The vrgather.vv instruction uses a vector of indices with the same
SEW as operand 0. The vrgather.vx instructions use a scalar index
operand of XLen bits.
By splitting this into 2 intrinsics we are able to use LLVMatchType
in the definition to avoid specifying the type for the index operand
when creating the IR for the intrinsic. For .vv it will match the
operand 0 type. And for .vx it will match the type of the vl operand
we already needed to specify a type for.
I'm considering splitting more intrinsics. This was a somewhat
odd one because the .vx doesn't use the element type, it always
use XLen.
Reviewed By: HsiangKai
Differential Revision: https://reviews.llvm.org/D95979
Matheus Izvekov [Fri, 5 Feb 2021 02:51:47 +0000 (10:51 +0800)]
[X86] Generate unaligned access for fixed slots in unaligned stack
loadRegFromStackSlot()/storeRegToStackSlot() can generate aligned access
instructions for stack slots even if the stack is unaligned, based on the
assumption that the stack can be realigned.
However, this doesn't work for fixed slots, which are e.g. used for
spilling XMM registers in a non-leaf function with
`__attribute__((preserve_all))`.
When compiling such code with `-mstack-alignment=8`, this causes general
protection faults.
Fix it by only considering stack realignment for non-fixed slots.
Note that this changes the output of three existing tests which spill AVX
registers, since AVX requires higher alignment than the ABI provides on
stack frame entry.
Reviewed By: rnk, jyknight
Differential Revision: https://reviews.llvm.org/D73126
Craig Topper [Fri, 5 Feb 2021 03:22:04 +0000 (19:22 -0800)]
[TargetLowering] Use Align in allowsMisalignedMemoryAccesses.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D96097
Dan Gohman [Fri, 5 Feb 2021 00:12:41 +0000 (16:12 -0800)]
[WebAssembly] Use single-threaded mode when -matomics isn't enabled.
When the -matomics feature is not enabled, disable POSIXThreads
mode and set the thread model to Single, so that we don't predefine
macros like `__STDCPP_THREADS__`.
Differential Revision: https://reviews.llvm.org/D96091
Dan Gohman [Fri, 5 Feb 2021 02:01:38 +0000 (18:01 -0800)]
[WebAssembly] Support single-floating-point immediate value
As mentioned in TODO comment, casting double to float causes NaNs to change bits.
To avoid the change, this patch adds support for single-floating-point immediate value on MachineCode.
Patch by Yuta Saito.
Differential Revision: https://reviews.llvm.org/D77384
Philip Reames [Fri, 5 Feb 2021 02:03:51 +0000 (18:03 -0800)]
Add missing test update from 3e5ce49
Sorry for the build break, apparently forgot to build ARM target.
Vitaly Buka [Fri, 5 Feb 2021 02:02:02 +0000 (18:02 -0800)]
[sanitizer] Fix the test on android
Fangrui Song [Fri, 5 Feb 2021 01:35:09 +0000 (17:35 -0800)]
DebugInfo: Temporarily work around -gsplit-dwarf + LTO .debug_gnu_pubnames regression after D94976
`-flto -gsplit-dwarf -g -O[123]` may create .debug_gnu_pubnames with 0 DIE
offset entries. llvm-dwarfdump -debug-gnu-pubnames/ld.lld --gdb-index errors for that.
```
.section .debug_gnu_pubnames,"",@progbits
.long .LpubNames_end2-.LpubNames_begin2 # Length of Public Names Info
.LpubNames_begin2:
.short 2 # DWARF Version
.long .Lcu_begin2 # Offset of Compilation Unit Info
.long 57 # Compilation Unit Length
.long 0 # DIE offset
.byte 16 # Attributes: TYPE, EXTERNAL
.asciz "absl" # External Name
.long 0 # DIE offset
.byte 16 # Attributes: TYPE, EXTERNAL
.asciz "absl::base_internal" # External Name
.long 0 # End Mark
```
Philip Reames [Fri, 5 Feb 2021 01:25:30 +0000 (17:25 -0800)]
[LV] Unconditionally branch from middle to scalar preheader if the scalar loop must execute
If we know that the scalar epilogue is required to run, modify the CFG to end the middle block with an unconditional branch to scalar preheader. This is instead of a conditional branch to either the preheader or the exit block.
The motivation to do this is to support multiple exit blocks. Specifically, the current structure forces us to identify immediate dominators and *which* exit block to branch from in the middle terminator. For the multiple exit case - where we know require scalar will hold - these questions are ill formed.
This is the last change needed to support multiple exit loops, but since the diffs are already large enough, I'm going to land this, and then enable separately. You can think of this as being NFCI-ish prep work, but the changes are a bit too involved for me to feel comfortable tagging the change that way.
Differential Revision: https://reviews.llvm.org/D94892
Shilei Tian [Fri, 5 Feb 2021 01:14:14 +0000 (20:14 -0500)]
[OpenMP][libomptarget] Fixed an issue that device sync is skipped if the kernel doesn't have any argument
Currently if there is not kernel argument, device synchronization will
be skipped. This can lead to two issues:
1. If there is any device error, it will not be captured;
2. The target region might end before the kernel is done, which is not spec
conformant.
The test added in this patch only runs on NVPTX platform, although it will not
be executed by Phab at all. It also requires `not` which is not available on most
systems.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D96067
Zequan Wu [Fri, 5 Feb 2021 01:00:09 +0000 (17:00 -0800)]
[AST] Update LVal before evaluating lambda decl fields.
Differential Revision: https://reviews.llvm.org/D96092