Lionel Landwerlin [Tue, 16 May 2023 13:10:31 +0000 (16:10 +0300)]
anv: generalize internal kernel concept
We'll add more of those kernels for other purposes.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
Lionel Landwerlin [Tue, 16 May 2023 10:13:41 +0000 (13:13 +0300)]
anv: add support for simple internal compute shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
Lionel Landwerlin [Tue, 16 May 2023 09:54:39 +0000 (12:54 +0300)]
anv: factor out generation kernel dispatch into helper
We would like to reuse this mechanism to dispatch different types of
internal shader. Those would replace some of the command streamer
commands we currently use.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
Lionel Landwerlin [Wed, 17 May 2023 10:40:14 +0000 (13:40 +0300)]
anv: limit ANV_PIPE_RENDER_TARGET_BUFFER_WRITES to blorp operations using 3D
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
Lionel Landwerlin [Tue, 16 May 2023 06:53:42 +0000 (09:53 +0300)]
anv: fix incorrect batch for 3DSTATE_CONSTANT_ALL emission
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
Lionel Landwerlin [Tue, 16 May 2023 06:20:09 +0000 (09:20 +0300)]
anv: disable mesh/task for generated draws
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
Lionel Landwerlin [Tue, 16 May 2023 06:25:17 +0000 (09:25 +0300)]
anv: only disable mesh when enabled at the VkDevice level
Saving ourselves some instructions since it's not going to get used.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
Samuel Pitoiset [Wed, 24 May 2023 06:20:33 +0000 (08:20 +0200)]
radv: fix smooth lines with graphics pipeline library
Need to be defensive here.
Fixes recent CTS
dEQP-VK.pipeline.fast_linked_library.extended_dynamic_state.*.line_raster_mode_smooth.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23200>
Samuel Pitoiset [Wed, 24 May 2023 12:51:46 +0000 (14:51 +0200)]
radv: do not force VRS 1x1 when smooth lines are enabled
Otherwise this will break VRS with GPL.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23200>
Samuel Pitoiset [Wed, 24 May 2023 12:44:54 +0000 (14:44 +0200)]
radv: add a helper for forcing VRS 1x1 in some situations
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23200>
Samuel Pitoiset [Wed, 24 May 2023 12:42:00 +0000 (14:42 +0200)]
radv: gather info about load_poly_line_smooth_enabled
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23200>
Lynne [Tue, 13 Jun 2023 15:50:29 +0000 (17:50 +0200)]
radv/video: reject unsupported hevc profiles and bit depths
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23625>
Lynne [Tue, 13 Jun 2023 15:50:07 +0000 (17:50 +0200)]
radv/video: reject non-8bit H264
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23625>
Lynne [Tue, 13 Jun 2023 15:40:50 +0000 (17:40 +0200)]
radv/video: reject general unsupported video formats
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23625>
Charmaine Lee [Wed, 14 Jun 2023 00:14:41 +0000 (03:14 +0300)]
svga: fix shader type after ntt
Set shader type to TGSI after ntt. Fixes assert in svga_create_shader.
Fixes:
0ac95418048 ("gallium: Drop PIPE_SHADER_CAP_PREFERRED_IR")
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23638>
Mike Blumenkrantz [Mon, 8 May 2023 12:55:03 +0000 (08:55 -0400)]
zink: add some ntv asserts for ms txf
it's illegal to do ms txf without a ms image
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22900>
Mike Blumenkrantz [Mon, 8 May 2023 12:54:26 +0000 (08:54 -0400)]
zink: assert that ntv image creation isn't clobbering existing images
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22900>
Mike Blumenkrantz [Tue, 13 Jun 2023 17:12:37 +0000 (13:12 -0400)]
zink: massively shrink qbo size for timestamp queries
timestamp queries can only ever record a single value, so
the qbo only needs to be large enough for that single value
fixes #9092
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23631>
Dave Airlie [Tue, 13 Jun 2023 00:44:33 +0000 (10:44 +1000)]
radv/video: program hevc max dec pic buffering correctly
This programs it like vaapi does.
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23613>
Dave Airlie [Mon, 12 Jun 2023 01:48:58 +0000 (11:48 +1000)]
radv/video: program frame number correctly.
doesn't appear to fix anything, but is more correct.
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23613>
Lionel Landwerlin [Fri, 9 Jun 2023 13:52:17 +0000 (16:52 +0300)]
anv: always report all pipeline stats regardless of stages
Tools like the scripts in shader-db expect all the fields to be there,
as the stats are put into a CSV file. So just report 0 if a stage
doesn't support workgroup memory size.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23559>
Lionel Landwerlin [Fri, 9 Jun 2023 13:32:17 +0000 (16:32 +0300)]
anv: report max simd width only once for fragment shaders
Reporting the value multiple times is confusing to shader-db scripts
because it believes multiple shaders are affected.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23559>
Lionel Landwerlin [Mon, 12 Jun 2023 18:05:44 +0000 (21:05 +0300)]
anv: deal with unsupported VkImageFormatListCreateInfo::pViewFormats
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
697ed61e7c ("anv: Improve image/view usage bits verification")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9190
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23606>
Friedrich Vock [Mon, 12 Jun 2023 17:50:55 +0000 (19:50 +0200)]
radv: Enable ray tracing pipelines by default
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23603>
Friedrich Vock [Mon, 12 Jun 2023 17:41:18 +0000 (19:41 +0200)]
radv: Add RADV_DEBUG=nort
This makes vkCmdTraceRaysKHR and ray queries no-ops and is useful
for triaging GPU hangs with raytracing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23603>
Mike Blumenkrantz [Wed, 4 Jan 2023 15:22:57 +0000 (10:22 -0500)]
lavapipe: use PACKAGE_VERSION for cache uuid in release builds
MESA_GIT_SHA1 is defined as "", which results in invalid access
fixes #7673
Fixes:
b38879f8c5f ("vallium: initial import of the vulkan frontend")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20520>
Mike Blumenkrantz [Thu, 8 Jun 2023 14:17:26 +0000 (10:17 -0400)]
radv: directly use vk_format_map for vertex input
this is much faster than calling a non-inline function with
conditionals to index the same array
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23599>
Mike Blumenkrantz [Thu, 8 Jun 2023 14:16:54 +0000 (10:16 -0400)]
vk: make vk_format_map[] public
having to go through a function call for non-planar mappings can be
very slow
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23599>
Lucas Stach [Sun, 11 Jun 2023 18:29:06 +0000 (20:29 +0200)]
etnaviv: only emit sampler config for changed samplers
Currently SAMPLER_CONFIG0 is always emitted to either update the active
configuration or disable the sampler. With NTE this always emits 32 state
dwords, while there are a lot of cases that only use a small number of
samplers and never change the other samplers from their disabled state.
Track the active samplers from the last emit, so we can skip the state
emission when the sampler is already disabled. Only emit the full state
after a context flush where we don't know the previous sampler state of
the GPU.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23579>
Mike Blumenkrantz [Thu, 8 Jun 2023 01:21:04 +0000 (21:21 -0400)]
zink: only try to create srgb mutable images if the vk format is supported
otherwise this is just a regular single-format image
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23626>
Mike Blumenkrantz [Wed, 7 Jun 2023 21:00:42 +0000 (17:00 -0400)]
radv: tweak gfx pipeline stage binding
iterating all the stages like this ends up unnecessarily calling
through to geometry stage binds when no shader was bound and no shader
is being bound by the power of optimization, so instead only do the unbind
part for the stages that are being unbound
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23600>
Alyssa Rosenzweig [Tue, 6 Jun 2023 20:55:35 +0000 (16:55 -0400)]
nir: Remove non-scoped barriers
Nothing uses them anymore.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 6 Jun 2023 20:53:46 +0000 (16:53 -0400)]
radeonsi: Scan for scoped barriers
Instead of control barriers, radeonsi doesn't see those anymore.
Fixes:
2d1859b01e3 ("radeonsi: always use scoped barrier")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 6 Jun 2023 20:51:54 +0000 (16:51 -0400)]
nir: Remove handling for non-scoped barriers
Nothing generates them so this is all dead.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 6 Jun 2023 20:48:09 +0000 (16:48 -0400)]
nir/tests: Use scoped barriers internally
Test what drivers actually use.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 6 Jun 2023 20:45:22 +0000 (16:45 -0400)]
treewide: Remove use_scoped_barrier
It is now set by all relevant drivers and not checked anywhere.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 6 Jun 2023 20:45:09 +0000 (16:45 -0400)]
ttn: Assume use_scoped_barrier
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 6 Jun 2023 20:44:41 +0000 (16:44 -0400)]
nir: Assume use_scoped_barrier
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 6 Jun 2023 20:43:43 +0000 (16:43 -0400)]
vtn: Assume use_scoped_barrier
True for all backends supporting barriers. This lets us collapse lots of code,
since scoped_barriers are based on the SPIR-V definition.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 6 Jun 2023 20:43:26 +0000 (16:43 -0400)]
glsl: Assume use_scoped_barrier
True for all backends supporting barriers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 6 Jun 2023 20:37:50 +0000 (16:37 -0400)]
ac/llvm: Drop memory_barrier_buffer impl
Both radeonsi and radv use scoped barriers, so this should not be possible to
hit.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 23 May 2023 17:55:43 +0000 (13:55 -0400)]
ntt: Use scoped barriers
In addition to bringing us one backend closer to the scoped-only future, this
improves the generated code in cases like:
memoryBarrierBuffer();
memoryBarrierShared();
controlBarrier();
With scoped_barriers + nir_opt_combine_barriers, we now emit only one MEMBAR
instruction (and a BARRIER) rather than two MEMBARs.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 23 May 2023 17:41:59 +0000 (13:41 -0400)]
ttn: Emit scoped barriers when needed
As we start converting more backends over.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Tue, 23 May 2023 14:52:02 +0000 (10:52 -0400)]
ir3: Drop reference to unsupported intrinsic
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Alyssa Rosenzweig [Wed, 7 Jun 2023 11:59:26 +0000 (07:59 -0400)]
vtn: Handle atomic counter semantics
This can happen for GLSL-environment SPIR-V.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Suggested-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
Erico Nunes [Tue, 13 Jun 2023 11:37:36 +0000 (13:37 +0200)]
ci: temporarily disable lima farm
The lab is currently experiencing network instability with the ISP.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23623>
Thomas H.P. Andersen [Thu, 8 Jun 2023 21:51:53 +0000 (23:51 +0200)]
r600: tgsi cleanup
337dc7d76604e646f1a85615ab2d9d238427bf46 removed the usage of these
fields in struct r600_shader_ctx
Cleaning this up will let us drop tgsi_array_info in a later MR
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23535>
Karol Herbst [Tue, 13 Jun 2023 14:02:23 +0000 (16:02 +0200)]
docs: improve OpenCL features
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed by Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23622>
Timur Kristóf [Tue, 6 Jun 2023 08:17:16 +0000 (10:17 +0200)]
radv: Leave primitive reset index at max on GFX8+.
GFX8+ only compares the bits according to the index type by default
(GFX9 can be changed by VGT_MULTI_PRIM_IB_RESET_EN.MATCH_ALL_BITS),
so we can always leave the programmed value at the maximum.
This reduces context rolls on GFX8+ when primitive restart is used.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23459>
Timur Kristóf [Tue, 6 Jun 2023 08:17:16 +0000 (10:17 +0200)]
radv: Remove primitive reset index from late scissor workaround.
Primitive reset has a corresponding dirty state which is already
included the used_states so it is not necessary to also check
the primitive reset index here.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23459>
Christian Gmeiner [Wed, 7 Jun 2023 15:14:49 +0000 (17:14 +0200)]
etnaviv: add support for performance warnings
These performance warnings should help to get a better understanding
where we doing non performance optimal things.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23615>
Tapani Pälli [Mon, 12 Jun 2023 13:37:06 +0000 (16:37 +0300)]
anv: use workaround framework for
1408224581,
14014097488
This makes sure we apply WA only when it is required, these issues
do not happen for later MTL steppings.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23596>
Tapani Pälli [Mon, 12 Jun 2023 13:25:18 +0000 (16:25 +0300)]
iris: use workaround framework for
1408224581,
14014097488
This makes sure we apply WA only when it is required, these issues
do not happen for later MTL steppings.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23596>
Tapani Pälli [Mon, 12 Jun 2023 18:26:38 +0000 (21:26 +0300)]
intel/dev: add parentheses around intel_needs_workaround macro
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23596>
Pavel Ondračka [Wed, 7 Jun 2023 13:48:00 +0000 (15:48 +0200)]
r300: be more agressive when merging A0 loads
Specifically we would bail out previously when encountering any
control flow, now we would optimize it even when the second ARL/ARR
is inside a lower level if/else branch.
shader-db
RV530:
total instructions in shared programs: 132020 -> 131924 (-0.07%)
instructions in affected programs: 3374 -> 3278 (-2.85%)
helped: 4
HURT: 0
RV370:
no change (no control flow there)
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
Pavel Ondračka [Wed, 7 Jun 2023 13:36:16 +0000 (15:36 +0200)]
r300: remove duplicate ARRs
We already do this for ARL, so just generalize the pass.
shader-db
RV530:
total instructions in shared programs: 132235 -> 132020 (-0.16%)
instructions in affected programs: 8492 -> 8277 (-2.53%)
helped: 41
HURT: 1
total temps in shared programs: 16900 -> 16887 (-0.08%)
temps in affected programs: 83 -> 70 (-15.66%)
helped: 13
HURT: 0
RV370:
total instructions in shared programs: 82395 -> 82320 (-0.09%)
instructions in affected programs: 4715 -> 4640 (-1.59%)
helped: 33
HURT: 1
total temps in shared programs: 12316 -> 12305 (-0.09%)
temps in affected programs: 75 -> 64 (-14.67%)
helped: 11
HURT: 0
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
Pavel Ondračka [Fri, 9 Jun 2023 12:32:47 +0000 (14:32 +0200)]
r300: optimize the load A0 pattern from wined3d
Shader-db
RV530:
total instructions in shared programs: 129701 -> 128733 (-0.75%)
instructions in affected programs: 7011 -> 6043 (-13.81%)
helped: 48
HURT: 0
total loops in shared programs: 15 -> 11 (-26.67%)
loops in affected programs: 4 -> 0
helped: 4
HURT: 0
total temps in shared programs: 16819 -> 16832 (0.08%)
temps in affected programs: 70 -> 83 (18.57%)
helped: 0
HURT: 13
total consts in shared programs: 90830 -> 90813 (-0.02%)
consts in affected programs: 4335 -> 4318 (-0.39%)
helped: 17
HURT: 0
RV370:
total instructions in shared programs: 82027 -> 81215 (-0.99%)
instructions in affected programs: 5456 -> 4644 (-14.88%)
helped: 39
HURT: 0
total temps in shared programs: 12262 -> 12273 (0.09%)
temps in affected programs: 64 -> 75 (17.19%)
helped: 0
HURT: 11
total consts in shared programs: 79119 -> 79104 (-0.02%)
consts in affected programs: 3825 -> 3810 (-0.39%)
helped: 15
HURT: 0
GAINED:5
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9157
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
Pavel Ondračka [Wed, 7 Jun 2023 12:02:47 +0000 (14:02 +0200)]
r300: move the ROUND+ARL->ARR fusing to main optimization loop
Its particularly important to have the copy-propagate pass run first.
So that when the round is vectorized, we don't have to follow the MOVs
to find out if it leads to ARL or not (we don't vectorize ARR/ARL at the
moment).
No shader-db change.
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
Pavel Ondračka [Wed, 7 Jun 2023 10:44:28 +0000 (12:44 +0200)]
r300: move the ARL merging pass up in the opt loop
Specifically after the first copy propagate run but before the
second one. Removal of ARLs will enable the copy propagate to be more
aggresive, as it is very carefull in such cases.
shader-db
RV530:
total instructions in shared programs: 131861 -> 131503 (-0.27%)
instructions in affected programs: 23949 -> 23591 (-1.49%)
helped: 199
HURT: 15
total temps in shared programs: 16997 -> 16903 (-0.55%)
temps in affected programs: 767 -> 673 (-12.26%)
helped: 69
HURT: 9
RV370:
total instructions in shared programs: 82360 -> 82027 (-0.40%)
instructions in affected programs: 19516 -> 19183 (-1.71%)
helped: 183
HURT: 15
total temps in shared programs: 12370 -> 12262 (-0.87%)
temps in affected programs: 664 -> 556 (-16.27%)
helped: 73
HURT: 0
The hurt programs are due to some constant load being copy propagated
which leads to bad interaction with source conflict resolve pass later.
v2: add missing shader type initialized to the tests. Previously we were
checking for has_omod which also practically means we have a fragment
shader, however its less readable.
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
Pavel Ondračka [Wed, 7 Jun 2023 13:11:47 +0000 (15:11 +0200)]
r300: move nir stuff to r300_nir file
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
Martin Roukala (né Peres) [Mon, 6 Mar 2023 13:30:07 +0000 (15:30 +0200)]
zink/ci: enable zink-radv-vangogh-valve for pre-merge testing
This should allow us to catch regressions without me having to bisect
them after they land :p
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8396
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21730>
Martin Roukala (né Peres) [Sat, 10 Jun 2023 08:07:02 +0000 (11:07 +0300)]
zink/ci: add more tests to the flake list of vangogh
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21730>
Martin Roukala (né Peres) [Sun, 11 Jun 2023 06:24:34 +0000 (09:24 +0300)]
ci/b2c: change the default first-console-activity timeout to 2 minutes
Having a high value for the first activity timeout made sense back in
the days when the machine may not be associated with salad early... but
this isn't the case anymore!
So let's go with a very conservative value of 2 minutes to boot :)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21730>
Juan A. Suarez Romero [Tue, 13 Jun 2023 09:05:01 +0000 (11:05 +0200)]
broadcom/ci: update expected results
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23617>
Corentin Noël [Tue, 13 Jun 2023 09:25:38 +0000 (11:25 +0200)]
gallium: Rename dri_init_screen_helper into dri_init_screen
Makes it more obvious that this function is actually initializing the dri_screen
and not some helper.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
Corentin Noël [Wed, 24 May 2023 14:41:57 +0000 (16:41 +0200)]
gallium: Use the common destroy function on screen initialization failure
Avoid leaking configuration options on initialization failure.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
Corentin Noël [Wed, 24 May 2023 14:32:26 +0000 (16:32 +0200)]
gallium: Only call dri_init_options when the screen is actually created
Avoid calling this function on screen creation failure as we will discard its
result right after.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
Corentin Noël [Wed, 24 May 2023 14:23:35 +0000 (16:23 +0200)]
pipe-loader: Do not destroy the winsys on screen creation failure
The winsys is always destroyed on pipe_loader_device release.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9020
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
Corentin Noël [Wed, 24 May 2023 14:23:02 +0000 (16:23 +0200)]
pipe-loader: Document the behavior regarding screen creating failures
Avoid inconsistent behavior on screen creation failures which might lead
to double free issues.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
Corentin Noël [Wed, 24 May 2023 14:10:18 +0000 (16:10 +0200)]
gallium: Rename dri_destroy_screen_helper into dri_release_screen
This function is actually used before the use of dri_init_screen_helper so
it is not exactly releasing the memory allocated by the screen helper.
Also clear the base.screen variable after destroy to make this function
reentrant.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
Corentin Noël [Wed, 24 May 2023 14:02:18 +0000 (16:02 +0200)]
gallium: Incorporate the device release in dri_destroy_screen_helper
The code to release the device was actually always used after the call
to this function.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
Samuel Pitoiset [Thu, 25 May 2023 09:58:37 +0000 (11:58 +0200)]
radv/ci: update the list of expected failures on STONEY
Spurious changes but the failures are weird anyways.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23209>
Samuel Pitoiset [Wed, 24 May 2023 14:10:43 +0000 (16:10 +0200)]
radv: disable HTILE compression only when layouts are compressed
On RDNA2, VRS rates are part of the HTILE buffer but if we disable
HTILE completely for eg. GENERAL, VRS rates aren't read by the hw.
Fix this by disabling HTILE compression which should have the same
effect without VRS.
Fixes recent
dEQP-VK.fragment_shading_rate.renderpass2.monolithic.attachment_rate.misc.*
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23209>
Samuel Pitoiset [Wed, 24 May 2023 13:56:08 +0000 (15:56 +0200)]
radv: emit DB_RENDER_CONTROL as part of the framebuffer
DB_RENDER_CONTROL controls whether depth/stencil rendering should be
compressed. Emitting this register as part of the framebuffer will
allow us to keep HTILE enabled for VRS rates, instead of disabling it
completely.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23209>
Samuel Pitoiset [Thu, 25 May 2023 07:15:16 +0000 (09:15 +0200)]
radv: reset more DB registers when emitting a null ds target
PAL does that.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23209>
Samuel Pitoiset [Thu, 25 May 2023 06:53:26 +0000 (08:53 +0200)]
radv: add a helper for emitting a null depth/stencil target
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23209>
Qiang Yu [Tue, 6 Jun 2023 02:04:11 +0000 (10:04 +0800)]
radeonsi: enable aco support for compute shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23540>
Qiang Yu [Wed, 7 Jun 2023 06:47:12 +0000 (14:47 +0800)]
radeonsi: fix crash when AMD_DEBUG=cs,initnir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23540>
Qiang Yu [Tue, 6 Jun 2023 03:26:56 +0000 (11:26 +0800)]
ac/llvm,radeonsi: lower nir_load_user_data_amd in abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23540>
Qiang Yu [Tue, 6 Jun 2023 02:04:52 +0000 (10:04 +0800)]
radeonsi: add scratch_offset arg for aco cs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23540>
Timothy Arceri [Fri, 9 Jun 2023 04:49:01 +0000 (14:49 +1000)]
st/glsl: move linking code to the same st file
Since they call one another this makes it easier to see what is
going on without looking in multiple files.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23541>
Jesse Natalie [Mon, 22 May 2023 22:15:09 +0000 (15:15 -0700)]
dxil: Remove custom SSBO lowering
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Mon, 22 May 2023 23:38:25 +0000 (16:38 -0700)]
microsoft/compiler: Don't over-align raw buffer load/store intrinsics
DXC doesn't generate these for raw loads/stores, only structured, and
old WARP had bugs with this.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Mon, 22 May 2023 22:11:55 +0000 (15:11 -0700)]
microsoft/compiler: Don't lower bit sizes for movs
Otherwise we run into problems by putting this optimization loop
before I/O lowering, where there might still be 8-bit values that
haven't been lowered to 16 or 32. Once that's done, any remaining
movs or vec ops will have higher bit sizes already.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Mon, 22 May 2023 17:03:36 +0000 (10:03 -0700)]
dxil: Delete load_ubo_dxil intrinsic
Instead of splitting unaligned UBO loads while still using derefs,
and then lowering load_ubo to load_ubo_dxil in lower_loads_stores_to_dxil,
use lower_mem_access_bit_sizes and lower_ubo_vec4 to handle load size and
alignment restrictions while converting to load_ubo_vec4 instead, which
has the same semantics as load_ubo_dxil.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3842
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Mon, 22 May 2023 16:59:56 +0000 (09:59 -0700)]
dxil: Don't generate load_ubo_dxil directly
Just use load_ubo and let it get lowered appropriately later on.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Mon, 22 May 2023 16:56:27 +0000 (09:56 -0700)]
microsoft/compiler: Support load_ubo_vec4
Add support for 16-bit UBO loads, delete handling of byte-addressed
UBO loads (which I think was never used anyway) and add handling
for the component const index to optimize out unneeded extractResults.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Fri, 19 May 2023 19:27:07 +0000 (12:27 -0700)]
spirv2dxil: Don't lower shared/temp to explicit I/O
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Fri, 19 May 2023 17:28:08 +0000 (10:28 -0700)]
microsoft/compiler: Un-lower shared/scratch to derefs
Derefs have index-based access semantics, which means we don't need
custom intrinsics to encode an index instead of a byte offset.
Remove the "masked" store intrinsics and just emit the pair of atomics
directly. This massively reduces duplication between scratch, shared,
and constant, while also moving more things into nir so more optimizations
can be done.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Fri, 19 May 2023 16:11:34 +0000 (09:11 -0700)]
microsoft/compiler: Use mem_constant instead of shader_temp for consts
We still use shader_temp as a temporary variable mode to differentiate
which variables have simple deref patterns vs ones that need to be
lowered to ssbo, but then we put it back to mem_constant when we're
done to restore sanity.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Fri, 19 May 2023 15:57:03 +0000 (08:57 -0700)]
microsoft/compiler: Emit const accesses as load_deref
There's a few changes in here that are very inter-related.
First, we stop lowering load_deref on shader_temp to load_ptr_dxil,
and just leave it as load_deref. In order for that to work, we need
the derefs to be in a shape that's acceptable to DXIL, so the only
current producer of shader_temp loads (the CLC frontend) needs to
run some lowering passes on them first.
The DXIL backend is augmented to just write out deref indices while
walking a deref chain, which will get combined in the load op into
a GEP instruction. For non-mesh/raytracing shaders, these are required
to be single-level scalar arrays, but the complexity here is preparation
for when we don't need to do that anymore.
Additionally, the const lookups are changed from using a hash table
to just putting an index on the variable.
All of this together is enough to enable the authored-forever-ago test
which uses indirect array access into a const packed struct. The
load_ptr_dxil handling didn't deal with packed structs / unaligned
accesses, but now that we're in a logical address space with derefs
instead of physical, there's no alignment to deal with anymore and
the fact that it's packed goes out the window.
This removes one custom DXIL intrinsic.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Thu, 18 May 2023 23:29:40 +0000 (16:29 -0700)]
microsoft/compiler: Add some more lowering passes for derefs
DXIL requires GEP chains to point to a global variable that's a flat
array of primitive types. If we're converting deref chains to GEP
chains, we're effectively in a logical address space, which means
we can do things like change sizes of variables, since we know
they won't alias with anything else. If they could alias, we'd be
lowering them to an explicit I/O op instead. That means we can
start disabling some of the low-bit-size lowering.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Thu, 18 May 2023 23:25:45 +0000 (16:25 -0700)]
microsoft/compiler: Improvements to constant -> shader_temp pass used for CL
Now that we try harder for memcpys, we can use nir's complex usage helper.
We also can just mark the vars instead of using a hash map, since location
doesn't mean anything for constant vars.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Thu, 18 May 2023 23:22:25 +0000 (16:22 -0700)]
microsoft/compiler: Support vec/struct const vals
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Mon, 22 May 2023 17:09:06 +0000 (10:09 -0700)]
microsoft/clc: Fix progress reporting for some lowering
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Thu, 18 May 2023 17:49:04 +0000 (10:49 -0700)]
microsoft/clc: Try harder to optimize memcpys before lowering them
For the case of memset, the SPIR-V translator produces a copy from
a byte array of 0s. If we wait to lower memcpys until after types
are sized, we can potentially turn those 0s into SSA zeros and remove
the entire constant array.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Tue, 23 May 2023 22:49:38 +0000 (15:49 -0700)]
nir: Optimize unpacking 16 bit values that were originally packed
I was seeing u2u64 still in my final shader after pack/unpack were
lowered, which sounds to me like some other optimizations are missing
for detecting the post-lowering pack/unpack patterns, but let's at
least add some patterns for the simple cases.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Tue, 23 May 2023 22:48:22 +0000 (15:48 -0700)]
nir: Fix constant expression for unpack_64_4x16
Cc: Mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Mon, 22 May 2023 22:09:30 +0000 (15:09 -0700)]
nir_lower_mem_access_bit_sizes: Support unaligned stores via a pair of atomics
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8282
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
Jesse Natalie [Mon, 12 Jun 2023 21:26:24 +0000 (14:26 -0700)]
nir_lower_mem_access_bit_sizes: Move options into a struct
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>