Simon Glass [Mon, 15 Mar 2021 04:25:19 +0000 (17:25 +1300)]
dm: Add the new dtoc-generated files to the build
Now that dtoc generates some new C files, add these to the build so that
the instantiated devices and uclasses can be used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 04:25:18 +0000 (17:25 +1300)]
dm: core: Skip adding uclasses with OF_PLATDATA_INST
There is no need to ever add new uclasses since these are set up at build
time. Update the code to return an error if this is attempted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 04:25:17 +0000 (17:25 +1300)]
dm: core: Set up driver model for OF_PLATDATA_INST
With this we don't need to scan and bind drivers, not even the root
device. We just need to locate the root device that was set up at build
time, then set our root in global_data to point to it.
Update the code to handle this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 04:25:16 +0000 (17:25 +1300)]
dm: core: Adjust uclass setup with of-platdata
When OF_PLATDATA_INST is enabled we don't need to create the uclass list.
Instead we just need to point to the existing list. Update the code
accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 04:25:15 +0000 (17:25 +1300)]
dm: core: Allow dropping run-time binding of devices
With OF_PLATDATA_INST devices are bound at build time. We should not need
binding of devices at runtime in most cases. However it is inflexible to
absolutely prohibit it, so add an option to control this.
Update the driver model core so that it does not bind devices. Update
device_bind() to return an error if called.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 04:25:14 +0000 (17:25 +1300)]
dm: core: Add macros to access the new linker lists
Add macros which work with instantiated devices and uclasses, as created
at build time by dtoc. Include variants that can be used in data
structures.
These are mostly used by dtoc but it is worth documenting them fully for
the occasional case where they might come up in user code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 04:25:13 +0000 (17:25 +1300)]
linker_lists: Allow use in data structures
At present linker lists are designed for use in code. They make use of
statements within expressions ({...}), for example.
It is possible to generate a reference to a linker_list entry that can
be used in data structures, where such features are not permitted. It
requires that the reference first be declared as extern. In other
words the existing macro needs to be split into two parts.
Add new macros to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 04:25:12 +0000 (17:25 +1300)]
sandbox: Drop debug message in os_spl_to_uboot()
This is not needed in normal operation. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Glass [Mon, 15 Mar 2021 04:25:11 +0000 (17:25 +1300)]
dtoc: Drop use of DECL() macros
We can use extern instead, so let's drop these macros. It adds one more
thing to learn about and doesn't make the code any clearer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Dario Binacchi [Tue, 16 Mar 2021 20:51:44 +0000 (21:51 +0100)]
bus: ti-sysc: change in a normal driver
The module defines a duplicate uclass driver for UCLASS_SIMPLE_BUS, but
it is not allowed. This breaks of-platdata and makes the result
non-deterministic.
The driver does not need to be an uclass driver, so lets remove it. I
had turned it into an uclass driver because I thought wrongly it had to
call the dm_scan_fdt_dev routine to work properly, but some tests on the
board have shown otherwise.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:21 +0000 (06:01 -0700)]
dtoc: Generate device instances
Add support for generating a file containing udevice instances. This
avoids the need to create these at run time.
Update a test uclass to include a 'per_device_plat_auto' member, to
increase test coverage.
Add another tab to the driver_info output so it lines up nicely like the
device-instance output.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:20 +0000 (06:01 -0700)]
dtoc: Generate uclass devices
Add support for generating a file containing uclass instances. This avoids
the need to create these at run time.
Update a test uclass to include a 'priv_auto' member, to increase test
coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:19 +0000 (06:01 -0700)]
dtoc: Generate a summary in the dt-plat.c file
Add a summary to the top of the generated code, to make it easier to see
what the file contains.
Also add a tab to .plat so that its value lines up with the others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:18 +0000 (06:01 -0700)]
dtoc: Tidy up the list of supported phandle properties
For now dtoc only supports a hard-coded list of phandle properties, to
avoid any situation where it makes a mistake in its determination.
Make this into a constant dict, recording both the phandle property name
and the associated #cells property in the target node. This makes it
easier to find and modify.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:17 +0000 (06:01 -0700)]
sandbox: i2c: Rename driver names to work with of-platdata
Some of these do not follow the rules. Make sure the driver name matches
the compatible string in all cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:16 +0000 (06:01 -0700)]
sandbox: Make sandbox,emul more conventional
At present this property is a phandle but does not have a #xxx-cells
property to match it. Add one so that is works the same as gpio and clock
phandles.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:15 +0000 (06:01 -0700)]
dtoc: Don't generate platform data with instantiation
This file is not used when instantiating devices. Update dtoc to skip
generating its contents and just add a comment instead.
Also it is useful to see the driver name and parent for each device.
Update the file to show that information, to avoid updating the same
tests twice.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:14 +0000 (06:01 -0700)]
dtoc: Add support for decl file
Add an option to generate the declaration file, which declares all
drivers and uclasses, so references can be used in the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:13 +0000 (06:01 -0700)]
dm: of-platadata: Add option for device instantiation
Add Kconfig options to support build-time device instantiation. When
fully implemented, this will allow dtoc to create U-Boot devices (i.e.
struct udevice records) at build time, thus reducing code space in
SPL.
For now this defaults to off, but will be enabled when the rest of
the implementation is in place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:12 +0000 (06:01 -0700)]
dtoc: Add an option for device instantiation
Add an option to instantiate devices at build time. For now this just
parses the option and sets up a few parameters.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:11 +0000 (06:01 -0700)]
dtoc: Support processing the root node
The device for the root node is normally bound by driver model on init.
With devices being instantiated at build time, we must handle the root
device also.
Add support for processing the root node, which may not have a compatible
string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:10 +0000 (06:01 -0700)]
dtoc: Set up the uclasses that are used
We only care about uclasses that are actually used. This is determined by
the drivers that use them. Check all the used drivers and build a list of
'valid' uclasses.
Also add references to the uclasses so we can generate C code that uses
them. Attach a uclass to each valid driver.
For the tests, now that we have uclasses we must create an explicit test
for the case where a node does not have one. This should only happen if
the source code does not build, or the source-code scanning fails to find
it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:09 +0000 (06:01 -0700)]
dtoc: Assign a sequence number to each node
Now that we have the alias information we can assign a sequence number
to each device in the uclass. Store this in the node associated with each
device.
This requires renaming the sandbox test drivers to have the right name.
Note that test coverage is broken with this patch, but fixed in the next
one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:08 +0000 (06:01 -0700)]
dtoc: Detect drivers only at the start of start of line
If a driver declaration is included in a comment, dtoc currently gets
confused. Update the parser to only consider declarations that begin at
the start of a line. Since multi-line comments begin with an asterisk,
this avoids the problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:07 +0000 (06:01 -0700)]
dtoc: Read aliases for uclasses
Scan the aliases in the device tree to establish the number of devices
within each uclass, and the sequence number of each.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:06 +0000 (06:01 -0700)]
dtoc: Warn of duplicate drivers
If drivers have the same name then we cannot distinguish them. This only
matters if the driver is actually used by dtoc, but in that case, issue
a warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:05 +0000 (06:01 -0700)]
dtoc: Process driver aliases along with drivers
Instead of using a separate step for this processing, handle it while
scanning its associated driver. This allows us to drop the code coverage
exception in this case.
Note that only files containing drivers are scanned by dtoc, so aliases
declared in a file that doesn't hold a driver will not be noticed. It
would be confusing to put them anywhere other than in the driver that they
relate to, but update the documentation to say this explicitly, just in
case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:04 +0000 (06:01 -0700)]
dtoc: Support headers needed for drivers
Typically dtoc can detect the header file needed for a driver by looking
for the structs that it uses. For example, if a driver as a .priv_auto
that uses 'struct serial_priv', then dtoc can search header files for the
definition of that struct and use the file.
In some cases, enums are used in drivers, typically with the .data field
of struct udevice_id. Since dtoc does not support searching for these,
add a way to tell dtoc which header to use. This works as a macro included
in the driver definition.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:03 +0000 (06:01 -0700)]
Makefile: Pass the U-Boot phase to dtoc
Pass the U-Boot phase as a parameter so dtoc can use it. At present it is
ether "spl" or "tpl".
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:02 +0000 (06:01 -0700)]
dtoc: Support tracking the phase of U-Boot
U-Boot operates in several phases, typically TPL, SPL and U-Boot proper.
The latter does not use dtoc.
In some rare cases different drivers are used for two phases. For example,
in TPL it may not be necessary to use the full PCI subsystem, so a simple
driver can be used instead.
This works in the build system simply by compiling in one driver or the
other (e.g. PCI driver + uclass for SPL; simple_bus for TPL). But dtoc has
no way of knowing which code is compiled in for which phase, since it does
not inspect Makefiles or dependency graphs.
So to make this work for dtoc, we need to be able to explicitly mark
drivers with their phase. This is done by adding an empty macro to the
driver. Add support for this in dtoc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:01 +0000 (06:01 -0700)]
dtoc: Track nodes which are actually used
Mark all nodes that are actually used, so we can perform extra checks on
them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:01:00 +0000 (06:01 -0700)]
dtoc: Process nodes to set up required properties
Add logic to assign property values to nodes as required by dtoc. The
references allow nodes to refer to each other in C code. The macros used
by dtoc are not yet defined in driver model. They will be added along
with the actual driver model implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:00:59 +0000 (06:00 -0700)]
dtoc: Make use of node properties
Now that we have these available, use them instead of recalculating
things each time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:00:58 +0000 (06:00 -0700)]
dtoc: Add some extra properties to nodes
It is convenient to attach drivers, etc. to nodes so that we can use the
Node object as the main data structure in this module.
Add a function which adds the new properties, along with documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:00:57 +0000 (06:00 -0700)]
dtoc: Rename sandbox_i2c_test and sandbox_pmic_test
These have '_test' suffixes which are not present on the drivers in the
source code. Drop the suffixes to avoid a mismatch when scanning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:00:56 +0000 (06:00 -0700)]
dtoc: Move test files into a test/ directory
It is confusing to have the test files in the same places as the
implementation. Move them into a separate directory.
Add a helper function for test_dtoc, to avoid repeating the same
path.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:00:55 +0000 (06:00 -0700)]
dtoc: Support scanning of structs in header files
Drivers can have private / platform data contained in structs and these
struct definitions are generally kept in header files. In order to
generate build-time devices, dtoc needs to generate code that declares
the data contained in those structs. This generated code must include the
relevant header file, to avoid a build error.
We need a way for dtoc to scan header files for struct definitions. Then,
when it wants to generate code that uses a struct, it can make sure it
includes the correct header file, first.
Add a parser for struct information, similar to drivers. Keep a dict of
the structs that were found.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:00:54 +0000 (06:00 -0700)]
dtoc: Support scanning of uclasses
Uclasses can have per-device private / platform data so dtoc needs to
scan these drivers. This allows it to find out the size of this data so
it can be allocated a build time.
Add a parser for uclass information, similar to drivers. Keep a dict of
the uclasses that were found.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:00:53 +0000 (06:00 -0700)]
dtoc: Collect priv/plat struct info from drivers
In order to output variables to hold the priv/plat information used by
each device, dtoc needs to know the struct for each. With this, it can
declare this at build time:
u8 xxx_priv [sizeof(struct <name>)];
Collect the various struct names from the drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:00:52 +0000 (06:00 -0700)]
dtoc: Ignore unwanted files when scanning for drivers
We should ignore anything in the .git directory or any of the
build-sandbox, etc. directories created by 'make check'. These can confuse
dtoc. Update the code to ignore these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:00:51 +0000 (06:00 -0700)]
dtoc: Save scan information across test runs
At present most of the tests scan the U-Boot source tree as part of their
run. This information does not change across tests, so we can save time
by remembering it.
Add a way to set up this information and use it for each test, taking a
copy first, so as not to mess up the original.
This reduces the run time from about 1.6 seconds to 1.5 seconds on my
machine. For code coverage (which cannot run in parallel), it reduces from
33 seconds to 5.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 3 Feb 2021 13:00:50 +0000 (06:00 -0700)]
dtoc: Scan drivers for available information
At present we simply record the name of a driver parsed from its
implementation file. We also need to get the uclass and a few other
things so we can instantiate devices at build time. Add support for
collecting this information. This requires parsing each driver file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Thu, 4 Mar 2021 18:28:37 +0000 (18:28 +0000)]
sandbox: add FAT to the list of usable env drivers
Add the FAT environment driver to the priority list.
When testing the UEFI sub-system the EFI system partition is formatted with
FAT so it is reasonable to store the environment there.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Sat, 20 Feb 2021 09:41:22 +0000 (10:41 +0100)]
dm: error handling dev_get_dma_range()
goto after return has not effect. Calling of_node_put() in case of some
errors and not for others is inconsistent.
Fixes:
51bdb50904b ("dm: Introduce xxx_get_dma_range()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Thu, 18 Feb 2021 12:01:35 +0000 (13:01 +0100)]
sandbox: enable cros-ec-keyb in test.dtb
Currently keyboard input fails in the GUI window opened by
./u-boot -T -l
Add the missing include to test.dts.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Nicolas Boichat [Wed, 17 Feb 2021 10:41:43 +0000 (18:41 +0800)]
patman: Use less for help file, if available
It's convenient to be able to scroll up in `patman -H`.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 17 Feb 2021 09:31:47 +0000 (17:31 +0800)]
test: print_ut: Fix potential build error
This files uses the macro U_BOOT_CMD which is defined in command.h,
but command.h is conditionally included. Fix it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 17 Feb 2021 09:04:06 +0000 (17:04 +0800)]
test: cmd: setexpr: Fix a typo
SETEXPR_TEST is for a new setexpr test, not mem.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 15 Feb 2021 12:01:44 +0000 (20:01 +0800)]
mmc: pci: Fix Kconfig dependency
The PCI MMC driver depends on the generic MMC SDHCI driver,
otherwise it does not compile.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Samuel Dionne-Riel [Thu, 11 Feb 2021 00:43:09 +0000 (19:43 -0500)]
tools: fdtgrep: Use unsigned chars for arrays
Otherwise, values over 127 end up prefixed with ffffff.
Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Wed, 10 Feb 2021 17:54:25 +0000 (18:54 +0100)]
sandbox: allow cross-compiling sandbox
UEFI test files like helloworld.efi require an architecture specific
PE-COFF header.
Currently this does not work for cross compiling. If $CROSS_COMPILE is set,
use the first part of the architecture triplet from the variable to
choose the PE-COFF header.
Now we can cross-compile the sandbox, e.g.
make sandbox_defconfig NO_SDL=1
CROSS_COMPILE=/opt/bin/aarch64-linux-gnu- NO_SDL=1 MK_ARCH=aarch64 make
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Jan 2021 15:56:15 +0000 (08:56 -0700)]
patman: Quieten down the alias checking
When a tag is used in a patch subject (e.g. "tag: rest of message") and
it cannot be found as an alias, patman currently reports a fatal error,
unless -t is provided, in which case it reports a warning.
Experience suggest that the fatal error is not very useful. Instead,
default to reporting a warning, with -t tell patman to ignore it
altogether.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 23 Jan 2021 15:56:14 +0000 (08:56 -0700)]
patman: Update documentation to match new usage
With the subcommands some of the documentation examples are no-longer
correct. Fix all of them, so it is consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 19:22:53 +0000 (08:22 +1300)]
azure: Use --board flag with sandbox_spl
At present there is only one board which uses sandbox SPL. But with
sandbox_noinst being added, this is no longer true. Add a --board flag
so that we just build one board on azure, as is done in gitlab.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 20 Mar 2021 23:27:22 +0000 (19:27 -0400)]
Merge branch '2021-03-20-mediatek-updates' into next
- A number of MediaTek platform updates
Weijie Gao [Tue, 9 Mar 2021 07:52:31 +0000 (15:52 +0800)]
tools: mtk_image: add an option to set device header offset
This patch adds an option which allows setting the device header offset.
This is useful if this tool is used to generate ATF BL2 image of mt7622 for
SD cards.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 5 Mar 2021 02:41:33 +0000 (10:41 +0800)]
configs: mt7622: enable debug uart for mt7622_rfb_defconfig
Enable debug uart for mt7622_rfb_defconfig
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 5 Mar 2021 02:39:55 +0000 (10:39 +0800)]
board: mt7629: enable compression of u-boot to reduce the size of final image
This patch makes use of the decompression mechanism implemented for mt7628
previously to reduce the total image size. Binman will be also removed.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 5 Mar 2021 02:35:39 +0000 (10:35 +0800)]
serial: mtk: rewrite the setbrg function
Currently the setbrg logic of serial-mtk is messy, and should be rewritten.
Also an option is added to make it possible to use highspeed-3 mode for all
bauds.
The new logic is:
1. If baud clock > 12MHz
a) If baud <= 115200, highspeed-0 mode will be used (ns16550 compatible)
b) If baud <= 576000, highspeed-2 mode will be used
c) any bauds > 576000, highspeed-3 mode will be used
2. If baud clock <= 12MHz
Forced highspeed-3 mode
a) If baud <= 115200, calculates the divisor using DIV_ROUND_CLOSEST
b) any bauds > 115200, the same as 1. c)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 5 Mar 2021 02:27:46 +0000 (10:27 +0800)]
dts: mt7629: enable JTAG pins by default
The EPHY LEDs belongs to the built-in FE switch of MT7629, which is barely
used. These LED pins on reference boards are used as JTAG socket. So it's
a good idea to change the default state to JTAG, and this will make it
convenience for debugging.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 5 Mar 2021 02:24:58 +0000 (10:24 +0800)]
configs: mt7622: use ARMv8 Generic Timer instead of mtk_timer
It's better to use the generic timer which is correctly initialized by
the ATF. The generic timer has higher resolution than the mtk_timer.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 5 Mar 2021 02:22:31 +0000 (10:22 +0800)]
pinctrl: mt7629: add jtag function and pin group
The EPHY LEDs of mt7629 can be used as JTAG. This patch adds the jtag pin
group to the pinctrl driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 5 Mar 2021 02:22:26 +0000 (10:22 +0800)]
pinctrl: mediatek: do not probe gpio driver if not enabled
The mtk pinctrl driver is a combination driver with support for both
pinctrl and gpio. When this driver is used in SPL, gpio support may not be
enabled, and this will result in a compilation error.
To fix this, macros are added to make sure gpio related code will only be
compiled when gpio support is enabled.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Sam Shih [Fri, 5 Mar 2021 02:22:19 +0000 (10:22 +0800)]
pinctrl: mediatek: add get_pin_muxing ops for mediatek pinctrl
This patch add get_pin_muxing support for mediatek pinctrl drivers
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Sam Shih [Fri, 5 Mar 2021 02:22:11 +0000 (10:22 +0800)]
pinctrl: mediatek: fix wrong assignment in mtk_get_pin_name
This is a bug fix for mtk pinctrl common part. Appearently pins should be
used instead of grps in mtk_get_pin_name().
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Fabien Parent [Mon, 15 Feb 2021 18:21:12 +0000 (19:21 +0100)]
board: Add MT8183 pumpkin board support
Add the MT8183 pumpkin board support.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Mon, 15 Feb 2021 18:21:11 +0000 (19:21 +0100)]
ARM: mediatek: Add MT8183 support
Add the MT8183 SoC support.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Mon, 15 Feb 2021 18:07:46 +0000 (19:07 +0100)]
configs: mt8516: use bootcmd from config_distro_bootcmd.h
Instead of redefining our own way to boot, let's just use
config_distro_bootcmd.h.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Mon, 15 Feb 2021 18:07:45 +0000 (19:07 +0100)]
board: mediatek: mt8516: init USB Ether for pumpkin board
Init USB Ether if CONFIG_USB_ETHER is enabled.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Mon, 15 Feb 2021 18:07:44 +0000 (19:07 +0100)]
board: mediatek: rename pumpkin board into mt8516
More than one pumpkin board has been made with different MediaTek SoCs.
Rename the pumpkin board to follow the naming convention of all
other MediaTek boards and also to not be confusing when other pumpkin
boards will be added in follow-up commits.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Tom Rini [Fri, 19 Mar 2021 12:20:34 +0000 (08:20 -0400)]
Merge branch 'next' of git://source.denx.de/u-boot-sh into next
- New platforms and related support
Lad Prabhakar [Mon, 15 Mar 2021 22:24:06 +0000 (22:24 +0000)]
board: silinux: Enable recovery SPL for EK874 board
Enable building SPL for EK874 board which is based on R8A774C0 SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Lad Prabhakar [Mon, 15 Mar 2021 22:24:05 +0000 (22:24 +0000)]
arm: rmobile: Add Silicon Linux EK874 board support
The EK874 development kit from Silicon Linux is made of CAT874 (the main
board) and CAT875 (the sub board that goes on top of CAT874).
This patch adds the required board support to boot Si-Linux EK874 board
based on R8A774C0 SoC.
DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi
have been imported from Linux kernel 5.11 commit
f40ddce88593
("Linux 5.11").
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Lad Prabhakar [Mon, 15 Mar 2021 22:24:04 +0000 (22:24 +0000)]
pinctrl: renesas: Add support for R8A774C0
Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car
E3 (a.k.a. r8a77990), however it doesn't have several automotive
specific peripherals.
This patch hooks R8A774C0 SoC with the pfc driver.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Lad Prabhakar [Mon, 15 Mar 2021 22:24:03 +0000 (22:24 +0000)]
pinctrl: renesas: pfc-r8a77990: Sync PFC tables with Linux 5.11
Sync the R8A77990 SoC PFC tables with Linux 5.11 , commit
f40ddce88593.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Lad Prabhakar [Mon, 15 Mar 2021 22:24:02 +0000 (22:24 +0000)]
arm: dts: r8a774c0: Resync R8A774C0 SoC DTSI with Linux 5.11
Resync the R8A774C0 SoC DTSI with Linux kernel 5.11 commit
f40ddce88593
("Linux 5.11").
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Biju Das [Mon, 1 Mar 2021 17:08:49 +0000 (17:08 +0000)]
arm: rmobile: Add HopeRun HiHope RZ/G2H board support
The HiHope RZ/G2H board from HopeRun consists of main board
(HopeRun HiHope RZ/G2H main board) and sub board(HopeRun
HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits
below the HiHope RZ/G2H main board.
This patch adds the required board support to boot HopeRun HiHope
RZ/G2H board.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Biju Das [Mon, 1 Mar 2021 17:08:48 +0000 (17:08 +0000)]
arm: rmobile: Add HopeRun HiHope RZ/G2N board support
The HiHope RZ/G2N board from HopeRun consists of main board
(HopeRun HiHope RZ/G2N main board) and sub board(HopeRun
HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits
below the HiHope RZ/G2N main board.
This patch adds the required board support to boot HopeRun HiHope
RZ/G2N board.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Biju Das [Mon, 1 Mar 2021 17:08:47 +0000 (17:08 +0000)]
arm: rmobile: Add HopeRun HiHope RZ/G2M board support
The HiHope RZ/G2M board from HopeRun consists of main board
(HopeRun HiHope RZ/G2M main board) and sub board(HopeRun
HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits
below the HiHope RZ/G2M main board.
This patch adds the required board support to boot HopeRun HiHope
RZ/G2M board.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Biju Das [Mon, 1 Mar 2021 17:08:46 +0000 (17:08 +0000)]
arm: dts: rmobile: r8a774e1: Synchronize DTs with Linux 5.11
Synchronize r8a774e1 device trees with Linux 5.11,
commit
f40ddce88593482919 ("Linux 5.11").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Biju Das [Mon, 1 Mar 2021 17:08:45 +0000 (17:08 +0000)]
arm: dts: rmobile: r8a774b1: Synchronize DTs with Linux 5.11
Synchronize r8a774b1 device trees with Linux 5.11,
commit
f40ddce88593482919 ("Linux 5.11")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Tom Rini [Mon, 15 Mar 2021 16:15:38 +0000 (12:15 -0400)]
Merge tag 'v2021.04-rc4' into next
Prepare v2021.04-rc4
Tom Rini [Mon, 15 Mar 2021 16:06:41 +0000 (12:06 -0400)]
Prepare v2021.04-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 15 Mar 2021 14:50:47 +0000 (10:50 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 15 Mar 2021 12:43:29 +0000 (08:43 -0400)]
Merge tag 'ti-v2021.04-rc4' of https://source.denx.de/u-boot/custodians/u-boot-ti
- Fix boot for da850-evm and omap3_logic
- Optimize SPL size for am65x boards
Tom Rini [Mon, 15 Mar 2021 12:43:19 +0000 (08:43 -0400)]
Merge tag 'u-boot-stm32-
20210312' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
- Remove the nand MTD configuration for NOR boot in stm32mp1 board
- STM32programmer update
- Bsec: manage clock when present in device tree
- stm32mp15: move bootdelay configuration in defconfig
- Update for stm32 dsi and dw_mipi_dsi
- STM32 MCU's cleanup
- Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
- Update stm32mp1 doc
Tom Rini [Mon, 15 Mar 2021 12:41:14 +0000 (08:41 -0400)]
Merge branch '2021-03-12-assorted-improvements' into next
- More log enhancements
- A few warning fixes in some cases
- Secure Channel Protocol 03 (SCP03) support for TEEs
Lokesh Vutla [Tue, 9 Mar 2021 18:02:45 +0000 (23:32 +0530)]
configs: am65x_evm_r5: Enable checks for spl and stack sizes
Enable relevant configs that checks for the size of image and stack:
BSS: 3KB
Initial MALLOC: ~22KB
Initial Stack: 8K
SPL Image size can be: ~215KB
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Tue, 9 Mar 2021 18:02:44 +0000 (23:32 +0530)]
include: configs: am65x_evm: Optimize size of SPL BSS
Current BSS allocation of SPL is as below:
$ size spl/u-boot-spl
text data bss dec hex filename
132369 7852 1496 141717 22995 spl/u-boot-spl
But 20KB is allocated currently for BSS. Reduce it to 3KB and save some
space for stack.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Adam Ford [Sat, 6 Mar 2021 02:48:50 +0000 (20:48 -0600)]
ARM: da850-evm: Fix boot issues from missing SPL_PAD_TO
In a previous attempt to unify config options and remove items
from the whitelist file, SPL items were moved into a section
enabled with CONFIG_SPL_BUILD. Unfortunately, SPL_PAD_TO
is referenced at the head Makefile and uses this define
to create padding of the output file. When it was moved
to CONFIG_SPL_BUILD, it caused boot errors with devices
that are not booting from NOR. Fix the boot issues by moving
SPL_PAD_TO out so it's always.
Fixes:
7bb33e4684aa ("ARM: da850-evm: Unify config options with Kconfig")
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Thu, 4 Mar 2021 16:31:58 +0000 (10:31 -0600)]
configs: omap3_logic: Enable CONFIG_SPL_ALLOC_BD
With bd_info dropped from the data section, the Logic PD OMAP3 boards
and AM3517 fail to boot. Enabling CONFIG_SPL_ALLOC_BD restores
them.
Fixes:
38d6b7ebdaee ("spl: Drop bd_info in the data section")
Signed-off-by: Adam Ford <aford173@gmail.com>
Igor Opaniuk [Sun, 14 Feb 2021 15:27:28 +0000 (16:27 +0100)]
test: py: add initial coverage for scp03 cmd
Add initial test coverage for SCP03 command.
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Igor Opaniuk [Sun, 14 Feb 2021 15:27:27 +0000 (16:27 +0100)]
sandbox: imply SCP03 and CMD_SCP03
Enable by default SCP_03/CMD_SCP03 for sandbox target.
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jorge Ramirez-Ortiz [Sun, 14 Feb 2021 15:27:26 +0000 (16:27 +0100)]
doc: describe the scp03 command
The Secure Channel Protocol 03 command sends control requests
(enable/provision) to the TEE implementing the protocol between the
processor and the secure element.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jorge Ramirez-Ortiz [Sun, 14 Feb 2021 15:27:25 +0000 (16:27 +0100)]
drivers: tee: sandbox: SCP03 control emulator
Adds support for a working SCP03 emulation. Input parameters are
validated however the commands (enable, provision) executed by the TEE
are assumed to always succeed.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jorge Ramirez-Ortiz [Sun, 14 Feb 2021 15:27:24 +0000 (16:27 +0100)]
cmd: SCP03: enable and provision command
Enable and provision the SCP03 keys on a TEE controlled secured elemt
from the U-Boot shell.
Executing this command will generate and program new SCP03 encryption
keys on the secure element NVM.
Depending on the TEE implementation, the keys would then be stored in
some persistent storage or better derived from some platform secret
(so they can't be lost).
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Jorge Ramirez-Ortiz [Sun, 14 Feb 2021 15:27:23 +0000 (16:27 +0100)]
common: SCP03 control (enable and provision of keys)
This Trusted Application allows enabling SCP03 as well as provisioning
the keys on TEE controlled secure element (ie, NXP SE050).
All the information flowing on buses (ie I2C) between the processor
and the secure element must be encrypted. Secure elements are
pre-provisioned with a set of keys known to the user so that the
secure channel protocol (encryption) can be enforced on the first
boot. This situation is however unsafe since the keys are publically
available.
For example, in the case of the NXP SE050, these keys would be
available in the OP-TEE source tree [2] and of course in the
documentation corresponding to the part.
To address that, users are required to rotate/provision those keys
(ie, generate new keys and write them in the secure element's
persistent memory).
For information on SCP03, check the Global Platform HomePage and
google for that term [1]
[1] globalplatform.org
[2] https://github.com/OP-TEE/optee_os/
check:
core/drivers/crypto/se050/adaptors/utils/scp_config.c
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 7 Feb 2021 21:27:07 +0000 (14:27 -0700)]
doc: sandbox: Update instructions on quitting
The 'reset' command now resets sandbox but does not quit it. Fix the
instructions.
Fixes:
329dccc0675 ("sandbox: implement reset")
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 7 Feb 2021 21:27:05 +0000 (14:27 -0700)]
test: acpi: Fix warnings on 32-bit build
Some format strings use the wrong type. Fix them.
Example warnings:
In file included from test/dm/acpi.c:22:
test/dm/acpi.c: In function ‘dm_test_acpi_cmd_list’:
test/dm/acpi.c:362:21: warning: format ‘%lx’ expects argument of type
‘long unsigned int’, but argument 4 has type ‘unsigned int’ [-Wformat=]
ut_assert_nextline("RSDP %08lx %06lx (v02 U-BOOT)", addr,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
sizeof(struct acpi_rsdp));
~~~~~~~~~~~~~~~~~~~~~~~~
include/test/ut.h:282:33: note: in definition of macro ‘ut_assert_nextline’
if (ut_check_console_line(uts, fmt, ##args)) { \
^~~
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 7 Feb 2021 21:27:04 +0000 (14:27 -0700)]
tpm: Correct warning on 32-bit build
Fix the warning:
drivers/tpm/tpm2_tis_sandbox.c: In function ‘sandbox_tpm2_xfer’:
drivers/tpm/tpm2_tis_sandbox.c:288:48: warning: format ‘%ld’ expects
argument of type ‘long int’, but argument 2 has type ‘size_t’
{aka ‘unsigned int’} [-Wformat=]
printf("TPM2: Unmatching length, received: %ld, expected: %d\n",
~~^
%d
send_size, length);
~~~~~~~~~
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>