re PR fortran/91802 (ICE in mio_name_expr_t, at fortran/module.c:2141)

2019-09-28  Steven G. Kargl  <kargl@gcc.ngu.org>

PR fortran/91802
* decl.c (attr_decl1): Check if rank+corank > 15.

2019-09-28  Steven G. Kargl  <kargl@gcc.ngu.org>

PR fortran/91802
* gfortran.dg/pr91802.f90: New test.

From-SVN: r276254

re PR fortran/91864 (ICE in gfc_check_do_variable, at fortran/parse.c:4405)

2019-09-28  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91864
* gcc/fortran/io.c (match_io_element): An inquiry parameter cannot be
read into.
* gcc/fortran/match.c (gfc_match_allocate): An inquiry parameter
can be neither an allocate-object nor stat variable.
(gfc_match_deallocate): An inquiry parameter cannot be deallocated.

2019-09-28  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/91864
* gcc/testsuite/gfortran.dg/pr91864.f90

From-SVN: r276253

PR c++/91889 - follow-up fix for DR 2352.

* call.c (involves_qualification_conversion_p): New function.
(direct_reference_binding): Build a ck_qual if the conversion
would involve a qualification conversion.
(convert_like_real): Strip the conversion created by the ck_qual
in direct_reference_binding.

* g++.dg/cpp0x/ref-bind3.C: Add dg-error.
* g++.dg/cpp0x/ref-bind4.C: New test.
* g++.dg/cpp0x/ref-bind5.C: New test.
* g++.dg/cpp0x/ref-bind6.C: New test.
* g++.old-deja/g++.pt/spec35.C: Revert earlier change.

From-SVN: r276251

PR c++/91921 - stray warning with -Woverloaded-virtual.

* class.c (warn_hidden): Only emit the second part of
-Woverloaded-virtual if the first part was issued.  Use inform instead
warning_at.

* g++.dg/warn/Woverloaded-2.C: New.
* g++.dg/warn/Woverloaded-2.h: New.
* g++.dg/warn/pr61945.C: Turn dg-warning into dg-message.
* g++.old-deja/g++.mike/warn6.C: Likewise.
* g++.old-deja/g++.warn/virt1.C: Likewise.

From-SVN: r276249

PR c++/91923 - failure-to-SFINAE with class type NTTP in C++17.

* pt.c (invalid_nontype_parm_type_p): Only emit errors when
tf_error.

* g++.dg/cpp0x/nontype5.C: New test.

From-SVN: r276248

re PR target/86805 (sh port needs updating for CVE-2017-5753)

gcc/
2019-09-28  Oleg Endo  <olegendo@gcc.gnu.org>

PR target/86805
* config/sh/sh.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define.

From-SVN: r276244

re PR target/80672 (gcc/config/sh/sh.c:716: prefer compare to find.)

gcc/
2019-09-28  Oleg Endo  <olegendo@gcc.gnu.org>

PR target/80672
* config/sh/sh.c (parse_validate_atomic_model_option): Use
std::string::compare instead of std::string::find.

From-SVN: r276240

Fix endian issue in pr91656 testcases

PR testsuite/91676
PR rtl-optimization/91656
* gcc.dg/torture/pr91656-1.c: Correct for big and pdp endian.
* gcc.dg/torture/pr91656-2.c: Likewise.
* gcc.dg/torture/pr91656-3.c: Likewise.

From-SVN: r276236

compiler: resolve importing ambiguity for more complex function calls

    Tweak the exporter for inlinable function bodies to work around a
    problem with importing of function calls whose function expressions
    are not simple function names. In the bug in question, the function
    body exporter was writing out a function call of the form

           (*(*FuncTyp)(var))(arg)

    which produced an export data representation of

           *$convert(<type 5>, var)(x)

    which is hard to parse unambiguously. Fix: change the export data
    emitter to introduce parens around the function expression for more
    complex calls.

    Testcase for this bug is in CL 197217.

    Fixes golang/go#34503.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/197122

From-SVN: r276228

Daily bump.

From-SVN: r276227

Regenerate `configure' scripts for `uclinuxfdpiceabi' libtool.m4 update

A change made with r275564 ("[ARM/FDPIC v6 02/24] [ARM] FDPIC: Handle
arm*-*-uclinuxfdpiceabi in configure scripts") to libtool.m4 has not
regenerated all the `configure' scripts affected.  Fix it.

gcc/
* configure: Regenerate.

libatomic/
* configure: Regenerate.

libbacktrace/
* configure: Regenerate.

libcc1/
* configure: Regenerate.

libffi/
* configure: Regenerate.

libgfortran/
* configure: Regenerate.

libgomp/
* configure: Regenerate.

libhsail-rt/
* configure: Regenerate.

libitm/
* configure: Regenerate.

libobjc/
* configure: Regenerate.

liboffloadmic/
* configure: Regenerate.

libphobos/
* configure: Regenerate.

libquadmath/
* configure: Regenerate.

libsanitizer/
* configure: Regenerate.

libssp/
* configure: Regenerate.

libstdc++-v3/
* configure: Regenerate.

libvtv/
* configure: Regenerate.

lto-plugin/
* configure: Regenerate.

zlib/
* configure: Regenerate.

From-SVN: r276213

re PR c++/88203 (assert does not compile with OpenMP's pragma omp parallel for default(none))

PR c++/88203
c-family/
* c-common.h (c_omp_predefined_variable): Declare.
* c-omp.c (c_omp_predefined_variable): New function.
(c_omp_predetermined_sharing): Return OMP_CLAUSE_DEFAULT_SHARED
for predefined variables.
c/
* c-parser.c (c_parser_predefined_identifier): New function.
(c_parser_postfix_expression): Use it.
(c_parser_omp_variable_list): Parse predefined identifiers.
* c-typeck.c (c_finish_omp_clauses): Allow predefined variables
in shared and firstprivate clauses, even when they are predetermined
shared.
cp/
* parser.c (cp_parser_omp_var_list_no_open): Parse predefined
variables.
* semantics.c (finish_omp_clauses): Allow predefined variables in
shared and firstprivate clauses, even when they are predetermined
shared.
* cp-gimplify.c (cxx_omp_predetermined_sharing_1): Return
OMP_CLAUSE_DEFAULT_SHARED for predefined variables.
testsuite/
* c-c++-common/gomp/pr88203-1.c: New test.
* c-c++-common/gomp/pr88203-2.c: New test.
* c-c++-common/gomp/pr88203-3.c: New test.

From-SVN: r276212

re PR middle-end/91920 (ggc 9.2.0 failing openmp compile on ppc64le)

PR middle-end/91920
* gimplify.c (omp_default_clause): Predetermine DECL_IN_CONSTANT_POOL
variables as shared.

* c-c++-common/gomp/pr91920.c: New test.

From-SVN: r276211

[Darwin, PPC, Mode Iterators 3/n] Update macho_correct_pic.

Drop the expander and use a mode expander on the define_insn
for macho_correct_pic instead.

gcc/ChangeLog:

2019-09-27  Iain Sandoe  <iain@sandoe.co.uk>

* config/rs6000/darwin.md (@macho_correct_pic_<mode>): New,
replaces the expander and two define_insn entries.
(@reload_macho_picbase_<mode>): Update gen_macho_correct_pic
call.
* config/rs6000/rs6000.md (builtin_setjmp_receiver): Likewise.

From-SVN: r276196

Const-correctness fixes for fibonacci_heap.h

gcc/ChangeLog:
* fibonacci_heap.h (fibonacci_heap::empty): Make const.
(fibonacci_heap::nodes): Likewise.
(fibonacci_heap::min_key): Likewise.
(fibonacci_heap::min): Likewise.

From-SVN: r276193

constexpr.c (cxx_fold_indirect_ref): Use similar_type_p.

* constexpr.c (cxx_fold_indirect_ref): Use similar_type_p.

Merging the similar_type_p change to the concepts branch broke a cmcstl2
testcase; investigating led me to this small testcase which has always
failed on trunk.

(cxx_eval_indirect_ref): Likewise.  Improve error location.

From-SVN: r276192

cp-tree.h (class iloc_sentinel): New.

* cp-tree.h (class iloc_sentinel): New.

We didn't already have a sentinel for input_location, and while
temp_override would work, it would also happily set input_location to 0,
which breaks things that try to look up the associated filename.

* decl.c (grokdeclarator, finish_enum_value_list): Use it.
* mangle.c (mangle_decl_string): Use it.
* pt.c (perform_typedefs_access_check): Use it.

From-SVN: r276191

Make cgraph_node::get_fun const

gcc/ChangeLog:
* cgraph.c (cgraph_node::get_fun): Make const.
* cgraph.h (cgraph_node::get_fun): Likewise.

From-SVN: r276190

compiler: don't read known type, simplify Import::finalize_methods

    With the current export format, if we already know the type, we don't
    have to read and parse the definition.

    We only use the finalizer in Import::finalize_methods, so make it a
    local variable.  To match Finalize_methods::type, only put struct
    types into real_for_named.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/197700

From-SVN: r276188

compiler: only check whether struct or array types are big

    Fetching the size of a type typically involves a hash table lookup,
    and is generally non-trivial.  The escape analysis code calls is_big
    more than one might expect.  So only fetch the size if we need it.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/197699

From-SVN: r276187

compiler: fix brace formatting

    Just happened to notice this one.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/197698

From-SVN: r276186

PR libstdc++/91910 fix data race in Debug Mode destructors

Fix data race when _Safe_iterator_base::_M_detach() runs concurrently with
the _Safe_container_base destructor.

PR libstdc++/91910
* src/c++11/debug.cc (_Safe_iterator_base::_M_detach()): Load pointer
atomically and lock the mutex before accessing the sequence.
(_Safe_local_iterator_base::_M_detach()): Likewise.
(_Safe_iterator_base::_M_reset()): Clear _M_sequence atomically.

From-SVN: r276184

re PR target/91919 (arm-linux-eabi ICE with building kernel)

PR target/91919
* config/arm/arm.md (<US>mlal): Remove SE wrappers around operands
of SImode MULT.

* gcc.c-torture/compile/pr91919.c: New.test

From-SVN: r276183

tree-vectorizer.h (_stmt_vec_info::reduc_fn): New.

2019-09-27  Richard Biener  <rguenther@suse.de>

* tree-vectorizer.h (_stmt_vec_info::reduc_fn): New.
(STMT_VINFO_REDUC_FN): Likewise.
* tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
STMT_VINFO_REDUC_FN.
* tree-vect-loop.c (vect_is_simple_reduction): Fix STMT_VINFO_REDUC_IDX
for condition reductions.
(vect_create_epilog_for_reduction): Compute all required state
from the stmt to be vectorized.
(vectorizable_reduction): Simplify vect_create_epilog_for_reduction
invocation and remove then dead code.  For single def-use chains
record only a single vector stmt.

From-SVN: r276180

associate_48.f90: Fix a dg directive.

2019-09-27  Manfred Schwarb  <manfred99@gmx.ch>

        * gfortran.dg/associate_48.f90: Fix a dg directive.
        * gfortran.dg/auto_in_equiv_1.f90: Ditto.
        * gfortran.dg/auto_in_equiv_2.f90: Ditto.
        * gfortran.dg/lto/pr87689_0.f: Ditto.

From-SVN: r276179

re PR tree-optimization/91885 (ICE when compiling SPEC 2017 blender benchmark with -O3 -fprofile-generate)

PR tree-optimization/91885
* gcc.dg/pr91885.c (__int64_t): Change from long to long long.
(__uint64_t): Change from unsigned long to unsigned long long.

From-SVN: r276178

[AArch64] Split built-in function codes into major and minor codes

It was easier to add the SVE ACLE support without enumerating every
function at build time.  This in turn meant that it was easier if the
SVE builtins occupied a distinct numberspace from the existing AArch64
ones, which *are* enumerated at build time.  This patch therefore
divides the built-in functions codes into "major" and "minor" codes.
At present the major code is just "general", but the SVE patch will add
"SVE" as well.

Also, it was convenient to put the SVE ACLE support in its own file,
so the patch makes aarch64.c provide the frontline target hooks directly,
forwarding to the other files for the real work.

The reason for organising the files this way is that aarch64.c needs
to define the target hook macros whatever happens, and having aarch64.c
macros forward to aarch64-builtins.c functions and aarch64-bulitins.c
functions forward to the SVE file seemed a bit indirect.  Doing things
the way the patch does them puts aarch64-builtins.c and the SVE code on
more of an equal footing.

The aarch64_(general_)gimple_fold_builtin change is mostly just
reindentation.

2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-protos.h (aarch64_builtin_class): New enum.
(AARCH64_BUILTIN_SHIFT, AARCH64_BUILTIN_CLASS): New constants.
(aarch64_gimple_fold_builtin, aarch64_mangle_builtin_type)
(aarch64_fold_builtin, aarch64_init_builtins, aarch64_expand_builtin):
(aarch64_builtin_decl, aarch64_builtin_rsqrt): Delete.
(aarch64_general_mangle_builtin_type, aarch64_general_init_builtins):
(aarch64_general_fold_builtin, aarch64_general_gimple_fold_builtin):
(aarch64_general_expand_builtin, aarch64_general_builtin_decl):
(aarch64_general_builtin_rsqrt): Declare.
* config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
New function.
(aarch64_mangle_builtin_type): Rename to...
(aarch64_general_mangle_builtin_type): ...this.
(aarch64_init_fcmla_laneq_builtins, aarch64_init_simd_builtins)
(aarch64_init_crc32_builtins, aarch64_init_builtin_rsqrt)
(aarch64_init_pauth_hint_builtins, aarch64_init_tme_builtins): Use
aarch64_general_add_builtin instead of add_builtin_function.
(aarch64_init_builtins): Rename to...
(aarch64_general_init_builtins): ...this.  Use
aarch64_general_add_builtin instead of add_builtin_function.
(aarch64_builtin_decl): Rename to...
(aarch64_general_builtin_decl): ...this and remove the unused
arguments.
(aarch64_expand_builtin): Rename to...
(aarch64_general_expand_builtin): ...this and remove the unused
arguments.
(aarch64_builtin_rsqrt): Rename to...
(aarch64_general_builtin_rsqrt): ...this.
(aarch64_fold_builtin): Rename to...
(aarch64_general_fold_builtin): ...this.  Take the function subcode
and return type as arguments.  Remove the "ignored" argument.
(aarch64_gimple_fold_builtin): Rename to...
(aarch64_general_gimple_fold_builtin): ...this.  Take the function
subcode and gcall as arguments, and return the new function call.
* config/aarch64/aarch64.c (aarch64_init_builtins)
(aarch64_fold_builtin, aarch64_gimple_fold_builtin)
(aarch64_expand_builtin, aarch64_builtin_decl): New functions.
(aarch64_builtin_reciprocal): Call aarch64_general_builtin_rsqrt
instead of aarch64_builtin_rsqrt.
(aarch64_mangle_type): Call aarch64_general_mangle_builtin_type
instead of aarch64_mangle_builtin_type.

From-SVN: r276177

[C][C++] Allow targets to check calls to BUILT_IN_MD functions

For SVE, we'd like the frontends to check calls to target-specific
built-in functions in the same way that they already do for "normal"
builtins.  This patch adds a target hook for that and extends
check_builtin_function_arguments accordingly.

A slight complication is that when TARGET_RESOLVE_OVERLOADED_BUILTIN
has resolved an overload, it can use build_function_call_vec to build
the call to the underlying non-overloaded function decl.  This in
turn coerces the arguments to the function type and then calls
check_builtin_function_arguments to check the final call.  If the
target does find a problem in this final call, it can be useful
to refer to the original overloaded function decl in diagnostics,
since that's what the user wrote.

The patch therefore passes the original decl as a final optional
parameter to build_function_call_vec.

2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* target.def (check_builtin_call): New target hook.
* doc/tm.texi.in (TARGET_CHECK_BUILTIN_CALL): New @hook.
* doc/tm.texi: Regenerate.

gcc/c-family/
* c-common.h (build_function_call_vec): Take the original
function decl as an optional final parameter.
(check_builtin_function_arguments): Take the original function decl.
* c-common.c (check_builtin_function_arguments): Likewise.
Handle all built-in functions, not just BUILT_IN_NORMAL ones.
Use targetm.check_builtin_call to check BUILT_IN_MD functions.

gcc/c/
* c-typeck.c (build_function_call_vec): Take the original function
decl as an optional final parameter.  Pass all built-in calls to
check_builtin_function_arguments.

gcc/cp/
* cp-tree.h (build_cxx_call): Take the original function decl
as an optional final parameter.
(cp_build_function_call_vec): Likewise.
* call.c (build_cxx_call): Likewise.  Pass all built-in calls to
check_builtin_function_arguments.
* typeck.c (build_function_call_vec): Take the original function
decl as an optional final parameter and pass it to
cp_build_function_call_vec.
(cp_build_function_call_vec): Take the original function
decl as an optional final parameter and pass it to build_cxx_call.

From-SVN: r276176

Fix reduc_index==1 handling for COND_REDUCTION (PR91909)

The then/else order of the VEC_COND_EXPRs created by
vect_create_epilog_for_reduction meeds to line up with the
main VEC_COND_EXPR.

2019-09-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
PR tree-optimization/91909
* tree-vect-loop.c (vect_create_epilog_for_reduction): Take a
reduc_index parameter.  When handling COND_REDUCTION, make sure
that the reduction phi operand is in the correct arm of the
VEC_COND_EXPR.
(vectorizable_reduction): Pass reduc_index to the above.

From-SVN: r276175

[AArch64][SVE2] Shift-Right Accumulate combine patterns

This patch adds combining support for SVE2's shift-right accumulate
instructions.

2019-09-27  Yuliang Wang  <yuliang.wang@arm.com>

gcc/
* config/aarch64/aarch64-sve2.md (aarch64_sve2_sra<mode>):
New combine pattern.

gcc/testsuite/
* gcc.target/aarch64/sve2/shracc_1.c: New test.

From-SVN: r276174

set DECL_SIZE_UNIT for zero-sized fields

Zero-sized fields do not get processed by finish_record_type: they're
removed from the field list before and reinserted after, so their
DECL_SIZE_UNIT remains unset, causing the translation of assignment
statements with use_memset_p, in quite unusual circumstances, to use a
NULL_TREE as the memset length.  This patch sets DECL_SIZE_UNIT for
the zero-sized fields, that don't go through language-independent
layout, in language-specific layout.

for  gcc/ada/ChangeLog

* gcc-interface/decl.c (components_to_record): Set
DECL_SIZE_UNIT for zero-sized fields.

From-SVN: r276173

Daily bump.

From-SVN: r276172

re PR libbacktrace/91908 (New libbacktrace tests fail to build)

PR libbacktrace/91908
* pecoff.c (backtrace_initialize): Explicitly cast unchecked
__sync_bool_compare_and_swap to void.
* xcoff.c (backtrace_initialize): Likewise.

From-SVN: r276168

charset.c (UCS_LIMIT): New macro.

* charset.c (UCS_LIMIT): New macro.
(ucn_valid_in_identifier): Use it instead of a hardcoded constant.
(_cpp_valid_ucn): Issue a pedantic warning for UCNs larger than
UCS_LIMIT outside of identifiers in C and in C++2a or later.

From-SVN: r276167

xtensa: fix PR target/91880

Xtensa hwloop_optimize segfaults when zero overhead loop is about to be
inserted as the first instruction of the function.
Insert zero overhead loop instruction into new basic block before the
loop when basic block that precedes the loop is empty.

2019-09-26  Max Filippov  <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/xtensa.c (hwloop_optimize): Insert zero overhead
loop instruction into new basic block before the loop when basic
block that precedes the loop is empty.

gcc/testsuite/
* gcc.target/xtensa/pr91880.c: New test case.
* gcc.target/xtensa/xtensa.exp: New test suite.

From-SVN: r276166

function.c (gimplify_parameters): Use build_clobber function.

* function.c (gimplify_parameters): Use build_clobber function.
* tree-ssa.c (execute_update_addresses_taken): Likewise.
* tree-inline.c (expand_call_inline): Likewise.
* tree-sra.c (clobber_subtree): Likewise.
* tree-ssa-ccp.c (insert_clobber_before_stack_restore): Likewise.
* omp-low.c (lower_rec_simd_input_clauses, lower_rec_input_clauses,
lower_omp_single, lower_depend_clauses, lower_omp_taskreg,
lower_omp_target): Likewise.
* omp-expand.c (expand_omp_for_generic): Likewise.
* omp-offload.c (ompdevlow_adjust_simt_enter): Likewise.

From-SVN: r276165

CO_BROADCAST for derived types with allocatable components

From-SVN: r276164

rs6000-builtin.def: (LVSL...

[gcc]

2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000-builtin.def: (LVSL, LVSR, LVEBX, LVEHX,
LVEWX, LVXL, LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI,
LVXL_V16QI, LVX, LVX_V1TI, LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI,
LVX_V8HI, LVX_V16QI, LVLX, LVLXL, LVRX, LVRXL, LXSDX, LXVD2X_V1TI,
LXVD2X_V2DF, LXVD2X_V2DI, LXVDSX, LXVW4X_V4SF, LXVW4X_V4SI,
LXVW4X_V8HI, LXVW4X_V16QI, LD_ELEMREV_V1TI, LD_ELEMREV_V2DF,
LD_ELEMREV_V2DI, LD_ELEMREV_V4SF, LD_ELEMREV_V4SI, LD_ELEMREV_V8HI,
LD_ELEMREV_V16QI): Use the PURE attribute.

[testsuite]

2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/pure-builtin-redundant-load.c:  New.

From-SVN: r276163

rs6000-builtin.def: (LVSL...

[gcc]

2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000-builtin.def: (LVSL, LVSR, LVEBX, LVEHX,
LVEWX, LVXL, LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI,
LVXL_V16QI, LVX, LVX_V1TI, LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI,
LVX_V8HI, LVX_V16QI, LVLX, LVLXL, LVRX, LVRXL, LXSDX, LXVD2X_V1TI,
LXVD2X_V2DF, LXVD2X_V2DI, LXVDSX, LXVW4X_V4SF, LXVW4X_V4SI,
LXVW4X_V8HI, LXVW4X_V16QI, LD_ELEMREV_V1TI, LD_ELEMREV_V2DF,
LD_ELEMREV_V2DI, LD_ELEMREV_V4SF, LD_ELEMREV_V4SI, LD_ELEMREV_V8HI,
LD_ELEMREV_V16QI): Use the PURE attribute.

[testsuite]

2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/pure-builtin-redundant-load.c:  New.

From-SVN: r276162

[Darwin, PPC, Mode Iterators 2/n] Eliminate picbase expanders.

We can use the mode iterators directly with an @pattern to avoid the
need for an expander that was only there to pass the mode through.

gcc/ChangeLog:

2019-09-26  Iain Sandoe  <iain@sandoe.co.uk>

* config/rs6000/darwin.md: Replace the expanders for
load_macho_picbase and reload_macho_picbase with use of '@'
in their respective define_insns.
(nonlocal_goto_receiver): Pass Pmode to gen_reload_macho_picbase.
* config/rs6000/rs6000-logue.c (rs6000_emit_prologue): Pass
Pmode to gen_load_macho_picbase.
* config/rs6000/rs6000.md: Likewise.

From-SVN: r276159

re PR tree-optimization/91896 (ICE in vect_get_vec_def_for_stmt_copy, at tree-vect-stmts.c:1687)

2019-09-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/91896
* tree-vect-loop.c (vectorizable_reduction): The single
def-use cycle optimization cannot apply when there's more
than one pattern stmt involved.

* gcc.dg/torture/pr91896.c: New testcase.

From-SVN: r276158

tree-vect-loop.c (vect_analyze_loop_operations): Analyze loop-closed PHIs that are vect_internal_def.

2019-09-26  Richard Biener  <rguenther@suse.de>

* tree-vect-loop.c (vect_analyze_loop_operations): Analyze
loop-closed PHIs that are vect_internal_def.
(vect_create_epilog_for_reduction): Exit early for nested cycles.
Simplify.
(vectorizable_lc_phi): New.
* tree-vect-stmts.c (vect_analyze_stmt): Call vectorize_lc_phi.
(vect_transform_stmt): Likewise.
* tree-vectorizer.h (stmt_vec_info_type): Add lc_phi_info_type.
(vectorizable_lc_phi): Declare.

From-SVN: r276157

PR tree-optimization/91914 - Invalid strlen folding for offset into struct

gcc/testsuite/CHangeLog:
* gcc.dg/strlenopt-79.c: New test.

From-SVN: r276156

Define std::to_array for Debug Mode

* include/debug/array (to_array): Define for debug mode.

From-SVN: r276155

Implement C++20 constexpr changes to std::pair (P1032R1)

* include/bits/stl_pair.h (pair): Add _GLIBCXX20_CONSTEXPR to
piecewise construction constructor, assignment operators, and swap.
* include/std/tuple (pair::pair(piecewise_construct_t, tuple, tuple)):
Add _GLIBCXX20_CONSTEXPR.
(pair::pair(tuple, tuple, _Index_tuple, _Index_tuple)): Likewise.
* testsuite/20_util/pair/constexpr_assign.cc: New test.
* testsuite/20_util/pair/constexpr_swap.cc: New test.

From-SVN: r276154

Fix array index error in address_v6 comparisons

* include/experimental/internet (operator==, operator<): Fix loop
condition to avoid reading past the end of the array.

From-SVN: r276153

Remove include directives for deleted Profile Mode headers

* include/std/array: Remove references to profile mode.
* include/std/bitset: Likewise.
* include/std/deque: Likewise.
* include/std/forward_list: Likewise.
* include/std/list: Likewise.
* include/std/map: Likewise.
* include/std/set: Likewise.
* include/std/unordered_map: Likewise.
* include/std/unordered_set: Likewise.
* include/std/vector: Likewise.
* testsuite/17_intro/headers/c++1998/profile_mode.cc: New test.
* testsuite/17_intro/headers/c++2011/profile_mode.cc: New test.

From-SVN: r276152

* osint.adb (OS_Time_To_GNAT_Time): Remove dependency on To_C/To_Ada

From-SVN: r276151

tree-vect-loop.c (vect_analyze_loop_operations): Also call vectorizable_reduction for vect_double_reduction_def.

2019-09-26  Richard Biener  <rguenther@suse.de>

* tree-vect-loop.c (vect_analyze_loop_operations): Also call
vectorizable_reduction for vect_double_reduction_def.
(vect_transform_loop): Likewise.
(vect_create_epilog_for_reduction): Move double-reduction
PHI creation and preheader argument setting of PHIs ...
(vectorizable_reduction): ... here.  Also process
vect_double_reduction_def PHIs, creating the vectorized
PHI nodes, remembering the scalar adjustment computed for
the epilogue in STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT.
Remember the original reduction code in STMT_VINFO_REDUC_CODE.
* tree-vectorizer.c (vec_info::new_stmt_vec_info):
Initialize STMT_VINFO_REDUC_CODE.
* tree-vectorizer.h (_stmt_vec_info::reduc_epilogue_adjustment): New.
(_stmt_vec_info::reduc_code): Likewise.
(STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT): Likewise.
(STMT_VINFO_REDUC_CODE): Likewise.

From-SVN: r276150

Add myself as an aarch64 maintainer

2019-09-26  Richard Sandiford  <richard.sandiford@arm.com>

* MAINTAINERS: Add myself as an aarch64 maintainer.

From-SVN: r276149

driver: Also prune joined switches with negation

When -march=native is passed to host_detect_local_cpu to the backend,
it overrides all command lines after it.  That means

$ gcc -march=native -march=armv8-a

is treated as

$ gcc -march=armv8-a -march=native

Prune joined switches with Negative and RejectNegative to allow
-march=armv8-a to override previous -march=native on command-line.

This is the same fix as was applied for i386 in SVN revision 269164 but for
aarch64 and arm.

2019-09-26  Matt Turner  <mattst88@gmail.com>

PR driver/69471
* config/aarch64/aarch64.opt (march=): Add Negative(march=).
(mtune=): Add Negative(mtune=).
(mcpu=): Add Negative(mcpu=).
* config/arm/arm.opt: Likewise.

From-SVN: r276148

[arm] Implement DImode SIMD32 intrinsics

This patch implements some more SIMD32, but these ones have a DImode result+addend.
Apart from that there's nothing too exciting about them.

Bootstrapped and tested on arm-none-linux-gnueabihf.

* config/arm/arm.md (arm_<simd32_op>): New define_insn.
* config/arm/arm_acle.h (__smlald, __smlaldx, __smlsld, __smlsldx):
Define.
* config/arm/arm_acle.h: Define builtins for the above.
* config/arm/iterators.md (SIMD32_DIMODE): New int_iterator.
(simd32_op): Handle the above.
* config/arm/unspecs.md: Define unspecs for the above.

* gcc.target/arm/acle/simd32.c: Update test.

From-SVN: r276147

[arm] Implement non-GE-setting SIMD32 intrinsics

This patch is part of a series to implement the SIMD32 ACLE intrinsics [1].
The interesting parts implementation-wise involve adding support for setting and reading
the Q bit for saturation and the GE-bits for the packed SIMD instructions.
That will come in a later patch.

For now, this patch implements the other intrinsics that don't need anything special ;
just a mapping from arm_acle.h function to builtin to RTL expander+unspec.

I've compressed as many as I could with iterators so that we end up needing only 3
new define_insns.

Bootstrapped and tested on arm-none-linux-gnueabihf.

[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics

* config/arm/arm.md (arm_<simd32_op>): New define_insn.
(arm_<sup>xtb16): Likewise.
(arm_usada8): Likewise.
* config/arm/arm_acle.h (__qadd8, __qsub8, __shadd8, __shsub8,
__uhadd8, __uhsub8, __uqadd8, __uqsub8, __qadd16, __qasx, __qsax,
__qsub16, __shadd16, __shasx, __shsax, __shsub16, __uhadd16, __uhasx,
__uhsax, __uhsub16, __uqadd16, __uqasx, __uqsax, __uqsub16, __sxtab16,
__sxtb16, __uxtab16, __uxtb16): Define.
* config/arm/arm_acle_builtins.def: Define builtins for the above.
* config/arm/unspecs.md: Define unspecs for the above.
* config/arm/iterators.md (SIMD32_NOGE_BINOP): New int_iterator.
(USXTB16): Likewise.
(simd32_op): New int_attribute.
(sup): Handle UNSPEC_SXTB16, UNSPEC_UXTB16.
* doc/sourcebuild.exp (arm_simd32_ok): Document.

* lib/target-supports.exp
(check_effective_target_arm_simd32_ok_nocache): New procedure.
(check_effective_target_arm_simd32_ok): Likewise.
(add_options_for_arm_simd32): Likewise.
* gcc.target/arm/acle/simd32.c: New test.

From-SVN: r276146

[arm] Update FP16 tests

My recent assemble_real patch (r275873) meant that we now output
negative FP16 constants in the same way as we'd output an integer
subreg of them.  This patch updates gcc.target/arm/fp16-* accordingly.

2019-09-26  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
* gcc.target/arm/fp16-compile-alt-3.c: Expect (__fp16) -2.0
to be written as a negative short rather than a positive one.
* gcc.target/arm/fp16-compile-ieee-3.c: Likewise.

From-SVN: r276145

[PATCH] Fix quoting in a call to internal_error

2019-09-26  Martin Jambor  <mjambor@suse.cz>

* ipa-sra.c (verify_splitting_accesses): Fix quoting in a call to
internal_error.

From-SVN: r276144

[PATCH] Fix continue condition in IPA-SRA's process_scan_results

2019-09-26  Martin Jambor  <mjambor@suse.cz>

* ipa-sra.c (process_scan_results): Fix continue condition.

From-SVN: r276143

Add myself as aarch64 port maintainer

* MAINTAINERS: Add myself as aarch64 maintainer.

From-SVN: r276142

Add TODO_update_ssa for SLP BB vectorization (PR tree-optimization/91885).

2019-09-26  Martin Liska  <mliska@suse.cz>

PR tree-optimization/91885
* tree-vectorizer.c (try_vectorize_loop_1):
Add TODO_update_ssa_only_virtuals similarly to what slp
pass does.
2019-09-26  Martin Liska  <mliska@suse.cz>

PR tree-optimization/91885
* gcc.dg/pr91885.c: New test.

From-SVN: r276141

[AArch64] Fix cost of (plus ... (const_int -C))

The PLUS handling in aarch64_rtx_costs only checked for nonnegative
constants, meaning that simple immediate subtractions like:

  (set (reg R1) (plus (reg R2) (const_int -8)))

had a cost of two instructions.

2019-09-26  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
aarch64_plus_immediate rather than aarch64_uimm12_shift
to test for valid PLUS immediates.

From-SVN: r276140

Daily bump.

From-SVN: r276139

libgcc: Rebuild autoconf files

        * config.in, configure: Re-rebuild with stock autoconf 2.69,
        not the ubuntu modified 2.69.

From-SVN: r276135

aarch64: Configure for sys/auxv.h in libgcc for lse-init.c

PR target/91833
* config/aarch64/lse-init.c: Include auto-target.h.  Disable
initialization if !HAVE_SYS_AUXV_H.
* configure.ac (AC_CHECK_HEADERS): Add sys/auxv.h.
* config.in, configure: Rebuild.

From-SVN: r276134

aarch64: Fix store-exclusive in load-operate LSE helpers

PR target/91834
* config/aarch64/lse.S (LDNM): Ensure STXR output does not
overlap the inputs.

From-SVN: r276133

Colorize %L and %C text to match diagnostic_show_locus (PR fortran/91426)

gcc/fortran/ChangeLog:
PR fortran/91426
* error.c (curr_diagnostic): New static variable.
(gfc_report_diagnostic): New static function.
(gfc_warning): Replace call to diagnostic_report_diagnostic with
call to gfc_report_diagnostic.
(gfc_format_decoder): Colorize the text of %L and %C to match the
colorization used by diagnostic_show_locus.
(gfc_warning_now_at): Replace call to diagnostic_report_diagnostic with
call to gfc_report_diagnostic.
(gfc_warning_now): Likewise.
(gfc_warning_internal): Likewise.
(gfc_error_now): Likewise.
(gfc_fatal_error): Likewise.
(gfc_error_opt): Likewise.
(gfc_internal_error): Likewise.

From-SVN: r276132

Remove newly unused function and variable in tree-sra

Hi,

Martin and his clang warnings discovered that I forgot to remove a
static inline function and a variable when ripping out the old IPA-SRA
from tree-sra.c and both are now unused.  Thus I am doing that now
with the patch below which I will commit as obvious (after including
it in a round of a bootstrap and testing on an x86_64-linux).

Thanks,

Martin

2019-09-25  Martin Jambor  <mjambor@suse.cz>

* tree-sra.c (no_accesses_p): Remove.
(no_accesses_representant): Likewise.

From-SVN: r276128

PR c++/91877 - ICE with converting member of packed struct.

* call.c (convert_like_real): Use similar_type_p in an assert.

* g++.dg/conversion/packed1.C: New test.

From-SVN: r276127

[AArch64] Use implementation namespace consistently in arm_neon.h

We're somewhat inconsistent in arm_neon.h when it comes to using the implementation namespace for local
identifiers. This means things like:
#define hash_abcd 0
#define hash_e 1
#define wk 2

#include "arm_neon.h"

uint32x4_t
foo (uint32x4_t a, uint32_t b, uint32x4_t c)
{
  return vsha1cq_u32 (a, b, c);
}

don't compile.
This patch fixes these issues throughout the whole of arm_neon.h
Bootstrapped and tested on aarch64-none-linux-gnu.
The advsimd-intrinsics.exp tests pass just fine.

From-SVN: r276125

re PR tree-optimization/91896 (ICE in vect_get_vec_def_for_stmt_copy, at tree-vect-stmts.c:1687)

2019-09-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/91896
* tree-vect-loop.c (vectorizable_reduction): The single
def-use cycle optimization cannot apply when there's more
than one pattern stmt involved.

* gcc.dg/torture/pr91896.c: New testcase.

From-SVN: r276123

[AARCH64] Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

The DCache clean & ICache invalidation requirements for instructions
to be data coherence are discoverable through new fields in CTR_EL0.
Let's support the two bits if they are enabled, the CPU core will
not execute the unnecessary DCache clean or Icache Invalidation
instructions.

2019-09-25  Shaokun Zhang  <zhangshaokun@hisilicon.com>

* config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Add support for
CTR_EL0.IDC and CTR_EL0.DIC.

From-SVN: r276122

Implement LWG 3296 for basic_regex::assign

* include/bits/regex.h
(basic_regex::assign(const C*, size_t, flag_type)): Add default
argument (LWG 3296).
* testsuite/28_regex/basic_regex/assign/char/lwg3296.cc: New test.
* testsuite/28_regex/basic_regex/assign/wchar_t/lwg3296.cc: New test.

From-SVN: r276121

Move a target test-case to generic folder.

2019-09-25  Martin Liska  <mliska@suse.cz>

* gcc.target/s390/pr91014.c: Move to ...
* gcc.dg/pr91014.c: ... this.

From-SVN: r276120

name-lookup.c (check_extern_c_conflict): Use DECL_SOURCE_LOCATION.

/cp
2019-09-25  Paolo Carlini  <paolo.carlini@oracle.com>

* name-lookup.c (check_extern_c_conflict): Use DECL_SOURCE_LOCATION.
(check_local_shadow): Use it in three additional places.

/testsuite
2019-09-25  Paolo Carlini  <paolo.carlini@oracle.com>

* g++.dg/diagnostic/redeclaration-1.C: New.
* g++.dg/lookup/extern-c-hidden.C: Test location(s) too.
* g++.dg/lookup/extern-c-redecl.C: Likewise.
* g++.dg/lookup/extern-c-redecl6.C: Likewise.
* g++.old-deja/g++.other/using9.C: Likewise.

From-SVN: r276119

Fix location of dependent member CALL_EXPR.

The break here was skipping over the code that sets EXPR_LOCATION on the
call expressions, for no good reason.

* parser.c (cp_parser_postfix_expression): Do set location of
dependent member call.

From-SVN: r276112

Daily bump.

From-SVN: r276111

[Darwin, PPC, Mode Iterators 1/n] Use mode iterators in picbase patterns.

This switches the picbase load and reload patterns to use the 'P' mode
iterator instead of writing an SI and DI pattern for each.

gcc/ChangeLog:

2019-09-24  Iain Sandoe  <iain@sandoe.co.uk>

* config/rs6000/rs6000.md (load_macho_picbase_<mode>): New, using
the 'P' mode iterator, replacing the (removed) SI and DI variants.
(reload_macho_picbase_<mode>): Likewise.

From-SVN: r276107

[Darwin, PPC, Mode Iterators 0/n] Make iterators visible to darwin.md.

As a clean-up, we want to be able to use mode iterators in darwin.md.
This patch moves the include point for the Darwin include until after
the definition of the mode iterators and attrs.  No functional change
intended.

gcc/ChangeLog:

2019-09-24  Iain Sandoe  <iain@sandoe.co.uk>

* config/rs6000/rs6000.md: Move darwin.md include until
after the definition of the mode iterators.

From-SVN: r276106

PR tree-optimization/91570 - ICE in get_range_strlen_dynamic on a conditional

PR tree-optimization/91570 - ICE in get_range_strlen_dynamic on a conditional
of two strings

gcc/Changelog:
* tree-ssa-strlen.c (get_range_strlen_dynamic): Handle null and
non-constant minlen, maxlen and maxbound.

gcc/testsuite/Changelog:
* gcc.dg/pr91570.c: New test.

From-SVN: r276105

PR c++/91868 - improve -Wshadow location.

* name-lookup.c (check_local_shadow): Use DECL_SOURCE_LOCATION
instead of input_location.

* g++.dg/warn/Wshadow-16.C: New test.

From-SVN: r276103

PR c++/91845 - ICE with invalid pointer-to-member.

* expr.c (mark_use): Use error_operand_p.
* typeck2.c (build_m_component_ref): Check error_operand_p after
calling mark_[lr]value_use.

* g++.dg/cpp1y/pr91845.C: New test.

From-SVN: r276102

Remove check for impossible condition in std::variant::index()

The __index_type is only ever unsigned char or unsigned short, so not
the same type as size_t.

* include/std/variant (variant::index()): Remove impossible case.

From-SVN: r276100

tree-vectorizer.h (_stmt_vec_info::const_cond_reduc_code): Rename to...

2019-09-24  Richard Biener  <rguenther@suse.de>

* tree-vectorizer.h (_stmt_vec_info::const_cond_reduc_code):
Rename to...
(_stmt_vec_info::cond_reduc_code): ... this.
(_stmt_vec_info::induc_cond_initial_val): Add.
(STMT_VINFO_VEC_CONST_COND_REDUC_CODE): Rename to...
(STMT_VINFO_VEC_COND_REDUC_CODE): ... this.
(STMT_VINFO_VEC_INDUC_COND_INITIAL_VAL): Add.
* tree-vectorizer.c (vec_info::new_stmt_vec_info): Adjust.
* tree-vect-loop.c (get_initial_def_for_reduction): Pass in
the reduction code.
(vect_create_epilog_for_reduction): Drop special
induction condition reduction params, pass in reduction code
and simplify.
(vectorizable_reduction): Perform condition reduction kind
selection only at analysis time.  Adjust passing on state.

From-SVN: r276099

[AArch64] Don't split 64-bit constant stores to volatile location

The optimisation to optimise:
   typedef unsigned long long u64;

   void bar(u64 *x)
   {
     *x = 0xabcdef10abcdef10;
   }

from:
        mov     x1, 61200
        movk    x1, 0xabcd, lsl 16
        movk    x1, 0xef10, lsl 32
        movk    x1, 0xabcd, lsl 48
        str     x1, [x0]

into:
        mov     w1, 61200
        movk    w1, 0xabcd, lsl 16
        stp     w1, w1, [x0]

ends up producing two distinct stores if the destination is volatile:
  void bar(u64 *x)
  {
    *(volatile u64 *)x = 0xabcdef10abcdef10;
  }
        mov     w1, 61200
        movk    w1, 0xabcd, lsl 16
        str     w1, [x0]
        str     w1, [x0, 4]

because we end up not merging the strs into an stp. It's questionable whether the use of STP is valid for volatile in the first place.
To avoid unnecessary pain in a context where it's unlikely to be performance critical [1] (use of volatile), this patch avoids this
transformation for volatile destinations, so we produce the original single STR-X.

Bootstrapped and tested on aarch64-none-linux-gnu.

[1] https://lore.kernel.org/lkml/20190821103200.kpufwtviqhpbuv2n@willie-the-truck/

* config/aarch64/aarch64.md (mov<mode>): Don't call
aarch64_split_dimode_const_store on volatile MEM.

* gcc.target/aarch64/nosplit-di-const-volatile_1.c: New test.

From-SVN: r276098

[GCC][PATCH][AArch64] Update hwcap string for fp16fml in aarch64-option-extensions.def

This is a minor patch that fixes the entry for the fp16fml feature in
GCC's aarch64-option-extensions.def.

As can be seen in the Linux sources here
https://github.com/torvalds/linux/blob/master/arch/arm64/kernel/cpuinfo.c#L69
the correct string is "asimdfhm", not "asimdfml".

Cross-compiled and tested on aarch64-none-linux-gnu.

2019-09-24  Stamatis Markianos-Wright  <stam.markianos-wright@arm.com>

* config/aarch64/aarch64-option-extensions.def (fp16fml):
Update hwcap string for fp16fml.

From-SVN: r276097

re PR middle-end/91866 (Sign extend of an int is not recognized)

PR middle-end/91866
* match.pd (((T)(A)) + CST -> (T)(A + CST)): Formatting fix.
(((T)(A + CST1)) + CST2 -> (T)(A) + (T)CST1 + CST2): New optimization.

* gcc.dg/tree-ssa/pr91866.c: New test.

From-SVN: r276096

Use more switch statements.

2019-09-24  Martin Liska  <mliska@suse.cz>

* cfgexpand.c (gimple_assign_rhs_to_tree): Use switch statement
instead of if-elseif-elseif-...
* gimple-expr.c (extract_ops_from_tree): Likewise.
* gimple.c (get_gimple_rhs_num_ops): Likewise.
* tree-ssa-forwprop.c (rhs_to_tree): Likewise.

From-SVN: r276095

[PR 91831] Copy PARM_DECLs of artificial thunks

Hi,

I am quite surprised I did not catch this before but the new
ipa-param-manipulation does not copy PARM_DECLs when creating
artificial thinks (I think it originally did but then I somehow
removed during one cleanups).  Fixed by adding the capability at the
natural place.  It is triggered whenever context of the PARM_DECL that
is just taken from the original function does not match the target
fndecl rather than by some constructor parameter because in such
situation it is always the correct thing to do.

Bootstrapped and tested on x86_64-linux.  OK for trunk?

Thanks,

Martin

2019-09-24  Martin Jambor  <mjambor@suse.cz>

PR ipa/91831
* ipa-param-manipulation.c (carry_over_param): Make a method of
ipa_param_body_adjustments, remove now unnecessary argument.  Also copy
in case of a context mismatch.
(ipa_param_body_adjustments::common_initialization): Adjust call to
carry_over_param.
* ipa-param-manipulation.h (class ipa_param_body_adjustments): Add
private method carry_over_param.

testsuite/
* g++.dg/ipa/pr91831.C: New test.

From-SVN: r276094

[PR 91832] Do not ICE on negative offsets in ipa-sra

Hi,

IPA-SRA asserts that an offset obtained from get_ref_base_and_extent
is non-negative (after it verifies it is based on a parameter).  That
assumption is invalid as the testcase shows.  One could probably also write a
testcase with defined behavior, but unless I see a reasonable one
where the transformation is really desirable, I'd like to just punt on
those cases.

Bootstrapped and tested on x86_64-linux.  OK for trunk?

Thanks,

Martin

2019-09-24  Martin Jambor  <mjambor@suse.cz>

PR ipa/91832
* ipa-sra.c (scan_expr_access): Check that offset is non-negative.

testsuite/
* gcc.dg/ipa/pr91832.c: New test.

From-SVN: r276093

tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize MEM_REF base.

2019-09-24  Richard Biener  <rguenther@suse.de>

* tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize MEM_REF
base.

* gcc.dg/torture/20190924-1.c: New testcase.

From-SVN: r276092

PR libstdc++/91871 fix Clang warnings in testsuite

PR libstdc++/91871
* testsuite/util/testsuite_hooks.h
(conversion::iterator_to_const_iterator()): Do not return an invalid
iterator. Test direct-initialization and direct-list-initialization
as well as implicit conversion.

From-SVN: r276091

Daily bump.

From-SVN: r276089

GNAT/testsuite: Pass the `ada' option to target compilation

Pass the `ada' option to DejaGNU's `target_compile' procedure, which by
default calls `default_target_compile', so that it arranges for an Ada
compilation rather the default of C.  We set the compiler to `gnatmake'
manually here, so that part of the logic in `default_target_compile' is
not used, but it affects other settings, such as the use of `adaflags'.

gcc/testsuite/
* lib/gnat.exp (gnat_target_compile): Pass the `ada' option to
`target_compile'.

From-SVN: r276085

RS6000, add xxswapd support

gcc/ChangeLog:

2019-09-23  Carl Love  <cel@us.ibm.com>

* config/rs6000/vsx.md (xxswapd_v4si, xxswapd_v8hi, xxswapd_v16qi):
New define_insn.
(vsx_xxpermdi4_le_<mode> for VSX_W, vsx_xxpermdi8_le_V8HI,
vsx_xxpermdi16_le_V16QI): Removed define_insn.

From-SVN: r276065

pt.c (check_explicit_specialization): Use cp_expr_loc_or_input_loc.

/cp
2019-09-23  Paolo Carlini  <paolo.carlini@oracle.com>

* pt.c (check_explicit_specialization): Use cp_expr_loc_or_input_loc.
(process_partial_specialization): Likewise.
(convert_nontype_argument_function): Likewise.
(invalid_tparm_referent_p): Likewise.
(convert_template_argument): Likewise.
(check_valid_ptrmem_cst_expr): Tidy.

/testsuite
2019-09-23  Paolo Carlini  <paolo.carlini@oracle.com>

* g++.dg/cpp0x/pr68724.C: Check location(s) too.
* g++.dg/cpp0x/variadic38.C: Likewise.
* g++.dg/cpp1z/nontype2.C: Likewise.
* g++.dg/parse/explicit1.C: Likewise.
* g++.dg/template/crash11.C: Likewise.
* g++.dg/template/non-dependent8.C: Likewise.
* g++.dg/template/nontype-array1.C: Likewise.
* g++.dg/template/nontype3.C: Likewise.
* g++.dg/template/nontype8.C: Likewise.
* g++.dg/template/partial5.C: Likewise.
* g++.dg/template/spec33.C: Likewise.
* g++.old-deja/g++.pt/memtemp64.C: Likewise.
* g++.old-deja/g++.pt/spec20.C: Likewise.
* g++.old-deja/g++.pt/spec21.C: Likewise.
* g++.old-deja/g++.robertl/eb103.C: Likewise.

From-SVN: r276064

2019-09-23  Sandra Loosemore  <sandra@codesourcery.com>

gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_arm_vfp_ok_nocache): New.
(check_effective_target_arm_vfp_ok): Rewrite.
(add_options_for_arm_vfp): New.
(add_options_for_sqrt_insn): Add options for arm.
* gcc.target/arm/attr-neon-builtin-fail2.c: Use dg-add-options.
* gcc.target/arm/short-vfp-1.c: Likewise.

From-SVN: r276063

PR c++/91809 - bit-field and ellipsis.

decay_conversion converts a bit-field access to its declared type, which
isn't what we want here; it even has a comment that the caller is expected
to have already used default_conversion to perform integral promotion.  This
function handles arithmetic promotion differently, but we still don't want
to call decay_conversion before that happens.

* call.c (convert_arg_to_ellipsis): Don't call decay_conversion for
arithmetic arguments.

From-SVN: r276059

PR c++/91844 - Implement CWG 2352, Similar types and reference binding.

* call.c (reference_related_p): Use similar_type_p instead of
same_type_p.
(reference_compatible_p): Update implementation to match CWG 2352.
* cp-tree.h (similar_type_p): Declare.
* typeck.c (similar_type_p): New.

* g++.dg/cpp0x/pr33930.C: Add dg-error.
* g++.dg/cpp0x/ref-bind1.C: New test.
* g++.dg/cpp0x/ref-bind2.C: New test.
* g++.dg/cpp0x/ref-bind3.C: New test.
* g++.old-deja/g++.pt/spec35.C: Remove dg-error.

From-SVN: r276058

[arm] Add missing Makefile dependency on arm_acle_builtins.def

arm-builtins.o is missing a Makefile dependency on arm_acle_builtins.def
which can cause inconsistent rebuilds
when adding builtins in there.

This patch adds the right Makefile-foo to fix that.

* config/arm/t-arm (arm-builtins.o): Add dependency on
arm_acle_builtins.def.

From-SVN: r276057

PR libstdc++/91788 improve codegen for std::variant<T...>::index()

If __index_type is a smaller type than size_t, then the result of
size_t(__index_type(-1)) is not equal to size_t(-1), but to an incorrect
value such as size_t(255) or size_t(65535). The old implementation of
variant<T...>::index() uses (size_t(__index_type(_M_index + 1)) - 1)
which is always correct, but generates suboptimal code for many common
cases.

When the __index_type is size_t or valueless variants are not possible
we can just return the value directly.

When the number of alternatives is sufficiently small the result of
converting the _M_index value to the corresponding signed type will be
either non-negative or -1. In those cases converting to the signed type
and then to size_t will either produce the correct positive value or
will sign extend -1 to (size_t)-1 as desired.

For the remaining case we keep the existing arithmetic operations to
ensure the correct result.

PR libstdc++/91788 (partial)
* include/std/variant (variant::index()): Improve codegen for cases
where conversion to size_t already works correctly.

From-SVN: r276056

Fix non-canonical CONST_INTs in altivec_copysign_v4sf3 (PR91823)

The pattern was generating zero-extended rather than sign-extended
CONST_INTs.

2019-09-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
PR target/91823
* config/rs6000/altivec.md (altivec_copysign_v4sf3): Generate
canonical CONST_INTs.  Use gen_rtvec.

From-SVN: r276055

tree-vect-loop.c (get_initial_def_for_reduction): Simplify, avoid adjusting by + 0 or * 1.

2019-09-23  Richard Biener  <rguenther@suse.de>

* tree-vect-loop.c (get_initial_def_for_reduction): Simplify,
avoid adjusting by + 0 or * 1.
(vect_create_epilog_for_reduction): Get reduction code only
when necessary.  Deal with adjustment_def only when necessary.

From-SVN: r276054