platform/upstream/llvm.git
21 months ago[AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers
Caroline Concatto [Mon, 17 Oct 2022 10:46:32 +0000 (11:46 +0100)]
[AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers

This patch adds the assembly/disassembly for the following instructions:
  ADD (to vector): Add replicated single vector to multi-vector with multi-vector result.
  SQDMULH (multiple and single vector): Multi-vector signed saturating doubling multiply high by vector.
for 2 and 4 ZA SVE registers.

The reference can be found here:

https://developer.arm.com/documentation/ddi0602/2022-09

It also adds more size for the multiple register tuple:
  ZZ_b_mul_r,  ZZ_h_mul_r,
  ZZZZ_b_mul_r,  ZZZZ_h_mul_r,
for 8 bits and 16 bits with 2 and 4 ZA registers.

Depends on: D135468

Differential Revision: https://reviews.llvm.org/D135563

21 months ago[tblgen-lsp-server] Fix various ASAN issues
River Riddle [Wed, 19 Oct 2022 23:21:10 +0000 (16:21 -0700)]
[tblgen-lsp-server] Fix various ASAN issues

* Properly use virtual destructors for index symbols
* Clear the index before initializing it

21 months ago[AArch64] Fix scheduler crash in fusion code.
Eli Friedman [Thu, 20 Oct 2022 17:47:44 +0000 (10:47 -0700)]
[AArch64] Fix scheduler crash in fusion code.

Make sure we don't call getReg() on the first operand of instruction
without knowing that operand is actually a register.

(This codepath isn't enabled for most CPUs; only triggers on certain
CPUs, like Cortex-X1.)

Differential Revision: https://reviews.llvm.org/D136296

21 months ago[AArch64]SME2 Multiple vector ternary int/float 2 and 4 registers
Caroline Concatto [Mon, 17 Oct 2022 09:27:12 +0000 (10:27 +0100)]
[AArch64]SME2 Multiple vector ternary int/float 2 and 4 registers

This patch adds the assembly/disassembly for the following instructions:
       For INT:
               ADD(array results, multiple vectors): Add multi-vector to multi-vector with ZA array vector results.
               SUB(array results, multiple vectors): Subtract multi-vector from multi-vector with ZA array vector results.
       For FP:
              FMLA (multiple vectors): Multi-vector floating-point fused multiply-add.
              FMLS (multiple vectors): Multi-vector floating-point fused multiply-subtract.

The reference can be found here:

https://developer.arm.com/documentation/ddi0602/2022-09

   This patch also adds a  register operand to represent multiples of ZA multi-vectors.
They are:
        ZZ_s_mul_r, ZZ_d_mul_r, ZZZZ_s_mul_r and ZZZZ_d_mul_r
and represent the Zn or Zm times 2 or 4 according to the vector group.

Depends on: D135455

Differential Revision: https://reviews.llvm.org/D135468

21 months ago[InstCombine] Canonicalize GEP of GEP by swapping constant-indexed GEP to the back
William Huang [Wed, 12 Oct 2022 17:49:24 +0000 (17:49 +0000)]
[InstCombine] Canonicalize GEP of GEP by swapping constant-indexed GEP to the back

Canonicalize GEP of GEP by swapping GEP with some suffix constant indices to the back (and GEP with all constant indices to the back of that), this allows more constant index GEP merging to happen. Exceptions are: If swapping violates use-def relations, or anti-optimizes LICM

For constant indexed GEP of GEP, if they cannot be merged directly, they will be casted to i8* and merged.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D125845

21 months ago[mlir] Set pattern that resolves tensor dimensions as having bounded recursion.
Mahesh Ravishankar [Thu, 20 Oct 2022 16:59:10 +0000 (16:59 +0000)]
[mlir] Set pattern that resolves tensor dimensions as having bounded recursion.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D136200

21 months ago[AArch64][SelectionDAG] Lower multiplication by a constant to shl+add+shl+add
zhongyunde [Thu, 20 Oct 2022 16:33:28 +0000 (00:33 +0800)]
[AArch64][SelectionDAG] Lower multiplication by a constant to shl+add+shl+add

Change the costmodel to lower a = b * C where C = (1 + 2^m) * (1 + 2^n) to
      add   w8, w0, w0, lsl #m
      add   w0, w8, w8, lsl #n
Note: The latency can vary depending on the shirt amount

Reviewed By: efriedma, dmgreen
Differential Revision: https://reviews.llvm.org/D135441

21 months ago[HLSL] Add groupshare address space.
Xiang Li [Wed, 19 Oct 2022 19:40:39 +0000 (12:40 -0700)]
[HLSL] Add groupshare address space.

Added keyword, LangAS and TypeAttrbute for groupshared.

Tanslate it to LangAS with asHLSLLangAS.

Make sure it translated into address space 3 for DirectX target.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D135060

21 months ago[OpenMP] Remove `-Bsymbolic` flag for device linking in the GNU toolchain
Joseph Huber [Thu, 20 Oct 2022 15:38:27 +0000 (10:38 -0500)]
[OpenMP] Remove `-Bsymbolic` flag for device linking in the GNU toolchain

Previously, OpenMP linking would be done explicitly in a linker stage.
For `x86_64` offloading this would just use the host linker, which could
be the `bfd` linker. This linker had problems linking relocations
against variables with protected visibility so we force `-Bsymbolic`
when linking. After the deprecation of the old offloading driver this
code is no longer used and can be removed.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D136363

21 months ago[Libomptarget] Build plugins with protected visibility by default
Joseph Huber [Thu, 20 Oct 2022 15:51:46 +0000 (10:51 -0500)]
[Libomptarget] Build plugins with protected visibility by default

The plugins all define the same interface symbols. This is generally not
a problem when calling the plugin directly from the dynamic library's
handle. However, when calling from within the plugin itself it is
possible for another plugin's symbols to preempt the symbols. This was
observed with the `__tgt_rtl_is_valid_binary` call in the
`__tgt_rtl_is_valid_binary_info` function being mapped to the x86_64
plugin.

This patch changes the default visibility to `protected` intead. This
visibility ensures that these symbols are all externally visible from
the plugin, but ensures their definitions are fixed within the shared
library. Having protected visiiblity makes such symbol preemption
impossible.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D136365

21 months ago[mlir] Fix incorrect temporary file handling on windows
Denys Shabalin [Thu, 20 Oct 2022 15:50:26 +0000 (17:50 +0200)]
[mlir] Fix incorrect temporary file handling on windows

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136364

21 months ago[gn build] Port a48007355a03
LLVM GN Syncbot [Thu, 20 Oct 2022 15:30:49 +0000 (15:30 +0000)]
[gn build] Port a48007355a03

21 months ago[libc++][format] Implements string escaping.
Mark de Wever [Thu, 5 May 2022 06:03:58 +0000 (08:03 +0200)]
[libc++][format] Implements string escaping.

Implements parts of
- P2286R8 Formatting Ranges

Reviewed By: #libc, tahonermann

Differential Revision: https://reviews.llvm.org/D134036

21 months ago[libc++][CI] Reorder jobs.
Mark de Wever [Wed, 19 Oct 2022 18:01:57 +0000 (20:01 +0200)]
[libc++][CI] Reorder jobs.

In the second leg of the CI the steps take about:
- C++2b              10m
- C++11              8m
- C++03              6m
- Modular build      10m
- GCC 12 / C++latest 20m
So the slowest job is scheduled last. The CI will wait to start the
third leg until that job is done. The current order increases the
latency of the current job, instead start the slow jobs earlier.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D136276

21 months ago[RISCV] Remove EEW from some sched classes.
Craig Topper [Thu, 20 Oct 2022 15:13:25 +0000 (08:13 -0700)]
[RISCV] Remove EEW from some sched classes.

This removes the EEW from unit stride load/store and whole register
load, store, move.

It seems reasonable that implementations of these instructions wouldn't
usually be affected by element width.

We likely need to add LMUL information to our scheduling classes so
I thought it might be good to remove a few before they got multiplied
by LMUL.

Reviewed By: reames, michaelmaitland

Differential Revision: https://reviews.llvm.org/D135992

21 months ago[mlgo] Fix test post-D136040
Mircea Trofin [Thu, 20 Oct 2022 15:21:19 +0000 (08:21 -0700)]
[mlgo] Fix test post-D136040

Instruction opcodes bumped, trivial fix.

21 months ago[NFC] Fix a few whitespace inconsistencies.
Paul Walker [Thu, 20 Oct 2022 11:53:58 +0000 (11:53 +0000)]
[NFC] Fix a few whitespace inconsistencies.

21 months ago[ModRef] Default to ModRef in MemoryEffects ctors (NFC)
Nikita Popov [Thu, 20 Oct 2022 14:40:38 +0000 (16:40 +0200)]
[ModRef] Default to ModRef in MemoryEffects ctors (NFC)

Allow writing something like MemoryEffects::argMemOnly() implying
MemoryEffects::argMemOnly(ModRefInfo::ModRef). Having to write this
out is a bit of an annoying than porting code using the existing
attributes in D135780.

21 months agoDetect Visual Studio automatically in Windows packaging script
Pierrick Bouvier [Thu, 20 Oct 2022 14:29:15 +0000 (16:29 +0200)]
Detect Visual Studio automatically in Windows packaging script

Instead of hardcoding several VS paths, use vswhere.exe (available from
VS 2017) to get latest version available.

Reviewed By: hans, thieta

Differential Revision: https://reviews.llvm.org/D135873

21 months ago[NFC] Add DebugVariable constructor that takes DbgVariableIntrinsic pointer
OCHyams [Thu, 20 Oct 2022 14:26:40 +0000 (15:26 +0100)]
[NFC] Add DebugVariable constructor that takes DbgVariableIntrinsic pointer

Note: The constructor definition cannot be inline without some refactoring as
it introduces a circular dependency between the headers
llvm/IR/DebugInfoMetadata.h (this file) and llvm/IR/IntrinsicInst.h (where
DbgVariableIntrinsic is defined).

Reviewed By: jryans

Differential Revision: https://reviews.llvm.org/D133286

21 months ago[DebugInfo][NFC] Refactor debug intrinsic copy and delete to instead just move
OCHyams [Thu, 20 Oct 2022 13:17:47 +0000 (14:17 +0100)]
[DebugInfo][NFC] Refactor debug intrinsic copy and delete to instead just move

Reviewed By: jryans

Differential Revision: https://reviews.llvm.org/D133304

21 months agoRevert D136292 "[libc] mem* framework v3"
Guillaume Chatelet [Thu, 20 Oct 2022 13:52:30 +0000 (13:52 +0000)]
Revert D136292 "[libc] mem* framework v3"

This breaks llvm-libc build bots:
 - libc-x86_64-debian-dbg-asan
 - libc-x86_64-debian-fullbuild-dbg-asan
Address sanitizers fail with "AddressSanitizer: invalid alignment requested in aligned_alloc: 64, alignment must be a power of two and the requested size 0x41 must be a multiple of alignment (thread T0)"
 - libc-aarch64-ubuntu-dbg
 - libc-aarch64-ubuntu-fullbuild-dbg
https://lab.llvm.org/buildbot/#/builders/223/builds/8877/steps/7/logs/stdio
 - libc-arm32-debian-dbg
https://lab.llvm.org/buildbot/#/builders/229/builds/5201/steps/7/logs/stdio

This reverts commit 903cc71a82431d79e5fb541946a9e7c93750e374.

21 months ago[mlir][nfc] Clean-up usage of kDynamicSize.
Aliia Khasanova [Thu, 20 Oct 2022 12:39:03 +0000 (12:39 +0000)]
[mlir][nfc] Clean-up usage of kDynamicSize.

This patch prepares MLIR code base to change the value of kDynamicSize.
https://discourse.llvm.org/t/rfc-unify-kdynamicsize-and-kdynamicstrideoroffset/64534/4

Differential Revision: https://reviews.llvm.org/D136327

21 months ago[mlir] Fix and test python bindings for dump_to_object_file
Denys Shabalin [Thu, 20 Oct 2022 10:58:49 +0000 (12:58 +0200)]
[mlir] Fix and test python bindings for dump_to_object_file

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136334

21 months ago[libc] mem* framework v3
Guillaume Chatelet [Wed, 19 Oct 2022 20:52:45 +0000 (20:52 +0000)]
[libc] mem* framework v3

This version is more composable and also simpler at the expense of being more explicit and more verbose.

This patch provides rationale for the framework, implementation and unit tests but the functions themselves are still using the previous version. The change in implementation will come in a follow up patch.

Differential Revision: https://reviews.llvm.org/D136292

21 months ago[LV] Use buildScalarSteps to also handle VF = 1. (NFCI)
Florian Hahn [Thu, 20 Oct 2022 13:30:01 +0000 (14:30 +0100)]
[LV] Use buildScalarSteps to also handle VF = 1. (NFCI)

The code in buildScalarSteps already properly handles creating the
scalar induction values with VF = 1. Use it directly instead of using
extra code to handle that case.

Suggested by @Ayal in D133760.

21 months agoReapply [FunctionAttrs] Make location classification more precise
Nikita Popov [Wed, 19 Oct 2022 14:57:41 +0000 (16:57 +0200)]
Reapply [FunctionAttrs] Make location classification more precise

Reapplying after the fix for volatile modelling in D135863.

-----

Don't add argmem if the pointer is clearly not an argument (e.g.
a global). I don't think this makes a difference right now, but
gives more obvious results with D135780.

21 months agolibcxxabi [PR58117][NFC]: Open code lower bound
Nathan Sidwell [Thu, 20 Oct 2022 11:10:47 +0000 (07:10 -0400)]
libcxxabi [PR58117][NFC]: Open code lower bound

This open codes the use of lower-bound when looking for an operator
encoding. Using std::lower_bound can result in symbol references to
the C++ library and that breaks the ABI demangler, which mandates no
such dependency.

Differential Revision: https://reviews.llvm.org/D135799

Fixes: https://github.com/llvm/llvm-project/issues/58117

21 months ago[llvm-debuginfo-analyzer] (04/09) - Locations and ranges
Carlos Alberto Enciso [Thu, 20 Oct 2022 10:29:57 +0000 (11:29 +0100)]
[llvm-debuginfo-analyzer] (04/09) - Locations and ranges

The test case 'LocationCoverage' caused a failure in:

  https://lab.llvm.org/buildbot/#/builders/5/builds/28385
  https://lab.llvm.org/buildbot/#/builders/168/builds/9585
  SUMMARY: AddressSanitizer: 176 byte(s) leaked in 2 allocation(s).

The logical debug locations 'LocationThree' and 'LocationFour'
are not added to any logical scope.

The test case is checking the logical symbol coverage and
it does not use those 2 debug locations.

Reviewed By: probinson

Differential Revision: https://reviews.llvm.org/D136333

21 months ago[memprof] Support installation of memprof headers
Enna1 [Thu, 20 Oct 2022 12:30:08 +0000 (20:30 +0800)]
[memprof] Support installation of memprof headers

This change allows users manually calling memprof public C API (e.g. __memprof_profile_dump).

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D136067

21 months ago[AArch64][SME] Remove get.pstatesm intrinsic.
Sander de Smalen [Thu, 20 Oct 2022 11:17:34 +0000 (12:17 +0100)]
[AArch64][SME] Remove get.pstatesm intrinsic.

This intrinsic can be removed in favour of using a call to
__arm_sme_state() directly and testing the LSB of X0.

In IR that would look like:

   %pstate = call aarch64_sme_preservemost_from_x2 {i64, i64} @__arm_sme_state()
   %pstate.x0 = extractvalue {i64, i64} %pstate, 0
   %pstate.sm = and i64 %pstate.x0, 1

21 months ago[AMDGPU][MC][GFX11][NFC] Fix trivial typos in tests
Dmitry Preobrazhensky [Thu, 20 Oct 2022 12:17:22 +0000 (15:17 +0300)]
[AMDGPU][MC][GFX11][NFC] Fix trivial typos in tests

21 months ago[analyzer] Move unexecuted test block into it's own source file
isuckatcs [Fri, 14 Oct 2022 16:03:13 +0000 (18:03 +0200)]
[analyzer] Move unexecuted test block into it's own source file

Inside lambdas.cpp a block of code wasn't executed,
because it required the standard to be at least c++14.
This patch moves this block of code into it's own
source file and makes sure it's tested.

Differential Revision: https://reviews.llvm.org/D135965

21 months ago[AMDGPU][MC][GFX11][NFC] Improve error message when a VOPD opcode is used with WS64
Dmitry Preobrazhensky [Thu, 20 Oct 2022 12:12:54 +0000 (15:12 +0300)]
[AMDGPU][MC][GFX11][NFC] Improve error message when a VOPD opcode is used with WS64

Differential Revision: https://reviews.llvm.org/D136168

21 months agoIntroduce options for Windows packaging script
Pierrick Bouvier [Thu, 20 Oct 2022 12:12:28 +0000 (14:12 +0200)]
Introduce options for Windows packaging script

Options:
--version: [required] version to build
--help: display this help
--x86: build and test x86 variant
--x64: build and test x64 variant

Note: At least one variant to build is required.

Example: build_llvm_release.bat --version 15.0.0 --x64

Reviewed By: hans, thieta

Differential Revision: https://reviews.llvm.org/D135255

21 months ago[InstCombine] Fix assert condition in `foldSelectShuffleOfSelectShuffle`
Nabeel Omer [Thu, 20 Oct 2022 12:06:01 +0000 (12:06 +0000)]
[InstCombine] Fix assert condition in `foldSelectShuffleOfSelectShuffle`

Bug introduced in e239198cdbbf.

The assert() is making an assumption that the resulting shuffle mask
will always select elements from both vectors, this is untrue in the
case of two shuffles being folded if the former shuffle has a mask with
undef elements in it. In such a case folding the shuffles might result
in a mask which only selects from one of the vectors because the other
elements (in the mask) are undef.

Differential Revision: https://reviews.llvm.org/D136256

21 months ago[AMDGPU][MC] Correct v_cndmask operand types
Dmitry Preobrazhensky [Thu, 20 Oct 2022 12:05:40 +0000 (15:05 +0300)]
[AMDGPU][MC] Correct v_cndmask operand types

Differential Revision: https://reviews.llvm.org/D136152

21 months ago[mlir][llvm] Handle llvm.noundef attribute when converting to LLVM IR
Victor Perez [Thu, 20 Oct 2022 11:58:43 +0000 (12:58 +0100)]
[mlir][llvm] Handle llvm.noundef attribute when converting to LLVM IR

Translate LLVMIR llvm.noundef attribute to its equivalent in LLVM IR.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136324

21 months ago[libc][automemcpy] fix build after change in Arg enum
Guillaume Chatelet [Thu, 20 Oct 2022 11:58:54 +0000 (11:58 +0000)]
[libc][automemcpy] fix build after change in Arg enum

21 months ago[LoopSimplifyCFG] Forget loop and block dispos after merging blocks.
Florian Hahn [Thu, 20 Oct 2022 10:23:29 +0000 (11:23 +0100)]
[LoopSimplifyCFG] Forget loop and block dispos after merging blocks.

This fixes another case where block and loop dispositions weren't
properly invalidate after changing the CFG.

Fixes #58489.

21 months ago[FuncAttrs] Extract code for adding a location access (NFC)
Nikita Popov [Wed, 19 Oct 2022 14:55:24 +0000 (16:55 +0200)]
[FuncAttrs] Extract code for adding a location access (NFC)

This code is the same for accesses from call arguments and for
accesses from other (single-location) instructions. Extract i
into a common function.

21 months ago[FunctionAttrs] Volatile operations can access inaccessible memory
Nikita Popov [Thu, 13 Oct 2022 10:16:26 +0000 (12:16 +0200)]
[FunctionAttrs] Volatile operations can access inaccessible memory

Per LangRef, volatile operations are allowed to access the location
of their pointer argument, plus inaccessible memory:

> Any volatile operation can have side effects, and any volatile
> operation can read and/or modify state which is not accessible
> via a regular load or store in this module.
> [...]
> The allowed side-effects for volatile accesses are limited. If
> a non-volatile store to a given address would be legal, a volatile
> operation may modify the memory at that address. A volatile
> operation may not modify any other memory accessible by the
> module being compiled. A volatile operation may not call any
> code in the current module.

FunctionAttrs currently does not model this and ends up marking
functions with volatile accesses on arguments as argmemonly,
even though they should be inaccessiblemem_or_argmemonly.

Differential Revision: https://reviews.llvm.org/D135863

21 months ago[LoongArch] Fix 32-bit and 64-bit atomicrmw nand operand order errors
gonglingqin [Thu, 20 Oct 2022 09:25:58 +0000 (17:25 +0800)]
[LoongArch] Fix 32-bit and 64-bit atomicrmw nand operand order errors

Differential Revision: https://reviews.llvm.org/D136220

21 months ago[libc][NFC] add missing static qualifiers in tests
Guillaume Chatelet [Thu, 20 Oct 2022 08:52:56 +0000 (08:52 +0000)]
[libc][NFC] add missing static qualifiers in tests

21 months ago[libc][NFC] remove unneeded -lpthread for utils_test
Guillaume Chatelet [Thu, 20 Oct 2022 08:48:22 +0000 (08:48 +0000)]
[libc][NFC] remove unneeded -lpthread for utils_test

21 months agoFix crash in constraining partial specialization on nested template.
Utkarsh Saxena [Wed, 19 Oct 2022 14:29:42 +0000 (16:29 +0200)]
Fix crash in constraining partial specialization on nested template.

Fixes: https://github.com/llvm/llvm-project/issues/53354

Differential Revision: https://reviews.llvm.org/D136259

21 months ago[flang] optionally lower scalar and explicit shape with fir.declare
Jean Perier [Thu, 20 Oct 2022 08:30:42 +0000 (10:30 +0200)]
[flang] optionally lower scalar and explicit shape with fir.declare

Lower scalar and explicit shape arrays to fir.declare under the -hlfir option.
Update the SymMap so that it can hold fir::FortranVariableInterface.

The plan is to go towards a SymMap that only contains fir::FortranVariableInterface
once current expression lowering can be replaced. This should make the SymMap lighter
than it is today (SymBox/ExtendedValue are above 256 bytes).

Assumed shape, allocatable and pointer are left TODOs for now. Anything with a
specification expression that is not a constant expression will only be able to
be lowered when the HLFIR expression lowering skeleton is added.

Differential Revision: https://reviews.llvm.org/D136252

21 months ago[flang] add fir.declare codegen support
Jean Perier [Thu, 20 Oct 2022 08:15:14 +0000 (10:15 +0200)]
[flang] add fir.declare codegen support

For now, nothing is done about debug info and the fir.declare is simply
replaced by the memref argument. This is done in the PreCGRewrite in
order to avoid requiring adding support for fir.shape codegen, which
would still be useless and undesired at that point.

Differential Revision: https://reviews.llvm.org/D136254

21 months ago[gn build] Port 3c397c90c183
LLVM GN Syncbot [Thu, 20 Oct 2022 07:32:37 +0000 (07:32 +0000)]
[gn build] Port 3c397c90c183

21 months ago[llvm-debuginfo-analyzer] (04/09) - Locations and ranges
Carlos Alberto Enciso [Thu, 20 Oct 2022 06:01:31 +0000 (07:01 +0100)]
[llvm-debuginfo-analyzer] (04/09) - Locations and ranges

llvm-debuginfo-analyzer is a command line tool that processes debug
info contained in a binary file and produces a debug information
format agnostic “Logical View”, which is a high-level semantic
representation of the debug info, independent of the low-level
format.

The code has been divided into the following patches:

1) Interval tree
2) Driver and documentation
3) Logical elements
4) Locations and ranges
5) Select elements
6) Warning and internal options
7) Compare elements
8) ELF Reader
9) CodeView Reader

Full details:
https://discourse.llvm.org/t/llvm-dev-rfc-llvm-dva-debug-information-visual-analyzer/62570

This patch:

Locations and ranges
- All functionality for logical debug locations and ranges:
  LVLocation, LVRanges.

Reviewed By: psamolysov, probinson

Differential Revision: https://reviews.llvm.org/D125779

21 months ago[mlir][aarch64] Disable bf16 tests on AArch64
Andrzej Warzynski [Wed, 19 Oct 2022 17:22:58 +0000 (17:22 +0000)]
[mlir][aarch64] Disable bf16 tests on AArch64

This patch disables 2 bf16 tests that are currently not supported on
AArch64. I've triaged these failures and opened [1] to track this. I
don't have a simple reproducer for dense_output_bf16.mlir, but it's
rather clear that both tests fail due to missing support for `bfloat`
operations in the AArch64 backend.

I'm not sure what the path forward to enable these tests on AArch64
should be. I think that there are two options:
  * AArch64 backened gains capability to legalize these nodes containing
    `bfloat` operands, or
  * MLIR (similarly to Clang) is taught not to emit such nodes in the
    first place.

[1] https://github.com/llvm/llvm-project/issues/58465

Differential Revision: https://reviews.llvm.org/D136273

21 months ago[libc][Obvious] Fix incomplete spec definition of sys/random.h.
Siva Chandra Reddy [Thu, 20 Oct 2022 06:57:00 +0000 (06:57 +0000)]
[libc][Obvious] Fix incomplete spec definition of sys/random.h.

21 months ago[X86] Move 128/256-bit FP16/BF16 typedef to emmintrin.h or avxintrin.h, NFCI
Phoebe Wang [Thu, 20 Oct 2022 06:12:19 +0000 (14:12 +0800)]
[X86] Move 128/256-bit FP16/BF16 typedef to emmintrin.h or avxintrin.h, NFCI

21 months ago[mlir][llvm] Use longer variable names in LLVM IR import (NFC).
Tobias Gysi [Thu, 20 Oct 2022 05:26:10 +0000 (08:26 +0300)]
[mlir][llvm] Use longer variable names in LLVM IR import (NFC).

Rename single letter member variables and function arguments to use
longer names in ConvertFromLLVMIR.cpp. Also drop some uses of auto in
favor our spelling out the type and refactor some llvm::enumerate loops.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136246

21 months ago[gn build] Port e28b9357b14c
LLVM GN Syncbot [Thu, 20 Oct 2022 05:20:35 +0000 (05:20 +0000)]
[gn build] Port e28b9357b14c

21 months ago[llvm-debuginfo-analyzer] (03/09) - Logical elements
Carlos Alberto Enciso [Wed, 19 Oct 2022 10:01:14 +0000 (11:01 +0100)]
[llvm-debuginfo-analyzer] (03/09) - Logical elements

llvm-debuginfo-analyzer is a command line tool that processes debug
info contained in a binary file and produces a debug information
format agnostic “Logical View”, which is a high-level semantic
representation of the debug info, independent of the low-level
format.

The code has been divided into the following patches:

1) Interval tree
2) Driver and documentation
3) Logical elements
4) Locations and ranges
5) Select elements
6) Warning and internal options
7) Compare elements
8) ELF Reader
9) CodeView Reader

Full details:
https://discourse.llvm.org/t/llvm-dev-rfc-llvm-dva-debug-information-visual-analyzer/62570

This patch:

Logical elements
- All basic functionality for the logical elements:
  LVScope, LVLine, LVSymbol, LVType.
- The logical reader:
  LVReader.h

Reviewed By: psamolysov, probinson

Differential Revision: https://reviews.llvm.org/D125778

21 months ago[MLIR] Enable distribution target in standalone builds
Michał Górny [Wed, 19 Oct 2022 17:14:59 +0000 (19:14 +0200)]
[MLIR] Enable distribution target in standalone builds

Invoke llvm_distribution_add_targets() when doing standalone build
explicitly in order to create the `distribution` target.

Differential Revision: https://reviews.llvm.org/D136269

21 months ago[testcase][OpenMP] Fix the testcase error of check-all when DCLANG_DEFAULT_OPENMP_RUN...
Zi Xuan Wu (Zeson) [Thu, 20 Oct 2022 01:44:38 +0000 (09:44 +0800)]
[testcase][OpenMP] Fix the testcase error of check-all when DCLANG_DEFAULT_OPENMP_RUNTIME is not libomp

When DCLANG_DEFAULT_OPENMP_RUNTIME is set to libgomp, there is some check-all error.
The expected CHECK result only displays when fopenmp=libomp is specified explicitly.

Differential Revision: https://reviews.llvm.org/D136239

21 months ago[X86] Remove redundant static from constexpr. NFC
Phoebe Wang [Thu, 20 Oct 2022 01:29:22 +0000 (09:29 +0800)]
[X86] Remove redundant static from constexpr. NFC

21 months ago[CMake] Disable BOLT instrumentation of Clang on instrumented build
Amir Ayupov [Thu, 20 Oct 2022 01:23:43 +0000 (18:23 -0700)]
[CMake] Disable BOLT instrumentation of Clang on instrumented build

This enables multi-stage PGO build optimized by BOLT using BOLT.cmake cache.

The issue is that `-DPGO_BUILD_CONFIGURATION` cache file is passed to both
stage2-instrumented and stage2-optimized builds (for them to be identical),
but in case of BOLT.cmake, it doesn't make sense to BOLT-instrument the
instrumented binary (it's not going to be optimized). Hence turn off
`CLANG_BOLT_INSTRUMENT` code if `LLVM_BUILD_INSTRUMENTED` is enabled.

The final workflow that enables multi-stage InstrPGO+ThinLTO+BOLT Clang build:
```
cmake <llvm-project>/llvm -GNinja -DLLVM_ENABLE_LLD=ON \
  -DBOOTSTRAP_LLVM_ENABLE_LLD=ON -DBOOTSTRAP_BOOTSTRAP_LLVM_ENABLE_LLD=ON \
  -DPGO_INSTRUMENT_LTO=Thin -C llvm-project/clang/cmake/caches/BOLT-PGO.cmake
ninja stage2-clang++-bolt
```

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D136023

21 months ago[gn build] Port 62ca79102cf9
LLVM GN Syncbot [Thu, 20 Oct 2022 01:14:27 +0000 (01:14 +0000)]
[gn build] Port 62ca79102cf9

21 months ago[X86][1/2] Support PREFETCHI instructions
Phoebe Wang [Thu, 20 Oct 2022 00:44:52 +0000 (08:44 +0800)]
[X86][1/2] Support PREFETCHI instructions

For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D136040

21 months ago[docs] Update compiler-rt/CODE_OWNERS.TXT
Vitaly Buka [Mon, 10 Oct 2022 21:06:01 +0000 (14:06 -0700)]
[docs] Update compiler-rt/CODE_OWNERS.TXT

Reviewed By: compnerd, kcc, lhames, phosek, tejohnson, dvyukov, MaskRay

Differential Revision: https://reviews.llvm.org/D135617

21 months ago[mlir][NVGPU] Handle native mma.sync and ldmatrix(x4) sizes
Manish Gupta [Wed, 12 Oct 2022 05:17:32 +0000 (05:17 +0000)]
[mlir][NVGPU] Handle native mma.sync and ldmatrix(x4) sizes

This patch handles native `mma.sync` sizes and enables issuing `ldmatrix` on
largest possible tiles for matrixB. It requires handling
`vector.extract_strided_slice` from vector to ngpu lowering.

Differential Revision: https://reviews.llvm.org/D135749

21 months ago[test][asan][Darwin] Pass -mlinker-version=133 to linker invocation in odr-lto.cpp
Arthur Eubanks [Wed, 19 Oct 2022 23:33:30 +0000 (16:33 -0700)]
[test][asan][Darwin] Pass -mlinker-version=133 to linker invocation in odr-lto.cpp

When building clang with lld, we don't get a default mlinker-version [1]. This causes us to not pass -lto_library to ld64 [2].
Explicitly pass -mlinker-version=133 so we properly pass -lto_library to ld64 and don't get LLVM bitcode version mismatches due to LTO.

[1] https://github.com/llvm/llvm-project/blob/55ae180a4cb7fc68b3ac153f07752c8c6a2d92f0/clang/CMakeLists.txt#L345
[2] https://github.com/llvm/llvm-project/blob/55ae180a4cb7fc68b3ac153f07752c8c6a2d92f0/clang/lib/Driver/ToolChains/Darwin.cpp#L262-L270

21 months ago[VP] Teach isVPBinaryOp to recognize vp.smin/smax/umin/umax/minnum/maxnum.
Yeting Kuo [Wed, 12 Oct 2022 07:44:09 +0000 (15:44 +0800)]
[VP] Teach isVPBinaryOp to recognize vp.smin/smax/umin/umax/minnum/maxnum.

Those vp intrinsics should be vp binary operations.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D135753

21 months ago[clang][RISCV] Set vscale_range attribute based on VLEN
Philip Reames [Wed, 19 Oct 2022 23:05:39 +0000 (16:05 -0700)]
[clang][RISCV] Set vscale_range attribute based on VLEN

Follow up on D135894, restructure code to work in terms of minimum and maximum VLEN coming from RISCVISAInfo.cpp. In the original review, I'd mentioned that MinVLEN was sometimes zero. This turns out to be a case of human error, combined with really bad (lack of) error reporting.

This patch adds appropriate tests for various vector extension combinations to show the mechanism works, but doesn't try to provide exhaustive coverage of the extension interactions. Presumably, that is already covered in existing tests elsewhere.

Differential Revision: https://reviews.llvm.org/D136106

21 months ago[VE] Change the way to lower selectcc
Kazushi (Jam) Marukawa [Fri, 14 Oct 2022 23:04:00 +0000 (08:04 +0900)]
[VE] Change the way to lower selectcc

Change to use VEISD::CMPI/CMPU/CMPF/CMPQ and VEISD::CMOV in combineSelectCC
for better optimization.  Support VEISD::CMPI/CMPU in combineTRUNCATE also
to optimize truncate.  Remove obsolete lower patterns from VEInstrInfo.td.
Update regression tests also.

Reviewed By: efocht

Differential Revision: https://reviews.llvm.org/D136049

21 months ago[libc][Obvious] Add termios.h to the list of x86_64 linux headers.
Siva Chandra Reddy [Wed, 19 Oct 2022 22:59:50 +0000 (22:59 +0000)]
[libc][Obvious] Add termios.h to the list of x86_64 linux headers.

21 months ago[RISCV] Remove -enable-unsafe-fp-math from machine combiner tests. NFC
Craig Topper [Wed, 19 Oct 2022 22:54:28 +0000 (15:54 -0700)]
[RISCV] Remove -enable-unsafe-fp-math from machine combiner tests. NFC

The optimization is using fast math flags on the instructions instead.

21 months ago[clang] Disable assertion that can "easily happen"
Jonas Devlieghere [Wed, 19 Oct 2022 20:32:31 +0000 (13:32 -0700)]
[clang] Disable assertion that can "easily happen"

Disable the assertion for getting a module ID for non-local,
non-imported module. According to the FIXME this can "easily happen" and
indeed, we're hitting this assertion regularly. Disable it until it can
be properly investigated.

rdar://99352728

Differential revision: https://reviews.llvm.org/D136290

21 months ago[examples][ORC] Make sure eh-frame registration code is linked into an example.
Lang Hames [Wed, 19 Oct 2022 21:58:57 +0000 (14:58 -0700)]
[examples][ORC] Make sure eh-frame registration code is linked into an example.

Since aedeb8d5570, which switched to EPC-based eh-frame registration, the
eh-frame registration functions need to be forcibly linked into the target
process.

We need a general solution to this problem, but for now just force it in this
example to fix the test failures in
https://green.lab.llvm.org/green/job/clang-stage1-RA/31497

rdar://101083784

21 months ago[Sema] Don't treat a non-null template argument as if it were null.
Eli Friedman [Wed, 19 Oct 2022 21:40:52 +0000 (14:40 -0700)]
[Sema] Don't treat a non-null template argument as if it were null.

The way this code checks whether a pointer is null is wrong for other
reasons; it doesn't actually check whether a null pointer constant is a
"constant" in the C++ standard sense.  But this fix at least makes sure
we don't treat a non-null pointer as if it were null.

Fixes https://github.com/llvm/llvm-project/issues/57883

Differential Revision: https://reviews.llvm.org/D134928

21 months ago[Hexagon] Fix insertion point for pointer difference calculation
Krzysztof Parzyszek [Wed, 19 Oct 2022 21:14:48 +0000 (14:14 -0700)]
[Hexagon] Fix insertion point for pointer difference calculation

HVC::calculatePointerDifference inserts temporary instructions for
simplification, and calulation of known bits. These instructions were
inserted at the end of a basic block (after the terminator), which
caused BB->getTerminator() to return nullptr. This, in turn, caused
a crash when a PHI instruction was examined in computeKnownBits.

21 months ago[mlir][sparse] Fix breakage on older versions of cmake
wren romano [Wed, 19 Oct 2022 20:37:17 +0000 (13:37 -0700)]
[mlir][sparse] Fix breakage on older versions of cmake

Per https://reviews.llvm.org/D136005#3866692 the introduction of the MLIRSparseTensorEnums target in D136002 caused breakage on some versions of cmake.  This differential aims to fix those errors.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D136217

21 months ago[lldb] Allow SymbolFileDWARFDebugMap to register multiple compile units
Augusto Noronha [Mon, 17 Oct 2022 20:39:36 +0000 (13:39 -0700)]
[lldb] Allow SymbolFileDWARFDebugMap to register multiple compile units

Currently, SymbolFileDWARFDebugMap works on the assumption that there is
only one compile unit per object file. This patch documents this
limitation (when using the general SymbolFile API), and allows users of
the concrete SymbolFileDWARFDebugMap class to find out about these extra
compile units.

Differential Revision: https://reviews.llvm.org/D136114

21 months ago[mlgo] Fix one test post-D135934
Mircea Trofin [Wed, 19 Oct 2022 20:48:24 +0000 (13:48 -0700)]
[mlgo] Fix one test post-D135934

The test was checking output opcodes, one changed as result of D135934.

21 months ago[mlir][linalg] Add back split reduction tests dropped by previous commit
Thomas Raoux [Wed, 19 Oct 2022 20:23:36 +0000 (20:23 +0000)]
[mlir][linalg] Add back split reduction tests dropped by previous commit

The transition to transform dialect based tests dropped several cases of
the split reduction testing. Adding them back.

Differential Revision: https://reviews.llvm.org/D136287

21 months ago[BitcodeReader] Convert pair to triple in preparation for MemProf (NFC)
Teresa Johnson [Wed, 19 Oct 2022 18:39:10 +0000 (11:39 -0700)]
[BitcodeReader] Convert pair to triple in preparation for MemProf (NFC)

Extracted from D135714 which adds summary support for MemProf. We will
need a 3rd tuple member in the ValueIdToValueInfoMap, this patch makes a
number of NFC changes to the existing clients of that map to reflect the
conversion of pair to tuple.

21 months ago[SPIR-V] Add get_image_num_mip_levels implementation
Michal Paszkowski [Wed, 19 Oct 2022 20:29:16 +0000 (22:29 +0200)]
[SPIR-V] Add get_image_num_mip_levels implementation

Differential Revision: https://reviews.llvm.org/D135904

21 months ago[SPIR-V] Add atomic_init and fix atomic explicit lowering
Michal Paszkowski [Wed, 19 Oct 2022 20:12:07 +0000 (22:12 +0200)]
[SPIR-V] Add atomic_init and fix atomic explicit lowering

Differential Revision: https://reviews.llvm.org/D135902

21 months ago[lldb] Add matching based on Python callbacks for data formatters.
Jorge Gorbe Moya [Tue, 11 Oct 2022 07:44:06 +0000 (00:44 -0700)]
[lldb] Add matching based on Python callbacks for data formatters.

This patch adds a new matching method for data formatters, in addition
to the existing exact typename and regex-based matching. The new method
allows users to specify the name of a Python callback function that
takes a `SBType` object and decides whether the type is a match or not.

Here is an overview of the changes performed:

- Add a new `eFormatterMatchCallback` matching type, and logic to handle
  it in `TypeMatcher` and `SBTypeNameSpecifier`.

- Extend `FormattersMatchCandidate` instances with a pointer to the
  current `ScriptInterpreter` and the `TypeImpl` corresponding to the
  candidate type, so we can run registered callbacks and pass the type
  to them. All matcher search functions now receive a
  `FormattersMatchCandidate` instead of a type name.

- Add some glue code to ScriptInterpreterPython and the SWIG bindings to
  allow calling a formatter matching callback. Most of this code is
  modeled after the equivalent code for watchpoint callback functions.

- Add an API test for the new callback-based matching feature.

For more context, please check the RFC thread where this feature was
originally discussed:
https://discourse.llvm.org/t/rfc-python-callback-for-data-formatters-type-matching/64204/11

Differential Revision: https://reviews.llvm.org/D135648

21 months ago[SLP][NFC]Remove unused variable, NFC.
Alexey Bataev [Wed, 19 Oct 2022 19:29:49 +0000 (12:29 -0700)]
[SLP][NFC]Remove unused variable, NFC.

21 months ago[NFC][CostModel] Added floating point frem test for SVE
Jolanta Jensen [Tue, 18 Oct 2022 16:30:23 +0000 (16:30 +0000)]
[NFC][CostModel] Added floating point frem test for SVE

Differential Revision: https://reviews.llvm.org/D136241

21 months ago[mlir][sparse] end-to-end sparse vector insertion codegen
Aart Bik [Wed, 19 Oct 2022 17:37:25 +0000 (10:37 -0700)]
[mlir][sparse] end-to-end sparse vector insertion codegen

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D136275

21 months ago[clang][modules] Add time traces for AST serialization
Andreas Hollandt [Wed, 19 Oct 2022 18:34:09 +0000 (11:34 -0700)]
[clang][modules] Add time traces for AST serialization

Fills gaps in the time trace when precompiled headers are created/loaded.

Reviewed By: jansvoboda11

Differential Revision: https://reviews.llvm.org/D135657

21 months ago[RISCV] Add more check prefixes to extractelt-fp.ll to fix a conflicting case.
Craig Topper [Wed, 19 Oct 2022 19:12:25 +0000 (12:12 -0700)]
[RISCV] Add more check prefixes to extractelt-fp.ll to fix a conflicting case.

The existing prefix conflicted and the script silently dropped the checks.

21 months ago[BOLT] Ignore duplicate global symbols
Rafael Auler [Tue, 18 Oct 2022 02:01:46 +0000 (19:01 -0700)]
[BOLT] Ignore duplicate global symbols

We noticed some binaries with duplicated global symbol
entries (same name, address and size). Ignore them as it is possibly a
bug in the linker, and continue processing, unless the symbol has a
different size or address.

Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D136122

21 months ago[flang][NFC] Add fir.dispatch codegen test with pass object at pos 1
Valentin Clement [Wed, 19 Oct 2022 12:06:56 +0000 (14:06 +0200)]
[flang][NFC] Add fir.dispatch codegen test with pass object at pos 1

D136189 was missing a test where the pass object is not at
position 0. This patch adds one.

Reviewed By: jeanPerier, PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D136231

21 months ago[mlir][NVGPU] Fixing minor typo (first test commit)
Manish Gupta [Wed, 19 Oct 2022 18:03:59 +0000 (11:03 -0700)]
[mlir][NVGPU] Fixing minor typo (first test commit)

21 months ago[docs] Add myself for LLVM Office hours
Quentin Colombet [Wed, 19 Oct 2022 18:24:41 +0000 (18:24 +0000)]
[docs] Add myself for LLVM Office hours

Add an entry for my office hours. Intended focus is low-level LLVM
stuff.

Differential Version: https://reviews.llvm.org/D136270

21 months agoRevert D135427 "[LTO] Make local linkage GlobalValue in non-prevailing COMDAT availab...
Fangrui Song [Wed, 19 Oct 2022 18:24:12 +0000 (11:24 -0700)]
Revert D135427 "[LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally"

This reverts commit 8ef3fd8d59ba0100bc6e83350ab1e978536aa531.

I mentioned that GlobalAlias was not handled. It turns out GlobalAlias has to be handled in the same patch (as opposed to in a follow-up),
as otherwise clang codegen of C5/D5 constructor/destructor would regress (https://reviews.llvm.org/D135427#3869003).

21 months ago[mlir][sparse] remove vector support in sparsification
Peiming Liu [Tue, 18 Oct 2022 16:41:03 +0000 (16:41 +0000)]
[mlir][sparse] remove vector support in sparsification

Sparse compiler used to generate vectorized code for sparse tensors computation, but it should really be delegated to other vectorization passes for better progressive lowering.

 https://discourse.llvm.org/t/rfc-structured-codegen-beyond-rectangular-arrays/64707

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D136183

21 months ago[lit] fix a error when using --show-used-features
Yuanfang Chen [Wed, 19 Oct 2022 17:51:13 +0000 (10:51 -0700)]
[lit] fix a error when using --show-used-features

The error is
```
NotADirectoryError: [Errno 20] Not a directory: '<build-dir>/unittests/Analysis/./AnalysisTests/0/40'
```

Exclude unittests when collecting features because
unittests don't make use of feature keywords.

21 months ago[lld-macho][nfc] Clean up includes
Vy Nguyen [Wed, 19 Oct 2022 16:45:49 +0000 (12:45 -0400)]
[lld-macho][nfc] Clean up includes

- remove unused/duplicate includes
- reformatting/whitespaces

Differential Revision: https://reviews.llvm.org/D136266

21 months ago[JMCInstrument] rename ELF section name from ".just.my.code" to ".data.just.my.code"
Yuanfang Chen [Wed, 19 Oct 2022 17:36:36 +0000 (10:36 -0700)]
[JMCInstrument] rename ELF section name from ".just.my.code" to ".data.just.my.code"

This gives linker scripts a hint about where to place the section.

21 months ago[BOLT][DWARF] Add support for DW_FORM_addr for DW_AT_call_return_pc
Alexander Yermolovich [Wed, 19 Oct 2022 17:44:09 +0000 (10:44 -0700)]
[BOLT][DWARF] Add support for DW_FORM_addr for DW_AT_call_return_pc

GCC 12 produces DW_FORM_addr for DW_AT_call_return_pc. Added support for that.
Fixes facebookincubator/BOLT#307

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D136204

21 months ago[NFC] Updating an incorrect code comment
Chris Bieneman [Wed, 19 Oct 2022 15:52:17 +0000 (10:52 -0500)]
[NFC] Updating an incorrect code comment

This slipped in by accident.

21 months ago[libc++][doc] Fixes status pages.
Mark de Wever [Wed, 19 Oct 2022 17:26:37 +0000 (19:26 +0200)]
[libc++][doc] Fixes status pages.

Addresses post-commit review comment in D134742.

21 months ago[mlir][sparse] Replace the folding of nop convert with a codegen rule.
bixia1 [Wed, 19 Oct 2022 00:22:13 +0000 (17:22 -0700)]
[mlir][sparse] Replace the folding of nop convert with a codegen rule.

This is to allow the use of a nop convert to express that the sparse tensor
allocated through bufferization::AllocTensorOp will be expanded to sparse
tensor storage by sparse tensor codegen.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D136214