Daniel Kurtz [Mon, 12 Mar 2018 16:45:30 +0000 (10:45 -0600)]
pinctrl/amd: poll InterruptEnable bits in enable_irq
In certain cases interrupt enablement will be delayed relative to when
the InterruptEnable bits are written. One example of this is when
a GPIO's "debounce" logice is first enabled. After enabling debounce,
there is a 900 us "warm up" period during which InterruptEnable[0]
(bit 11) will read as 0 despite being written 1. During this time
InterruptSts will not be updated, nor will interrupts be delivered, even
if the GPIO's interrupt configuration has been written to the register.
To work around this delay, poll the InterruptEnable bits after setting
them to ensure interrupts have truly been enabled in hardware before
returning from the irq_enable handler.
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Alexandre Belloni [Thu, 22 Mar 2018 12:35:00 +0000 (13:35 +0100)]
pinctrl: ocelot: fix gpio direction
Bits have to be cleared in DEVCPU_GCB:GPIO:GPIO_OE for input and set for
output. ocelot_gpio_set_direction() got it wrong and this went unnoticed
when the driver was reworked.
Reported-by: Gregory Clement <gregory.clement@bootlin.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Zhiyong Tao [Thu, 22 Mar 2018 02:58:43 +0000 (10:58 +0800)]
pinctrl: mtk: fix check warnings.
This patch fixes check warnings.
Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Zhiyong Tao [Thu, 22 Mar 2018 02:58:42 +0000 (10:58 +0800)]
pintcrl: mtk: support bias-disable of generic and special pins simultaneously
For generic pins, parameter "arg" is 0 or 1.
For special pins, bias-disable is set by R0R1,
so we need transmited "00" to set bias-disable
When we set "bias-disable" as high-z property,
the parameter should be "MTK_PUPD_SET_R1R0_00".
Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Reviewed-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Zhiyong Tao [Thu, 22 Mar 2018 02:58:41 +0000 (10:58 +0800)]
pinctrl: add mt2712 pinctrl driver
The commit includes mt2712 pinctrl driver.
Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Reviewed-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
David Lechner [Mon, 19 Feb 2018 21:57:07 +0000 (15:57 -0600)]
pinctrl: pinctrl-single: Fix pcs_request_gpio() when bits_per_mux != 0
This fixes pcs_request_gpio() in the pinctrl-single driver when
bits_per_mux != 0. It appears this was overlooked when the multiple
pins per register feature was added.
Fixes:
4e7e8017a80e ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules")
Signed-off-by: David Lechner <david@lechnology.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Bai Ping [Mon, 19 Mar 2018 07:16:39 +0000 (15:16 +0800)]
pinctrl: imx: Add pinctrl driver support for imx6sll
Add pinctrl driver support for imx6sll.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Bai Ping [Mon, 19 Mar 2018 07:16:38 +0000 (15:16 +0800)]
dt-bindings: imx: update pinctrl doc for imx6sll
Add pinctrl binding doc update for imx6sll.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Javier Arteaga [Tue, 6 Mar 2018 13:42:13 +0000 (13:42 +0000)]
pinctrl: intel: Implement intel_gpio_get_direction callback
Allows querying GPIO direction from the pad config register.
If the pad is not in GPIO mode, return an error.
Signed-off-by: Javier Arteaga <javier@emutex.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Masahiro Yamada [Tue, 6 Mar 2018 11:15:56 +0000 (20:15 +0900)]
pinctrl: stm32: add 'depends on HAS_IOMEM' to fix unmet dependency
These configs select MFD_SYSCON, but do not depend on HAS_IOMEM.
Compile testing on architecture without HAS_IOMEM causes "unmet
direct dependencies" in Kconfig phase.
Detected by "make ARCH=score allyesconfig".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Gustavo A. R. Silva [Mon, 5 Mar 2018 23:49:06 +0000 (17:49 -0600)]
pinctrl: mediatek: mtk-common: use true and false for boolean values
Assign true or false to boolean variables instead of an integer value.
This issue was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andre Przywara [Sat, 3 Mar 2018 12:25:54 +0000 (12:25 +0000)]
pinctrl: sunxi: always look for apb block
The Allwinner pinctrl device tree binding suggests that a clock named
"apb" would drive the pin controller IP. However (for legacy reasons) we
rely on this clock actually being the first clock defined.
Since named clocks can be in any order, let's explicitly check for a
clock called "apb" if there is more than one clock referenced.
Kudo to Maxime for suggesting this much more elegant approach.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Thu, 22 Mar 2018 10:12:54 +0000 (11:12 +0100)]
pinctrl: nomadik: Drop U8540/9540 support
The U8540 was an evolved version of the U8500, but it was never
mass produced or put into products, only reference designs exist.
The upstream support was never completed and it is unlikely that
this will happen so drop the support for now to simplify
maintenance of the U8500.
Cc: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Fri, 23 Mar 2018 02:36:48 +0000 (03:36 +0100)]
Merge tag 'sh-pfc-for-v4.17-tag2' of git://git./linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.17 (take two)
- Add USB pin groups on R-Car M3-N,
- Add support for the new R-Car V3H SoC,
- Add EtherAVB pin groups on R-Car V3M,
- Miscellaneous fixes and cleanups.
Ulrich Hecht [Mon, 19 Mar 2018 16:37:45 +0000 (17:37 +0100)]
pinctrl: sh-pfc: r8a77995: Deduplicate VIN4 pin definitions
Use union vin_data and VIN_DATA_PIN_GROUP() to reduce redundancies
in pin definitions.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ulrich Hecht [Mon, 19 Mar 2018 16:37:44 +0000 (17:37 +0100)]
pinctrl: sh-pfc: r8a7796: Deduplicate VIN4 pin definitions
Use union vin_data and VIN_DATA_PIN_GROUP() to reduce redundancies
in pin definitions.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ulrich Hecht [Mon, 19 Mar 2018 16:37:43 +0000 (17:37 +0100)]
pinctrl: sh-pfc: r8a7795: Deduplicate VIN4 pin definitions
Use union vin_data and VIN_DATA_PIN_GROUP() to reduce redundancies
in pin definitions.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ulrich Hecht [Mon, 19 Mar 2018 16:37:20 +0000 (17:37 +0100)]
pinctrl: sh-pfc: r8a77995: Correct VIN4 18-bit pins
RGB666 has a pin assignment that differs from the other formats.
Fixes:
fbd452aeb49e552e ("pinctrl: sh-pfc: r8a77995: Add VIN4 pins, groups and function")
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ulrich Hecht [Mon, 19 Mar 2018 16:37:19 +0000 (17:37 +0100)]
pinctrl: sh-pfc: r8a7796: Correct VIN4 18-bit pins
RGB666 has a pin assignment that differs from the other formats.
Fixes:
8db6cbabac4f2a02 ("pinctrl: sh-pfc: r8a7796: Add VIN4, VIN5 pins, groups and functions")
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ulrich Hecht [Mon, 19 Mar 2018 16:37:18 +0000 (17:37 +0100)]
pinctrl: sh-pfc: r8a7795: Correct VIN4 18-bit pins
RGB666 has a pin assignment that differs from the other formats.
Fixes:
6b4de408105fc51e ("pinctrl: sh-pfc: r8a7795: Add VIN4, VIN5 pins, groups and functions")
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Mon, 12 Mar 2018 13:54:47 +0000 (14:54 +0100)]
pinctrl: sh-pfc: r8a77995: Rename EtherAVB "mdc" pin group to "mdio"
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio"
instead of "mdc". Fix the inconsistency, while retaining backwards
compatibility with old DTBs using a pin group alias.
Fixes:
66abd968d0ef3eb1 ("pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins, groups and functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Geert Uytterhoeven [Mon, 12 Mar 2018 13:55:44 +0000 (14:55 +0100)]
pinctrl: sh-pfc: r8a77965: Rename EtherAVB "mdc" pin group to "mdio"
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio"
instead of "mdc". Fix the inconsistency, while retaining backwards
compatibility with old DTBs using a pin group alias.
Fixes:
fa3e8b71b955af86 ("pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Geert Uytterhoeven [Mon, 12 Mar 2018 13:53:13 +0000 (14:53 +0100)]
pinctrl: sh-pfc: r8a7796: Rename EtherAVB "mdc" pin group to "mdio"
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio"
instead of "mdc". Fix the inconsistency, while retaining backwards
compatibility with old DTBs using a pin group alias.
Fixes:
41397032c4a17dff ("pinctrl: sh-pfc: r8a7796: Add group for AVB MDIO and MII pins")
Fixes:
9c99a63ec74f34f7 ("pinctrl: sh-pfc: r8a7796: Add EtherAVB pins, groups and functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Geert Uytterhoeven [Mon, 12 Mar 2018 13:47:54 +0000 (14:47 +0100)]
pinctrl: sh-pfc: r8a7795-es1: Rename EtherAVB "mdc" pin group to "mdio"
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio"
instead of "mdc". Fix the inconsistency, while retaining backwards
compatibility with old DTBs using a pin group alias.
Fixes:
b25719eb938eb39a ("pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and MII pins")
Fixes:
819fd4bfcc84805c ("pinctrl: sh-pfc: r8a7795: add EtherAVB support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Geert Uytterhoeven [Mon, 12 Mar 2018 13:45:09 +0000 (14:45 +0100)]
pinctrl: sh-pfc: r8a7795: Rename EtherAVB "mdc" pin group to "mdio"
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio"
instead of "mdc". Fix the inconsistency, while retaining backwards
compatibility with old DTBs using a pin group alias.
Fixes:
30c078de6f3785fe ("pinctrl: sh-pfc: r8a7795: Add EtherAVB pins, groups and function")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Geert Uytterhoeven [Mon, 12 Mar 2018 13:42:09 +0000 (14:42 +0100)]
pinctrl: sh-pfc: Add SH_PFC_PIN_GROUP_ALIAS()
Add a macro to refer to another pin group with a different name.
This will be used to rename wrongly-named pin groups, while retaining
backwards compatibility with old DTBs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Geert Uytterhoeven [Mon, 12 Mar 2018 12:13:47 +0000 (13:13 +0100)]
pinctrl: sh-pfc: r8a7790: Add missing TX_ER pin to avb_mii group
The pin controller drivers for all R-Car Gen2 SoCs have entries for the
EtherAVB TX_ER pins in their EtherAVB MII groups, except on R-Car H2.
Add the missing pin to restore consistency.
Note that technically TX_ER is an optional signal in the MII bus, and
thus could have its own group, but this is currently not supported by
any R-Car Gen2 pin controller driver.
Fixes:
19ef697d1eb7be06 ("sh-pfc: r8a7790: add EtherAVB pin groups")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Tue, 13 Mar 2018 19:54:42 +0000 (22:54 +0300)]
pinctrl: sh-pfc: r8a77970: Add EtherAVB pin groups
Add the EtherAVB pin groups to the R8A77970 PFC driver.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sergei Shtylyov [Thu, 8 Mar 2018 19:14:32 +0000 (22:14 +0300)]
pinctrl: sh-pfc: Add R8A77980 PFC support
Add the PFC support for the R8A77980 SoC including pin groups for some
on-chip devices such as AVB, CAN-FD, GETHER, [H]SCIF, I2C, INTC-EX, MMC,
MSIOF, PWM, and VIN...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sergei Shtylyov [Thu, 8 Mar 2018 19:12:47 +0000 (22:12 +0300)]
pinctrl: sh-pfc: Add PORT_GP_CFG_25() helper macro
They follow the style of the existing PORT_GP_CFG_<n>() macros and
will be used by a follow-up patch for the R8A77980 SoC.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Tue, 27 Feb 2018 08:08:02 +0000 (17:08 +0900)]
pinctrl: sh-pfc: r8a77965: Add USB3.0 host pins, groups and functions
This patch adds USB30 (USB3.0 host) pin, group and function to
the R8A77965 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Tue, 27 Feb 2018 08:08:01 +0000 (17:08 +0900)]
pinctrl: sh-pfc: r8a77965: Add USB2.0 host pins, groups and functions
This patch adds USB{0,1} (USB2.0 host) pins, groups and functions to
the R8A77965 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Manivannan Sadhasivam [Fri, 2 Mar 2018 03:50:36 +0000 (09:20 +0530)]
dt-bindings: pinctrl: Add bindings for Actions S900 SoC
Add pinctrl bindings for Actions Semi S900 SoC
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Fri, 2 Mar 2018 12:38:12 +0000 (13:38 +0100)]
Merge tag 'sh-pfc-for-v4.17-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.17
- Add DU and VIN pin groups on R-Car D3,
- Add HDMI, TMU, and VIN pin groups on R-Car H3 and M3-W,
- Add support for the new R-Car M3-N SoC,
- Small fixes and cleanups.
Richard Fitzgerald [Fri, 23 Feb 2018 13:43:52 +0000 (13:43 +0000)]
pinctrl: core: Add missing EXPORT on pinctrl_register_mappings
Systems that don't have devicetree need pinctrl_register_mappings.
It should be EXPORT_SYMBOL_GPL so that it can be called from
pinctrl drivers built as modules.
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Martin Blumenstingl [Sun, 25 Feb 2018 11:38:53 +0000 (12:38 +0100)]
pinctrl: meson: meson8b: fix requesting GPIOs greater than GPIOZ_3
Meson8b is a cost reduced variant of the Meson8 SoC. It's package size
is smaller than Meson8.
Unfortunately there are a few key differences which cannot be seen
without close inspection of the code and the public S805 datasheet:
- the GPIOX bank is missing the GPIOX_12, GPIOX_13, GPIOX_14 and
GPIOX_15 GPIOs
- the GPIOY bank is missing the GPIOY_2, GPIOY_4, GPIOY_5, GPIOY_15 and
GPIOY_16 GPIOs
- the GPIODV bank is missing all GPIOs except GPIODV_9, GPIODV_24,
GPIODV_25, GPIODV_26, GPIODV_27, GPIODV_28 and GPIODV_29
- the GPIOZ bank is missing completely
- there is a new GPIO bank called "DIF"
This means that Meson8b only has 83 actual GPIO lines. Without any holes
there would be 130 GPIO lines in total (120 are inherited from Meson8
plus 10 new from the DIF bank).
GPIOs greater GPIOZ_3 (whose ID is 83 - as a reminder: this is exactly
the number of actual GPIO lines on Meson8b and also the value of
meson8b_cbus_pinctrl_data.num_pins) cannot berequested. Using CARD_6
(which used ID 100 prior to this patch, "base of the GPIO controller was
382) as an example:
$ echo 482 > /sys/class/gpio/export
export_store: invalid GPIO 482
This removes all non-existing pins from to dt-bindings header file
(include/dt-bindings/gpio/meson8b-gpio.h). This allows us to have a
consecutive numbering for the GPIO #defines (GPIOY_2 doesn't exist for
example, so previously the GPIOY_3 ID was "GPIOY_1 + 2", after this
patch it is "GPIOY_1 + 1"). As a nice side-effect this means that we get
compile-time (instead of runtime) errors if Meson8b .dts uses a pin that
only exists on Meson8.
Additionally the pinctrl-meson8b driver has to be updated to handle this
new GPIO numbering. By default a struct meson_bank only handles GPIO
banks where the pins are numbered consecutively because it calculates
the bit offsets based on the GPIO IDs.
This is solved by taking the original BANK() definition and splitting it
into consecutive subsets (X0..11 and X16..21). The bit offsets for each
new bank includes the skipped GPIOs (the definition of the "X0..11" bank
is identical to the old "X" bank apart from the "last IRQ" field, the
definition of the new, split "X16..21" bank takes the original "X" bank
and adds 16 - the start of the new split bank - to the "first IRQ",
pullen bit, pull bit, dir bit, out bit and in bit).
Commit
984cffdeaeb7ea ("pinctrl: Fix gpio/pin mapping for Meson8b")
fixed the same issue by setting "ngpio" (of the gpio_chip) to 130.
Unfortunately this broke in
db80f0e158e621 ("pinctrl: meson: get rid of
unneeded domain structures").
The solution from this patch was considered to be better than the
previous attempt at fixing this because it provides compile-time error
checking for the GPIOs that exist on Meson8 but don't exist on Meson8b.
The following pins were tested on an Odroid-C1 using the sysfs GPIO
interface checking that their value (high or low) could be read:
- GPIOX_0, GPIOX_1, GPIOX_2, GPIOX_3, GPIOX_4, GPIOX_5, GPIOX_6,
GPIOX_7, GPIOX_8, GPIOX_9, GPIOX_10, GPIOX_11, GPIOX_18, GPIOX_19,
GPIOX_20, GPIOX_21
- GPIOY_3, GPIOY_7, GPIOY_8
(some of these had to be pulled up because they were low by default,
others were high by default so these had to be pulled down)
Reported-by: Linus Lüssing <linus.luessing@c0d3.blue>
Suggested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Richard Fitzgerald [Wed, 28 Feb 2018 15:53:06 +0000 (15:53 +0000)]
pinctrl: devicetree: Fix dt_to_map_one_config handling of hogs
When dt_to_map_one_config() is called with a pinctrl_dev passed
in, it should only be using this if the node being looked up
is a hog. The code was always using the passed pinctrl_dev
without checking whether the dt node referred to it.
A pin controller can have pinctrl-n dependencies on other pin
controllers in these cases:
- the pin controller hardware is external, for example I2C, so
needs other pin controller(s) to be setup to communicate with
the hardware device.
- it is a child of a composite MFD so its of_node is shared with
the parent MFD and other children of that MFD. Any part of that
MFD could have dependencies on other pin controllers.
Because of this, dt_to_map_one_config() can't assume that if it
has a pinctrl_dev passed in then the node it looks up must be
a hog. It could be a reference to some other pin controller.
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sean Wang [Fri, 23 Feb 2018 10:16:23 +0000 (18:16 +0800)]
dt-bindings: pinctrl: mediatek: add bindings for I2C2 and SPI2 on MT7623
Add missing pinctrl binding about I2C2 and SPI2 which would be used in
devicetree related files.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sean Wang [Fri, 23 Feb 2018 10:16:21 +0000 (18:16 +0800)]
dt-bindings: pinctrl: mediatek: use - instead of _ in examples
It should be good that no use "_" is in examples. Consequently,
those nodes in certain files which have an inappropriate name containing
"_" are all being replaced with "-".
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Radoslaw Pietrzyk [Fri, 23 Feb 2018 08:31:45 +0000 (09:31 +0100)]
pinctrl: stm32: Optimizes and enhances stm32gpio irqchip
- removes unneeded irq_chip.irq_eoi callback
- adds irq_chip.irq_set_wake callback for possible
in the future GPIO wakeup
- adds irq_chip.irq_ack callback
Signed-off-by: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com>
Reviewed-by: Ludovic Barre <ludovic.barre@st.com>
Tested-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Niklas Cassel [Thu, 22 Feb 2018 15:22:47 +0000 (16:22 +0100)]
pinctrl: artpec6: dt: add smaller groups for uarts
Add group configuration for uarts that are cut down
variants, the standard being full, i.e. all signals,
flow control, i.e. rx/tx and cts/rts, and rx/tx only.
This allows us to be more precise in which pins we're
actually using.
Unfortunately the existing naming scheme leaves things
to be desired, e.g. uart3grp0 means RX/TX and CTS/RTS,
yet uart0grp0 means all pins.
Since the exising suffixes have different meaning for
different uarts, and the fact that we cannot change
the name of existing groups, makes it hard to use a
descriptive name for the newly added groups.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Niklas Cassel [Thu, 22 Feb 2018 15:22:46 +0000 (16:22 +0100)]
pinctrl: artpec6: dt: add missing pin group uart5nocts
Add missing pin group uart5nocts (all pins except cts), which has been
supported by the artpec6 pinctrl driver since its initial submission.
Fixes:
00df0582eab1 ("pinctrl: Add pincontrol driver for ARTPEC-6 SoC")
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jesper Nilsson [Thu, 22 Feb 2018 13:27:05 +0000 (14:27 +0100)]
pinctrl: artpec-6: Add smaller groups for uarts
Add group configuration for uarts that are cut down
variants, the standard being full, i.e. all signals,
flow control, i.e. rx/tx and cts/rts, and rx/tx only.
This allows us to be more precise in which pins we're
actually using.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
James Hogan [Wed, 21 Feb 2018 23:38:21 +0000 (23:38 +0000)]
pinctrl: Drop TZ1090 drivers
Now that arch/metag/ has been removed, along with TZ1090 SoC support,
remove the TZ1090 pinctrl drivers. They are of no value without the
architecture and SoC platform code.
Signed-off-by: James Hogan <jhogan@kernel.org>
Cc: linux-gpio@vger.kernel.org
Cc: linux-metag@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Takeshi Kihara [Mon, 26 Feb 2018 15:30:11 +0000 (16:30 +0100)]
pinctrl: sh-pfc: r8a77965: Add support for INTC-EX IRQ pins
Most pins on the R8A77965 SoC can be configured in GPIO mode for
interrupt and GPIO functionality, while a couple of them can also
be routed to the INTC-EX hardware block (formerly known as IRQC).
On R8A77965 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and
this patch adds support for them to the PFC driver as "intc_ex_irqN".
Based on a similar patch for the R8A7795 PFC driver by Magnus Damm
<damm+renesas@opensource.se>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ulrich Hecht [Thu, 15 Feb 2018 12:01:30 +0000 (13:01 +0100)]
pinctrl: sh-pfc: r8a77995: Add VIN4 pins, groups and function
This patch adds VIN4 pins, groups and function for the
R8A77995 (D3) SoC.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ulrich Hecht [Thu, 15 Feb 2018 12:01:29 +0000 (13:01 +0100)]
pinctrl: sh-pfc: r8a7795: Add VIN4, VIN5 pins, groups and functions
This patch adds VIN4 and VIN5 pins, groups and functions for the
R8A7795 SoC.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ulrich Hecht [Thu, 15 Feb 2018 12:01:28 +0000 (13:01 +0100)]
pinctrl: sh-pfc: r8a7796: Add VIN4, VIN5 pins, groups and functions
This patch adds VIN4 and VIN5 pins, groups and functions for the
R8A7796 SoC.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Phil Reid [Mon, 19 Feb 2018 09:25:20 +0000 (17:25 +0800)]
pinctrl: mcp23s08: add open drain configuration for irq output
The mcp23s08 series device can be configured for wired and interrupts
using an external pull-up and open drain output via the IOCON_ODR bit.
And "drive-open-drain" property to enable this.
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Phil Reid <preid@electromag.com.au>
Reviewed-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Phil Reid [Mon, 19 Feb 2018 09:25:19 +0000 (17:25 +0800)]
dt-bindings: pinctrl: mcp23s08: add documentation for drive-open-drain
This flag set the mcp23s08 device irq type to open drain active low.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Phil Reid <preid@electromag.com.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Phil Reid [Mon, 19 Feb 2018 09:25:18 +0000 (17:25 +0800)]
pinctrl: mcp23s08: fix probing of mcp23s18
one_regmap_config is always null if mcp type is MCP_TYPE_S18.
Remove the null check so that the mcp23s18 will probe.
Fixes:
1781af563aef66c2eb7cda ("pinctrl: mcp23s08: spi: Fix duplicate pinctrl debugfs entries")
Signed-off-by: Phil Reid <preid@electromag.com.au>
Reviewed-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Daniel Kurtz [Fri, 16 Feb 2018 19:12:43 +0000 (12:12 -0700)]
pinctrl/amd: add get_direction handler
On boot, gpiochip_add_data() initializes the FLAG_IS_OUT bit in
desc->flags iff its gpio_chip does not have ->direction_input() handler,
else it is initialized to 0, which implies the GPIO is an "input".
Later, the sysfs "direction" handler will use gpiod_get_direction() to
get the current direction, but if no ->get_direction() handler is
installed, the result will just be the current (initial) value of flags,
which will always be OUT irregardless of the initial register value.
Add a get_direction() handler to pinctrl-amd to fix this and always
provide the correct value for direction.
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Sat, 17 Feb 2018 15:25:11 +0000 (17:25 +0200)]
pinctrl: Re-use DEFINE_SHOW_ATTRIBUTE() macro
...instead of open coding file operations followed by custom ->open()
callbacks per each attribute.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Colin Ian King [Thu, 8 Feb 2018 14:24:37 +0000 (14:24 +0000)]
pinctrl: ocelot: make function ocelot_pinctrl_probe static
The function ocelot_pinctrl_probe is local to the source and does not
need to be in global scope, so make it static.
Cleans up sparse warning:
drivers/pinctrl/pinctrl-ocelot.c:465:5: warning: symbol
'ocelot_pinctrl_probe' was not declared. Should it be static?
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jacopo Mondi [Tue, 20 Feb 2018 15:12:20 +0000 (16:12 +0100)]
pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions
Add EtherAVB groups and functions definitions for R-Car M3-N.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Jacopo Mondi [Tue, 20 Feb 2018 15:12:15 +0000 (16:12 +0100)]
pinctrl: sh-pfc: r8a77965: Add SCIFs groups/functions
Add SCIF[0-5] groups and pin function definitions for R-Car M3-N.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Jacopo Mondi [Tue, 20 Feb 2018 15:12:07 +0000 (16:12 +0100)]
pinctrl: sh-pfc: Initial R-Car M3-N support
Add initial PFC support for R-Car M3-N (r8a77965) SoC.
No groups or functions defined, just pin and registers enumeration.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Fri, 16 Feb 2018 14:26:11 +0000 (15:26 +0100)]
pinctrl: sh-pfc: r8a7796: Add TMU pins, groups and functions
This patch adds TMU TCLK{1,2} pins, groups and functions to
the R8A7796 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Fri, 16 Feb 2018 14:26:10 +0000 (15:26 +0100)]
pinctrl: sh-pfc: r8a7795-es1: Add TMU pins, groups and functions
This patch adds TMU TCLK{1,2} pins, groups and functions to
the R8A7795 ES1.x SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Fri, 16 Feb 2018 14:26:09 +0000 (15:26 +0100)]
pinctrl: sh-pfc: r8a7795: Add TMU pins, groups and functions
This patch adds TMU TCLK{1,2} pins, groups and functions to
the R8A7795 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Fri, 16 Feb 2018 14:25:42 +0000 (15:25 +0100)]
pinctrl: sh-pfc: r8a7796: Add HDMI pins, groups and functions
This patch adds HDMI0 CEC pin, group and function to the R8A7796 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Fri, 16 Feb 2018 14:25:41 +0000 (15:25 +0100)]
pinctrl: sh-pfc: r8a7795-es1: Add HDMI pins, groups and functions
This patch adds HDMI0 CEC pin, group and function to
the R8A7795 ES1.x SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: fixed typo in comment]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Fri, 16 Feb 2018 14:25:40 +0000 (15:25 +0100)]
pinctrl: sh-pfc: r8a7795: Add HDMI pins, groups and functions
This patch adds HDMI0 CEC pin, group and function to the R8A7795 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: fixed typo in comment]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Fri, 16 Feb 2018 14:25:04 +0000 (15:25 +0100)]
pinctrl: sh-pfc: r8a7796: Fix IPSR and MOD_SEL register pin assignment for NDFC pins group
This patch fixes to set IPSR and MOD_SEL when using NFDATA{14,15}_A and
NF{RB,WP}_N_A pin function is selected. And renamess MOD_SEL2 bit22 value
definition name to SEL_NDFC.
This is a correction to the incorrect implementation of MOD_SEL register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.53E.
Fixes:
f9aece7344bd ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Fri, 16 Feb 2018 14:25:03 +0000 (15:25 +0100)]
pinctrl: sh-pfc: r8a7796: Fix MOD_SEL register pin assignment for SSI pins group
This patch fixes MOD_SEL1 bit20 and MOD_SEL2 bit20, bit21 pin assignment
for SSI pins group.
This is a correction to the incorrect implementation of MOD_SEL register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.
Fixes:
f9aece7344bd ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Takeshi Kihara [Fri, 16 Feb 2018 14:25:02 +0000 (15:25 +0100)]
pinctrl: sh-pfc: r8a7795: Fix MOD_SEL register pin assignment for SSI pins group
This patch fixes MOD_SEL1 bit20 and MOD_SEL2 bit20, bit21 pin assignment
for SSI pins group.
This is a correction because MOD_SEL register specification for R8A7795
ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E.
Fixes:
b205914c8f82 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ulrich Hecht [Thu, 15 Feb 2018 12:01:31 +0000 (13:01 +0100)]
pinctrl: sh-pfc: r8a77995: Add DU pins, groups and function
This patch adds DU pins, groups and function for the R8A77995 (D3) SoC.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Linus Walleij [Mon, 12 Feb 2018 21:54:06 +0000 (22:54 +0100)]
pinctrl: nomadik: add USB functions for STn8815
The MUSB block in the Nomadik has two pin settings: high speed or
full speed. These correspond to two unique pin group settings: all
pins set to function B for high speed and all set to function C
for full speed. Full speed uses more pins than high speed.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Sat, 6 Jan 2018 20:50:20 +0000 (21:50 +0100)]
pinctrl: sh-pfc: Use seq_puts() in sh_pfc_pin_dbg_show()
A string which did not contain a data format specification should be put
into a sequence. Thus use the corresponding function "seq_puts".
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Tue, 19 Dec 2017 14:38:12 +0000 (15:38 +0100)]
dt-bindings: pinctrl: sh-pfc: Correct SoC family name for R8A7778
R8A7778 is R-Car (not R-Mobile) M1.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Bjorn Andersson [Mon, 29 Jan 2018 00:59:48 +0000 (16:59 -0800)]
pinctrl: msm: Use dynamic GPIO numbering
The base of the TLMM gpiochip should not be statically defined as 0, fix
this to not artificially restrict the existence of multiple pinctrl-msm
devices.
Fixes:
f365be092572 ("pinctrl: Add Qualcomm TLMM driver")
Reported-by: Timur Tabi <timur@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jan Kundrát [Fri, 26 Jan 2018 15:06:37 +0000 (16:06 +0100)]
pinctrl: mcp23s08: spi: Fix duplicate pinctrl debugfs entries
This is a bit more involved because the pinctrl core so far always
assumed that one device (with a unique dev_name) only contains a single
pinctrl thing. This is not true for the mcp23s08 driver for chips
connected over SPI. They have a "logical address" which means that
several chips can share one physical CS signal.
A downside of this patch are some possibly ugly names for the debugfs
entries, such as "spi1.1-mcp23xxx-pinctrl.2", etc.
Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jan Kundrát [Fri, 26 Jan 2018 19:16:47 +0000 (20:16 +0100)]
pinctrl: mcp23s08: spi: Add HW address to gpio_chip.label
When several devices are sharing one hardware SPI CS, there is no visual
clue in `lsgpio` or in /sys/kernel/debug/gpio about which one is which
one. Stuff depends on the enumeration order, and therefore lower chip
addresses always go first, but that's just an implementation detail.
This change includes the device-specific address in the debug output:
gpiochip4: GPIOs 464-479, parent: spi/spi1.1, mcp23s17.2, can sleep:
gpiochip3: GPIOs 480-495, parent: spi/spi1.1, mcp23s17.1, can sleep:
Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jan Kundrát [Thu, 25 Jan 2018 17:29:15 +0000 (18:29 +0100)]
pinctrl: mcp23s08: spi: Fix regmap debugfs entries
The SPI version of this chip allows several devices to be present on the
same SPI bus via a local address. If this is in action and if the kernel
has debugfs, however, the code attempts to create duplicate entries for
the regmap's debugfs:
mcp23s08 spi1.1: Failed to create debugfs directory
This patch simply assigns a local name matching the device logical
address to the `struct regmap_config`.
No changes are needed for MCP23S18 because that device does not support
any logical addressing. Similarly, I2C devices do not need any action,
either, because they are already different in their I2C address.
A similar problem is present for the pinctrl debugfs instance, but that
one is not addressed by this patch.
Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Kyle Yan [Thu, 11 Jan 2018 06:00:04 +0000 (22:00 -0800)]
pinctrl: qcom: Add sdm845 pinctrl driver
This adds the pinctrl definitions for the TLMM of SDM845.
Signed-off-by: Kyle Yan <kyan@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Bjorn Andersson [Thu, 11 Jan 2018 06:00:03 +0000 (22:00 -0800)]
dt-bindings: pinctrl: Add Qualcomm SDM845 TLMM binding
This adds the DeviceTree binding for the Qualcomm SDM845 TLMM block.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Torvalds [Sun, 11 Feb 2018 23:04:29 +0000 (15:04 -0800)]
Linux 4.16-rc1
Al Viro [Thu, 1 Feb 2018 20:13:18 +0000 (15:13 -0500)]
unify {de,}mangle_poll(), get rid of kernel-side POLL...
except, again, POLLFREE and POLL_BUSY_LOOP.
With this, we finally get to the promised end result:
- POLL{IN,OUT,...} are plain integers and *not* in __poll_t, so any
stray instances of ->poll() still using those will be caught by
sparse.
- eventpoll.c and select.c warning-free wrt __poll_t
- no more kernel-side definitions of POLL... - userland ones are
visible through the entire kernel (and used pretty much only for
mangle/demangle)
- same behavior as after the first series (i.e. sparc et.al. epoll(2)
working correctly).
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 11 Feb 2018 22:34:03 +0000 (14:34 -0800)]
vfs: do bulk POLL* -> EPOLL* replacement
This is the mindless scripted replacement of kernel use of POLL*
variables as described by Al, done by this script:
for V in IN OUT PRI ERR RDNORM RDBAND WRNORM WRBAND HUP RDHUP NVAL MSG; do
L=`git grep -l -w POLL$V | grep -v '^t' | grep -v /um/ | grep -v '^sa' | grep -v '/poll.h$'|grep -v '^D'`
for f in $L; do sed -i "-es/^\([^\"]*\)\(\<POLL$V\>\)/\\1E\\2/" $f; done
done
with de-mangling cleanups yet to come.
NOTE! On almost all architectures, the EPOLL* constants have the same
values as the POLL* constants do. But they keyword here is "almost".
For various bad reasons they aren't the same, and epoll() doesn't
actually work quite correctly in some cases due to this on Sparc et al.
The next patch from Al will sort out the final differences, and we
should be all done.
Scripted-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 11 Feb 2018 21:57:19 +0000 (13:57 -0800)]
Merge branch 'work.poll2' of git://git./linux/kernel/git/viro/vfs
Pull more poll annotation updates from Al Viro:
"This is preparation to solving the problems you've mentioned in the
original poll series.
After this series, the kernel is ready for running
for V in IN OUT PRI ERR RDNORM RDBAND WRNORM WRBAND HUP RDHUP NVAL MSG; do
L=`git grep -l -w POLL$V | grep -v '^t' | grep -v /um/ | grep -v '^sa' | grep -v '/poll.h$'|grep -v '^D'`
for f in $L; do sed -i "-es/^\([^\"]*\)\(\<POLL$V\>\)/\\1E\\2/" $f; done
done
as a for bulk search-and-replace.
After that, the kernel is ready to apply the patch to unify
{de,}mangle_poll(), and then get rid of kernel-side POLL... uses
entirely, and we should be all done with that stuff.
Basically, that's what you suggested wrt KPOLL..., except that we can
use EPOLL... instead - they already are arch-independent (and equal to
what is currently kernel-side POLL...).
After the preparations (in this series) switch to returning EPOLL...
from ->poll() instances is completely mechanical and kernel-side
POLL... can go away. The last step (killing kernel-side POLL... and
unifying {de,}mangle_poll() has to be done after the
search-and-replace job, since we need userland-side POLL... for
unified {de,}mangle_poll(), thus the cherry-pick at the last step.
After that we will have:
- POLL{IN,OUT,...} *not* in __poll_t, so any stray instances of
->poll() still using those will be caught by sparse.
- eventpoll.c and select.c warning-free wrt __poll_t
- no more kernel-side definitions of POLL... - userland ones are
visible through the entire kernel (and used pretty much only for
mangle/demangle)
- same behavior as after the first series (i.e. sparc et.al. epoll(2)
working correctly)"
* 'work.poll2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
annotate ep_scan_ready_list()
ep_send_events_proc(): return result via esed->res
preparation to switching ->poll() to returning EPOLL...
add EPOLLNVAL, annotate EPOLL... and event_poll->event
use linux/poll.h instead of asm/poll.h
xen: fix poll misannotation
smc: missing poll annotations
Linus Torvalds [Sun, 11 Feb 2018 21:54:52 +0000 (13:54 -0800)]
Merge tag 'xtensa-
20180211' of git://github.com/jcmvbkbc/linux-xtensa
Pull xtense fix from Max Filippov:
"Build fix for xtensa architecture with KASAN enabled"
* tag 'xtensa-
20180211' of git://github.com/jcmvbkbc/linux-xtensa:
xtensa: fix build with KASAN
Linus Torvalds [Sun, 11 Feb 2018 21:52:32 +0000 (13:52 -0800)]
Merge tag 'nios2-v4.16-rc1' of git://git./linux/kernel/git/lftan/nios2
Pull nios2 update from Ley Foon Tan:
- clean up old Kconfig options from defconfig
- remove leading 0x and 0s from bindings notation in dts files
* tag 'nios2-v4.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2:
nios2: defconfig: Cleanup from old Kconfig options
nios2: dts: Remove leading 0x and 0s from bindings notation
Max Filippov [Sun, 11 Feb 2018 09:07:54 +0000 (01:07 -0800)]
xtensa: fix build with KASAN
The commit
917538e212a2 ("kasan: clean up KASAN_SHADOW_SCALE_SHIFT
usage") removed KASAN_SHADOW_SCALE_SHIFT definition from
include/linux/kasan.h and added it to architecture-specific headers,
except for xtensa. This broke the xtensa build with KASAN enabled.
Define KASAN_SHADOW_SCALE_SHIFT in arch/xtensa/include/asm/kasan.h
Reported by: kbuild test robot <fengguang.wu@intel.com>
Fixes:
917538e212a2 ("kasan: clean up KASAN_SHADOW_SCALE_SHIFT usage")
Acked-by: Andrey Konovalov <andreyknvl@google.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Krzysztof Kozlowski [Sun, 11 Feb 2018 15:01:17 +0000 (23:01 +0800)]
nios2: defconfig: Cleanup from old Kconfig options
Remove old, dead Kconfig option INET_LRO. It is gone since
commit
7bbf3cae65b6 ("ipv4: Remove inet_lro library").
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Ley Foon Tan <ley.foon.tan@intel.com>
Mathieu Malaterre [Sun, 11 Feb 2018 14:59:18 +0000 (22:59 +0800)]
nios2: dts: Remove leading 0x and 0s from bindings notation
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -E -i -e "s/@0x([0-9a-fA-F\.]+)\s?\{/@\L\1 \{/g" -e "s/@0+([0-9a-fA-F\.]+)\s?\{/@\L\1 \{/g" {} +
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This is a follow up to commit
4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Acked-by: Ley Foon Tan <ley.foon.tan@intel.com>
Linus Torvalds [Sat, 10 Feb 2018 22:08:26 +0000 (14:08 -0800)]
Merge tag 'pci-v4.16-fixes-1' of git://git./linux/kernel/git/helgaas/pci
Pull PCI fix from Bjorn Helgaas:
"Fix a POWER9/powernv INTx regression from the merge window (Alexey
Kardashevskiy)"
* tag 'pci-v4.16-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
powerpc/pci: Fix broken INTx configuration via OF
Linus Torvalds [Sat, 10 Feb 2018 22:05:11 +0000 (14:05 -0800)]
Merge tag 'for-linus-
20180210' of git://git.kernel.dk/linux-block
Pull block fixes from Jens Axboe:
"A few fixes to round off the merge window on the block side:
- a set of bcache fixes by way of Michael Lyle, from the usual bcache
suspects.
- add a simple-to-hook-into function for bpf EIO error injection.
- fix blk-wbt that mischarectized flushes as reads. Improve the logic
so that flushes and writes are accounted as writes, and only reads
as reads. From me.
- fix requeue crash in BFQ, from Paolo"
* tag 'for-linus-
20180210' of git://git.kernel.dk/linux-block:
block, bfq: add requeue-request hook
bcache: fix for data collapse after re-attaching an attached device
bcache: return attach error when no cache set exist
bcache: set writeback_rate_update_seconds in range [1, 60] seconds
bcache: fix for allocator and register thread race
bcache: set error_limit correctly
bcache: properly set task state in bch_writeback_thread()
bcache: fix high CPU occupancy during journal
bcache: add journal statistic
block: Add should_fail_bio() for bpf error injection
blk-wbt: account flush requests correctly
Linus Torvalds [Sat, 10 Feb 2018 21:55:33 +0000 (13:55 -0800)]
Merge tag 'platform-drivers-x86-v4.16-3' of git://github.com/dvhart/linux-pdx86
Pull x86 platform driver updates from Darren Hart:
"Mellanox fixes and new system type support.
Mostly data for new system types with a correction and an
uninitialized variable fix"
[ Pulling from github because git.infradead.org currently seems to be
down for some reason, but Darren had a backup location - Linus ]
* tag 'platform-drivers-x86-v4.16-3' of git://github.com/dvhart/linux-pdx86:
platform/x86: mlx-platform: Add support for new 200G IB and Ethernet systems
platform/x86: mlx-platform: Add support for new msn201x system type
platform/x86: mlx-platform: Add support for new msn274x system type
platform/x86: mlx-platform: Fix power cable setting for msn21xx family
platform/x86: mlx-platform: Add define for the negative bus
platform/x86: mlx-platform: Use defines for bus assignment
platform/mellanox: mlxreg-hotplug: Fix uninitialized variable
Linus Torvalds [Sat, 10 Feb 2018 21:50:23 +0000 (13:50 -0800)]
Merge tag 'chrome-platform-for-linus-4.16' of git://git./linux/kernel/git/bleung/chrome-platform
Pull chrome platform updates from Benson Leung:
- move cros_ec_dev to drivers/mfd
- other small maintenance fixes
[ The cros_ec_dev movement came in earlier through the MFD tree - Linus ]
* tag 'chrome-platform-for-linus-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/bleung/chrome-platform:
platform/chrome: Use proper protocol transfer function
platform/chrome: cros_ec_lpc: Add support for Google Glimmer
platform/chrome: cros_ec_lpc: Register the driver if ACPI entry is missing.
platform/chrome: cros_ec_lpc: remove redundant pointer request
cros_ec: fix nul-termination for firmware build info
platform/chrome: chromeos_laptop: make chromeos_laptop const
Linus Torvalds [Sat, 10 Feb 2018 21:16:35 +0000 (13:16 -0800)]
Merge tag 'kvm-4.16-1' of git://git./virt/kvm/kvm
Pull KVM updates from Radim Krčmář:
"ARM:
- icache invalidation optimizations, improving VM startup time
- support for forwarded level-triggered interrupts, improving
performance for timers and passthrough platform devices
- a small fix for power-management notifiers, and some cosmetic
changes
PPC:
- add MMIO emulation for vector loads and stores
- allow HPT guests to run on a radix host on POWER9 v2.2 CPUs without
requiring the complex thread synchronization of older CPU versions
- improve the handling of escalation interrupts with the XIVE
interrupt controller
- support decrement register migration
- various cleanups and bugfixes.
s390:
- Cornelia Huck passed maintainership to Janosch Frank
- exitless interrupts for emulated devices
- cleanup of cpuflag handling
- kvm_stat counter improvements
- VSIE improvements
- mm cleanup
x86:
- hypervisor part of SEV
- UMIP, RDPID, and MSR_SMI_COUNT emulation
- paravirtualized TLB shootdown using the new KVM_VCPU_PREEMPTED bit
- allow guests to see TOPOEXT, GFNI, VAES, VPCLMULQDQ, and more
AVX512 features
- show vcpu id in its anonymous inode name
- many fixes and cleanups
- per-VCPU MSR bitmaps (already merged through x86/pti branch)
- stable KVM clock when nesting on Hyper-V (merged through
x86/hyperv)"
* tag 'kvm-4.16-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (197 commits)
KVM: PPC: Book3S: Add MMIO emulation for VMX instructions
KVM: PPC: Book3S HV: Branch inside feature section
KVM: PPC: Book3S HV: Make HPT resizing work on POWER9
KVM: PPC: Book3S HV: Fix handling of secondary HPTEG in HPT resizing code
KVM: PPC: Book3S PR: Fix broken select due to misspelling
KVM: x86: don't forget vcpu_put() in kvm_arch_vcpu_ioctl_set_sregs()
KVM: PPC: Book3S PR: Fix svcpu copying with preemption enabled
KVM: PPC: Book3S HV: Drop locks before reading guest memory
kvm: x86: remove efer_reload entry in kvm_vcpu_stat
KVM: x86: AMD Processor Topology Information
x86/kvm/vmx: do not use vm-exit instruction length for fast MMIO when running nested
kvm: embed vcpu id to dentry of vcpu anon inode
kvm: Map PFN-type memory regions as writable (if possible)
x86/kvm: Make it compile on 32bit and with HYPYERVISOR_GUEST=n
KVM: arm/arm64: Fixup userspace irqchip static key optimization
KVM: arm/arm64: Fix userspace_irqchip_in_use counting
KVM: arm/arm64: Fix incorrect timer_is_pending logic
MAINTAINERS: update KVM/s390 maintainers
MAINTAINERS: add Halil as additional vfio-ccw maintainer
MAINTAINERS: add David as a reviewer for KVM/s390
...
Alexey Kardashevskiy [Fri, 9 Feb 2018 06:23:58 +0000 (17:23 +1100)]
powerpc/pci: Fix broken INTx configuration via OF
59f47eff03a0 ("powerpc/pci: Use of_irq_parse_and_map_pci() helper")
replaced of_irq_parse_pci() + irq_create_of_mapping() with
of_irq_parse_and_map_pci(), but neglected to capture the virq
returned by irq_create_of_mapping(), so virq remained zero, which
caused INTx configuration to fail.
Save the virq value returned by of_irq_parse_and_map_pci() and correct
the virq declaration to match the of_irq_parse_and_map_pci() signature.
Fixes:
59f47eff03a0 "powerpc/pci: Use of_irq_parse_and_map_pci() helper"
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Linus Torvalds [Sat, 10 Feb 2018 03:32:41 +0000 (19:32 -0800)]
Merge tag 'kbuild-v4.16-2' of git://git./linux/kernel/git/masahiroy/linux-kbuild
Pull more Kbuild updates from Masahiro Yamada:
"Makefile changes:
- enable unused-variable warning that was wrongly disabled for clang
Kconfig changes:
- warn about blank 'help' and fix existing instances
- fix 'choice' behavior to not write out invisible symbols
- fix misc weirdness
Coccinell changes:
- fix false positive of free after managed memory alloc detection
- improve performance of NULL dereference detection"
* tag 'kbuild-v4.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (21 commits)
kconfig: remove const qualifier from sym_expand_string_value()
kconfig: add xrealloc() helper
kconfig: send error messages to stderr
kconfig: echo stdin to stdout if either is redirected
kconfig: remove check_stdin()
kconfig: remove 'config*' pattern from .gitignnore
kconfig: show '?' prompt even if no help text is available
kconfig: do not write choice values when their dependency becomes n
coccinelle: deref_null: avoid useless computation
coccinelle: devm_free: reduce false positives
kbuild: clang: disable unused variable warnings only when constant
kconfig: Warn if help text is blank
nios2: kconfig: Remove blank help text
arm: vt8500: kconfig: Remove blank help text
MIPS: kconfig: Remove blank help text
MIPS: BCM63XX: kconfig: Remove blank help text
lib/Kconfig.debug: Remove blank help text
Staging: rtl8192e: kconfig: Remove blank help text
Staging: rtl8192u: kconfig: Remove blank help text
mmc: kconfig: Remove blank help text
...
Al Viro [Sat, 10 Feb 2018 01:35:16 +0000 (01:35 +0000)]
mconsole_proc(): don't mess with file->f_pos
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sat, 10 Feb 2018 03:22:17 +0000 (19:22 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/viro/vfs
Pull misc vfs fixes from Al Viro.
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
seq_file: fix incomplete reset on read from zero offset
kernfs: fix regression in kernfs_fop_write caused by wrong type
Masahiro Yamada [Thu, 8 Feb 2018 16:19:08 +0000 (01:19 +0900)]
kconfig: remove const qualifier from sym_expand_string_value()
This function returns realloc'ed memory, so the returned pointer
must be passed to free() when done. So, 'const' qualifier is odd.
It is allowed to modify the expanded string.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 8 Feb 2018 16:19:07 +0000 (01:19 +0900)]
kconfig: add xrealloc() helper
We already have xmalloc(), xcalloc(). Add xrealloc() as well
to save tedious error handling.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Vadim Pasternak [Fri, 9 Feb 2018 23:59:32 +0000 (23:59 +0000)]
platform/x86: mlx-platform: Add support for new 200G IB and Ethernet systems
It adds support for new Mellanox system types of basic classes qmb7, sn34,
sn37, containing systems QMB700 (40x200GbE InfiniBand switch), SN3700
(32x200GbE and 16x400GbE Ethernet switch) and SN3410 (6x400GbE plus
48x50GbE Ethernet switch). These are the Top of the Rack systems, equipped
with Mellanox COM-Express carrier board and switch board with Mellanox
Quantum device, which supports InfiniBand switching with 40X200G ports and
line rate of up to HDR speed or with Mellanox Spectrum-2 device, which
supports Ethernet switching with 32X200G ports line rate of up to HDR
speed.
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
Vadim Pasternak [Fri, 9 Feb 2018 23:59:31 +0000 (23:59 +0000)]
platform/x86: mlx-platform: Add support for new msn201x system type
It adds support for new Mellanox system types of basic half unit size
class msn201x, containing system MSN2010 (18x10GbE plus 4x4x25GbE) half
and its derivatives. This is the Top of the Rack system, equipped with
Mellanox Small Form Factor carrier board and switch board with Mellanox
Spectrum device, which supports Ethernet switching with 32X100G ports line
rate of up to EDR speed.
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
Vadim Pasternak [Fri, 9 Feb 2018 23:59:30 +0000 (23:59 +0000)]
platform/x86: mlx-platform: Add support for new msn274x system type
It adds support for new Mellanox system types of basic class msn274x,
containing system MSN2740 (32x100GbE Ethernet switch with cost reduction)
and its derivatives. These are the Top of the Rack system, equipped with
Mellanox Small Form Factor carrier board and switch board with Mellanox
Spectrum device, which supports Ethernet switching with 32X100G ports line
rate of up to EDR speed.
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
Linus Torvalds [Fri, 9 Feb 2018 23:34:18 +0000 (15:34 -0800)]
Merge git://git./linux/kernel/git/davem/net
Pull networking fixes from David Miller:
1) Make allocations less aggressive in x_tables, from Minchal Hocko.
2) Fix netfilter flowtable Kconfig deps, from Pablo Neira Ayuso.
3) Fix connection loss problems in rtlwifi, from Larry Finger.
4) Correct DRAM dump length for some chips in ath10k driver, from Yu
Wang.
5) Fix ABORT handling in rxrpc, from David Howells.
6) Add SPDX tags to Sun networking drivers, from Shannon Nelson.
7) Some ipv6 onlink handling fixes, from David Ahern.
8) Netem packet scheduler interval calcualtion fix from Md. Islam.
9) Don't put crypto buffers on-stack in rxrpc, from David Howells.
10) Fix handling of error non-delivery status in netlink multicast
delivery over multiple namespaces, from Nicolas Dichtel.
11) Missing xdp flush in tuntap driver, from Jason Wang.
12) Synchonize RDS protocol netns/module teardown with rds object
management, from Sowini Varadhan.
13) Add nospec annotations to mpls, from Dan Williams.
14) Fix SKB truesize handling in TIPC, from Hoang Le.
15) Interrupt masking fixes in stammc from Niklas Cassel.
16) Don't allow ptr_ring objects to be sized outside of kmalloc's
limits, from Jason Wang.
17) Don't allow SCTP chunks to be built which will have a length
exceeding the chunk header's 16-bit length field, from Alexey
Kodanev.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (82 commits)
ibmvnic: Remove skb->protocol checks in ibmvnic_xmit
bpf: fix rlimit in reuseport net selftest
sctp: verify size of a new chunk in _sctp_make_chunk()
s390/qeth: fix SETIP command handling
s390/qeth: fix underestimated count of buffer elements
ptr_ring: try vmalloc() when kmalloc() fails
ptr_ring: fail early if queue occupies more than KMALLOC_MAX_SIZE
net: stmmac: remove redundant enable of PMT irq
net: stmmac: rename GMAC_INT_DEFAULT_MASK for dwmac4
net: stmmac: discard disabled flags in interrupt status register
ibmvnic: Reset long term map ID counter
tools/libbpf: handle issues with bpf ELF objects containing .eh_frames
selftests/bpf: add selftest that use test_libbpf_open
selftests/bpf: add test program for loading BPF ELF files
tools/libbpf: improve the pr_debug statements to contain section numbers
bpf: Sync kernel ABI header with tooling header for bpf_common.h
net: phy: fix phy_start to consider PHY_IGNORE_INTERRUPT
net: thunder: change q_len's type to handle max ring size
tipc: fix skb truesize/datasize ratio control
net/sched: cls_u32: fix cls_u32 on filter replace
...