Ellis Hoag [Wed, 12 Apr 2023 17:21:38 +0000 (10:21 -0700)]
[InstrProf][Temporal] Add weight field to traces
As discussed in [0], add a `weight` field to temporal profiling traces found in profiles. This allows users to use the `--weighted-input=` flag in the `llvm-profdata merge` command to weight traces from different scenarios differently.
Note that this is a breaking change, but since [1] landed very recently and there is no way to "use" this trace data, there should be no users of this feature. We believe it is acceptable to land this change without bumping the profile format version.
[0] https://reviews.llvm.org/D147812#4259507
[1] https://reviews.llvm.org/D147287
Reviewed By: snehasish
Differential Revision: https://reviews.llvm.org/D148150
Sam Clegg [Thu, 13 Apr 2023 02:33:12 +0000 (19:33 -0700)]
[lld][WebAssembly] Trace export of symbols when specified with --trace-symbol. NFC
Differential Revision: https://reviews.llvm.org/D148190
Valentin Clement [Thu, 13 Apr 2023 17:35:37 +0000 (10:35 -0700)]
[mlir][openacc] Add acc.serial operation
The acc.serial operation models the OpenACC serial construct.
The serial construct defines a region of a program that is to be
executed sequentially on the current device.
The operation is modelled on the acc.parallel operation and will
receive similar updates when the data operands operations will
be implemented.
Reviewed By: PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D148250
Fangrui Song [Thu, 13 Apr 2023 17:28:58 +0000 (10:28 -0700)]
Internalize AllocationBegin functions after D147005
Reviewed By: thurston
Differential Revision: https://reviews.llvm.org/D148195
Alexey Bataev [Wed, 12 Apr 2023 17:36:57 +0000 (10:36 -0700)]
[SLP]Introduce gather cost estimation function.
Introduced BoUpSLP::ShuffleCostEstimator::gather function as an initial
implementation of the gather/buildvector cost estimation for buildvector
nodes. It will allow to use general codegen infrastructure for better
cost estimation + it improves the cost estimation for the
gathers/buildvectors.
Improved part of D110978.
Differential Revision: https://reviews.llvm.org/D148174
Valentin Clement [Thu, 13 Apr 2023 17:14:37 +0000 (10:14 -0700)]
[mlir][openacc][NFC] Use assembly format for acc.parallel
Remove the custoom parser and printer for the acc.parallel
operation and use the assembly format directly.
Reviewed By: PeteSteinfeld, razvanlupusoru
Differential Revision: https://reviews.llvm.org/D148183
Simon Pilgrim [Thu, 13 Apr 2023 17:07:03 +0000 (18:07 +0100)]
[CostModel][X86] Add latency/code-size/size-latency target costs for minnum/maxnum intrinsics
Using the latest version of the script from D103695 to compare costmodel vs llvm-mca statistics.
Avoids using the default costs, which was assuming libm calls.
ruturaj4 [Thu, 13 Apr 2023 12:48:30 +0000 (13:48 +0100)]
[clang][ExtractAPI] Complete declaration fragments for TagDecl types defined in a typedef
enums and structs declared inside typedefs have incorrect declaration fragments, where the typedef keyword and other syntax is missing.
For the following struct:
typedef struct Test {
int hello;
} Test;
The produced declaration is:
"declarationFragments": [
{
"kind": "keyword",
"spelling": "struct"
},
{
"kind": "text",
"spelling": " "
},
{
"kind": "identifier",
"spelling": "Test"
}
],
instead the declaration fragments should represent the following
typedef struct Test {
…
} Test;
This patch removes the condition in SymbolGraphSerializer.cpp file and completes declaration fragments
Reviewed By: dang
Differential Revision: https://reviews.llvm.org/D146385
Ivan Butygin [Wed, 12 Apr 2023 15:35:50 +0000 (17:35 +0200)]
[mlir][scf] Make whileOp builder funcs optional
Create empty block without the terminator in this case.
Differential Revision: https://reviews.llvm.org/D148137
Peter Klausler [Wed, 12 Apr 2023 19:32:37 +0000 (12:32 -0700)]
[flang][runtime] Reset the left tab limit when flushing output
When flushing output to a non-positionable tty or socket file, reset the
left tab limit. Otherwise, non-advancing output to that file will contain
an increasing amount of leading spaces in each flush. Also, detect
newline characters in stream output, and treat them as record
advancement.
Differential Revision: https://reviews.llvm.org/D148157
Nick Desaulniers [Thu, 13 Apr 2023 16:30:19 +0000 (09:30 -0700)]
[StackProtector] don't check stack protector before calling nounwind functions
https://reviews.llvm.org/rGd656ae28095726830f9beb8dbd4d69f5144ef821
introduced a additional checks before calling noreturn functions in
response to this security paper related to Catch Handler Oriented
Programming (CHOP):
https://download.vusec.net/papers/chop_ndss23.pdf
See also:
https://bugs.chromium.org/p/llvm/issues/detail?id=30
This causes stack canaries to be inserted in C code which was
unexpected; we noticed certain Linux kernel trees stopped booting after
this (in functions trying to initialize the stack canary itself).
https://github.com/ClangBuiltLinux/linux/issues/1815
There is no point checking the stack canary like this when exceptions
are disabled (-fno-exceptions or function is marked noexcept) or for C
code. The GCC patch for this issue does something similar:
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=
a25982ada523689c8745d7fb4b1b93c8f5dab2e7
Android measured a 2% regression in RSS as a result of
d656ae280957 and
undid it globally:
https://android-review.googlesource.com/c/platform/build/soong/+/2524336
Reviewed By: xiangzhangllvm
Differential Revision: https://reviews.llvm.org/D147975
Simon Pilgrim [Thu, 13 Apr 2023 16:21:15 +0000 (17:21 +0100)]
[CostModel][X86] Add latency/code-size test coverage for minnum/maxnum intrinsics
And improve test coverage for the existing size-latency tests to match
Antoine Moynault [Thu, 13 Apr 2023 16:27:13 +0000 (16:27 +0000)]
[llvm-readobj] fix unit test failure on 32bit machines
Several bots are failing on 32-bit since https://reviews.llvm.org/D145761 was merged
https://lab.llvm.org/buildbot/#/builders/178/builds/4384
It seems due to the use of uintptr_t (32bit here) for storing 64 bit values.
Issue is fixed by replacing to uint64_t (as suggested by DavidSpickett).
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D148208
Arthur Eubanks [Thu, 13 Apr 2023 16:09:18 +0000 (09:09 -0700)]
Revert "[COFF] Add MC support for emitting IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY symbols"
This reverts commit
fffdb7eac58b4efde5e23c1281e7a7f93a42d280.
Causes crashes, see https://reviews.llvm.org/D145208
Balaji V. Iyer [Thu, 13 Apr 2023 15:54:21 +0000 (15:54 +0000)]
[mlir][math] Expand math.exp2 to use math.exp.
Exp2 functions are pushed directly to libm. This is problematic for
situations where libm is not available. This patch will expand the exp2
function to use exp2 with the input multiplied by ln2 (natural log).
Reviewed By: rsuderman
Differential Revision: https://reviews.llvm.org/D148064
Matt Arsenault [Thu, 13 Apr 2023 16:05:05 +0000 (12:05 -0400)]
InstSimplify: Regenerate checks in a test
For some reason this was missing the "Assertions have been autogenerated"
comment so were getting spurious diffs in a future change.
Simon Pilgrim [Thu, 13 Apr 2023 15:59:35 +0000 (16:59 +0100)]
[SLP] Compute min/max scalar reduction costs using min/max intrinsics instead of expanded cmp+sel
By default these will expand back to cmp/sel, but some targets (X86) has optimized costs for scalar integer min/max patterns which are lower than the default expansion (pre-SSE41 is particularly weak for vector min/max support).
Differential Revision: [SLP] Compute min/max scalar reduction costs using min/max intrinsics instead of expanded cmp+sel
Jay Foad [Thu, 13 Apr 2023 14:53:09 +0000 (15:53 +0100)]
[AMDGPU] Allow use of TTMP registers in AMDGPUResourceUsageAnalysis
With architected SGPRs, workgroup IDs are passed into a compute shader
in TTMP registers. Allow for this in AMDGPUResourceUsageAnalysis instead
of failing an assertion.
Differential Revision: https://reviews.llvm.org/D148239
Jay Foad [Thu, 13 Apr 2023 15:52:03 +0000 (16:52 +0100)]
[AMDGPU] Avoid else-after-return in isLegalAddressingMode. NFC.
Lawrence Benson [Thu, 13 Apr 2023 15:44:09 +0000 (16:44 +0100)]
[AArch64] Add more efficient vector bitcast for AArch64
Adds a DAG combine checks for vector comparisons followed by a bitcast to a
scalar value. Previously, this resulted in an expand. Now, this is done with a
constant number of instructions that take one bit per vector value (via an AND
mask) and perfom a horizontal add to get a single value. This is especially
useful for Clang's __builtin_convertvector() to a bool vector.
Issue: https://github.com/llvm/llvm-project/issues/59829
Differential Revision: https://reviews.llvm.org/D145301
Simon Pilgrim [Thu, 13 Apr 2023 15:40:37 +0000 (16:40 +0100)]
[IR] llvm::createMinMaxOp - create integer min/max intrinsics instead of icmp/sel
Based off D148215, when expanding a min/max reduction we should be creating min/max intrinsics directly instead of relying on instcombine to fold them back together.
This patch handles integer min/max cases. Hopefully we can add floating point support soon (at least for fastmath/nnan cases) - but we're missing some of the plumbing to pass the correct FMF to the intrinsic at the moment.
Differential Revision: https://reviews.llvm.org/D148221
Caroline Tice [Wed, 12 Apr 2023 18:13:25 +0000 (11:13 -0700)]
[lldb] Add 'CHECK' to class-type-nullptr-deref.s test.
This test previously relied on just segfaulting or not. This commit adds
a CHECK statement to the test.
Differential Revision: https://reviews.llvm.org/D148151
Chris Jones [Thu, 13 Apr 2023 15:05:26 +0000 (17:05 +0200)]
Use `bytes`, not `str`, to return C++ strings to Python.
`str` must be valid UTF-8, which is not guaranteed for C++ strings.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D147818
Nicole Rabjohn [Thu, 13 Apr 2023 15:01:47 +0000 (11:01 -0400)]
[libcxx][AIX] Reverting XFAILs for test cases after OS update
These test cases were fixed with AIX 73TL1, and are currently passing on AIX machines with that fix. This fix has also been backported to the 7.2 service line. These were tested on a machine with AIX 7.2 TL 5 SP4 installed.
Differential Revision: https://reviews.llvm.org/D148040
Zequan Wu [Tue, 28 Mar 2023 16:55:47 +0000 (12:55 -0400)]
[Coverage] Handle invalid end location of an expression/statement.
Fix a crash when an expression/statement can have valid start location but invalid end location in some situations. For example: https://github.com/llvm/llvm-project/blob/llvmorg-16.0.1/clang/lib/Sema/SemaExprCXX.cpp#L1536
This confuses `CounterCoverageMappingBuilder` when popping a region from region
stack as if the end location is a macro or include location.
Reviewed By: hans, aaron.ballman
Differential Revision: https://reviews.llvm.org/D147073
Utkarsh Saxena [Thu, 13 Apr 2023 10:47:52 +0000 (12:47 +0200)]
[clangd] Use FileEntryRef for canonicalizing filepaths.
Using FileEntry for retrieving filenames give the name used for the last access. FileEntryRef gives the first access name.
Last access name is suspected to change with unrelated changes in clang or the underlying filesystem. First access name gives more stability to the name and makes it easier to track.
Differential Revision: https://reviews.llvm.org/D148213
Vlad Serebrennikov [Thu, 13 Apr 2023 14:48:24 +0000 (17:48 +0300)]
[clang][NFC] Use a different service for CWG issue links
We've been using https://wg21.link for C++ DR status page, but it forwards non-resolved issues to EDG wiki, which is not useful for general public. This patch replace it with https://cplusplus.github.io/CWG/issues/ .
Job Noorman [Thu, 13 Apr 2023 14:38:45 +0000 (16:38 +0200)]
[BOLT][NFC] Fix UB due to unaligned load in DebugStrOffsetsWriter
The following tests fail when enabling UBSan due to an unaligned memory
load:
> runtime error: load of misaligned address 0x620000000643 for type
> 'const uint32_t' (aka 'const unsigned int'), which requires 4 byte
> alignment
BOLT :: AArch64/asm-func-debug.test
BOLT :: AArch64/update-debug-reloc.test
BOLT :: X86/asm-func-debug.test
BOLT :: X86/dwarf5-df-dualcu.test
BOLT :: X86/dwarf5-df-mono-dualcu.test
BOLT :: X86/dwarf5-ftypes-dwp-input-dwo-output.test
BOLT :: X86/dwarf5-locaddrx.test
BOLT :: X86/dwarf5-split-dwarf4-monolithic.test
BOLT :: X86/inlined-function-mixed.test
BOLT :: non-empty-debug-line.test
This patch fixes this by using read32le for the load.
Reviewed By: ayermolo
Differential Revision: https://reviews.llvm.org/D148217
Nikita Popov [Tue, 11 Apr 2023 14:50:59 +0000 (16:50 +0200)]
[Attributor] Convert some tests to opaque pointers (NFC)
Archibald Elliott [Thu, 13 Apr 2023 10:51:59 +0000 (11:51 +0100)]
[ARM] Fix Crashes in fp16/bf16 Inline Asm
We were still seeing occasional crashes with inline assembly blocks
using fp16/bf16 after my previous patches:
- https://reviews.llvm.org/rGff4027d152d0
- https://reviews.llvm.org/rG7d15212b8c0c
- https://reviews.llvm.org/rG20b2d11896d9
It turns out:
- The original two commits were wrong, and we should have always been
choosing the SPR register class, not the HPR register class, so that
LLVM's SelectionDAGBuilder correctly did the right splits/joins.
- The `splitValueIntoRegisterParts`/`joinRegisterPartsIntoValue` changes
from rG20b2d11896d9 are still correct, even though they sometimes
result in inefficient codegen of casts between fp16/bf16 and i32/f32
(which is visible in these tests).
This patch fixes crashes in `getCopyToParts` and when trying to select
`(bf16 (bitconvert (fp16 ...)))` dags when Neon is enabled.
This patch also adds support for passing fp16/bf16 values using the 'x'
constraint that is LLVM-specific. This should broadly match how we pass
with 't' and 'w', but with a different set of valid S registers.
Differential Revision: https://reviews.llvm.org/D147715
Timm Bäder [Wed, 1 Feb 2023 06:53:14 +0000 (07:53 +0100)]
[clang][Interp] Add a failing test case
Timm Bäder [Fri, 27 Jan 2023 08:32:20 +0000 (09:32 +0100)]
[clang][Interp] Don't create global variables more than once
just because we're being told to evaluate it twice. This sometimes
happens when a variable is evaluated again during codegen.
Differential Revision: https://reviews.llvm.org/D147535
Jun Zhang [Thu, 13 Apr 2023 13:33:45 +0000 (21:33 +0800)]
[Docs] Point to the correct bug tracker
Signed-off-by: Jun Zhang <jun@junz.org>
Timm Bäder [Mon, 30 Jan 2023 09:24:07 +0000 (10:24 +0100)]
[clang][Interp] Make sure we have a variable scope for initializers
Otherwise, we run into an assertion when trying to use the current
variable scope while creating temporaries for constructor initializers.
Differential Revision: https://reviews.llvm.org/D147534
David Spickett [Fri, 13 Jan 2023 15:50:37 +0000 (15:50 +0000)]
[lldb] Show register fields using bitfield struct types
This change uses the information from target.xml sent by
the GDB stub to produce C types that we can use to print
register fields.
lldb-server *does not* produce this information yet. This will
only work with GDB stubs that do. gdbserver or qemu
are 2 I know of. Testing is added that uses a mocked lldb-server.
```
(lldb) register read cpsr x0 fpcr fpsr x1
cpsr = 0x60001000
= (N = 0, Z = 1, C = 1, V = 0, TCO = 0, DIT = 0, UAO = 0, PAN = 0, SS = 0, IL = 0, SSBS = 1, BTYPE = 0, D = 0, A = 0, I = 0, F = 0, nRW = 0, EL = 0, SP = 0)
```
Only "register read" will display fields, and only when
we are not printing a register block.
For example, cpsr is a 32 bit register. Using the target's scratch type
system we construct a type:
```
struct __attribute__((__packed__)) cpsr {
uint32_t N : 1;
uint32_t Z : 1;
...
uint32_t EL : 2;
uint32_t SP : 1;
};
```
If this register had unallocated bits in it, those would
have been filled in by RegisterFlags as anonymous fields.
A new option "SetChildPrintingDecider" is added so we
can disable printing those.
Important things about this type:
* It is packed so that sizeof(struct cpsr) == sizeof(the real register).
(this will hold for all flags types we create)
* Each field has the same storage type, which is the same as the type
of the raw register value. This prevents fields being spilt over
into more storage units, as is allowed by most ABIs.
* Each bitfield size matches that of its register field.
* The most significant field is first.
The last point is required because the most significant bit (MSB)
being on the left/top of a print out matches what you'd expect to
see in an architecture manual. In addition, having lldb print a
different field order on big/little endian hosts is not acceptable.
As a consequence, if the target is little endian we have to
reverse the order of the fields in the value. The value of each field
remains the same. For example 0b01 doesn't become 0b10, it just shifts
up or down.
This is needed because clang's type system assumes that for a struct
like the one above, the least significant bit (LSB) will be first
for a little endian target. We need the MSB to be first.
Finally, if lldb's host is a different endian to the target we have
to byte swap the host endian value to match the endian of the target's
typesystem.
| Host Endian | Target Endian | Field Order Swap | Byte Order Swap |
|-------------|---------------|------------------|-----------------|
| Little | Little | Yes | No |
| Big | Little | Yes | Yes |
| Little | Big | No | Yes |
| Big | Big | No | No |
Testing was done as follows:
* Little -> Little
* LE AArch64 native debug.
* Big -> Little
* s390x lldb running under QEMU, connected to LE AArch64 target.
* Little -> Big
* LE AArch64 lldb connected to QEMU's GDB stub, which is running
an s390x program.
* Big -> Big
* s390x lldb running under QEMU, connected to another QEMU's GDB
stub, which is running an s390x program.
As we are not allowed to link core code to plugins directly,
I have added a new plugin RegisterTypeBuilder. There is one implementation
of this, RegisterTypeBuilderClang, which uses TypeSystemClang to build
the CompilerType from the register fields.
Reviewed By: jasonmolenda
Differential Revision: https://reviews.llvm.org/D145580
Alex Zinenko [Thu, 13 Apr 2023 12:58:11 +0000 (14:58 +0200)]
[mlir] fix mismerge in bazel
Timm Bäder [Thu, 13 Apr 2023 12:46:30 +0000 (14:46 +0200)]
[clang][github] Try to fix multi-line py comment
Introduced in
09effa706a026c7ebcc01bf14f9f710cb1a8fa87
Archibald Elliott [Thu, 13 Apr 2023 12:40:18 +0000 (13:40 +0100)]
[NFC][ARM] Fix Type in Test
I landed this test with a typo, the callsites all show `fp16_inner`
returning `half`, so the declaration should too.
Timm Bäder [Fri, 24 Mar 2023 16:05:14 +0000 (17:05 +0100)]
[llvm][github] Add good-first-issue comment to issues
Differential Revision: https://reviews.llvm.org/D146819
Archibald Elliott [Wed, 5 Apr 2023 11:33:46 +0000 (12:33 +0100)]
[AArch64][GISel] Legalize non-power-of-two G_CTTZ
The main change here is to add a `widenScalarToNextPow2` before the
`clampScalar` so that non-power-of-two sizes between 32 and 64 are
turned into s64 count trailing zeroes.
However, if you make the legalisation rules depend on TypeIdx 0 (the
output), then you still get crashes for the s65 testcase, which I solved
by instead flipping the rules around to be about TypeIdx 1 (the input),
with a `scalarSameSizeAs` at the end to tie index 0 to index 1. This,
incidentally, is how things are written for `G_CTLZ`.
Differential Revision: https://reviews.llvm.org/D147602
Alex Zinenko [Tue, 11 Apr 2023 14:06:06 +0000 (14:06 +0000)]
[mlir] add structured (Linalg) transform op matchers
Add a set of transform operations into the "structured" extension of the
Transform dialect that allow one to select transformation targets more
specifically than the currently available matching. In particular, add
the mechanism for identifying the producers of operands (input and init
in destination-passing style) and users of results, as well as
mechanisms for reasoning about the shape of the iteration space.
Additionally, add several transform operations to manipulate parameters
that could be useful to implement more advanced selectors. Specifically,
new operations let one produce and compare parameter values to implement
shape-driven transformations.
New operations are placed in separate files to decrease compilation
time. Some relayering of the extension is necessary to avoid repeated
generation of enums.
Depends on D148013
Depends on D148014
Depends on D148015
Reviewed By: chelini
Differential Revision: https://reviews.llvm.org/D148017
David Spickett [Fri, 13 Jan 2023 15:50:08 +0000 (15:50 +0000)]
[lldb] Read register fields from target XML
This teaches ProcessGDBRemote to look for "flags" nodes
in the target XML that tell you what fields a register has.
https://sourceware.org/gdb/onlinedocs/gdb/Target-Description-Format.html
It will check for various invalid inputs like:
* Flags nodes with 0 fields in them.
* Start or end being > the register size.
* Fields that overlap.
* Required properties not being present (e.g. no name).
* Flag sets being redefined.
If anything untoward is found, we'll just drop the field or the
flag set altogether. Register fields are a "nice to have" so LLDB
shouldn't be crashing because of them, instead just log anything
we throw away. So the user can fix their XML/file a bug with their
vendor.
Once that is done it will sort the fields and pass them to
the RegisterFields class I added previously.
There is no way to see these fields yet, so tests for this code
will come later when the formatting code is added.
The fields are stored in a map of unique pointers on the
ProcessGDBRemote class. It will give out raw pointers on the
assumption that the GDB process lives longer than the users
of those pointers do. Which means RegisterInfo is still a trivial struct
but we are properly destroying the fields when the GDB process ends.
We can't store the fields directly in the map because adding new
items may cause its storage to be reallocated, which would invalidate
pointers we've already given out.
Reviewed By: jasonmolenda, JDevlieghere
Differential Revision: https://reviews.llvm.org/D145574
Stefan Gränitz [Thu, 13 Apr 2023 12:21:20 +0000 (14:21 +0200)]
[lldb][ObjectFileELF] Improve error output for unsupported arch/relocations
ObjectFileELF::ApplyRelocations() considered all 32-bit input objects to be i386 and didn't provide good error messages for AArch32 objects. Please find an example in https://github.com/llvm/llvm-project/issues/61948
While we are here, let' improve the situation for unsupported architectures as well. I think we should report the error here too and not silently fail (or crash with assertions enabled).
Reviewed By: SixWeining
Differential Revision: https://reviews.llvm.org/D147627
Job Noorman [Thu, 13 Apr 2023 12:29:18 +0000 (14:29 +0200)]
[BOLT][NFC] Fix UB due to left shift of negative value
The following test fails when enabling UBSan due to a left shift of a
negative value:
> runtime error: left shift of negative value -2
BOLT :: AArch64/ext-island-ref.s
This patch fixes this by using a multiplication instead of a shift.
Reviewed By: yota9
Differential Revision: https://reviews.llvm.org/D148218
Nicolas Vasilache [Tue, 4 Apr 2023 15:17:19 +0000 (08:17 -0700)]
[mlir][Linalg] Fix hoist padding through scf.for iter_arg
Previously, hoisting through an iter_arg would mistakenly yield the unpadded value and
cast it to the padded value.
This was incorrect and resulted in out-of-bounds accesses.
The correct formulation is to yield the padded value and extract a smaller dynamic slice
out of it.
Differential Revision: https://reviews.llvm.org/D148173
David Spickett [Wed, 12 Apr 2023 13:02:45 +0000 (14:02 +0100)]
[llvm][readobj] Add AArch64 SME and SME2 note types
These are used to store new state added by the Scalable Matrix
Extension which is documented in
https://developer.arm.com/documentation/ddi0616/aa/.
The values match those defined by Linux, see:
https://github.com/torvalds/linux/blob/
e62252bc55b6d4eddc6c2bdbf95a448180d6a08d/include/uapi/linux/elf.h#L435
The ZT register(s) are added by SME2 which is not yet publicly
documented but has support in LLVM and Linux already.
Also added descriptions for SVE and PAC_MASK notes since those
were missing.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D148126
Jorge Pinto Sousa [Thu, 13 Apr 2023 12:14:14 +0000 (08:14 -0400)]
Make 'static assertion failed' diagnostics point to the static assertion expression
"static assertion failed" pointed to the static_assert token and
then underlined the static assertion expression:
<source>:3:1: error: static assertion failed
static_assert(false);
^ ~~~~~
1 error generated.
See Godbolt: https://godbolt.org/z/r38booz59
Now it points to and highlights the assertion expression.
Fixes https://github.com/llvm/llvm-project/issues/61951
Differential Revision: https://reviews.llvm.org/D147745
Timm Bäder [Thu, 13 Apr 2023 10:59:38 +0000 (12:59 +0200)]
[clang][NFC] More range for loops in TextDiagnostic.cpp
Timm Bäder [Wed, 12 Apr 2023 12:37:39 +0000 (14:37 +0200)]
[clang][NFC] Fix comment typo
Kadir Cetinkaya [Wed, 12 Apr 2023 19:54:05 +0000 (21:54 +0200)]
[include-cleaner] Handle incomplete template specializations
Instantiation pattern is null for incomplete template types and using
specializaiton decl results in not seeing re-declarations.
Differential Revision: https://reviews.llvm.org/D148158
David Spickett [Mon, 19 Dec 2022 11:58:15 +0000 (11:58 +0000)]
[lldb] Add dummy field to RegisterInfo for register flags use later
This structure is supposed to be trivial, so we cannot simply do
"= nullptr;" on the new member. Doing that means you are non trivial,
regardless of whether you emulate the previously implied constructor somehow.
The next option is to update every use of brace initialisation.
Given that this is some hundreds of lines, this change just adds a dummy
pointer that is set to nullptr. Subsequent changes will actually use that
to point to register flags information.
Note: This change is not clang-format-ted because it changes a bunch of
areas that are not themselves formatted. It would just add noise.
Reviewed By: jasonmolenda, JDevlieghere
Differential Revision: https://reviews.llvm.org/D145568
Simon Pilgrim [Thu, 13 Apr 2023 10:54:44 +0000 (11:54 +0100)]
[TTI][X86] getMinMaxCost - use existing float minnum/maxnum intrinsic cost values instead of maintaining a duplicate cost table
Without fastmath (nnan) flags, minnum/maxnum must perform isnan handling as well as fmin/fmax - meaning the costs are notably higher, this is correctly handled in getIntrinsicInstrCost but was missing from the getMinMaxCost cost tables (which assumed fastmath).
Followup to
63c3895327839ba5b57f5b99ec9e888abf976ac6 which handled the integer cases
David Green [Thu, 13 Apr 2023 10:57:32 +0000 (11:57 +0100)]
[ARM] Replace some uses of -mcpu=cortex-m33 with architectures features. NFC
This adjusts some of the tests to use the architecture features directly as
opposed to -mcpu=cortex-m33 names.
Alex Zinenko [Wed, 12 Apr 2023 09:18:25 +0000 (09:18 +0000)]
[mlir] LLVM lowering: don't use calling convention in op returns
Conversions to the LLVM dialect have an option to use the "bare pointer"
calling convention that converts memref types differently than the
default convention. It has crept into the conversion of operations that
are not related to calls but do require multiresult-to-struct packing.
Use a similar mechanism for the latter without using the calling
convention.
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D148086
LLVM GN Syncbot [Thu, 13 Apr 2023 10:55:22 +0000 (10:55 +0000)]
[gn build] Port
6ea45e3007b8
David Spickett [Fri, 5 Aug 2022 14:40:31 +0000 (14:40 +0000)]
[lldb] Add RegisterFlags class
This models the "flags" node from GDB's target XML:
https://sourceware.org/gdb/onlinedocs/gdb/Target-Description-Format.html
This node is used to describe the fields of registers like cpsr on AArch64.
RegisterFlags is a class that contains a list of register fields.
These fields will be extracted from the XML sent by the remote.
We assume that there is at least one field, that the fields are
sorted in descending order and do not overlap. That will be
enforced by the XML processor (the GDB client code in our case).
The fields may not cover the whole register. To account for this
RegisterFields will add anonymous padding fields so that
sizeof(all fields) == sizeof(register). This will save a lot
of hasssle later.
Reviewed By: jasonmolenda, JDevlieghere
Differential Revision: https://reviews.llvm.org/D145566
Quentin Colombet [Wed, 5 Apr 2023 14:14:18 +0000 (16:14 +0200)]
[mlir][TransformDialect] Simplify the lowering of pack/unpack when these are just pad/unpad
This patch recognizes when tensor.pack/unpack operations are simple
tensor.pad/unpad (a.k.a. tensor.extract_slice) and lowers them in a simpler
sequence of instruction.
For pack, instead of doing:
```
pad
expand_shape
transpose
```
we do
```
pad
insert_slice
```
For unpack, instead of doing:
```
transpose
collapse_shape
extract_slice
```
we do
```
extract_slice
```
Note: returning nullptr for the transform dialect is fine. The related
handles are just ignored by the following transformation.
Differential Revision: https://reviews.llvm.org/D148159
Nicolas Vasilache [Thu, 13 Apr 2023 10:04:26 +0000 (03:04 -0700)]
[mlir][Tensor] Drop SplitPaddingPatterns.
These old patterns are not in use in either MLIR or downstream projects except for one test.
Additionally this is redundant with logic in the tensor.pad tiling implementation.
Drop SplitPaddingPatterns to reduce entropy.
Differential Revision: https://reviews.llvm.org/D148207
Simon Pilgrim [Thu, 13 Apr 2023 10:17:37 +0000 (11:17 +0100)]
[TTI] Remove unnecessary default CostKind args from getExtendedReductionCost/getMulAccReductionCost wrappers. NFC.
We should only ever call these from the TargetTransformInfo interface, which provides all the args.
Simon Pilgrim [Thu, 13 Apr 2023 10:07:55 +0000 (11:07 +0100)]
[TTI] getExtendedReductionCost - replace std::optional<FastMathFlags> args with FastMathFlags
Followup to D148149 where it was noticed that the std::optional wrapper wasn't helping with anything (we can just use an empty FastMathFlags()).
Haojian Wu [Thu, 6 Apr 2023 08:11:46 +0000 (10:11 +0200)]
[clangd] Fix a nullptr-dereference crash in computeIncludeCleanerFindings.
Be more robust, we shuold not crash when we cannot find the corresponding token from the
tokenbuffer.
Differential Revision: https://reviews.llvm.org/D147686
Ingo Müller [Tue, 11 Apr 2023 13:34:37 +0000 (13:34 +0000)]
[mlir] Make 1:N type conversion tests less brittle.
They had previously not followed the best practices; I must have
commited these in a rush. In particular, they used hard-coded SSA names
instead of patterns. This patch changes that, uses CHECK-DAG more
instead of CHECK-NEXT, and makes all function names unique.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D148012
Haojian Wu [Thu, 13 Apr 2023 10:01:51 +0000 (12:01 +0200)]
[include-fixer] Add the missing variant header to the STL header list.
Krasimir Georgiev [Thu, 13 Apr 2023 10:03:37 +0000 (10:03 +0000)]
[clang] fix an unused variable warning after
9d0b55f0e4ca55d04ee8abfdf021913ea3c30082
Congcong Cai [Thu, 13 Apr 2023 09:56:09 +0000 (11:56 +0200)]
[WebAssembly] `AsmTypeCheck` support to br instr
This PR introduces the `BrStack` member to store the info about
`loop`, `block`, `if` and `try`. It can check whether `br` immediate number
out of range.
Reviewed By: aheejin
Differential Revision: https://reviews.llvm.org/D148054
Simon Pilgrim [Thu, 13 Apr 2023 09:42:36 +0000 (10:42 +0100)]
[TTI] getMinMaxReductionCost - add FastMathFlag argument
Similar to the getArithmeticReductionCost / getExtendedReductionCost calls (which really don't need to use std::optional<>).
This will be necessary to correct recognize fast/nnan fmax/fmul reductions which can avoid nan handling - which will allow us to remove the fmax/fmin special case in X86TTIImpl::getMinMaxCost and use getIntrinsicInstrCost like we do for integer reductions (
63c3895327839ba5b57f5b99ec9e888abf976ac6).
Differential Revision: https://reviews.llvm.org/D148149
Jun Zhang [Thu, 13 Apr 2023 08:42:10 +0000 (16:42 +0800)]
[InstCombine] icmp(X | OrC, C) --> icmp(X, 0)
We can eliminate the or operation based on the predicate and the
relation between OrC and C.
sge: X | OrC s>= C --> X s>= 0 iff OrC s>= C s>= 0
sgt: X | OrC s> C --> X s>= 0 iff OrC s> C s>= 0
sle: X | OrC s<= C --> X s< 0 iff OrC s> C s>= 0
slt: X | OrC s< C --> X s< 0 iff OrC s>= C s>= 0
Alive2 links:
sge: https://alive2.llvm.org/ce/z/W-6FHE
sgt: https://alive2.llvm.org/ce/z/TKK2yJ
sle: https://alive2.llvm.org/ce/z/vURQGM
slt: https://alive2.llvm.org/ce/z/JAsVfw
Related issue: https://github.com/llvm/llvm-project/issues/61538
Signed-off-by: Jun Zhang <jun@junz.org>
Differential Revision: https://reviews.llvm.org/D147597
Jun Zhang [Thu, 13 Apr 2023 08:42:01 +0000 (16:42 +0800)]
Add baseline tests for D147597
Signed-off-by: Jun Zhang <jun@junz.org>
Alexis Engelke [Wed, 12 Apr 2023 16:53:26 +0000 (18:53 +0200)]
[LegacyPM] Reduce number of calls to getName
Repeatedly calling getName adds some overhead, which can be easily
avoided by querying the name just once per function. The improvements
are rather small (~0.5% back-end time in a compile-time optimized
setting), but also very easy to achieve.
Note that getting the name should be entirely avoidable in the common
case, but would require more substantial changes.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D148145
Richard Sandiford [Wed, 12 Apr 2023 17:42:12 +0000 (18:42 +0100)]
[clang] Bump AS_GNU to 1
Following a suggestion from Erich in https://reviews.llvm.org/D148101,
this patch bumps AS_GNU to 1 so that syntax 0 is invalid. It also
asserts that the syntax is in range.
Differential Revision: https://reviews.llvm.org/D148148
Richard Sandiford [Tue, 11 Apr 2023 17:25:34 +0000 (18:25 +0100)]
[clang] Fix FIXME in isAlignasAttribute()
AttributeCommonInfo::isAlignasAttribute() was used in one place:
isCXX11Attribute(). The intention was for isAlignasAttribute()
to return true for the C++ alignas keyword. However, as a FIXME
noted, the function also returned true for the C _Alignas keyword.
This meant that isCXX11Attribute() returned true for _Alignas as
well as for alignas.
AttributeCommonInfos are now always constructed with an
AttributeCommonInfo::Form. We can use that Form to convey whether
a keyword is alignas or not.
The patch uses 1 bit of an 8-bit hole in the current layout
of AttributeCommonInfo. This might not be the best long-term design,
but it should be easy to adapt the layout if necessary (that is,
if other uses are found for the spare bits).
I don't know of a way of testing this (other than grep -c FIXME)
Differential Revision: https://reviews.llvm.org/D148105
Richard Sandiford [Tue, 11 Apr 2023 16:58:56 +0000 (17:58 +0100)]
[clang] Type safety tweak for AttributeCommonInfo::Form
This patch adds static functions for constructing most
AttributeCommonInfo::Forms. Direct construction is only retained where
all fields (currently the syntax and spelling) are specified explicitly.
This is a wash on its own. The purpose is to allow extra fields
to be added to Form without disrupting all callers. In particular,
it allows extra information to be stored about keywords without
affecting non-keyword uses.
No functional change intended.
Differential Revision: https://reviews.llvm.org/D148104
Richard Sandiford [Tue, 11 Apr 2023 16:39:23 +0000 (17:39 +0100)]
[clang] Allow attributes to be constructed from keyword tokens
This patch adds an extra AttributeCommonInfo::Form constructor
for keywords, represented by their TokenKind. This isn't a
win on its own, but it helps with later patches.
No functional change intended.
Differential Revision: https://reviews.llvm.org/D148103
Richard Sandiford [Tue, 11 Apr 2023 15:11:32 +0000 (16:11 +0100)]
[clang] Specify attribute syntax & spelling with a single argument
When constructing an attribute, the syntactic form was specified
using two arguments: an attribute-independent syntax type and an
attribute-specific spelling index. This patch replaces them with
a single argument.
In most cases, that's done using a new Form class that combines the
syntax and spelling into a single object. This has the minor benefit
of removing a couple of constructors. But the main purpose is to allow
additional information to be stored as well, beyond just the syntax and
spelling enums.
In the case of the attribute-specific Create and CreateImplicit
functions, the patch instead uses the attribute-specific spelling
enum. This helps to ensure that the syntax and spelling are
consistent with each other and with the Attr.td definition.
If a Create or CreateImplicit caller specified a syntax and
a spelling, the patch drops the syntax argument and keeps the
spelling. If the caller instead specified only a syntax
(so that the spelling was SpellingNotCalculated), the patch
simply drops the syntax argument.
There were two cases of the latter: TargetVersion and Weak.
TargetVersionAttrs were created with GNU syntax, which matches
their definition in Attr.td, but which is also the default.
WeakAttrs were created with Pragma syntax, which does not match
their definition in Attr.td. Dropping the argument switches
them to AS_GNU too (to match [GCC<"weak">]).
Differential Revision: https://reviews.llvm.org/D148102
Richard Sandiford [Wed, 5 Apr 2023 15:41:30 +0000 (16:41 +0100)]
[clang] Ensure that Attr::Create(Implicit) chooses a valid syntax
The purpose of this patch and follow-on patches is to ensure that
AttributeCommonInfos always have a syntax that is appropriate for
their kind (i.e. that it matches one of the entries in Attr.td).
The attribute-specific Create and CreateImplicit methods had four
overloads, based on their tail arguments:
(1) no extra arguments
(2) an AttributeCommonInfo
(3) a SourceRange
(4) a SourceRange, a syntax, and (where necessary) a spelling
When (4) had a spelling argument, it defaulted to
SpellingNotCalculated.
One disadvantage of this was that (1) and (3) zero-initialized
the syntax field of the AttributeCommonInfo, which corresponds
to AS_GNU. But AS_GNU isn't always listed as a possibility
in Attr.td.
This patch therefore removes (1) and (3) and instead provides
the same functionality using default arguments on (4) (a bit
like the existing default argument for the spelling).
The default syntax is taken from the attribute's first valid
spelling.
Doing that raises the question: what should happen for attributes
like AlignNatural and CUDAInvalidTarget that are only ever created
implicitly, and so have no source-code manifestation at all?
The patch adds a new AS_Implicit "syntax" for that case.
The patch also removes the syntax argument for these attributes,
since the syntax must always be AS_Implicit.
For similar reasons, the patch removes the syntax argument if
there is exactly one valid spelling.
Doing this means that AttributeCommonInfo no longer needs the
single-argument constructors. It is always given a syntax instead.
Differential Revision: https://reviews.llvm.org/D148101
Martin Storsjö [Thu, 30 Mar 2023 12:46:56 +0000 (15:46 +0300)]
[compiler-rt] [test] [builtins] Pass the right parameters for linking with -nodefaultlibs on mingw targets
The clang-cl/MSVC case is handled above, thus consider win32 && !is_msvc
to be mingw.
This matches the list of libraries passed by e.g. the libcxx build, when
using -nodefaultlibs.
Differential Revision: https://reviews.llvm.org/D147647
Martin Storsjö [Tue, 4 Apr 2023 20:28:49 +0000 (20:28 +0000)]
[libunwind] [SEH] Initialize _msContext with RtlCaptureContext
When we initialize the UnwindCursor (unw_cursor_t) based on
an existing Registers object (unw_context_t), we only initialize
a subset of the class.
Fill the struct properly for the current thread with RtlCaptureContext,
followed by overwriting of the subset of registers that we do have
available in the Registers class.
One might think that it's enough to initialize specifically the
registers that we signal availability for with ContextFlags,
however in practice, that's not enough.
This fixes crashes when restoring the context via RtlRestoreContext
(via UnwindCursor::jumpto), via __unw_resume.
Differential Revision: https://reviews.llvm.org/D147636
Martin Storsjö [Sat, 1 Apr 2023 16:37:59 +0000 (19:37 +0300)]
[libunwind] [SEH] Allow setting/getting the register UNW_X86_64_RIP
This fixes libunwind_01.pass.cpp for x86_64 Windows.
Differential Revision: https://reviews.llvm.org/D147635
Martin Storsjö [Wed, 12 Apr 2023 11:01:19 +0000 (11:01 +0000)]
[compiler-rt] [test] [profile] Skip an MSVC-style linker parameter in mingw mode
This parameter isn't essential for the execution of this test, so just
skip it when running tests in mingw mode.
Differential Revision: https://reviews.llvm.org/D148165
Martin Storsjö [Wed, 12 Apr 2023 11:39:33 +0000 (11:39 +0000)]
[compiler-rt] [test] [profile] Mark the without-libc test as unsupported on mingw
Mingw toolchains always end up referencing the malloc symbol due to
the CRT startup files.
Differential Revision: https://reviews.llvm.org/D148166
Martin Storsjö [Wed, 12 Apr 2023 11:04:22 +0000 (11:04 +0000)]
[compiler-rt] [test] [profile] Mark a Windows test as requiring an MSVC target
This test uses lots of lld-link specific linker options that don't
work as such in mingw command lines.
Differential Revision: https://reviews.llvm.org/D148168
Martin Storsjö [Wed, 12 Apr 2023 08:38:05 +0000 (08:38 +0000)]
[compiler-rt] [ubsan] Fix printing of floats in mingw mode
In mingw mode on x86, long doubles are 80 bit - while MSVC mode uses
long doubles that are equal to regular doubles (on all architectures).
In the case of this formatting function, we're calling a MS CRT
provided printf function which interprets long doubles as 64 bit.
Since the long doubles are equal to regular doubles on all MSVC
platforms, just use regular double formatting. For MSVC environments
there's no difference, but for mingw environments, this avoids the
ambiguity.
Differential Revision: https://reviews.llvm.org/D148133
Martin Storsjö [Wed, 12 Apr 2023 08:03:04 +0000 (08:03 +0000)]
[compiler-rt] [test] Pass the mingw specific option for increasing stack size
This passes the same option that was added for MSVC builds in
fb5a24b4f03a7 in the corresponding mingw form too.
This fixes the BVGraph tests in the sanitizer unit tests.
Differential Revision: https://reviews.llvm.org/D148132
Martin Storsjö [Wed, 12 Apr 2023 07:31:34 +0000 (10:31 +0300)]
[libcxx] Rename the now fully private header __std_stream to std_stream.h
When this header now is a fully regular header within the src tree,
give it a more regular name.
Differential Revision: https://reviews.llvm.org/D148072
Max Kazantsev [Thu, 13 Apr 2023 08:43:24 +0000 (15:43 +0700)]
[IRCE] Relax restrictions on IRCE's latch exit count
It seems that existing logic is too strict about latch block exit count.
It is required to be computable, however it is not used in any computations,
and effectively the only thing it is used for is to get the type of computed
exit count.
Sometimes the exit count for latch block is not known, but the loop is still
finite because of other exits, and safe bounds are still computable. In this case,
we miss an opportunity to apply IRCE.
We could instead use a more relaxed version - max symbolic exit count, which,
if exists, is enough to say that the loop is finite, and its type should be good enough.
There is a subtlety with type: we do not support latch count type wider than range
check type. Because of that, we want to have the narrowest type available. So if it
can be computed from latch block immediately, take it. Otherwise, take whatever whole
loop provides and hope that it's type isn't too wide.
Differential Revision: https://reviews.llvm.org/D147910
Reviewed By: danilaml
Serge Pavlov [Thu, 13 Apr 2023 06:56:12 +0000 (13:56 +0700)]
Revert "[symbolizer] Treat invalid address as addr2line does"
This reverts commit
27c4777f41d2ab204c1cf84ff1cccd5ba41354da.
It created problems for testing on Gentoo, see:
https://reviews.llvm.org/rG27c4777f41d2ab204c1cf84ff1cccd5ba41354da#1190273
Reverted until https://reviews.llvm.org/D147652 has been landed.
Nikita Popov [Thu, 13 Apr 2023 08:48:09 +0000 (10:48 +0200)]
[GVN][SimplifyCFG] Add tests for dereferenceable metadata combining (NFC)
David Spickett [Thu, 13 Apr 2023 08:52:06 +0000 (08:52 +0000)]
[LLDB][docs] Remove outdated list of Buildbots
This was out of date and the link to the lldb tag will always be up to date.
Caroline Concatto [Thu, 13 Apr 2023 08:13:10 +0000 (08:13 +0000)]
[AArch64][CodeGen] Use interleave store for streaming compatible functions
The previous patch, D135564, was too conservative to avoid store interleave
for streaming-compatible functions/mode.
In this patch, we allow using the interleave store but using scalable vector.
Reviewed By: david-arm, sdesmalen
Differential Revision: https://reviews.llvm.org/D147040
Johannes de Fine Licht [Thu, 13 Apr 2023 08:27:21 +0000 (08:27 +0000)]
[MLIR][LLVM] Inline LLVM::StackSaveOp and LLVM::StackRestoreOp.
Support LLVM::StackSaveOp and LLVM::StackRestoreOp in the LLVM dialect
inliner in MLIR.
Inserts new LLVM::StackSaveOp and LLVM::StackRestoreOp intrinsics when
dynamic allocas are detected in the inlined blocks. This may result in
multiple saves/restores in the same block if some are already present in
the caller, which is legal IR, but is cleaned up in LLVM. There is not
yet a canonicalization pattern for this on LLVM dialect in MLIR.
Reviewed By: Dinistro
Differential Revision: https://reviews.llvm.org/D148011
Hans Wennborg [Thu, 13 Apr 2023 08:21:11 +0000 (10:21 +0200)]
Fix warn-unsafe-buffer-usage-fixits-pre-increment.cpp for Windows
long is 32-bits on windows, so the test was failing with:
error: cast from pointer to smaller type 'unsigned long' loses
information
see e.g. https://lab.llvm.org/buildbot/#/builders/123/builds/18361
This is a follow-up to D144304
Bing1 Yu [Thu, 13 Apr 2023 08:19:19 +0000 (16:19 +0800)]
[ReachingDefs] make ReachingDefDefaultVal smaller
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D148198
Nicolas Vasilache [Thu, 13 Apr 2023 08:00:23 +0000 (01:00 -0700)]
[mlir][Linalg] NFC - Extract an IndexingUtils from Linalg/Utils
Differential Revision: https://reviews.llvm.org/D148201
Bjorn Pettersson [Wed, 12 Apr 2023 09:01:55 +0000 (11:01 +0200)]
[Transforms][LTO] Remove some redundant includes. NFC
No need to include CallGraphSCCPass.h from the IPO/Inliner.
Also removed the include of LegacyPassManager.h in a couple of files
that do not really depend on that header file.
Differential Revision: https://reviews.llvm.org/D148083
Bjorn Pettersson [Wed, 12 Apr 2023 08:45:22 +0000 (10:45 +0200)]
[opt] Cleanups related to legacy PM deprecation
Remove dead code related to "FPasses". This was a leftover from
commit
7a5332b9b5584ce.
Do not mention -enable-new-pm in error messages. The option does
not exist any longer.
Remove the addPass helper. Only one use remained, so we can just
"inline" it manually to keep the code related to legacy PM a bit
less spread out.
Differential Revision: https://reviews.llvm.org/D148082
Bjorn Pettersson [Tue, 11 Apr 2023 22:13:17 +0000 (00:13 +0200)]
[opt] Remove the ExternalFunctionsPassedConstants pass
This commit is removing the last pieces of AnalysisWrapper.cpp
(including the ExternalFunctionsPassedConstants pass, aka
print-externalfnconstants).
The pass only existed for the legacy PM, and it was not regression
tested. And since the pass did not force the use of the legacy pass
manager there was no simply way to run the pass nowadays, at least
not by using opt.
Differential Revision: https://reviews.llvm.org/D148081
Bjorn Pettersson [Tue, 11 Apr 2023 22:03:44 +0000 (00:03 +0200)]
[opt] Remove the BreakpointPrinter pass
This removed the option print-breakpoints-for-testing in opt, as well
as the related BreakpointPrinter pass.
The functionality only existed for the legacy PM, but was not verified
to be working by any test cases. And the named "llvm.dbg.sp" metadata
that the pass was looking for is not something that I really can find
any information about (unless perhaps if I dive really deep into the
commit history), so not sure exactly if this functionality has been
relevant for several years.
Differential Revision: https://reviews.llvm.org/D148080
Nikita Popov [Thu, 13 Apr 2023 07:55:35 +0000 (09:55 +0200)]
[FunctionAttrs] Add another nounwind test (NFC)
Hans Wennborg [Thu, 13 Apr 2023 07:53:06 +0000 (09:53 +0200)]
Revert "ASan: move allocator base to avoid conflict with high-entropy ASLR for x86-64 Linux"
This broke lit tests on Mac, see comment on the code review.
> Users have discovered [*] that when CONFIG_ARCH_MMAP_RND_BITS == 32,
> it will frequently conflict with ASan's allocator on x86-64 Linux, because the
> PIE program segment base address of 0x555555555554 plus an ASLR shift of up to
> ((2**32) * 4K == 0x100000000000) will sometimes exceed ASan's hardcoded
> base address of 0x600000000000. We fix this by simply moving the allocator base
> to 0x500000000000, which is below the PIE program segment base address. This is
> cleaner than trying to move it to another location that is sandwiched between
> the PIE program and library segments, because if either of those grow too large,
> it will collide with the allocator region.
>
> Note that we will never need to change this base address again (unless we want to increase
> the size of the allocator), because ASLR cannot be set above 32-bits for x86-64 Linux (the
> PIE program segment and library segments would collide with each other; see also
> ARCH_MMAP_RND_BITS_MAX in https://github.com/torvalds/linux/blob/master/arch/x86/Kconfig).
>
> [*] see https://b.corp.google.com/issues/
276925478
> and https://groups.google.com/a/google.com/g/chrome-os-gardeners/c/BbfzCP3dEeo/m/h3C_vVUxCQAJ
>
> Differential Revision: https://reviews.llvm.org/D147984
This reverts commit
6f42b97a29a5872c115029c615f55f33419a4c1f.
Balázs Kéri [Thu, 13 Apr 2023 06:53:46 +0000 (08:53 +0200)]
[clang][ASTImporter] Fix import of typedef with unnamed structures
Fix crash in ASTImporter related to import of unnamed structures and typedefs
to these maybe with pointer.
There was a series of problems exposed by https://reviews.llvm.org/D133468
(commit
69a6417406a1b0316a1fa6aeb63339d0e1d2abbd) in the ASTImporter breaking
cross-translation unit analysis. This change fixes one of the problems exposed
by that change for importing unnamed structures. The problem was
discovered when running clang static analysis on open source projects
using cross-translation unit analysis.
Simple test command. Produces crash without change, passes all tests
with change.
```
ninja ASTTests && ./tools/clang/unittests/AST/ASTTests
--gtest_filter="*/*ImportAnonymousStruct/0"
```
Formatted crash stack:
```
ASTTests: <root>/clang/lib/AST/ASTContext.cpp:4787:
clang::QualType clang::ASTContext::getTypedefType(const clang::TypedefNameDecl*,
clang::QualType) const: Assertion `hasSameType(Decl->getUnderlyingType(), Underlying)' failed.
...
#9 <addr> clang::ASTContext::getTypedefType(clang::TypedefNameDecl const*, clang::QualType) const
<root>/clang/lib/AST/ASTContext.cpp:4789:26
<root>/clang/lib/AST/ASTImporter.cpp:1374:71
<root>/tools/clang/include/clang/AST/TypeNodes.inc:75:1
<root>/clang/lib/AST/ASTImporter.cpp:8663:8
```
Reviewed By: donat.nagy
Differential Revision: https://reviews.llvm.org/D145868