Marek Olšák [Wed, 21 Dec 2016 14:16:54 +0000 (15:16 +0100)]
radeonsi: assume that a TES without POSITION precedes GS
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 21 Dec 2016 14:15:30 +0000 (15:15 +0100)]
radeonsi: unduplicate VS color export code
it's exactly the same as the other ones
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 13 Dec 2016 17:42:08 +0000 (18:42 +0100)]
radeonsi: clean up more HAVE_LLVM #ifdefs
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 13 Dec 2016 17:37:08 +0000 (18:37 +0100)]
gallium/radeon: clean up HAVE_LLVM #ifdefs in r600_get_llvm_processor_name
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Kenneth Graunke [Fri, 6 Jan 2017 08:09:53 +0000 (00:09 -0800)]
i965: Properly flush in hsw_pause_transform_feedback().
Fixes a number of transform feedback tests when run with Linux 4.8,
which allows us to use the MI_LOAD_REGISTER_REG command, at which point
we started using this new broken path.
ES3-CTS.functional.transform_feedback.array_element.interleaved.lines.*
and Piglit's arb_transform_feedback2/draw-auto are both fixed by this
patch, for example.
Thanks to Chris Wilson for catching this mistake!
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99030
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Fri, 6 Jan 2017 09:13:24 +0000 (01:13 -0800)]
i965: Fix texturing in the vec4 TCS and GS backends.
We were failing to zero m0.2 of the sampler message header for TCS and
GS messages in the simple case. fs_generator has done this for about
a year now, but we missed it in vec4_generator.
Fixes ES31-CTS.core.texture_cube_map_array.sampling,
GL45-CTS.texture_cube_map_array.sampling, and many
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler subtests:
- dynamically_uniform.tessellation_control.isampler3d
- dynamically_uniform.tessellation_control.isamplercube
- dynamically_uniform.tessellation_control.sampler2d
- dynamically_uniform.tessellation_control.usamplercube
- dynamically_uniform.tessellation_control.sampler2darray
- dynamically_uniform.tessellation_control.isampler2darray
- dynamically_uniform.tessellation_control.usampler3d
- dynamically_uniform.tessellation_control.usampler2darray
- dynamically_uniform.tessellation_control.usampler2d
- dynamically_uniform.tessellation_control.sampler3d
- dynamically_uniform.tessellation_control.samplercube
- dynamically_uniform.tessellation_control.isampler2d
- uniform.tessellation_control.isampler3d
- uniform.tessellation_control.isamplercube
- uniform.tessellation_control.usampler2d
- uniform.tessellation_control.usampler3d
- uniform.tessellation_control.sampler2darray
- uniform.tessellation_control.isampler2darray
- uniform.tessellation_control.usampler2darray
- uniform.tessellation_control.sampler2d
- uniform.tessellation_control.usamplercube
- uniform.tessellation_control.sampler3d
- uniform.tessellation_control.samplercube
- uniform.tessellation_control.isampler2d
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tim Rowley [Wed, 4 Jan 2017 22:54:00 +0000 (16:54 -0600)]
swr: [rasterizer core] rename OutputMerger functions
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Thu, 22 Dec 2016 00:06:42 +0000 (18:06 -0600)]
swr: [rasterizer core] fix SIMD16 Transpose_16_16
Fix incorrect swizzling in SIMD16 Transpose_16_16 breaking the
two-channel 16-bpc formats like R16G16_FLOAT.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Thu, 22 Dec 2016 00:01:56 +0000 (18:01 -0600)]
swr: [rasterizer core] fix SIMD16 output merger
Honor the colorHottileEnable mask when accessing colorBuffer pointers.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Wed, 21 Dec 2016 23:59:44 +0000 (17:59 -0600)]
swr: [rasterizer core] fix SIMD16 PackTraits pack() and unpack()
Fix routines for 8-bit and 16-bit formats used by optimized tile store.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Mon, 19 Dec 2016 21:25:52 +0000 (15:25 -0600)]
swr: [rasterizer core] fix SIMD16 transpose functions
Fixed Transpose_16 methods of following formats:
Transpose8_8_8_8
Transpose8_8
Transpose32_32
Transpose16_16_16_16
Transpose16_16_16
Transpose16_16
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Wed, 14 Dec 2016 01:01:08 +0000 (19:01 -0600)]
swr: [rasterizer core] whitespace adjustments
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Kenneth Graunke [Thu, 5 Jan 2017 18:46:39 +0000 (10:46 -0800)]
i965: Don't set EmitNoMainReturn.
A while ago, we stopped using Luca's GLSL IR lower_jumps pass in favor
of nir_lower_returns(). Marek's commit
d3cb79e043338b0e55a3fba8df652f3
put it in do_common_optimization, which resulted in us calling it again.
Dropping the EmitNoMainReturn setting makes us skip that pass again.
Apparently that pass doesn't work properly, because this fixes Piglit's
tests/spec/glsl-1.10/execution/vs-nested-return-sibling-loop.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99287
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Eric Anholt [Thu, 5 Jan 2017 23:37:14 +0000 (15:37 -0800)]
vc4: Rewrite T image handling based on calling the LT handler.
The T images are composed of effectively swizzled-around blocks of LT (4x4
utile) images, so we can reduce the t_utile_address() calls by 16x by
calling into the simpler LT loop.
This also adds support for calling down with non-utile-aligned
coordinates, which will be part of lifting the utile alignment requirement
on our callers and avoiding the RMW on non-utile-aligned stores.
Improves 1024x1024 TexSubImage by 2.55014% +/- 1.18584% (n=46)
Improves 1024x1024 GetTexImage by 2.242% +/- 0.880954% (n=32)
Eric Anholt [Thu, 5 Jan 2017 23:23:32 +0000 (15:23 -0800)]
vc4: Move the utile_width/height functions to header inlines.
I want these inlined in the callers, particularly with the tiling
changes coming up, but we're not building with lto so some caller
would suffer.
Eric Anholt [Thu, 5 Jan 2017 20:15:30 +0000 (12:15 -0800)]
vc4: Make the load/store utile functions static.
They don't have any other callers outside of this file, and I'm hoping
they get inlined soon.
Eric Anholt [Wed, 4 Jan 2017 20:40:37 +0000 (12:40 -0800)]
vc4: Simplify the load/store utile functions.
They now have less of a dependency on the cpp, and don't have to do a
divide.
Hacking up mesa-demos teximage to do only one subtest and not draw
points, I saw 1024x1024 glTexSubImage2D() improve by 4.86939% +/-
1.40408% (n=30) and glGetTexImage() by 2.18978% +/- 0.140268% (n=5).
Eric Anholt [Wed, 4 Jan 2017 19:57:30 +0000 (11:57 -0800)]
vc4: Reuse a list function to simplify bufmgr code.
Eric Anholt [Wed, 4 Jan 2017 19:24:31 +0000 (11:24 -0800)]
vc4: Flush the job early if we're referencing too many BOs.
If we get up toward 256MB (or whatever the CMA area size is),
VC4_GEM_CREATE will start throwing errors. Even if we don't trigger
that, when we flush the kernel's BO allocation for the CLs or bin
memory may end up throwing an error, at which point our job won't get
rendered at all.
Just flush early (half of maximum CMA size) so that hopefully we never
get to that point.
Timothy Arceri [Tue, 8 Nov 2016 22:49:59 +0000 (09:49 +1100)]
st/mesa/glsl: move SamplerTargets to gl_program
This will help allow us to simplify the handling of samplers by
storing them in a single location rather than duplicating them in
both gl_linked_shader and gl_program.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Tue, 8 Nov 2016 23:00:09 +0000 (10:00 +1100)]
st/mesa/glsl: set SamplersUsed directly in gl_program
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Fri, 4 Nov 2016 06:05:22 +0000 (17:05 +1100)]
mesa/glsl: set sampler units directly in gl_program
Now that we create gl_program earlier there is no need to mess about
copying things to gl_linked_shader then to gl_program.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Fri, 4 Nov 2016 05:41:30 +0000 (16:41 +1100)]
mesa: simplify sampler setting code
There is no need to loop over active samplers the code above this
would have already exited if the sampler was inactive, or errored
if the count was larger than the uniforms array size.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Fri, 4 Nov 2016 00:40:10 +0000 (11:40 +1100)]
mesa/glsl: set num_textures per stage directly in shader_info
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Thu, 3 Nov 2016 22:25:36 +0000 (09:25 +1100)]
mesa: make _CurrentFragmentProgram a gl_program struct pointer
Making this point to a gl_program struct rather than a gl_shader_program
struct will allow use to later also make the CurrentProgram array hold
gl_program structs which in turn will allow for code simpilifcation.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Fri, 4 Nov 2016 05:04:01 +0000 (16:04 +1100)]
i965: stop passing gl_shader_program to the precompile and codegen functions
We no longer need it.
While we are at it we mark the vs, gs, and wm codegen functions as static.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Wed, 9 Nov 2016 12:50:07 +0000 (23:50 +1100)]
mesa/glsl: remove hack to reset sampler units to zero
Now that we have the is_arb_asm flag we can just skip the
initialisation.
V2: remove hack from standalone compiler where it was never
needed since it only compiles glsl shaders.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Wed, 9 Nov 2016 12:44:39 +0000 (23:44 +1100)]
i965: make use of new is_arb_asm flag
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Wed, 9 Nov 2016 12:38:46 +0000 (23:38 +1100)]
st/mesa/glsl: add new is_arb_asm flag in gl_program
Set the flag via the _mesa_init_gl_program() and NewProgram()
helpers.
In i965 we currently check for the existance of gl_shader_program
to decide if this is an ARB assembly style program or not.
Adding a flag makes the code clearer and will help removes a
dependency on gl_shader_program in the i965 codegen functions.
Also this will allow use to skip initialising sampler units for
linked shaders, we currently memset it to zero again during linking.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Tue, 8 Nov 2016 01:07:12 +0000 (12:07 +1100)]
i965: pass gl_program directly to brw_compile_tes()
This is the only thing we use from gl_shader_program so pass it directly.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Mon, 7 Nov 2016 09:54:45 +0000 (20:54 +1100)]
i965: stop passing gl_shader_program to brw_nir_setup_glsl_uniforms()
We can now just get the data needed from the gl_shader_program_data
pointer in gl_program.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Sat, 5 Nov 2016 12:35:11 +0000 (23:35 +1100)]
i965: pass gl_program to brw_upload_ubo_surfaces()
There is no need to pass gl_linked_shader anymore.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Fri, 4 Nov 2016 22:34:52 +0000 (09:34 +1100)]
i965: stop passing gl_shader_program to brw_assign_common_binding_table_offsets()
We now get everything we need directly from gl_program so there is
no need for this.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Fri, 4 Nov 2016 23:10:02 +0000 (10:10 +1100)]
st/mesa/glsl/i965: move ShaderStorageBlocks to gl_program
Having it here rather than in gl_linked_shader allows us to simplify
the code.
Also it is error prone to depend on the gl_linked_shader for programs
in current use because a failed linking attempt will free infomation
about the current program. In i965 we could be trying to recompile
a shader variant but may have lost some required fields.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Fri, 4 Nov 2016 22:24:51 +0000 (09:24 +1100)]
st/mesa/glsl/i965: set num_ssbos directly in shader_info
Here we also remove the duplicate field in gl_linked_shader and always
get the value from shader_info instead.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Fri, 4 Nov 2016 21:55:57 +0000 (08:55 +1100)]
st/mesa/glsl/i965: move per stage UniformBlocks to gl_program
This will help allow us to store pointers to gl_program structs in the
CurrentProgram array resulting in a bunch of code simplifications.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Fri, 4 Nov 2016 21:44:22 +0000 (08:44 +1100)]
st/mesa/glsl/i965: set num_ubos directly in shader_info
This also removes the duplicate field in gl_linked_shader, and
gets num_ubos from shader_info instead.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Fri, 4 Nov 2016 09:02:21 +0000 (20:02 +1100)]
st/mesa/glsl/i965: move ImageUnits and ImageAccess fields to gl_program
Having it here rather than in gl_linked_shader allows us to simplify
the code.
Also it is error prone to depend on the gl_linked_shader for programs
in current use because a failed linking attempt will free infomation
about the current program. In i965 we could be trying to recompile
a shader variant but may have lost some required fields.
We drop the memset on ImageUnits because gl_program is already
created using rzalloc().
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Mon, 7 Nov 2016 06:08:23 +0000 (17:08 +1100)]
i965: get InfoLog and LinkStatus via the pointer in gl_program
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Mon, 7 Nov 2016 05:43:39 +0000 (16:43 +1100)]
i965: get shared_size from shader_info rather than gl_shader_program
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Mon, 7 Nov 2016 00:43:47 +0000 (11:43 +1100)]
i965: stop depending on gl_shader_program for brw_compute_vue_map() params
This removes another dependency on gl_shader_program from the codegen functions,
this will help allow us to use gl_program for the CurrentProgram array rather
than gl_shader_program.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Timothy Arceri [Fri, 4 Nov 2016 03:09:35 +0000 (14:09 +1100)]
i965: pass gl_program to the brw_*_debug_recompile() functions
Rather then passing gl_shader_program.
The only field use was Name which is the same as the Id field in
gl_program.
For wm and vs we also make the functions static and move them before
the codegen functions.
This change reduces the codegen functions dependency on gl_shader_program.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Roland Scheidegger [Thu, 5 Jan 2017 23:46:15 +0000 (00:46 +0100)]
gallivm: (trivial) fix typo bug with small AoS format unpacking
Fix typo using wrong (uninitialized) build context introduced by
4634cb5921b985f04f2daf00cda2d28036143bd3. (This only affects very rare
small packed formats which have a PIPE_SWIZZLE_0 channel, such as
r4a4, which is never used by mesa/st. Nevertheless it broke lp_test_format.)
Roland Scheidegger [Wed, 21 Dec 2016 03:56:01 +0000 (04:56 +0100)]
gallivm: implement aos unpack (to unorm8) for small unorm formats
Using bit replication. This path now resembles something which might make
sense. (The logic was mostly copied from llvmpipe fs backend.)
I am not convinced though it is actually faster than SoA sampling (actually
I'm quite certain it's always a loss with AVX).
With SoA it's just shift/mask/cvt/mul for getting the colors, whereas
there's still roughly 3 shifts, 3 or/and per channel for AoS
(i.e. for SoA it's exactly the same as it would be for a rgba8 format,
whereas the extra effort for AoS is significant). The filtering
might still be faster (albeit with FMA the instruction count gets down
quite a bit there on the SoA float filtering path on new cpus). And those
small unorm formats often don't have an alpha channel (which makes things
worse relatively for AoS path).
(This also fixes a trivial bug in the llvmpipe fs code this was derived
from, albeit it was only relevant for 4-bit channels.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Wed, 21 Dec 2016 03:55:34 +0000 (04:55 +0100)]
gallivm: optimize lp_build_unpack_arith_rgba_aos slightly
This code uses a vector shift which has to be emulated on x86 unless
there's AVX2. Luckily in some cases we can actually avoid the shift
altogether, so do that.
Also make sure we hit the fast lp_build_conv() path when applicable,
albeit that's quite the hack...
That said, this path is taken for AoS sampling for small unorm (smaller
than rgba8) formats, and it is completely hopeless even with those
changes, with or without AVX.
(Probably should have some code similar to the one in the llvmpipe fs
backend code, using bit replication to extend to rgba8888 - rounding
is not quite 100% accurate but if it's good enough there it should be
here as well.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Wed, 21 Dec 2016 03:53:41 +0000 (04:53 +0100)]
gallivm: use 2 srcs for 32->16bit conversions in lp_bld_conv_auto
If we only feed one source vector at a time, we cannot use pack intrinsics
(as we only have a 64bit destination dst vector). lp_bld_conv_auto is
specifically designed to alter the length and number of destination vectors,
so this works just fine (if we use single source vectors at a time, afterwards
we immediately reassemble the vectors).
For AVX though this isn't really possible, since we expect 128bit output
already for a single 256bit input. (One day we should handle AVX2 which again
would need multiple inputs, however there's the problem that we get different
ordered output there and we don't want to reorder, so would need to be able
to tell build_conv to handle upper and lower halfs independently.)
A similar strategy would probably work for 32->8bit too (if it doesn't hit
the special case) but I'm going to try something different for that...
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Wed, 21 Dec 2016 03:52:16 +0000 (04:52 +0100)]
llvmpipe: (trivial) minimally simplify mask construction
simd instruction sets usually have comparisons for equal, not unequal.
So use a different comparison against the mask itself - which also means
we don't need a all-zero as well as a all-one (for the pxor) reg.
Also add code to avoid scalar expansion of i1 values which we definitely
shouldn't do. There's problems with this though with llvm select
interaction, so it's disabled (basically using llvm select instead of
intrinsics may still produce atrocious code, even in cases where we
figured it should not, albeit I think this could probably be fixed
with some better selection of optimization passes, but I have zero
idea there really).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Lionel Landwerlin [Fri, 23 Dec 2016 17:47:40 +0000 (17:47 +0000)]
anv: fix multiple creation with internal failure
The specification section 9.4 says :
When an application attempts to create many pipelines in a single
command, it is possible that some subset may fail creation. In that
case, the corresponding entries in the pPipelines output array will
be filled with VK_NULL_HANDLE values. If any pipeline fails
creation (for example, due to out of memory errors), the
vkCreate*Pipelines commands will return an error code. The
implementation will attempt to create all pipelines, and only
return VK_NULL_HANDLE values for those that actually failed.
Fixes :
dEQP-VK.api.object_management.alloc_callback_fail_multiple.graphics_pipeline
dEQP-VK.api.object_management.alloc_callback_fail_multiple.compute_pipeline
v2: C is hard let's go shopping (Lionel)
v3: Remove unnecessary condition in for loops (Lionel)
v4: Document why we return on first failure (Eduardo)
Move i declaration inside for() (Eduardo)
v5: Move array cleanup out of loop (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tim Rowley [Thu, 5 Jan 2017 13:29:22 +0000 (07:29 -0600)]
swr: [rasterizer core/common/jitter] gl_double support
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99214
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Fredrik Höglund [Sun, 1 Jan 2017 14:34:17 +0000 (15:34 +0100)]
dri3: Fix MakeCurrent without a default framebuffer
In OpenGL 3.0 and later it is legal to make a context current without
a default framebuffer.
This has been broken since DRI3 support was introduced.
Cc: "13.0 12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Tue, 27 Dec 2016 18:53:59 +0000 (19:53 +0100)]
radeonsi: turn SDMA IBs into de-facto preambles of GFX IBs
Draw calls no longer flush SDMA IBs. r600_need_dma_space is
responsible for synchronizing execution between both IBs.
Initial buffer clears and fast clears will stay unflushed in the SDMA IB
(up to 64 MB) as long as the GFX IB isn't flushed either.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Dec 2016 16:51:43 +0000 (17:51 +0100)]
radeonsi: implement SDMA-based buffer clearing for SI
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Dec 2016 16:28:36 +0000 (17:28 +0100)]
radeonsi: do all math in bytes in SI DMA code
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Dec 2016 15:12:05 +0000 (16:12 +0100)]
gallium/radeon: prevent SDMA stalls by detecting RAW hazards in need_dma_space
Call r600_dma_emit_wait_idle only when there is a possibility of
a read-after-write hazard. Buffers not yet used by the SDMA IB don't
have to wait.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Dec 2016 15:27:21 +0000 (16:27 +0100)]
gallium/radeon: move unrelated code from dma_emit_wait_idle to need_dma_space
r600_dma_emit_wait_idle is going away in its current form.
The only difference is that the moved code is executed before DMA calls
instead of after them.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Dec 2016 14:48:54 +0000 (15:48 +0100)]
radeonsi: inline cik_sdma_do_copy_buffer
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 29 Dec 2016 18:00:43 +0000 (19:00 +0100)]
radeonsi: also wait for SDMA in the clear_buffer CPU fallback
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 29 Dec 2016 18:00:05 +0000 (19:00 +0100)]
radeonsi: simplify r600_resource typecasts in si_clear_buffer
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Dec 2016 00:33:42 +0000 (01:33 +0100)]
radeonsi: always use SDMA for big buffer clears and first buffer uses
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 24 Dec 2016 22:00:27 +0000 (23:00 +0100)]
radeonsi: use SDMA in rvid_buffer_clear on CIK-VI
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 24 Dec 2016 21:57:46 +0000 (22:57 +0100)]
radeonsi: use SDMA for initial clearing of DCC/CMASK/HTILE on CIK-VI
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 24 Dec 2016 21:52:45 +0000 (22:52 +0100)]
radeonsi: implement SDMA-based buffer clearing for CIK-VI
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 25 Dec 2016 20:07:47 +0000 (21:07 +0100)]
gallium/hud: increase the vertex buffer size for text
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 25 Dec 2016 20:03:25 +0000 (21:03 +0100)]
gallium/hud: add an option to sort items below graphs
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 25 Dec 2016 19:21:21 +0000 (20:21 +0100)]
gallium/hud: add an option to reset the color counter
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 24 Dec 2016 21:07:00 +0000 (22:07 +0100)]
gallium/hud: allow more data sources per pane
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 24 Dec 2016 19:36:56 +0000 (20:36 +0100)]
gallium/hud: add an option to rename each data source
useful for radeonsi performance counters
v2: allow specifying both : and =
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 19 Dec 2016 15:11:27 +0000 (16:11 +0100)]
gallium: remove TGSI_OPCODE_SUB
It's redundant with the source modifier.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 19 Dec 2016 15:11:27 +0000 (16:11 +0100)]
gallium: remove TGSI_OPCODE_ABS
It's redundant with the source modifier.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Axel Davy [Mon, 19 Dec 2016 18:04:32 +0000 (19:04 +0100)]
st/nine: Remove all usage of ureg_SUB in nine_shader
This is required to drop gallium SUB.
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Axel Davy [Mon, 19 Dec 2016 18:01:48 +0000 (19:01 +0100)]
st/nine: Remove all usage of ureg_SUB in nine_ff
This is required to remove gallium SUB.
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Axel Davy [Mon, 19 Dec 2016 17:51:47 +0000 (18:51 +0100)]
st/nine: Do not map SUB and ABS to their gallium equivalent.
This is required for gallium SUB and ABS to be removed.
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Eric Anholt [Wed, 4 Jan 2017 18:52:34 +0000 (10:52 -0800)]
configure: Fix another bashism.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Marek Olšák [Thu, 5 Jan 2017 12:47:15 +0000 (13:47 +0100)]
st/mesa: fix a segfault when prog->sh.data is NULL
Broken by:
st/mesa: get Version from gl_program rather than gl_shader_program
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Emil Velikov [Thu, 5 Jan 2017 16:06:59 +0000 (16:06 +0000)]
docs: add news item and link release notes for 13.0.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 5 Jan 2017 15:59:07 +0000 (15:59 +0000)]
docs: add sha256 checksums for 13.0.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
c8ece92ded9337b9ed60aa9568b41313025a1406)
Emil Velikov [Sat, 24 Dec 2016 10:06:50 +0000 (10:06 +0000)]
docs: add release notes for 13.0.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
bec04114d2612042bdf61183cfa3416b3a643b68)
Nayan Deshmukh [Thu, 5 Jan 2017 14:30:41 +0000 (20:00 +0530)]
st/va: fix incorrect argument in vl_compositor_cleanup
This fixes the mistake introduced in commit
b6737a8bcd03ea68952799144c0c6e6e6679bee9
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tim Rowley [Tue, 3 Jan 2017 16:20:10 +0000 (10:20 -0600)]
swr: remove unneeded llvm version check
Old test caused breakage with llvm-svn (4.0.0svn), and not needed as
the minimum required llvm version for swr is 3.6.
Reviewed-by: George Kyriazis <george.kyriazis@intel.com>
George Kyriazis [Wed, 4 Jan 2017 19:13:36 +0000 (13:13 -0600)]
swr: fix windows build break
wrap lp_bld_type.h around extern "C".
Windows decorates global variables, so when used from .cpp files, need
to use an undecorated version.
Also, removed related and unneeded code from swr_screen.cpp
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Marek Olšák [Tue, 3 Jan 2017 10:02:41 +0000 (11:02 +0100)]
radeonsi: update clip_regs if clip_disable changes to fix a hang
This seems to fix the GPU hangs caused by:
commit
ed3190b3f3a776fc8c75b1e6130a88079166d115
Author: Marek Olšák <marek.olsak@amd.com>
Date: Sun Nov 13 18:41:43 2016 +0100
radeonsi: don't export ClipVertex and ClipDistance[] if clipping is disabled
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99219
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Sat, 31 Dec 2016 12:50:38 +0000 (13:50 +0100)]
st/mesa: enable GLSLOptimizeConservatively for drivers that want it
GLSL compilation now takes 24% less time with the Gallium noop driver.
I used my shader-db for the measurement. The difference for the whole
radeonsi driver can be ~10%.
The generated TGSI is mostly the same. For example, the compilation success
rate with a TGSI->GCN bytecode converter without any optimizations is
the same. Note that glsl_to_tgsi does its own copy propagation and simple
register allocation.
shader-db GCN report:
- Talos spills fewer SGPRs.
- DOTA 2 spills more SGPRs.
- The average shader-db score is better, but it's just due to randomness.
29045 shaders in 17564 tests
Totals:
SGPRS: 1325929 -> 1325017 (-0.07 %)
VGPRS: 1010808 -> 1010172 (-0.06 %)
Spilled SGPRs: 1432 -> 1399 (-2.30 %)
Spilled VGPRs: 93 -> 92 (-1.08 %)
Private memory VGPRs: 688 -> 688 (0.00 %)
Scratch size: 2540 -> 2484 (-2.20 %) dwords per thread
Code Size:
39336732 ->
39342936 (0.02 %) bytes
Max Waves: 217937 -> 217969 (0.01 %)
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Sat, 31 Dec 2016 12:48:42 +0000 (13:48 +0100)]
glsl_to_tgsi: do fewer optimizations with GLSLOptimizeConservatively
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Sat, 31 Dec 2016 12:42:09 +0000 (13:42 +0100)]
mesa: add gl_constants::GLSLOptimizeConservatively
to reduce the amount of GLSL optimizations for drivers that can do better.
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Sat, 31 Dec 2016 12:34:11 +0000 (13:34 +0100)]
gallium: add PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY
Drivers with good compilers don't need aggressive optimizations before TGSI.
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Sat, 31 Dec 2016 11:02:26 +0000 (12:02 +0100)]
glsl: run do_lower_jumps properly in do_common_optimizations
so that backends don't have to run it manually
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Thu, 5 Jan 2017 01:52:38 +0000 (17:52 -0800)]
i965: Print VS output VUE map in Vulkan too.
We need to move this to the shared layer.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Wed, 14 Dec 2016 11:29:29 +0000 (03:29 -0800)]
i965: Fix last slot calculations
If the VUE map has slots at the end which the shader does not write,
then we'd "flush" (constructing an URB write) on the last output it
actually wrote. Then, we'd construct another SEND with EOT, but with
no actual payload data. That's not legal.
For example, SSO programs have clip distance slots allocated no matter
what, but the shader may not write them. If it doesn't write any user
defined varyings, then the clip distance slots will be the last ones.
Found while debugging
dEQP-VK.tessellation.shader_input_output.gl_position_vs_to_tcs_to_tes
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Iago Toral Quiroga [Thu, 5 Jan 2017 08:20:48 +0000 (09:20 +0100)]
docs: Mark GL_ARB_gpu_shader_fp64 and OpenGL 4.0 as done for i965/hsw+
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Iago Toral Quiroga [Thu, 5 Jan 2017 07:53:08 +0000 (08:53 +0100)]
docs: add GL_ARB_gpu_shader_fp64 and OpenGL 4.0 support for Intel Haswell.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Iago Toral Quiroga [Wed, 4 Jan 2017 09:46:08 +0000 (10:46 +0100)]
i965: add a kernel_features bitfield to intel screen
We can use this to track various features that may or may not be supported
by the hw / kernel. Currently, we usually do this by checking the generation
and supported command parser versions in various places thoughtout the driver
code. With this patch, we centralize all these checks in just once place at
screen creation time, then we just query the bitfield wherever we need to
check if a particular feature is supported.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Iago Toral Quiroga [Tue, 3 Jan 2017 08:27:09 +0000 (09:27 +0100)]
i965/gen7: Enable OpenGL 4.0 in Haswell when supported
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Iago Toral Quiroga [Wed, 4 Jan 2017 08:06:06 +0000 (09:06 +0100)]
i965: get rid of brw->can_do_pipelined_register_writes
Instead, check the screen field directly.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Wilson [Wed, 4 Jan 2017 07:34:59 +0000 (08:34 +0100)]
i965: Move the pipelined test for SO register access to the screen
Moving the test to the screen places it alongside the other global HW
feature tests that want to be shared between contexts.
Also, we need to know if we support pipelined register writes at
screen creation time so that we can tell if we can expose OpenGL 4.0
in gen7.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Samuel Iglesias Gonsálvez [Wed, 14 Dec 2016 12:46:52 +0000 (13:46 +0100)]
i965/disasm: remove printing hstride and width in align16 DF source regions
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Samuel Iglesias Gonsálvez [Wed, 7 Dec 2016 09:32:38 +0000 (10:32 +0100)]
vec4: use DIM instruction when loading DF immediates in HSW
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Carl Worth [Tue, 5 Aug 2014 23:33:05 +0000 (16:33 -0700)]
glcpp: Remove illegal characters from tests
Some of the existing tests were using '@' and '"' incidentally within the test
body. Neither of these characters are actually legal for GLSL. And since we
are planning to start generating errors for illegal characters, we need to
first make the test suite clean.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Carl Worth [Tue, 5 Aug 2014 23:33:04 +0000 (16:33 -0700)]
glcpp: Exhaustively test all legal characters in GLSL
Here, each legal character (as defined by GLSL Language Specification version
4.30.6, section 3.1) appears at least once in the input file. Obviously,
characters with special meaning (like '#' and '\') aren't treated exhaustively
with respect to all their possible uses. We have many other tests for that.
Here, we're simply ensuring that the test suite sees every legal character at
least once.
v2 (by Ken): Fix expectations, move to src/compiler, renumber tests.
Carl's .expected: Updated .expected:
.. ..
. . . .
. . . .
. . . .
. . . .
. ..
. .
. .
.
(For some reason, the original test expected ".." to produce two lines.
glcpp, cpp, and mcpp all follow my updated behavior, so I believe it to
be correct.)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Carl Worth [Tue, 5 Aug 2014 23:33:03 +0000 (16:33 -0700)]
glcpp: Allow vertical tab and form feed characters in GLSL
Of course, these aren't really useful for anything, but the GLSL language
specification does allow them:
The source character set used for the OpenGL shading languages,
outside of comments, is a subset of UTF-8. It includes the following
characters:
...
White space: the space character, horizontal tab, vertical tab, form
feed, carriage-return, and line- feed.
[GLSL Language Specification 4.30.6, section 3.1]
So treat vertical tab ('\v' or ^K) and form-feed ('\f' or ^L) as horizontal
space characters.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Carl Worth [Tue, 5 Aug 2014 23:33:02 +0000 (16:33 -0700)]
glcpp: Add testing for no space between macro name and replacement list
GCC's preprocessor accepts a macro definition where there is no space between
the macro's identifier name and the replacementlist. (GCC does emit a "missing
space" warning that we don't, but that's fine.)
This is an exhaustive test that verifies that all legal GLSL characters that
could possibly be interpreted as separating the macro name from the
replacement list are interpreted as such. So the testing here includes all
valid GLSL symbols except for:
* Characters that can be part of an identifier (a-z, A-Z, 0-9, _)
* Backslash, (allowed only as line continuation)
* Hash, (allowed only to introduce pre-processor directive, or as part of a
paste operator in a replacement list---but not as first token of
replacement list)
* Space characters (since the point of the testing is to have missing space)
* Left parenthesis (which would indicate a function-like macro)
v2 (Ken): Move to src/compiler, renumber tests.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>