Maxime Ripard [Tue, 23 Jan 2018 20:17:00 +0000 (21:17 +0100)]
env: mmc: depends on the MMC framework
The raw MMC environment directly calls into the MMC framework. Make sure
it's enabled before we can select it.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:59 +0000 (21:16 +0100)]
env: Initialise all the environments
Since we want to have multiple environments, we will need to initialise
all the environments since we don't know at init time what drivers might
fail when calling load.
Let's init all of them, and only consider for further operations the ones
that have not reported any errors at init time.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:58 +0000 (21:16 +0100)]
env: Support multiple environments
Now that we have everything in place to support multiple environment, let's
make sure the current code can use it.
The priority used between the various environment is the same one that was
used in the code previously.
At read / init times, the highest priority environment is going to be
detected, and we'll use the same one without lookup during writes. This
should implement the same behaviour than we currently have.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:57 +0000 (21:16 +0100)]
env: common: Make the debug messages play a little nicer
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.
Make the common code play a little nicer by removing all the extra output
in the standard case.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:56 +0000 (21:16 +0100)]
env: mmc: Make the debug messages play a little nicer
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.
Make MMC play a little nicer by removing all the extra \n and formatting
that is redundant with the global output.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:55 +0000 (21:16 +0100)]
env: fat: Make the debug messages play a little nicer
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.
Make FAT play a little nicer by removing all the extra \n and formatting
that is redundant with the global output.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:54 +0000 (21:16 +0100)]
env: Make it explicit where we're loading our environment from
Since we can have multiple environments now, it's better to provide a
decent indication on what environments were tried and which were the one to
fail and succeed.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:53 +0000 (21:16 +0100)]
env: Make the env save message a bit more explicit
Since we'll soon have support for multiple environments, the environment
saving message might end up being printed multiple times if the higher
priority environment cannot be used.
That might confuse the user, so let's make it explicit if the operation
failed or not.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:52 +0000 (21:16 +0100)]
env: Pass additional parameters to the env lookup function
In preparation for the multiple environment support, let's introduce two
new parameters to the environment driver lookup function: the priority and
operation.
The operation parameter is meant to identify, obviously, the operation you
might want to perform on the environment.
The priority is a number passed to identify the environment priority you
want to retrieve. The lowest priority parameter (0) will be the primary
source.
Combining the two parameters allow you to support multiple environments
through different priorities, and to change those priorities between read
and writes operations.
This is especially useful to implement migration mechanisms where you want
to always use the same environment first, be it to read or write, while the
common case is more likely to use the same environment it has read from to
write it to.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:51 +0000 (21:16 +0100)]
env: Rename env_driver_lookup_default and env_get_default_location
The env_driver_lookup_default and env_get_default_location functions are
about to get refactored to support loading from multiple environment.
The name is therefore not really well suited anymore. Drop the default
part to be a bit more relevant.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 23 Jan 2018 20:16:50 +0000 (21:16 +0100)]
cmd: nvedit: Get rid of the env lookup
The nvedit command is the only user of env_driver_lookup_default outside of
the environment code itself, and it uses it only to print the environment
it's about to save to during env save.
As we're about to rework the environment to be able to handle multiple
environment sources, we might not have an idea of what environment backend
is going to be used before trying (and possibly failing for some).
Therefore, it makes sense to remove that message and move it to the
env_save function itself. As a side effect, we also can get rid of the call
to env_driver_lookup_default that is also about to get refactored.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tom Rini [Fri, 26 Jan 2018 18:22:40 +0000 (13:22 -0500)]
Merge git://git.denx.de/u-boot-sunxi
Tom Rini [Fri, 26 Jan 2018 16:24:04 +0000 (11:24 -0500)]
ARM: socfpga: Convert callers of cm_write_with_phase for wait_for_bit_le32
Now that we have and use wait_for_bit_le32() available, the callers of
cm_write_with_phase() should not be casting values to u32 and instead we
expect a const void *, so provide that directly.
Fixes:
48263504c8d5 ("wait_bit: use wait_for_bit_le32 and remove wait_for_bit")
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Chris Blake [Mon, 15 Jan 2018 22:28:18 +0000 (16:28 -0600)]
gpio: sunxi: Add compatible string for H5 PIO
Add allwinner,sun50i-h5-pinctrl compatible for H5 boards.
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: remove external link and format commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:24 +0000 (09:44 +0100)]
sunxi: Add limit with the MMC environment
The MMC environment offset is getting very close to the end of the U-Boot
binary now. Since we want to make sure this will not overflow, add a size
limit in the board for arm64. arm32 has already that limit enforced in our
custom image generation.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:23 +0000 (09:44 +0100)]
Makefile: Add size check to the u-boot.itb make target
The make macro to check if the binary exceeds the board size limit is not
called. Make sure that is the case.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Heider [Tue, 16 Jan 2018 08:44:22 +0000 (09:44 +0100)]
sunxi: imply CONFIG_OF_LIBFDT_OVERLAY
fdt overlay support is useful for all sunxi boards, enable per default
and remove it from sunxi defconfigs.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:21 +0000 (09:44 +0100)]
net: regex: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this option that is not critical until we can adress the issue
properly.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:20 +0000 (09:44 +0100)]
video: bpp16: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:19 +0000 (09:44 +0100)]
video: bpp8: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:18 +0000 (09:44 +0100)]
cmd: misc: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:17 +0000 (09:44 +0100)]
cmd: loads: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:16 +0000 (09:44 +0100)]
cmd: loadb: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:15 +0000 (09:44 +0100)]
cmd: unzip: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:14 +0000 (09:44 +0100)]
cmd: crc32: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 16 Jan 2018 08:44:13 +0000 (09:44 +0100)]
dfu: select HASH
The DFU code relies on the HASH config option. Make sure it is always there
by selecting it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tom Rini [Fri, 26 Jan 2018 12:46:47 +0000 (07:46 -0500)]
Merge git://git.denx.de/u-boot-mips
Tom Rini [Fri, 26 Jan 2018 12:46:34 +0000 (07:46 -0500)]
Merge git://git.denx.de/u-boot-spi
Álvaro Fernández Rojas [Sat, 20 Jan 2018 18:16:05 +0000 (19:16 +0100)]
MIPS: add BMIPS Comtrend AR-5315u board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 18:16:04 +0000 (19:16 +0100)]
MIPS: add support for Broadcom MIPS BCM6318 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 18:16:03 +0000 (19:16 +0100)]
dm: ram: bmips: add BCM6318 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 18:16:02 +0000 (19:16 +0100)]
dm: cpu: bmips: add BCM6318 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 13:16:56 +0000 (14:16 +0100)]
MIPS: add BMIPS Comtrend WAP-5813n board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 13:16:55 +0000 (14:16 +0100)]
MIPS: add support for Broadcom MIPS BCM6368 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 13:16:54 +0000 (14:16 +0100)]
dm: cpu: bmips: add BCM6368 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Eugeniy Paltsev [Thu, 28 Dec 2017 12:09:03 +0000 (15:09 +0300)]
DW SPI: Get clock value from Device Tree
Add option to set spi controller clock frequency via device tree
using standard clock bindings.
Define dw_spi_get_clk function as 'weak' as some targets
(like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API
and implement dw_spi_get_clk their own way in their clock manager.
Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Eugeniy Paltsev [Thu, 28 Dec 2017 12:09:02 +0000 (15:09 +0300)]
SOCFPGA: clock manager: implement dw_spi_get_clk function
Implement dw_spi_get_clk function to override its weak
implementation in designware_spi.c driver.
We need this change to get rid of cm_get_spi_controller_clk_hz
function and clock_manager.h include in designware_spi.c driver.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Daniel Schwierzeck [Thu, 25 Jan 2018 19:43:58 +0000 (20:43 +0100)]
usb: ehci: mxs: fix swapped argument in ehci_writel()
ehci_writel() swaps the arguments for address and value. One call
in ehci-mxs ignores that.
This fixes the warning:
drivers/usb/host/ehci-mxs.c: In function ?ehci_hcd_stop?:
drivers/usb/host/ehci-mxs.c:159:19: error: initialization makes integer from pointer without a cast [-Werror=int-conversion]
ehci_writel(tmp, &hcor->or_usbcmd);
^
arch/arm/include/asm/io.h:117:34: note: in definition of macro ?writel?
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
^
drivers/usb/host/ehci-mxs.c:159:2: note: in expansion of macro ?ehci_writel?
^~~~~~~~~~~
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Gustavo A. R. Silva [Sat, 20 Jan 2018 08:37:31 +0000 (02:37 -0600)]
usb: xhci: Fix bool initialization in xhci_bulk_tx
Bool initializations should use true and false.
This issue was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 10:45:39 +0000 (11:45 +0100)]
mips: bmips: increment SYS_MALLOC_F_LEN
This prevents the following ENOMEM:
Error binding driver 'bmips_cpu': -12
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Paul Burton [Thu, 18 Jan 2018 22:36:41 +0000 (14:36 -0800)]
boston: Pad binary in .mcs to a multiple of 16 bytes
When flashing U-Boot on a Boston board using Xilinx Vivado tools, the
final 0x00 byte which ends the .relocs section seems to be skipped &
left in flash as 0xff unless the data contained in the .mcs is padded
out to a 16 byte boundary. Without our final zero byte relocation will
fail with an error about a spurious reloc:
Avoid this problem by padding out the data in the .mcs file to a 16 byte
boundary using srec_cat's -range-pad functionality.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Goldschmidt Simon [Thu, 25 Jan 2018 06:04:44 +0000 (06:04 +0000)]
ddr: altera: silence PHY calibration unless in debug mode
This driver has been using printf() including filename since it was
added. Convert to using debug() instead.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Simon Goldschmidt [Thu, 25 Jan 2018 06:18:27 +0000 (07:18 +0100)]
arm: socfpga: allow configs without network support
Currently, socfpga_common.h does not allow configurations without
network support. This is because CONFIG_CMD_PXE is defined in this
file and distro mode has DHCP hard-coded as available.
Fix this by moving CONFIG_CMD_PXE and CONFIG_MENU to the defconfigs
and by making DHCP optional in BOOT_TARGET_DEVICES(func).
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Tom Rini [Thu, 25 Jan 2018 03:08:00 +0000 (22:08 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-coldfire
Marek Vasut [Wed, 17 Jan 2018 21:33:59 +0000 (22:33 +0100)]
pinctrl: rmobile: Import R8A7794 E2 PFC tables
Import PFC tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8,
commit
bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 17 Jan 2018 21:29:50 +0000 (22:29 +0100)]
pinctrl: rmobile: Import R8A7792 V2H PFC tables
Import PFC tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8,
commit
bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 17 Jan 2018 16:14:45 +0000 (17:14 +0100)]
pinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tables
Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux
kernel v4.15-rc8, commit
bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 17 Jan 2018 21:18:59 +0000 (22:18 +0100)]
pinctrl: rmobile: Import R8A7790 H2 PFC tables
Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8,
commit
bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 17 Jan 2018 22:39:57 +0000 (23:39 +0100)]
clk: renesas: Import R8A7794 E2 clock tables
Import clock tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8,
commit
bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 17 Jan 2018 22:39:10 +0000 (23:39 +0100)]
clk: renesas: Import R8A7792 V2H clock tables
Import clock tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8,
commit
bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 8 Jan 2018 15:38:51 +0000 (16:38 +0100)]
clk: renesas: Import R8A7791/R8A7793 M2 clock tables
Import clock tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux
kernel v4.15-rc8, commit
bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 17 Jan 2018 22:14:25 +0000 (23:14 +0100)]
clk: renesas: Import R8A7790 H2 clock tables
Import clock tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8,
commit
bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 8 Jan 2018 15:38:51 +0000 (16:38 +0100)]
clk: renesas: Add Gen2 clock core
Add common clock code for Renesas RCar Gen2 platforms.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 17 Jan 2018 23:05:28 +0000 (00:05 +0100)]
clk: renesas: Add DIV6P1 clock type
Add macros for the DIV6P1 clock type, which is used on Gen2
and optionally also on Gen3.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 15 Jan 2018 15:44:39 +0000 (16:44 +0100)]
clk: renesas: Split out code shared between Gen2 and Gen3
Pull code which is common for RCar Gen2 and RCar Gen3 into
separate source file. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 8 Jan 2018 15:32:38 +0000 (16:32 +0100)]
clk: renesas: Make clock tables Kconfig configurable
Add Kconfig entries for each SoC clock table, so they can be
compiled in or out at build time. This can reduce the size of
the binary if desired.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sun, 14 Jan 2018 23:58:35 +0000 (00:58 +0100)]
clk: renesas: Split SMSTPCR and RMSTPCR tables
The Gen2 requires setting RMSTPCR before booting, while on Gen3 this
is thus far always zero. Split the tables so the RMSTPCR can be set
too.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 8 Jan 2018 16:09:45 +0000 (17:09 +0100)]
clk: renesas: Pull Gen3 specific bits into separate header
Extract the macros specific to Gen3 clock into a separate header.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 16 Jan 2018 18:23:17 +0000 (19:23 +0100)]
clk: renesas: Make PLL configurations per-SoC
Not all SoCs have the same PLL configuration options,
so make those PLL configuraion tables per-SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 8 Jan 2018 15:05:28 +0000 (16:05 +0100)]
clk: renesas: Make clk_ids per-driver
Not all drivers use the same IDs, so make those IDs per-driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 8 Jan 2018 13:01:40 +0000 (14:01 +0100)]
clk: renesas: Split RCar Gen3 driver
Split the massive driver into smaller per-SoC drivers and pull the
common code into a separate file. This would allow configuring out
unnecessary clock drivers once the Kconfig changes are in and also
allow adding more clock tables easily.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Chris Brandt [Wed, 17 Jan 2018 01:52:18 +0000 (20:52 -0500)]
serial: sh: Add support for R7S72100 (RZ/A1)
Add support for RZ/A1 series SoCs.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Marek Vasut [Mon, 22 Jan 2018 00:43:25 +0000 (01:43 +0100)]
serial: sh: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2
Use the common RCAR_GEN2 config option instead of enumerating
each SoC and having a lengthy ifdef clause. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 17 Jan 2018 21:36:37 +0000 (22:36 +0100)]
serial: sh: Replace fdtdec_get_addr() with devfdt_get_addr()
Replace fdtdec_get_addr() with devfdt_get_addr() as the later one is
the current recommended practice.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sun, 7 Jan 2018 18:37:06 +0000 (19:37 +0100)]
ARM: rmobile: Convert CONFIG_R8A77xx to Kconfig
Convert these configuration options to Kconfig, update board defconfigs
and drop them from whitelist.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 10 Jan 2018 10:47:03 +0000 (11:47 +0100)]
ARM: dts: rmobile: Factor out U-Boot extras
Pull out u-boot extras into dtsi files to make synchronization of DTS
from Linux kernel as easy as a simple copy. All the U-Boot extras are
now in *-u-boot.dts* files instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 29 Nov 2017 03:27:36 +0000 (04:27 +0100)]
ARM: dts: rmobile: Update DTS to match Linux 4.14
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.14,
commit
bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . This includes both M3
and H3 ULCB and Salvator-X boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Wed, 24 Jan 2018 16:28:44 +0000 (11:28 -0500)]
Merge git://git.denx.de/u-boot-mmc
Jun Nie [Tue, 2 Jan 2018 04:25:57 +0000 (12:25 +0800)]
mmc: Poll for broken card detection case
Poll for broken card detection case instead of return
no card detected.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Jaehoon Chung [Tue, 23 Jan 2018 05:04:30 +0000 (14:04 +0900)]
mmc: fix to assign to correct clock value when clock is enabling
When clock is enabling, it's assigned to 0 as mmc->clock.
Then it can't initialize any card.
Fix to assign to correct clock value as mmc->cfg->f_min or f_max.
Fixes:
9546eb92cb6 ("mmc: fix the wrong disabling clock")
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Jaehoon Chung [Tue, 16 Jan 2018 06:33:52 +0000 (15:33 +0900)]
configs: odroid-xu3: enable the configs relevant to regulator
Enable the CONFIG_CMD_REGULATOR and CONFIG_DM_REGULATOR_S2MPS11.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Jaehoon Chung [Tue, 16 Jan 2018 06:33:51 +0000 (15:33 +0900)]
power: pmic: s2mps11: probe the regulator driver
Add the probe function to support the s2mps11 regulator driver.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Jaehoon Chung [Tue, 16 Jan 2018 06:33:50 +0000 (15:33 +0900)]
power: regulator: s2mps11: add a regulator driver for s2mps11
exynos5422 has the s2mps11 PMIC.
s2mps11 pmic has the 10-BUCK and 38-LDO regulators.
Each IP and devices in exynos5422 can be controlled by each regulators.
This patch is support for s2mps11 regulator driver.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Vignesh R [Wed, 24 Jan 2018 05:14:07 +0000 (10:44 +0530)]
spi: cadence_qspi_apb: Make flash writes 32 bit aligned
Make flash writes 32 bit aligned by using bounce buffers to deal with
non 32 bit aligned buffers.
This is required because as per TI K2G TRM[1], the external master is
only permitted to issue 32-bit data interface writes until the last word
of an indirect transfer. Otherwise indirect writes is known to fail
sometimes.
[1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Vignesh R [Wed, 24 Jan 2018 05:14:06 +0000 (10:44 +0530)]
Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
This reverts commit
57897c13de03ac0136d64641a3eab526c6810387.
Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Goldschmidt Simon [Wed, 24 Jan 2018 05:14:05 +0000 (10:44 +0530)]
Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"
This reverts commit
b63b46313ed29e9b0c36b3d6b9407f6eade40c8f.
This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
the data cache after reading. This is meant for dma transfers only and
breaks the cadence_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Jason Rush [Tue, 23 Jan 2018 23:13:12 +0000 (17:13 -0600)]
dts: cadence_spi: Update documentation for DT bindings
Update documentation to reflect adopting the Linux DT bindings.
Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
Jason Rush [Tue, 23 Jan 2018 23:13:11 +0000 (17:13 -0600)]
config: cadence_spi: Remove defines read from DT
Cleanup unused #define values that are read from the DT.
Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
Jason Rush [Tue, 23 Jan 2018 23:13:10 +0000 (17:13 -0600)]
dts: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings and clean-up duplicate
and unused values.
Fix indentation of the QSPI node in the keystone k2g
device tree.
Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
Jason Rush [Tue, 23 Jan 2018 23:13:09 +0000 (17:13 -0600)]
spi: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.
Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
Chris Packham [Mon, 22 Jan 2018 09:44:20 +0000 (22:44 +1300)]
spi: kirkwood_spi: implement workaround for FE-9144572
Erratum NO. FE-9144572: The device SPI interface supports frequencies of
up to 50 MHz. However, due to this erratum, when the device core clock
is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and
CPOL=CPHA=1 there might occur data corruption on reads from the SPI
device.
Implement the workaround by setting the TMISO_SAMPLE value to 0x2
in the timing1 register.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Mario Six [Mon, 15 Jan 2018 10:08:42 +0000 (11:08 +0100)]
sf_probe: Merge spi_flash_probe_tail into spi_flash_probe
spi_flash_probe_tail is now only called from spi_flash_probe, hence we
can merge its body into spi_flash_probe.
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Jan 2018 10:08:41 +0000 (11:08 +0100)]
spi: spi-uclass: Fix style violations
Remove a superfluous newline, and reduce the scope of a variable.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Jan 2018 10:08:40 +0000 (11:08 +0100)]
spi: sf_probe: Fix style violations
Fix two indention-related style violations.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Mario Six [Mon, 15 Jan 2018 10:08:39 +0000 (11:08 +0100)]
spi: Remove CONFIG_OF_SPI_FLASH
Previous patches removed the last usages of this config variable, so
that it is now obsolete.
This patch removes it from the whitelist.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Jan 2018 10:08:38 +0000 (11:08 +0100)]
spi: Remove spi_setup_slave_fdt
A previous patch removed the spi_flash_probe_fdt function, which
contained the last call of the spi_setup_slave_fdt function, which is
now equally obsolete.
This patch removes the function.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Jan 2018 10:08:37 +0000 (11:08 +0100)]
spi: Remove spi_flash_probe_fdt
Commit ba45756 ("dm: x86: spi: Convert ICH SPI driver to driver model")
removed the last usage of the spi_flash_probe_fdt function, rendering it
obsolete.
This patch removes the function.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Jan 2018 10:08:36 +0000 (11:08 +0100)]
spi: Remove obsolete spi_base_setup_slave_fdt
0efc024 ("spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT
node") added a helper function spi_base_setup_slave_fdt to to set up a
SPI slave from a given FDT blob. The only user was the exynos SPI
driver.
But commit 73186c9 ("dm: exynos: Convert SPI to driver model") removed
the use of this function, hence rendering it obsolete.
Remove this function, as well as the CONFIG_OF_SPI option, which guarded
only this function.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Jan 2018 10:08:35 +0000 (11:08 +0100)]
spi: Fix style violation and improve code
This patch fixes a printf specifier style violation, reduces the scope
of a variable, and turns a void pointer that is used with pointer
arithmetic into a u8 pointer.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 01:13:41 +0000 (02:13 +0100)]
mips: bmips: enable the SPI flash on the Comtrend AR-5387un
It's a Macronix (mx25l12805d) 16 MB SPI flash.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 01:13:40 +0000 (02:13 +0100)]
mips: bmips: add bcm63xx-hsspi driver support for BCM63268
This driver manages the high speed SPI controller present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 01:13:39 +0000 (02:13 +0100)]
mips: bmips: add bcm63xx-hsspi driver support for BCM6328
This driver manages the SPI controller present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Álvaro Fernández Rojas [Sat, 20 Jan 2018 01:13:38 +0000 (02:13 +0100)]
dm: spi: add BCM63xx HSSPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:05 +0000 (17:15 +0100)]
mips: bmips: enable the SPI flash on the Netgear CG3100D
It's a Spansion (s25fl064a) 8 MB SPI flash.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:04 +0000 (17:15 +0100)]
mips: bmips: enable the SPI flash on the Sagem F@ST1704
It's a Winbond (w25x32) 4 MB SPI flash.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:03 +0000 (17:15 +0100)]
mips: bmips: add bcm63xx-spi driver support for BCM63268
This driver manages the low speed SPI controller present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:02 +0000 (17:15 +0100)]
mips: bmips: add bcm63xx-spi driver support for BCM3380
This driver manages the SPI controller present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:01 +0000 (17:15 +0100)]
mips: bmips: add bcm63xx-spi driver support for BCM6358
This driver manages the SPI controller present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:15:00 +0000 (17:15 +0100)]
mips: bmips: add bcm63xx-spi driver support for BCM6348
This driver manages the SPI controller present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 23 Jan 2018 16:14:59 +0000 (17:14 +0100)]
mips: bmips: add bcm63xx-spi driver support for BCM6338
This driver manages the SPI controller present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>