Jonathan Cameron [Sun, 8 May 2022 17:56:28 +0000 (18:56 +0100)]
iio: dac: ad5592r: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
56ca9db862bf ("iio: dac: Add support for the AD5592R/AD5593R ADCs/DACs")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Paul Cercueil <paul@crapouillou.net>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-49-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:27 +0000 (18:56 +0100)]
iio: dac: ad5504: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
0dbe59c7a788 ("iio:ad5504: Do not store transfer buffers on the stack")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-48-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:26 +0000 (18:56 +0100)]
iio: dac: ad5449: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
8341dc04dfb3 ("iio:dac: Add support for the ad5449")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-47-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:25 +0000 (18:56 +0100)]
iio: dac: ad5421: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
5691b23489db ("staging:iio:dac: Add AD5421 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-46-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:24 +0000 (18:56 +0100)]
iio: dac: ad5360: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
a3e2940c24d3 ("staging:iio:dac: Add AD5360 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-45-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:23 +0000 (18:56 +0100)]
iio: dac: ad5064: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
6a17a0768f77 ("iio:dac:ad5064: Add support for the ad5629r and ad5669r")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-44-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:22 +0000 (18:56 +0100)]
iio: common: ssp: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
50dd64d57eee ("iio: common: ssp_sensors: Add sensorhub driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-43-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:21 +0000 (18:56 +0100)]
iio: amplifiers: ad8366: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
e71d42e03c60 ("iio: amplifiers: New driver for AD8366 Dual-Digital Variable Gain Amplifier")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-42-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:20 +0000 (18:56 +0100)]
iio: addac: ad74413r: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
fea251b6a5db ("iio: addac: add AD74413R driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Cosmin Tanislav <cosmin.tanislav@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-41-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:19 +0000 (18:56 +0100)]
iio: adc: ti-tlc4541: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
ac2bec9d587c ("iio: adc: tlc4541: add support for TI tlc4541 adc")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-40-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:18 +0000 (18:56 +0100)]
iio: adc: ti-ads8688: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
3e87e7838328 ("iio: adc: Add TI ADS8688")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-39-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:17 +0000 (18:56 +0100)]
iio: adc: ti-ads8344: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-38-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:16 +0000 (18:56 +0100)]
iio: adc: ti-ads7950: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
902c4b2446d4 ("iio: adc: New driver for TI ADS7950 chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: David Lechner <david@lechnology.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-37-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:15 +0000 (18:56 +0100)]
iio: adc: ti-ads131e08: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
d935eddd2799 ("iio: adc: Add driver for Texas Instruments ADS131E0x ADC family")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Tomislav Denis <tomislav.denis@avl.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-36-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:14 +0000 (18:56 +0100)]
iio: adc: ti-ads124s08: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
e717f8c6dfec ("iio: adc: Add the TI ads124s08 ADC code")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-35-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:13 +0000 (18:56 +0100)]
iio: adc: ti-adc161s626: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
4d671b71beef ("iio: adc: ti-adc161s626: add support for TI 1-channel differential ADCs")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Matt Ranostay <mranostay@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-34-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:12 +0000 (18:56 +0100)]
iio: adc: ti-adc128s052: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
913b86468674 ("iio: adc: Add TI ADC128S052")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-33-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:11 +0000 (18:56 +0100)]
iio: adc: ti-
adc12138: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
50a6edb1b6e0 ("iio: adc: add
ADC12130/
ADC12132/
ADC12138 ADC driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-32-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:10 +0000 (18:56 +0100)]
iio: adc: ti-adc108s102: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Dual fixes tags as two cases that were introduced in different patches.
One of those patches is a fix however and likely to have been backported
to stable kernels.
Note the second alignment marking is likely to be unnecessary, but is
left for now to keep this fix simple.
Fixes:
3691e5a69449 ("iio: adc: add driver for the ti-adc084s021 chip")
Fixes:
cbe5c6977604 ("iio: adc: ti-adc108s102: Fix alignment of buffer pushed to iio buffers.")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-31-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:09 +0000 (18:56 +0100)]
iio: adc: ti-adc084s021: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
3691e5a69449 ("iio: adc: add driver for the ti-adc084s021 chip")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Acked-by: Mårten Lindahl <marten.lindahl@axis.com>
Link: https://lore.kernel.org/r/20220508175712.647246-30-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:08 +0000 (18:56 +0100)]
iio: adc: ti-adc0832: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
efc945fb729c ("iio: adc: add support for ADC0831/ADC0832/ADC0834/ADC0838 chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-29-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:07 +0000 (18:56 +0100)]
iio: adc: mcp320x: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Worth noting the fixes tag refers to the same issue being observed
on a platform that probably had only 64 byte cachelines.
Fixes:
0e81bc99a082 ("iio: mcp320x: Fix occasional incorrect readings")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Michael Welling <mwelling@ieee.org>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-28-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:06 +0000 (18:56 +0100)]
iio: adc: max1241: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
8a80a71d9020 ("iio: adc: Add MAX1241 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Alexandru Lazar <alazar@startmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-27-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:05 +0000 (18:56 +0100)]
iio: adc: max1118: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
a9e9c7153e96 ("iio: adc: add max1117/max1118/max1119 ADC driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-26-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:04 +0000 (18:56 +0100)]
iio: adc: max11100: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
a8e7e88df9ec ("iio: adc: Add Maxim MAX11100 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Jacopo Mondi <jacopo@jmondi.org>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-25-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:03 +0000 (18:56 +0100)]
iio: adc: max1027: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
fc167f624833 ("iio: add support of the max1027")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-24-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:02 +0000 (18:56 +0100)]
iio: adc: ltc2497: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
bc82222fcca1 ("iio:adc: Driver for Linear Technology LTC2497 ADC")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Michael Hennerich <michael.hennerich@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-23-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:01 +0000 (18:56 +0100)]
iio: adc: ltc2496: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes:
e4c5c4dfaa88 ("iio: adc: new driver to support Linear technology's ltc2496")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-22-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:56:00 +0000 (18:56 +0100)]
iio: adc: hi8435: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
72aa29ce0a59 ("iio: adc: hi8435: Holt HI-8435 threshold detector")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-21-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:59 +0000 (18:55 +0100)]
iio: adc: ad7949: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Note the fixes tag predates some changes to this line of code so
automated application of this fix may fail.
Fixes:
7f40e0614317 ("iio:adc:ad7949: Add AD7949 ADC driver family")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Charles-Antoine Couret <charles-antoine.couret@essensium.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-20-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:58 +0000 (18:55 +0100)]
iio: adc: ad7923: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Note that some other fixes have applied to this line of code
that may complicate automated backporting.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Fixes:
0eac259db28f ("IIO ADC support for AD7923")
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-19-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:57 +0000 (18:55 +0100)]
iio: adc: ad7887: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes tag is clearly not where this was introduced but it is very unlikely
anyone will back port it past that point.
Fixes:
65dd3d3d7a9b ("staging:iio:ad7887: Squash everything into one file")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-18-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:56 +0000 (18:55 +0100)]
iio: adc: ad7768-1: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to reflect that separate cachelines 'may' be
required.
Fixes:
a5f8c7da3dbe ("iio: adc: Add AD7768-1 ADC basic support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-17-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:55 +0000 (18:55 +0100)]
iio: adc: ad7766: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to reflect the fact DMA safety 'may' require
separate cachelines.
Fixes:
aa16c6bd0e09 ("iio:adc: Add support for AD7766/AD7767")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-16-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:54 +0000 (18:55 +0100)]
iio: adc: ad7606: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_ALIGN definition.
Update the comment to reflect the fact DMA safety 'may' require
separate cachelines.
Fixes:
7989b4bb23fe ("iio: adc: ad7616: Add support for AD7616 ADC")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-15-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:53 +0000 (18:55 +0100)]
iio: adc: ad7476: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to reflect that DMA safety 'may' require separate
cachelines.
Fixes tag is unlikely to be the actual introdution of the problem but is
far enough back to cover any likely backporting.
Fixes:
7a28fe3c93d6 ("staging:iio:ad7476: Squash driver into a single file.")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-14-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:52 +0000 (18:55 +0100)]
iio: adc: ad7298: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
be7fd3b86ad2 ("iio:adc:ad7298 make the tx and rx buffers __be16")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-13-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:51 +0000 (18:55 +0100)]
iio: adc: ad7292: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
506d2e317a0a ("iio: adc: Add driver support for AD7292")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-12-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:50 +0000 (18:55 +0100)]
iio: adc: ad7280a: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes:
003f1d48de52 ("staging:iio:adc:ad7280a: Split buff[2] into tx and rx parts")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-11-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:49 +0000 (18:55 +0100)]
iio: adc: ad7266: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to reflect that DMA safety 'may' require separate
cachelines.
Fixes:
54e018da3141 ("iio:ad7266: Mark transfer buffer as __be16")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-10-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:48 +0000 (18:55 +0100)]
iio: accel: sca3300: Fix alignment for DMA safety
____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.
Fixes:
9cc9806e22178 ("iio: accel: Add driver for Murata SCA3300 accelerometer")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-9-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:47 +0000 (18:55 +0100)]
iio: accel: sca3000: Fix alignment for DMA safety
____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.
The second alignment marking is left in place to avoid doing more than
the simple fix in this patch.
Fixes:
ced5c03d360ae ("staging:iio:accel:sca3000 merge files into one.")
Fixes:
152a6a884ae13 ("staging:iio:accel:sca3000 move to hybrid hard / soft buffer design.")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-8-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:46 +0000 (18:55 +0100)]
iio: accel: bmi088: Fix alignment for DMA safety
____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-7-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:45 +0000 (18:55 +0100)]
iio: accel: bma220: Fix alignment for DMA safety
____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.
Fixes:
bf2a5600a3ebc ("iio: accel: Add support for Bosch BMA220")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-6-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:44 +0000 (18:55 +0100)]
iio: accel: adxl367: Fix alignment for DMA safety
____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.
Update comment to reflect that DMA safety may require separate
cachelines.
Fixes:
cbab791c5e2a5 ("iio: accel: add ADXL367 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Cosmin Tanislav <demonsingur@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-5-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:43 +0000 (18:55 +0100)]
iio: accel: adxl355: Fix alignment for DMA safety
____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.
Fixes:
327a0eaf19d53 ("iio: accel: adxl355: Add triggered buffer support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Puranjay Mohan <puranjay12@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-4-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:42 +0000 (18:55 +0100)]
iio: accel: adxl313: Fix alignment for DMA safety
____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.
Fixes:
636d44633039 ("iio: accel: Add driver support for ADXL313")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-3-jic23@kernel.org
Jonathan Cameron [Sun, 8 May 2022 17:55:41 +0000 (18:55 +0100)]
iio: core: Fix IIO_ALIGN and rename as it was not sufficiently large
Discussion of the series:
https://lore.kernel.org/all/
20220405135758.774016-1-catalin.marinas@arm.com/
mm, arm64: Reduce ARCH_KMALLOC_MINALIGN brought to my attention that
our current IIO usage of L1CACHE_ALIGN is insufficient as their are Arm
platforms out their with non coherent DMA and larger cache lines at
at higher levels of their cache hierarchy.
Rename the define to make it's purpose more explicit. It will be used
much more widely going forwards (to replace incorrect ____cacheline_aligned
markings.
Note this patch will greatly reduce the padding on some architectures
that have smaller requirements for DMA safe buffers.
The history of changing values of ARCH_KMALLOC_MINALIGN via
ARCH_DMA_MINALIGN on arm64 is rather complex. I'm not tagging this
as fixing a particular patch from that route as it's not clear what to tag.
Most recently a change to bring them back inline was reverted because
of some Qualcomm Kryo cores with an L2 cache with 128-byte lines
sitting above the point of coherency.
c1132702c71f Revert "arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES)"
That reverts:
65688d2a05de arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES) which
refers to the change originally being motivated by Thunder x1 performance
rather than correctness.
Fixes:
6f7c8ee585e9d ("staging:iio: Add ability to allocate private data space to iio_allocate_device")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-2-jic23@kernel.org
Stephen Boyd [Tue, 3 May 2022 19:39:37 +0000 (12:39 -0700)]
iio: sx9324: Add setting for CS idle mode
Based on device tree setting, set the CS idle mode.
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220503193937.3794477-3-swboyd@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Stephen Boyd [Tue, 3 May 2022 19:39:36 +0000 (12:39 -0700)]
dt-bindings: iio: sx9324: Add CS idle/sleep mode
We need to configure the sleep and idle mode of the CS pins for this
device. Add a DT property to do this so pins are in a proper state
during sleep (either hi-z, grounded, or pulled up to vdd).
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220503193937.3794477-2-swboyd@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Gwendal Grignou [Fri, 29 Apr 2022 22:01:44 +0000 (15:01 -0700)]
iio: sx9360: Add pre-charge resistor setting
Add ability to set the precharge internal resistance from the device
tree.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220429220144.1476049-11-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Gwendal Grignou [Fri, 29 Apr 2022 22:01:43 +0000 (15:01 -0700)]
dt-bindings: iio: sx9360: Add precharge resistor setting
Allow configure the resistance used during precharge.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220429220144.1476049-10-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Gwendal Grignou [Fri, 29 Apr 2022 22:01:42 +0000 (15:01 -0700)]
iio: sx9324: Add Setting for internal analog gain
Based on device tree setting, set the internal analog gain.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220429220144.1476049-9-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Gwendal Grignou [Fri, 29 Apr 2022 22:01:41 +0000 (15:01 -0700)]
dt-bindings: iio: sx9324: Add input analog gain
Allow setting the configure the input analog gain.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220429220144.1476049-8-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Gwendal Grignou [Fri, 29 Apr 2022 22:01:40 +0000 (15:01 -0700)]
iio: sx9324: Add Setting for internal compensation resistor
Based on device tree setting, set the internal compensation resistor.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220429220144.1476049-7-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Gwendal Grignou [Fri, 29 Apr 2022 22:01:39 +0000 (15:01 -0700)]
dt-bindings: iio: sx9324: Add internal compensation resistor setting
Allow setting the internal resistor used for compensation.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220429220144.1476049-6-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Gwendal Grignou [Fri, 29 Apr 2022 22:01:38 +0000 (15:01 -0700)]
iio: sx9324: Add precharge internal resistance setting
Add ability to set the precharge internal resistance from the device
tree.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220429220144.1476049-5-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Gwendal Grignou [Fri, 29 Apr 2022 22:01:37 +0000 (15:01 -0700)]
dt-bindings: iio: sx9324: Add precharge resistor setting
Allow configure the resistance used during precharge.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220429220144.1476049-4-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Gwendal Grignou [Fri, 29 Apr 2022 22:01:36 +0000 (15:01 -0700)]
iio: sx9324: Fix register field spelling
Field for PROX_CTRL4 should contain PROX_CTRL4.
Fixes:
4c18a890dff8d ("iio:proximity:sx9324: Add SX9324 support")
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220429220144.1476049-3-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Jonathan Cameron [Sun, 20 Feb 2022 17:51:49 +0000 (17:51 +0000)]
iio: gyro: mpu3050: Use pm_ptr() and DEFINE_RUNTIME_DEV_PM_OPS()
Using this approach as opposed to CONFIG_PM guards allows the compiler to
remove the unused code instead of doing it manually.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220220175149.503495-3-jic23@kernel.org
Jonathan Cameron [Sun, 20 Feb 2022 17:51:48 +0000 (17:51 +0000)]
iio: gyro: mpu3050: Drop unused symbol exports.
This driver is built as a single module. There is an note in the makefile
about SPI support being a reason to split the build in future. That
support has never arrived so drop these symbol exports.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220220175149.503495-2-jic23@kernel.org
Jonathan Cameron [Sun, 20 Feb 2022 17:37:00 +0000 (17:37 +0000)]
iio: adc: adi-axi: Move exported symbols into IIO_ADI_AXI namespace.
Avoid unnecessary pollution of the global symbol namespace by
moving library functions in to a specific namespace and import
that into the drivers that make use of the functions.
For more info: https://lwn.net/Articles/760045/
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Nuno Sá <nuno.sa@analog.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220220173701.502331-5-jic23@kernel.org
Jonathan Cameron [Sun, 20 Feb 2022 16:33:27 +0000 (16:33 +0000)]
iio: core: drop iio_get_time_res()
This function was introduced with the ability to pick a clock.
There are no upstream users so presumably it isn't as obviously useful
as it seemed at the time. Hence drop it.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20220220163327.424696-1-jic23@kernel.org
Cosmin Tanislav [Tue, 11 Jan 2022 07:47:03 +0000 (09:47 +0200)]
iio: addac: ad74413r: for_each_set_bit_from -> for_each_set_bit
The starting bit is always zero, it doesn't make much sense to
use for_each_set_bit_from. Replace it with for_each_set_bit
which doesn't start from a particular bit.
Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220111074703.3677392-3-cosmin.tanislav@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Xiang wangx [Sat, 4 Jun 2022 04:05:41 +0000 (12:05 +0800)]
iio: accel: sca3000: Fix syntax errors in comments
Delete the redundant word 'via'.
Signed-off-by: Xiang wangx <wangxiang@cdjrlc.com>
Link: https://lore.kernel.org/r/20220604040541.8470-1-wangxiang@cdjrlc.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Sun, 29 May 2022 06:18:53 +0000 (06:18 +0000)]
iio: accel: sca3300: Add inclination channels
Different from SCA3300, SCL3300 can output inclination angles.
Angles are formed from acceleration with following equations:
ANG_X = atan2(accx , sqrt(pow(accy , 2) + pow(accz , 2)))
ANG_Y = atan2(accy , sqrt(pow(accx , 2) + pow(accz , 2)))
ANG_Z = atan2(accz , sqrt(pow(accx , 2) + pow(accy , 2)))
The commit adds the output of the raw value, scale
and scale_available of angles.
New interfaces:
in_incli_scale
in_incli_scale_available
in_incli_x_raw
in_incli_y_raw
in_incli_z_raw
Data converted by application of scale to degrees.
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Link: https://lore.kernel.org/r/20220529061853.3044893-6-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Sun, 29 May 2022 06:18:52 +0000 (06:18 +0000)]
iio: accel: sca3300: Add support for SCL3300
Add support for Murata SCL3300, a 3-axis MEMS accelerometer.
Same as SCA3300, it has the accelerometer and temperature output.
Datasheet: www.murata.com/en-us/products/sensor/inclinometer/overview/lineup/scl3300
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Link: https://lore.kernel.org/r/20220529061853.3044893-5-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Sun, 29 May 2022 06:18:51 +0000 (06:18 +0000)]
iio: accel: sca3300: modified to support multi chips
Prepare the way for multiple chips and additional channels:
- Modify the driver to read the device ID and load the corresponding
sensor information from the table to support multiple chips
- Add prepares for the addition of extra channels
- Prepare for handling the operation modes for multiple chips
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Link: https://lore.kernel.org/r/20220529061853.3044893-4-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Sun, 29 May 2022 06:18:50 +0000 (06:18 +0000)]
iio: accel: sca3300: add define for temp channel for reuse.
Add define of SCA3300_TEMP_CHANNEL for reuse.
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Link: https://lore.kernel.org/r/20220529061853.3044893-3-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Sun, 29 May 2022 06:18:49 +0000 (06:18 +0000)]
dt-bindings: iio: accel: sca3300: Document murata,scl3300
Add DT bindings for Murata scl3300 inclinometer.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Link: https://lore.kernel.org/r/20220529061853.3044893-2-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Andy Shevchenko [Tue, 31 May 2022 21:39:22 +0000 (00:39 +0300)]
iio: adc: nau7802: Make use of device properties
Convert the module to be property provider agnostic and allow
it to be used on non-OF platforms.
Add mod_devicetable.h include.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220531213922.72992-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Andy Shevchenko [Tue, 31 May 2022 21:39:21 +0000 (00:39 +0300)]
iio: adc: nau7802: Convert driver to use ->probe_new()
Use the ->probe_new() callback.
The driver does not use const struct i2c_device_id * argument,
so convert it to utilise the simplified I²C driver registration.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220531213922.72992-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Andy Shevchenko [Tue, 31 May 2022 14:23:53 +0000 (17:23 +0300)]
iio: adc: vf610_adc: Make use of device properties
Convert the module to be property provider agnostic and allow
it to be used on non-OF platforms.
Add mod_devicetable.h include.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220531142353.64925-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Andy Shevchenko [Tue, 31 May 2022 13:53:20 +0000 (16:53 +0300)]
iio: dac: ad5592r: Get rid of OF specifics
Use dev_fwnode() instead of direct OF node dereference when checking
for regulator API error code.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220531135320.63096-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Andy Shevchenko [Tue, 31 May 2022 21:22:18 +0000 (00:22 +0300)]
iio: adc: lpc18xx_adc: Switch from of headers to mod_devicetable.h
There is nothing directly using of specific interfaces in this driver,
so lets not include the headers.
While at it, drop dependency to OF, which currently makes no sense.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220531212218.72189-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Andy Shevchenko [Mon, 30 May 2022 18:13:13 +0000 (21:13 +0300)]
iio: adc: envelope-detector: Drop dependency on OF
Nothing in this driver depends on OF so drop the dependency
to remove the false impression such a dependency exists.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220530181313.2789-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Andy Shevchenko [Mon, 30 May 2022 18:17:06 +0000 (21:17 +0300)]
iio: adc: sd_adc_modulator: Drop dependency on OF
Nothing in this driver depends on OF so drop the dependency
to remove the false impression such a dependency exists.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220530181706.3045-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
keliu [Fri, 27 May 2022 09:17:39 +0000 (09:17 +0000)]
iio: Directly use ida_alloc()/free()
Use ida_alloc()/ida_free() instead of deprecated
ida_simple_get()/ida_simple_remove() .
Signed-off-by: keliu <liuke94@huawei.com>
Link: https://lore.kernel.org/r/20220527091739.2949426-1-liuke94@huawei.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Thu, 26 May 2022 13:33:59 +0000 (13:33 +0000)]
dt-bindings: iio: accel: Add bmi085 and bmi090l bindings
Adds the device-tree bindings for the Bosch
BMI085 and BMI090L IMU, the accelerometer part.
Datasheet: https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmi085-ds001.pdf
Datasheet: https://media.digikey.com/pdf/Data%20Sheets/Bosch/BST-BMI090L-DS000-00.pdf
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220526133359.2261928-7-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Thu, 26 May 2022 13:33:58 +0000 (13:33 +0000)]
iio: accel: bmi088: Add support for bmi090l accel
Add supports for BMI090L, it's a high-performance Inertial
Measurement Unit, with an accelerometer and gyroscope.
The commit adds the accelerometer driver for the SPI interface.
The gyroscope part is already supported by the BMG160 driver.
Same as BMI088, BMI090L have the range of +/-3, 6, 12, and 24g.
Reviewed-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Link: https://lore.kernel.org/r/20220526133359.2261928-6-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Thu, 26 May 2022 13:33:57 +0000 (13:33 +0000)]
iio: accel: bmi088: Add support for bmi085 accel
Add supports for BMI085, an Inertial Measurement Unit,
with an accelerometer and gyroscope.
The commit adds the accelerometer driver for the SPI interface.
The gyroscope part is already supported by the BMG160 driver.
Unlike BMI088, the BMI085 accelerometer ranges are +/-2, 4, 6,
and 8g, the scales are calculated as 9.8/32768*pow(2,reg41+1).
Reviewed-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Link: https://lore.kernel.org/r/20220526133359.2261928-5-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Thu, 26 May 2022 13:33:56 +0000 (13:33 +0000)]
iio: accel: bmi088: modified the device name
iio: accel: bmi088: modified the device name
It is possible to have multiple sensors connected on the same platform.
For support of different sensors, making it possible to obtain the
device name by reading the chip id. If the device was found in the
table but the device tree binding is different, the driver will carry
on with a warning. If no matching device was found, the driver load
the binding chip info.
Tested case, test with bmi085 and bmi090 patches applied:
connect 3 bmi090l to the system, and set device tree compatible:
spi2.0: compatible = "bosch,bmi090l-accel";
spi2.2: compatible = "bosch,bmi088-accel";
spi2.4: compatible = "bosch,bmi085-accel";
Get a warning for the mismatched devices:
bmi088_accel_spi spi2.2: unexpected chip id 0x1A
bmi088_accel_spi spi2.4: unexpected chip id 0x1A
Get the real present device name:
/sys/bus/iio/devices/iio:device1/name:bmi090l-accel
/sys/bus/iio/devices/iio:device3/name:bmi090l-accel
/sys/bus/iio/devices/iio:device5/name:bmi090l-accel
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Link: https://lore.kernel.org/r/20220526133359.2261928-4-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Thu, 26 May 2022 13:33:55 +0000 (13:33 +0000)]
iio: accel: bmi088: Make it possible to config scales
The sensor can set the scales by writing the range register 0x41,
The current driver has no interface to configure it.
The commit adds the interface for config the scales.
Reviewed-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Link: https://lore.kernel.org/r/20220526133359.2261928-3-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
LI Qingwu [Thu, 26 May 2022 13:33:54 +0000 (13:33 +0000)]
iio: accel: bmi088: Modified the scale calculate
The units after application of scale are 100*m/s^2,
The scale calculation is only for the device
with the range of 3, 6, 12, and 24g,
but some other chips have a range of 2, 4, 6, and 8g.
Modified the scales from formula to a list, the scales in the list are
calculated as 9.8/32768*pow(2,reg41+1)*1.5, refer to datasheet 5.3.4.
The new units after the application of scale are m/s^2.
Reviewed-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>
Link: https://lore.kernel.org/r/20220526133359.2261928-2-Qing-wu.Li@leica-geosystems.com.cn
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Alexandru Tachici [Thu, 26 May 2022 13:46:02 +0000 (16:46 +0300)]
dt-bindings: iio: imu: adis16480: update maintainers
Update bindings maintainerns section.
Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
Acked-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Link: https://lore.kernel.org/r/20220526134603.75216-6-alexandru.tachici@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Alexandru Tachici [Thu, 26 May 2022 13:46:01 +0000 (16:46 +0300)]
dt-bindings: iio: dac: AD5770R: update maintainers
Update bindings maintainerns section.
Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
Acked-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Link: https://lore.kernel.org/r/20220526134603.75216-5-alexandru.tachici@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Alexandru Tachici [Thu, 26 May 2022 13:46:00 +0000 (16:46 +0300)]
dt-bindings: iio: adc: axi-adc: update maintainers
Update bindings maintainerns section.
Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
Acked-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Link: https://lore.kernel.org/r/20220526134603.75216-4-alexandru.tachici@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Alexandru Tachici [Thu, 26 May 2022 13:45:59 +0000 (16:45 +0300)]
dt-bindings: iio: adc: AD9467: update maintainers
Update bindings maintainerns section.
Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
Acked-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Link: https://lore.kernel.org/r/20220526134603.75216-3-alexandru.tachici@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Alexandru Tachici [Thu, 26 May 2022 13:45:58 +0000 (16:45 +0300)]
dt-bindings: iio: accel: ADIS16240: update maintainers
Update bindings maintainerns section.
Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
Acked-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Link: https://lore.kernel.org/r/20220526134603.75216-2-alexandru.tachici@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Markuss Broks [Mon, 23 May 2022 17:53:43 +0000 (20:53 +0300)]
proximity: vl53l0x: Handle the reset GPIO
Handle the GPIO connected to the XSHUT/RST_N pin of VL53L0X.
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20220523175344.5845-5-markuss.broks@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Markuss Broks [Mon, 23 May 2022 17:53:42 +0000 (20:53 +0300)]
proximity: vl53l0x: Handle the VDD regulator
Handle the regulator supplying the VDD pin of VL53L0X.
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20220523175344.5845-4-markuss.broks@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Markuss Broks [Mon, 23 May 2022 17:53:41 +0000 (20:53 +0300)]
proximity: vl53l0x: Prefer pre-initialized interrupt flags
On some boards interrupt type might be different than falling edge,
like hardcoded in driver. Leave interrupt flags as they were pre-configured
from the device-tree. If they're not provided, default to falling edge
interrupts.
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20220523175344.5845-3-markuss.broks@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Markuss Broks [Mon, 23 May 2022 17:53:40 +0000 (20:53 +0300)]
dt-bindings: proximity: vl53l0x: Document optional supply and GPIO properties
Add the optional properties for the VL53L0X ToF sensor to the
device-tree binding.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20220523175344.5845-2-markuss.broks@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Li Zhengyu [Mon, 23 May 2022 12:27:55 +0000 (20:27 +0800)]
iio: srf08: Remove redundant if statement
(!val) has been checked outside the loop, remove redundant (val &&)
from loop.
Signed-off-by: Li Zhengyu <lizhengyu3@huawei.com>
Acked-by: Andreas Klinger <ak@it-klinger.de>
Link: https://lore.kernel.org/r/20220523122755.90638-1-lizhengyu3@huawei.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Peter Rosin [Mon, 25 Apr 2022 20:47:08 +0000 (22:47 +0200)]
iio: dac: ti-dac5571: add support for ti,
dac121c081
It fits right in as a single 12-bit DAC.
Reviewed-by: Sean Nyekjaer <sean@geanix.com>
Signed-off-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/a09a49a5-3d01-21f7-02ed-b191d70e7609@axentia.se
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Peter Rosin [Mon, 25 Apr 2022 20:46:58 +0000 (22:46 +0200)]
dt-bindings: iio: ti-dac5571: Add ti,
dac121c081
It works much the same as ti,dac7571, so it fits in the "family" even
if the name is a little bit different.
Reviewed-by: Sean Nyekjaer <sean@geanix.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/a230b7a8-4146-9483-48ee-0bebdd945731@axentia.se
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cosmin Tanislav [Sat, 14 May 2022 18:20:10 +0000 (21:20 +0300)]
iio: accel: adxl367: do not update FIFO watermark on scan mode update
Currently, the driver updates the FIFO watermark inside both
update_scan_mode() and hwfifo_set_watermark(). Inside the IIO core,
hwfifo_set_watermark() is called immediately after update_scan_mode(),
making the first call to set_fifo_samples() redundant.
Remove the first call to set_fifo_samples(), and merge the
set_fifo_samples() function into the set_fifo_watermark()
function. Also, since fifo_set_size is always set inside of
update_scan_mode(), and it cannot be set to 0, remove the
zero check from set_fifo_samples().
Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com>
Link: https://lore.kernel.org/r/20220514182010.152784-1-cosmin.tanislav@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Uwe Kleine-König [Sat, 14 May 2022 13:32:50 +0000 (15:32 +0200)]
iio:magnetometer:mbc150: Make bmc150_magn_remove() return void
bmc150_magn_remove() always returns zero. Make it return no value which
makes it easier to see in the callers that there is no error to handle.
Also the return value of i2c driver remove callbacks is ignored anyway.
This prepares making i2c remove callbacks return void, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20220514133250.307955-1-u.kleine-koenig@pengutronix.de
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Julia Lawall [Sat, 21 May 2022 11:11:18 +0000 (13:11 +0200)]
iio: chemical: bme680: fix typo in comment
Spelling mistake (triple letters) in comment.
Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr>
Link: https://lore.kernel.org/r/20220521111145.81697-68-Julia.Lawall@inria.fr
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Julia Lawall [Sat, 21 May 2022 11:11:04 +0000 (13:11 +0200)]
iio: proximity: ping: fix typo in comment
Spelling mistake (triple letters) in comment.
Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr>
Link: https://lore.kernel.org/r/20220521111145.81697-54-Julia.Lawall@inria.fr
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
projects / platform / kernel / linux-rpi.git / log