platform/upstream/llvm.git
19 months ago[NFC] Simplify documentation about alignment in MCStreamer
Guillaume Chatelet [Thu, 8 Dec 2022 14:33:20 +0000 (14:33 +0000)]
[NFC] Simplify documentation about alignment in MCStreamer

19 months ago[SROA] For non-speculatable `load`s of `select`s -- split block, insert then/else...
Roman Lebedev [Thu, 8 Dec 2022 13:50:19 +0000 (16:50 +0300)]
[SROA] For non-speculatable `load`s of `select`s -- split block, insert then/else blocks, form two-entry PHI node

Currently, SROA is CFG-preserving.
Not doing so does not affect any pipeline test. (???)
Internally, SROA requires Dominator Tree, and uses it solely for the final `-mem2reg` call.

By design, we can't really SROA alloca if their address escapes somehow,
but we have logic to deal with `load` of `select`/`PHI`,
where at least one of the possible addresses prevents promotion,
by speculating the `load`s and `select`ing between loaded values.

As one would expect, that requires ensuring that the speculation is actually legal.
Even ignoring complexity bailouts, that logic does not deal with everything,
e.g. `isSafeToLoadUnconditionally()` does not recurse into hands of `select`.
There can also be cases where the load is genuinely non-speculate.

So if we can't prove that the load can be speculated,
unfold the select, produce two-entry phi node, and perform predicated load.

Now, that transformation must obviously update Dominator Tree,
since we require it later on. Doing so is trivial.
Additionally, we don't want to do this for the final SROA invocation (D136806).

In the end, this ends up having negative (!) compile-time cost:
https://llvm-compile-time-tracker.com/compare.php?from=c6d7e80ec4c17a415673b1cfd25924f98ac83608&to=ddf9600365093ea50d7e278696cbfa01641c959d&stat=instructions:u

Though indeed, this only deals with `select`s, `PHI`s are still using speculation.

Should we update some more analysis?

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D138238

19 months ago[X86] Add HasCLFLUSH pseudo-predicate (Issue #19039)
Simon Pilgrim [Thu, 8 Dec 2022 13:51:08 +0000 (13:51 +0000)]
[X86] Add HasCLFLUSH pseudo-predicate (Issue #19039)

Similar to what we've done for HasMFence - this puts into place a pseudo-predicate for CLFLUSH instructions that separates it from HasSSE2 to make it easier to use CLFLUSH even when SSE/fpmath has been disabled - technically CLFLUSH has its own CPUID bit, so could be available on x86 cores entirely without SSE, but I don't think thats ever happened or likely to happen.

19 months ago[lld/mac] Abort link immediately on invalid -undefined argument
Nico Weber [Wed, 7 Dec 2022 18:48:08 +0000 (13:48 -0500)]
[lld/mac] Abort link immediately on invalid -undefined argument

I tried `-undefined suppress` without `-flat_namespace`.
lld printed `'-undefined suppress' only valid with '-flat_namespace'`
followed by many many screenfuls of error messages about undefined
symbols, making the original diag hard to see.

This is probably the common case when using `-undefined`, so let's
just abort the link immediately when there's an invalid `-undefined`
arg.

Differential Revision: https://reviews.llvm.org/D139559

19 months ago[AMDGPU] Add test that spills WWM CSRs twice
Sebastian Neubauer [Wed, 13 Jul 2022 16:42:40 +0000 (18:42 +0200)]
[AMDGPU] Add test that spills WWM CSRs twice

Add a test to show a deficit in the current wwm/spilling code that
creates double saves and restores for v40 and v41.

This case came up in D124193.

Differential Revision: https://reviews.llvm.org/D139626

19 months ago[WebAssembly] Initialize missing passes in WebAssemblyTargetMachine
Luke Lau [Thu, 8 Dec 2022 12:56:15 +0000 (12:56 +0000)]
[WebAssembly] Initialize missing passes in WebAssemblyTargetMachine

These passes were lying around but weren't initialized, so they weren't
showing up in -print-after-all.

Differential Revision: https://reviews.llvm.org/D139440

19 months ago[tooling] use std::optional in tooling StandardLibrary.h/.cpp, NFC
Haojian Wu [Thu, 8 Dec 2022 12:36:33 +0000 (13:36 +0100)]
[tooling] use std::optional in tooling StandardLibrary.h/.cpp, NFC

19 months agoRevert "[IPSCCP] Move the IPSCCP run function under the IPO directory."
Alexandros Lamprineas [Thu, 8 Dec 2022 12:42:34 +0000 (12:42 +0000)]
Revert "[IPSCCP] Move the IPSCCP run function under the IPO directory."

This reverts commit 42c2dc401742266da3e0251b6c1ca491f4779963.

This broke some buildbots:

 undefined reference to `llvm::createBitTrackingDCEPass()'
 undefined reference to `llvm::createAlignmentFromAssumptionsPass()'
 undefined reference to `llvm::createLoopUnrollPass(int, bool, bool, int, int, int, int, int, int)'
 undefined reference to `llvm::createLICMPass(unsigned int, unsigned int, bool)'
 undefined reference to `llvm::createWarnMissedTransformationsPass()'
 undefined reference to `llvm::createAlignmentFromAssumptionsPass()'
 undefined reference to `llvm::createCallSiteSplittingPass()'
 undefined reference to `llvm::createCFGSimplificationPass(llvm::SimplifyCFGOptions, std::function<bool (llvm::Function const&)>)'
 undefined reference to `llvm::createFloat2IntPass()'
 undefined reference to `llvm::createLowerConstantIntrinsicsPass()'
 undefined reference to `llvm::createLoopRotatePass(int, bool)'
 undefined reference to `llvm::createLoopDistributePass()'
 undefined reference to `llvm::createLoopSinkPass()'
 undefined reference to `llvm::createInstSimplifyLegacyPass()'
 undefined reference to `llvm::createDivRemPairsPass()'
 undefined reference to `llvm::createCFGSimplificationPass(llvm::SimplifyCFGOptions, std::function<bool (llvm::Function const&)>)'
 undefined reference to `llvm::SetLicmMssaOptCap'
 undefined reference to `llvm::SetLicmMssaNoAccForPromotionCap'
 undefined reference to `llvm::ForgetSCEVInLoopUnroll'

19 months agoRevert "[FuncSpec] Make the Function Specializer part of the IPSCCP pass."
Alexandros Lamprineas [Thu, 8 Dec 2022 12:38:24 +0000 (12:38 +0000)]
Revert "[FuncSpec] Make the Function Specializer part of the IPSCCP pass."

This reverts commit 877a9f9abec61f06e39f1cd872e37b828139c2d1.

It depends on the parent revision 42c2dc401742266da3e0251b6c1ca491f4779963
which needs to be reverted as it broke some buildbots, so reverting both.

19 months ago[C2x] Relaxing requirements for va_start
Aaron Ballman [Thu, 8 Dec 2022 12:33:42 +0000 (07:33 -0500)]
[C2x] Relaxing requirements for va_start

This implements WG14 N2975 relaxing requirements for va_start
(https://www.open-std.org/jtc1/sc22/wg14/www/docs/n2975.pdf), which
does two things:

1) Allows the declaration of a variadic function without any named
arguments. e.g., void f(...) is now valid, as in C++.
2) Modified the signature of the va_start macro to be a variadic macro
that accepts one or more arguments; the second (and later) arguments
are not expanded or evaluated.

I followed the GCC implementation in terms of not modifying the
behavior of `__builtin_va_start` (it still requires exactly two
arguments), but this approach has led to several QoI issues that I've
documented with FIXME comments in the test. Specifically, the
requirement that we do not evaluate *or expand* the second and later
arguments means it's no longer possible to issue diagnostics for
compatibility with older C versions and C++. I am reaching out to
folks in WG14 to see if we can get an NB comment to address these
concerns (the US comment period has already closed, so I cannot file
the comment myself), so the diagnostic behavior may change in the
future.

I took this opportunity to add some documentation for all the related
builtins in this area, since there was no documentation for them yet.

Differential Revision: https://reviews.llvm.org/D139436

19 months ago[gn build] port eeee51e4bb (dsymutil no longer driver_executable for a while)
Nico Weber [Thu, 8 Dec 2022 12:29:31 +0000 (07:29 -0500)]
[gn build] port eeee51e4bb (dsymutil no longer driver_executable for a while)

19 months ago[FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Alexandros Lamprineas [Mon, 28 Nov 2022 21:47:59 +0000 (21:47 +0000)]
[FuncSpec] Make the Function Specializer part of the IPSCCP pass.

The aim of this patch is to minimize the compilation time overhead of
running Function Specialization. It is about 40% slower to run as a
standalone pass (IPSCCP + FuncSpec vs IPSCCP with FuncSpec) according
to my measurements. I compiled the llvm testsuite with NewPM-O3 + LTO
and measured single threaded [user + system] time of IPSCCP and FuncSpec
by passing the '-time-passes' option to lld. Then I compared the two
configurations in terms of Instruction Count of the total compilation
(not of the individual passes) as in https://llvm-compile-time-tracker.com.
Geomean for non-LTO builds is -0.25% and LTO is -0.5% approximately.

You can find more info below:

https://discourse.llvm.org/t/rfc-should-we-enable-function-specialization/61518

Differential Revision: https://reviews.llvm.org/D126455

19 months ago[IPSCCP] Move the IPSCCP run function under the IPO directory.
Alexandros Lamprineas [Mon, 28 Nov 2022 13:01:29 +0000 (13:01 +0000)]
[IPSCCP] Move the IPSCCP run function under the IPO directory.

The LLVMipo library no longer depends on the Scalar component.
The shared functions between IPSCCP and SCCP have been moved
under Utils, in the SCCPSolver.

This is preliminary work for D126455, in order to break a cyclic
dependency between LLVM libraries.

Differential Revision: https://reviews.llvm.org/D138654

19 months ago[LLDB][LoongArch] Make software single stepping work
Hui Li [Thu, 8 Dec 2022 11:59:11 +0000 (19:59 +0800)]
[LLDB][LoongArch] Make software single stepping work

Hardware single stepping is not currently supported by the linux kernel.
In order to support single step debugging, add EmulateInstructionLoongArch
to implement the software Single Stepping. This patch only support the
simplest single step execution of non-jump instructions.

Reviewed By: SixWeining, DavidSpickett

Differential Revision: https://reviews.llvm.org/D139158

19 months agoRevert "[LLDB][LoongArch] Make software single stepping work"
Weining Lu [Thu, 8 Dec 2022 11:55:05 +0000 (19:55 +0800)]
Revert "[LLDB][LoongArch] Make software single stepping work"

This reverts commit 3a9e07b1e7f4718a0e117f3a732f1679c4bf2e30.

Reason to revert: author name is wrong.

19 months ago[DAG] Teach isConstOrConstSplat about SPLAT_VECTORs
David Green [Thu, 8 Dec 2022 11:53:25 +0000 (11:53 +0000)]
[DAG] Teach isConstOrConstSplat about SPLAT_VECTORs

This teaches the DemandedElts version of isConstOrConstSplat about
SPLAT_VECTORS, in the same way as the non-DemandedElts version by
calling the demanded-bits version from the non-demanded-bits version.

Differential Revision: https://reviews.llvm.org/D128919

19 months ago[clangd] Add a newline-eof to the system-include-extractor.test
Haojian Wu [Thu, 8 Dec 2022 11:43:15 +0000 (12:43 +0100)]
[clangd] Add a newline-eof to the system-include-extractor.test

This test is executed with config enabled, and it fails if there is an
extra (-Wnewline-eof) compile flag from the user config.

19 months ago[test] Remove duplicate RUN lines
Bjorn Pettersson [Thu, 8 Dec 2022 11:23:49 +0000 (12:23 +0100)]
[test] Remove duplicate RUN lines

A few more that I missed in commit 3528e63d89305907b3d6e.

There could be more duplicates remaining, since I've only focused
on exactly duplicated "RUN: opt" lines (ignoring multi line RUN
lines ending with '\').

19 months agoFix MSVC "not all control paths return a value" warning. NFC.
Simon Pilgrim [Thu, 8 Dec 2022 11:44:07 +0000 (11:44 +0000)]
Fix MSVC "not all control paths return a value" warning. NFC.

19 months ago[clang-tidy] Do not warn about redundant static in misc-use-anonymous-namespace
Carlos Galvez [Fri, 2 Dec 2022 12:48:16 +0000 (12:48 +0000)]
[clang-tidy] Do not warn about redundant static in misc-use-anonymous-namespace

The same functionality is already implemented in the
readability-static-definition-in-anonymous-namespace
check, including automatic fixes.

Differential Revision: https://reviews.llvm.org/D139197

19 months agoRevert "[llvm] Replace llvm::Any with std::any"
Sebastian Neubauer [Thu, 8 Dec 2022 11:06:44 +0000 (12:06 +0100)]
Revert "[llvm] Replace llvm::Any with std::any"

msvc fails to link when using any_cast. This seems to be fixed recently
only.

https://developercommunity.visualstudio.com/t/stdany-doesnt-link-when-exceptions-are-disabled/376072

This reverts commit aeac2e4884a3ce62c920cd51806a9396da64d9f7.

19 months ago[LLDB][LoongArch] Make software single stepping work
Weining Lu [Thu, 8 Dec 2022 11:06:07 +0000 (19:06 +0800)]
[LLDB][LoongArch] Make software single stepping work

Hardware single stepping is not currently supported by the linux kernel.
In order to support single step debugging, add EmulateInstructionLoongArch
to implement the software Single Stepping. This patch only support the
simplest single step execution of non-jump instructions.

Reviewed By: SixWeining, DavidSpickett

Differential Revision: https://reviews.llvm.org/D139158

19 months ago[llvm] Replace llvm::Any with std::any
Sebastian Neubauer [Thu, 8 Dec 2022 10:48:00 +0000 (11:48 +0100)]
[llvm] Replace llvm::Any with std::any

llvm::Any had several bugs in the past, due to being sensitive to symbol
visibility. (See D101972 and D108943)

Even with these fixes applied, I still encounter the same issue on
Windows.

Similar to llvm::Optional going away in favor of std::optional, we can
use std::any from C++17.

Using std::any fixes the problem and puts the burden to do it correctly
on the standard library.

Differential Revision: https://reviews.llvm.org/D139532

19 months ago[test] Remove duplicate RUN lines in Transform tests
Bjorn Pettersson [Thu, 8 Dec 2022 10:28:30 +0000 (11:28 +0100)]
[test] Remove duplicate RUN lines in Transform tests

19 months ago[LoongArch] Allow writing unaligned nop sequences
wanglei [Thu, 8 Dec 2022 10:08:51 +0000 (18:08 +0800)]
[LoongArch] Allow writing unaligned nop sequences

In case of unaligned nop sequences, pad to the nearest 4-byte boundary
with zeros before filling with `nop` instructions. This is consistent
with gas behavior, and is necessary to compile the Linux kernel with
LLVM IAS.

Replace `support::endian::write` with `OS.write` while at it. This is
simpler and correct because we only have little endian.

Reviewed By: SixWeining, xen0n

Differential Revision: https://reviews.llvm.org/D139285

19 months ago[include-cleaner] Handle base class member access from derived class.
Viktoriia Bakalova [Thu, 1 Dec 2022 10:28:06 +0000 (10:28 +0000)]
[include-cleaner] Handle base class member access from derived class.

Fix: https://github.com/llvm/llvm-project/issues/59251
Differential Revision: https://reviews.llvm.org/D139087

19 months ago[InstSimplify] Do not remove insertvalue of undef into poison
Nikita Popov [Thu, 8 Dec 2022 10:12:26 +0000 (11:12 +0100)]
[InstSimplify] Do not remove insertvalue of undef into poison

We cannot remove an insertvalue of undef if it inserts into a
potentially poison value. The new implementation matches that of
insertelement.

See https://alive2.llvm.org/ce/z/pCcFsW for the previously
incorrect transform.

19 months agoRevert "[AArch64] Select SMULL for zero extended vectors when top bit is zero"
Florian Hahn [Thu, 8 Dec 2022 10:28:33 +0000 (10:28 +0000)]
Revert "[AArch64] Select SMULL for zero extended vectors when top bit is zero"

This reverts commit f9e0390751cb5eefbbbc191f851c52422acacab1.

The patch causes a crash for the IR below:

target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx"

define void @test(ptr %data, <8 x i16> %v) {
entry:
  %0 = sext <8 x i16> %v to <8 x i32>
  %1 = mul <8 x i32> %0, <i32 35584, i32 35584, i32 35584, i32 35584, i32 35584, i32 35584, i32 35584, i32 35584>
  %2 = lshr <8 x i32> %1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
  %3 = trunc <8 x i32> %2 to <8 x i16>
  store <8 x i16> %3, ptr %data, align 2
  ret void
}

19 months ago[include-cleaner] Remove filtering from UsingDecl visit.
Viktoriia Bakalova [Mon, 28 Nov 2022 15:28:02 +0000 (15:28 +0000)]
[include-cleaner] Remove filtering from UsingDecl visit.

Removes filtering from the VisitUsingDecl method for implementation files.

Differential Revision: https://reviews.llvm.org/D138821

19 months ago[InstSimplify] Fix check lines (NFC)
Nikita Popov [Thu, 8 Dec 2022 10:22:19 +0000 (11:22 +0100)]
[InstSimplify] Fix check lines (NFC)

Accidentally used the wrong binary in the previous commit.

19 months ago[InstSimplify] Add test for insertvalue of undef (NFC)
Nikita Popov [Thu, 8 Dec 2022 10:16:25 +0000 (11:16 +0100)]
[InstSimplify] Add test for insertvalue of undef (NFC)

19 months ago[Arm][AArch64] Add support for v8.9-A/v9.4-A base extensions
Lucas Prates [Mon, 5 Dec 2022 13:26:21 +0000 (13:26 +0000)]
[Arm][AArch64] Add support for v8.9-A/v9.4-A base extensions

This implements the base extensions that are part of the v8.9-A and
v9.4-A architecture versions, including:

* The Clear BHB Instruction (FEAT_CLRBHB)
* The Speculation Restriction Instruction (FEAT_SPECRES2)
* The SLC target for the PRFM instruction
* New system registers:
  * ID_AA64PFR2_EL1
  * ID_AA64MMFR3_EL1
  * HFGITR2_EL2
  * SCTLR2_EL3

More information on the new extensions can be found on:

* https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-2022
* https://developer.arm.com/downloads/-/exploration-tools

Contributors: Sam Elliott, Tomas Matheson and Son Tuan Vu.

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D139424

19 months ago[ELF] Merge SHT_RISCV_ATTRIBUTES sections
Fangrui Song [Thu, 8 Dec 2022 09:53:40 +0000 (09:53 +0000)]
[ELF] Merge SHT_RISCV_ATTRIBUTES sections

Currently we take the first SHT_RISCV_ATTRIBUTES (.riscv.attributes) as the
output. If we link an object without an extension with an object with the
extension, the output Tag_RISCV_arch may not contain the extension and some
tools like objdump -d will not decode the related instructions.

This patch implements
Tag_RISCV_stack_align/Tag_RISCV_arch/Tag_RISCV_unaligned_access merge as
specified by
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#attributes

For the deprecated Tag_RISCV_priv_spec{,_minor,_revision}, dump the attribute to
the output iff all input agree on the value. This is different from GNU ld but
our simple approach should be ok for deprecated tags.

`RISCVAttributeParser::handler` currently warns about unknown tags. This
behavior is retained. In GNU ld arm, tags >= 64 (mod 128) are ignored with a
warning. If RISC-V ever wants to do something similar
(https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/352), consider
documenting it in the psABI and changing RISCVAttributeParser.

Like GNU ld, zero value integer attributes and empty string attributes are not
dumped to the output.

Reviewed By: asb, kito-cheng

Differential Revision: https://reviews.llvm.org/D138550

19 months ago[InstCombine] Regenerate test checks (NFC)
Nikita Popov [Thu, 8 Dec 2022 09:52:02 +0000 (10:52 +0100)]
[InstCombine] Regenerate test checks (NFC)

Update the check prefixes to allow auto-generation. WIN was
redundant with NOSTPCPY, and CHECK-IPRINTF should specialize
WITHSTPCPY.

19 months agoImplement CWG2631
Corentin Jabot [Sun, 23 Oct 2022 15:32:58 +0000 (17:32 +0200)]
Implement CWG2631

Implement https://cplusplus.github.io/CWG/issues/2631.html.

Immediate calls in default arguments and defaults members
are not evaluated.

Instead, we evaluate them when constructing a
`CXXDefaultArgExpr`/`BuildCXXDefaultInitExpr`.

The immediate calls are executed by doing a
transform on the initializing expression.

Note that lambdas are not considering subexpressions so
we do not need to transform them.

As a result of this patch, unused default member
initializers are not considered odr-used, and
errors about members binding to local variables
in an outer scope only surface at the point
where a constructor is defined.

Reviewed By: aaron.ballman, #clang-language-wg

Differential Revision: https://reviews.llvm.org/D136554

19 months agoStore OptTable::Info::Name as a StringRef
serge-sans-paille [Sun, 4 Dec 2022 08:33:14 +0000 (09:33 +0100)]
Store OptTable::Info::Name as a StringRef

This is a recommit of 8ae18303f97d5dcfaecc90b4d87effb2011ed82e,
with a few cleanups.

This avoids implicit conversion to StringRef at several points, which in
turns avoid redundant calls to strlen.

As a side effect, this greatly simplifies the implementation of
StrCmpOptionNameIgnoreCase.

It also eventually gives a consistent, humble speedup in compilation
time (timing updated since original commit).

https://llvm-compile-time-tracker.com/compare.php?from=de4b6a1bc64db33643f001ad45fae7b92b4a4688&to=c23a93d1292052b4be2fbe8c586fa31143d0c7ed&stat=instructions:u

Differential Revision: https://reviews.llvm.org/D139274

19 months ago[InstCombine] Regenerate test checks (NFC)
Nikita Popov [Thu, 8 Dec 2022 09:24:10 +0000 (10:24 +0100)]
[InstCombine] Regenerate test checks (NFC)

Use generated check with --check-globals to verify that the TBAA
metadata is correct.

19 months ago[InstCombine] Regenerate test checks (NFC)
Nikita Popov [Thu, 8 Dec 2022 09:20:21 +0000 (10:20 +0100)]
[InstCombine] Regenerate test checks (NFC)

Also clean up some redundant attributes / metadata while here.

19 months ago[Inline] Regenerate test checks (NFC)
Nikita Popov [Thu, 8 Dec 2022 09:16:06 +0000 (10:16 +0100)]
[Inline] Regenerate test checks (NFC)

Don't use anon names, convert to opaque pointers and use
generated check lines.

19 months ago[Inline] Convert some tests to opaque pointers (NFC)
Nikita Popov [Thu, 8 Dec 2022 09:04:43 +0000 (10:04 +0100)]
[Inline] Convert some tests to opaque pointers (NFC)

19 months ago[SCEV] Compute symbolic exit count for 'and' conditions
Max Kazantsev [Thu, 8 Dec 2022 09:04:01 +0000 (16:04 +0700)]
[SCEV] Compute symbolic exit count for 'and' conditions

If loop exits by condition like `A < B && X < Y`, and at least one of symbolic max
exit counts for these conditions is known, it can be used as estimate of symbolic
max exit count for whole branch. If both are known, then we can use their umin
as the estimate.

Differential Revision: https://reviews.llvm.org/D139403
Reviewed By: nikic

19 months ago[Alignment] Use Align in MCStreamer::emitTBSSSymbol
Guillaume Chatelet [Wed, 7 Dec 2022 16:47:48 +0000 (16:47 +0000)]
[Alignment] Use Align in MCStreamer::emitTBSSSymbol

In the same vein as D139439, the patch is not NFC as there is no way to check all downstream implementations but the patch seems pretty safe.

Differential Revision: https://reviews.llvm.org/D139548

19 months ago[DebugInfo] Store optional DIFile::Source as pointer
Jonas Hahnfeld [Thu, 1 Dec 2022 13:14:43 +0000 (14:14 +0100)]
[DebugInfo] Store optional DIFile::Source as pointer

getCanonicalMDString() also returns a nullptr for empty strings, which
tripped over the getSource() method. Solve the ambiguity of no source
versus an optional containing a nullptr by simply storing a pointer.

Differential Revision: https://reviews.llvm.org/D138658

19 months agoFix an unused-variable warning in release build, NFC
Haojian Wu [Thu, 8 Dec 2022 08:56:32 +0000 (09:56 +0100)]
Fix an unused-variable warning in release build, NFC

19 months agoUpdate the bazel BUILD for dsymutil binary.
Haojian Wu [Thu, 8 Dec 2022 08:51:34 +0000 (09:51 +0100)]
Update the bazel BUILD for dsymutil binary.

Reflect the change eeee51e4bb9998c70737a8b771fc1a7884cfedd1

19 months ago[flang] Handle polymorphic passed object in elemental call
Valentin Clement [Thu, 8 Dec 2022 08:47:06 +0000 (09:47 +0100)]
[flang] Handle polymorphic passed object in elemental call

The passed object is placed in the passed arguments by semantics.
When the TBP to be called is an elemental subroutine or function it has to be
handled accordingly.

Reviewed By: jeanPerier, PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D139537

19 months ago[llvm] Call reserve before push_back in a loop
Gregory Alfonso [Thu, 8 Dec 2022 08:42:50 +0000 (08:42 +0000)]
[llvm] Call reserve before push_back in a loop

It is generally good practice, if you know how big the vector is going to be in the end, to reserve before continually calling "push_back" or "emplace_back"

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D139483

19 months ago[libc++][NFC] Rename __libcpp_*_or_builtin to __constexpr_*
Nikolas Klauser [Wed, 7 Dec 2022 11:05:32 +0000 (12:05 +0100)]
[libc++][NFC] Rename __libcpp_*_or_builtin to __constexpr_*

We normally use the `__libcpp_` prefix to backport functions, but that doesn't really make sense here. The functions are always available. Using `__constexpr_` makes the intended use of the functions clear.

Reviewed By: Mordante, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D139521

19 months ago[flang] add hlfir.noreassoc codegen
Jean Perier [Thu, 8 Dec 2022 08:33:01 +0000 (09:33 +0100)]
[flang] add hlfir.noreassoc codegen

Differential Revision: https://reviews.llvm.org/D139542

19 months ago[flang] Add hlfir.as_expr character scalar codegen
Jean Perier [Thu, 8 Dec 2022 08:30:32 +0000 (09:30 +0100)]
[flang] Add hlfir.as_expr character scalar codegen

Creates a copy of the operand.

Differential Revision: https://reviews.llvm.org/D139533

19 months ago[Test] Add test for logical_and, rename old one into logical_or
Max Kazantsev [Thu, 8 Dec 2022 08:26:18 +0000 (15:26 +0700)]
[Test] Add test for logical_and, rename old one into logical_or

19 months ago[LoongArch] Rename the test file and separate the tests on LA32 and LA64. NFC.
gonglingqin [Thu, 8 Dec 2022 07:39:21 +0000 (15:39 +0800)]
[LoongArch] Rename the test file and separate the tests on LA32 and LA64. NFC.

Use intrinsic-la32*.c to test the intrinsics of loongarch32.
Use intrinsic-la64*.c to test the intrinsics of loongarch64.

19 months ago[AArch64] Add tests for logical op with not; NFC
chenglin.bi [Thu, 8 Dec 2022 08:20:11 +0000 (16:20 +0800)]
[AArch64] Add tests for logical op with not; NFC

19 months ago[mlir][spirv] Support conversion of `CopySignOp` to spirv for 1D vector with 1 element
Guray Ozen [Thu, 8 Dec 2022 08:06:00 +0000 (09:06 +0100)]
[mlir][spirv] Support conversion of `CopySignOp` to spirv for 1D vector with 1 element

Conversion of CopySignOp to SPIRV is supported for scalar and vectors but not 1D vectors with 1 element (aka vector<1xf32>). This revisions adds supports this by treating them as scalars.

An alternative solution would be to allow 0D vectors for SPIRV, but the spec [0] strictly defines the vector type as non-0D.
"Vector: An ordered homogeneous collection of two or more scalars. Vector sizes are quite restrictive and dependent on the execution model."

[0] https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#_types

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D139518

19 months ago[SCEV] Track SymbolicMaxNotTaken in BECountUsers
Nikita Popov [Thu, 8 Dec 2022 07:51:16 +0000 (08:51 +0100)]
[SCEV] Track SymbolicMaxNotTaken in BECountUsers

19 months ago[RISCV] Add test for extract the first element from mask vector.
jacquesguan [Wed, 7 Dec 2022 07:27:10 +0000 (15:27 +0800)]
[RISCV] Add test for extract the first element from mask vector.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D139510

19 months ago[mlir][ExpandStridedMetadata] Handle collapse_shape of dim of size 1 gracefully
Quentin Colombet [Mon, 5 Dec 2022 15:11:44 +0000 (15:11 +0000)]
[mlir][ExpandStridedMetadata] Handle collapse_shape of dim of size 1 gracefully

Collapsing dimensions of size 1 with random strides (a.k.a.
non-contiguous w.r.t. collapsed dimensions) is a grey area that we'd
like to clean-up. (See https://reviews.llvm.org/D136483#3909856)

That said, the implementation in `memref-to-llvm` currently skips
dimensions of size 1 when computing the stride of a group.

While longer term we may want to clean that up, for now matches this
behavior, at least in the static case.

For the dynamic case, for this patch we stick to `min(group strides)`.
However, if we want to handle the dynamic cases correctly while allowing
non-truly-contiguous dynamic size of 1, we would need to `if-then-else`
every dynamic size. In other words `min(stride_i, for all i in group and
dim_i != 1)`.

I didn't implement that in this patch at the moment since
`memref-to-llvm` is technically broken in the general case for this. (It
currently would only produce something sensible for row major tensors.)

Differential Revision: https://reviews.llvm.org/D139329

19 months ago[llvm-driver] Rename dsynutil_main to main after removing from driver
Alex Brachet [Thu, 8 Dec 2022 07:31:11 +0000 (07:31 +0000)]
[llvm-driver] Rename dsynutil_main to main after removing from driver

19 months ago[llvm-driver] Temporarily remove dsymutil
Alex Brachet [Thu, 8 Dec 2022 07:19:05 +0000 (07:19 +0000)]
[llvm-driver] Temporarily remove dsymutil

A recent change made it such that target_link_libraries is always
called and not conditionally. target_link_libraries doesn't
currently work when LLVM_TOOL_LLVM_DRIVER_BUILD=On. This should
be fixed in the future, but for now let's just remove dsymutil
as part of the llvm-driver build.

Differential Revision: https://reviews.llvm.org/D139588

19 months ago[AArch64] Select SMULL for zero extended vectors when top bit is zero
Zain Jaffal [Thu, 8 Dec 2022 06:21:53 +0000 (08:21 +0200)]
[AArch64] Select SMULL for zero extended vectors when top bit is zero

we can safely replace a `zext` instruction with `sext` if the top bit is zero. This is useful because we can select `smull` when both operands are sign extended.

Reviewed By: fhahn, dmgreen

Differential Revision: https://reviews.llvm.org/D134711

19 months ago[Attributor] Keep complex select and PHI instructions in AAPotentialValues
Johannes Doerfert [Fri, 7 Oct 2022 18:52:51 +0000 (11:52 -0700)]
[Attributor] Keep complex select and PHI instructions in AAPotentialValues

If a select or PHI instruction cannot be simplified to a single value it
is often beneficial to keep the value intact rather than looking at all
the operands. The reason is that various users require a single value
and consequently can deal with the select or PHI but not multiple
operands. Recursive calls of `Attributor::getAssumedSimplifiedValues`
will be required to take such select and PHI instructions apart.

19 months ago[NFC][AAPointerInfo] rename OffsetAndSize to RangeTy
Sameer Sahasrabuddhe [Tue, 1 Nov 2022 04:34:32 +0000 (10:04 +0530)]
[NFC][AAPointerInfo] rename OffsetAndSize to RangeTy

This is in preparation for future changes that introduce an actual list of
ranges per Access, to be called a RangeList.

Differential Revision: https://reviews.llvm.org/D138644

19 months ago[X86] Add test masked_compressstore_isel.ll
Xiang1 Zhang [Thu, 8 Dec 2022 06:42:53 +0000 (14:42 +0800)]
[X86] Add test masked_compressstore_isel.ll

19 months ago[OpenMP] Make barrier elimination work in the presence of llvm.assume
Johannes Doerfert [Tue, 4 Oct 2022 14:45:54 +0000 (07:45 -0700)]
[OpenMP] Make barrier elimination work in the presence of llvm.assume

Assumptions are droppable and eliminating them to eliminate barriers
seems reasonable.

19 months ago[ObjCopy] Use std::optional instead of llvm::Optional in COFFConfig.h (NFC)
Kazu Hirata [Thu, 8 Dec 2022 06:34:09 +0000 (22:34 -0800)]
[ObjCopy] Use std::optional instead of llvm::Optional in COFFConfig.h (NFC)

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

19 months ago[ObjCopy] Use std::optional instead of llvm::Optional in CommonConfig.h (NFC)
Kazu Hirata [Thu, 8 Dec 2022 06:34:07 +0000 (22:34 -0800)]
[ObjCopy] Use std::optional instead of llvm::Optional in CommonConfig.h (NFC)

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

19 months ago[Attributor] Delete stores only required for assumes (with the assumes)
Johannes Doerfert [Tue, 4 Oct 2022 14:27:20 +0000 (07:27 -0700)]
[Attributor] Delete stores only required for assumes (with the assumes)

We keep loads if they feed into assumes but even if we cannot predict
their value we should delete them if the associated stores are deleted
as well. This is not perfect but prioritizes deleting stores now.

19 months ago[Clang][LoongArch] Add intrinsic for csrrd, csrwr and csrxchg
gonglingqin [Thu, 8 Dec 2022 01:17:39 +0000 (09:17 +0800)]
[Clang][LoongArch] Add intrinsic for csrrd, csrwr and csrxchg

These intrinsics are required by Linux [1].

[1]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/loongarch/include/asm/loongarch.h?h=v6.0&id=4fe89d07dcc2804c8b562f6c7896a45643d34b2f#n232

Differential Revision: https://reviews.llvm.org/D139288

19 months ago[Test] Add two more tests for symtolic count with arith and logical AND
Max Kazantsev [Thu, 8 Dec 2022 06:05:44 +0000 (13:05 +0700)]
[Test] Add two more tests for symtolic count with arith and logical AND

19 months ago[llvm] Don't include Optional.h (NFC)
Kazu Hirata [Thu, 8 Dec 2022 04:48:53 +0000 (20:48 -0800)]
[llvm] Don't include Optional.h (NFC)

These source files no longer use Optional<T>.

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

19 months ago[llvm] Don't include STLForwardCompat.h (NFC)
Kazu Hirata [Thu, 8 Dec 2022 04:34:41 +0000 (20:34 -0800)]
[llvm] Don't include STLForwardCompat.h (NFC)

STLForwardCompat.h defines remove_cvref and remove_cvref_t.  These
source files use neither one of those.

19 months ago[clang-tools-extra] Use std::nullopt instead of None in comments (NFC)
Kazu Hirata [Thu, 8 Dec 2022 04:22:27 +0000 (20:22 -0800)]
[clang-tools-extra] Use std::nullopt instead of None in comments (NFC)

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

19 months ago[mlir] Use std::nullopt instead of None in comments (NFC)
Kazu Hirata [Thu, 8 Dec 2022 04:17:39 +0000 (20:17 -0800)]
[mlir] Use std::nullopt instead of None in comments (NFC)

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

19 months ago[RISCV] Use bseti for 2048 in RISCVMatInt when Zbs is enabled.
Craig Topper [Thu, 8 Dec 2022 03:49:54 +0000 (19:49 -0800)]
[RISCV] Use bseti for 2048 in RISCVMatInt when Zbs is enabled.

2048 requires an LUI and ADDI instruction due to ADDI using a
signed immediate. It can also be done with C.LI+C.SLLI for better
code size.

With Zbs we can use a single BSETI to have an instruction.

Reorder the checks so that BSETI is checked first, with an extra
qualification to prefer a single LUI or ADDI when possible. I'm
continuing to think about other ways to structure this code, but
this works for now.

Fixes PR59362.

19 months ago[mlir] Use std::nullopt instead of llvm::None (NFC)
Kazu Hirata [Thu, 8 Dec 2022 04:10:59 +0000 (20:10 -0800)]
[mlir] Use std::nullopt instead of llvm::None (NFC)

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

19 months ago[flang] Use std::nullopt instead of llvm::None (NFC)
Kazu Hirata [Thu, 8 Dec 2022 04:10:57 +0000 (20:10 -0800)]
[flang] Use std::nullopt instead of llvm::None (NFC)

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

19 months ago[RISCV] Support F16 vectors with Zfhmin+Zvfh.
Craig Topper [Thu, 8 Dec 2022 03:14:10 +0000 (19:14 -0800)]
[RISCV] Support F16 vectors with Zfhmin+Zvfh.

I've enabled Zfhmin on 2 basic tests to show this isn't
completely broken.

Reviewed By: monkchiang

Differential Revision: https://reviews.llvm.org/D139562

19 months ago[RISCV] Add accessors to RISCVMatInt::Inst.
Craig Topper [Thu, 8 Dec 2022 03:01:56 +0000 (19:01 -0800)]
[RISCV] Add accessors to RISCVMatInt::Inst.

Make fields private. This helps hide that the Imm field doesn't
store a full int64_t.

19 months ago[gn build] alphabetize conditional branches in tsan/rtl/BUILD.gn
Nico Weber [Thu, 8 Dec 2022 02:42:42 +0000 (21:42 -0500)]
[gn build] alphabetize conditional branches in tsan/rtl/BUILD.gn

19 months ago[gn build] port b89b42b31c45
Nico Weber [Thu, 8 Dec 2022 02:42:08 +0000 (21:42 -0500)]
[gn build] port b89b42b31c45

19 months ago[OpenMP][FIX] Remove AssertingVHs that outlive their values
Johannes Doerfert [Thu, 8 Dec 2022 01:41:00 +0000 (17:41 -0800)]
[OpenMP][FIX] Remove AssertingVHs that outlive their values

The map with AssertingVHs has been moved into the OpenMPIRBuilder which extended their lifetime.
On NVIDIA this will cause an assertion. This simply removes the AssertingVH wrapper.

19 months ago[demangler][LoongArch] Correct the mangled_size for long double
Weining Lu [Thu, 8 Dec 2022 02:21:16 +0000 (10:21 +0800)]
[demangler][LoongArch] Correct the mangled_size for long double

The size of long double in LoongArch (both LA32 and LA64) is 16 bytes, thus
the mangled_size should be 32.

This is same as RISCV's change in D126480.

Reviewed By: xen0n

Differential Revision: https://reviews.llvm.org/D138981

19 months ago[exegesis] SnippetRepetitor: don't deal with terminator instructions
Roman Lebedev [Thu, 8 Dec 2022 02:00:36 +0000 (05:00 +0300)]
[exegesis] SnippetRepetitor: don't deal with terminator instructions

These appear to be the only two crashing issues.
Afterwards, we seem to not crash for all opcodes in all repetition modes
in all measurement modes.

Otherwise, we get:
```
#
# Machine code for function foo: NoPHIs, TracksLiveness, NoVRegs

bb.0:
  successors: %bb.1(0x80000000); %bb.1(100.00%)

  $r8 = MOV64ri 2

bb.1:
; predecessors: %bb.0, %bb.1
  successors: %bb.1(0x80000000), %bb.2(0x00000000); %bb.1(100.00%), %bb.2(0.00%)
  liveins: $r8
  HLT
  HLT
  $r8 = ADD64ri8 $r8(tied-def 0), -1, implicit-def $eflags
  JCC_1 %bb.1, 5, implicit $eflags

bb.2:
; predecessors: %bb.1

  RET64

# End machine code for function foo.

*** Bad machine code: Non-terminator instruction after the first terminator ***
- function:    foo
- basic block: %bb.1  (0x55df06791048)
- instruction: $r8 = ADD64ri8 $r8(tied-def 0), -1, implicit-def $eflags
First terminator was:   HLT
LLVM ERROR: Found 1 machine code errors.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: bin/llvm-exegesis --skip-measurements -mode=uops --dump-object-to-disk=0 --repetition-mode=loop --loop-body-size=1000 --result-aggregation-mode=min --opcode-name=HLT --max-configs-per-opcode=8192
1.      Running pass 'Function Pass Manager' on module 'ExegesisInfoTest'.
2.      Running pass 'Verify generated machine code' on function '@foo'

```

19 months ago[exegesis] SnippetRepetitor: Don't access liveness if we disabled it
Roman Lebedev [Thu, 8 Dec 2022 01:42:38 +0000 (04:42 +0300)]
[exegesis] SnippetRepetitor: Don't access liveness if we disabled it

Otherwise, we get:
```
llvm-exegesis: /repositories/llvm-project/llvm/lib/CodeGen/MachineBasicBlock.cpp:1628: MachineBasicBlock::livein_iterator llvm::MachineBasicBlock::livein_begin() const: Assertion `getParent()->getProperties().hasProperty( MachineFunctionProperties::Property::TracksLiveness) && "Liveness information is accurate"' failed.
```

19 months ago[ubsan] Enable loongarch64
Youling Tang [Thu, 8 Dec 2022 02:13:24 +0000 (10:13 +0800)]
[ubsan] Enable loongarch64

Enable ubsan on LoongArch64.

Reviewed By: SixWeining, xen0n, MaskRay

Differential Revision: https://reviews.llvm.org/D139292

19 months ago[tsan] Add tsan support for loongarch64
Youling Tang [Thu, 8 Dec 2022 02:08:45 +0000 (10:08 +0800)]
[tsan] Add tsan support for loongarch64

This patch enabled tsan for loongarch64 with 47-bit VMA layout. All
tests are passing.

Also adds assembly routines to enable setjmp/longjmp for loongarch64
on linux.

Reviewed By: dvyukov, SixWeining, #sanitizers

Differential Revision: https://reviews.llvm.org/D138489

19 months ago[X86][ConstraintFP] Model `MXCSR` when load/store it
Phoebe Wang [Wed, 7 Dec 2022 16:46:54 +0000 (00:46 +0800)]
[X86][ConstraintFP] Model `MXCSR` when load/store it

This patch partially fixes #59305.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D139246

19 months ago[lldb] Don't use Optional::getPointer (NFC)
Kazu Hirata [Thu, 8 Dec 2022 01:42:58 +0000 (17:42 -0800)]
[lldb] Don't use Optional::getPointer (NFC)

Note that Optional::getPointer has been deprecated since commit
80145dcb011b03a7c54fdfaa3a7beeaf5c18863a on November 23, 2022.

19 months ago[ELF] Enable --no-undefined-version by default
Dan Albert [Thu, 8 Dec 2022 01:41:18 +0000 (01:41 +0000)]
[ELF] Enable --no-undefined-version by default

Allowing incorrect version scripts is not a helpful default. Flip that
to help users find their bugs at build time rather than at run time.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D135402

19 months ago[MLIR] Allow ShapedTypeComponents with attribute in inferReturnTensorTypes
smit-hinsu [Thu, 8 Dec 2022 01:20:56 +0000 (17:20 -0800)]
[MLIR] Allow ShapedTypeComponents with attribute in inferReturnTensorTypes

Originally, inferReturnTensorTypes didn't support shaped type components
containing an attribute just because there wasn't any motivating use-case.
Removing that limitation and using it to set the encoding attribute for
RankedTensorType.

Updated the existing test to set result attribute based on the first operand,
if available.

Signed-off-by: Smit Hinsu <smittvhinsu@gmail.com>
Differential Revision: https://reviews.llvm.org/D139271

19 months ago[PowerPC][NFC] Test case update on ppc64-acc-regalloc-bugfix.ll
Ting Wang [Thu, 8 Dec 2022 01:16:12 +0000 (20:16 -0500)]
[PowerPC][NFC] Test case update on ppc64-acc-regalloc-bugfix.ll

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D139492

19 months ago[BOLT] Handle access errors while reading profile
Maksim Panchenko [Tue, 6 Dec 2022 23:49:35 +0000 (15:49 -0800)]
[BOLT] Handle access errors while reading profile

When the user does not have permissions to access the profile, consume
the error contained in Expected<> to avoid dumping stack to the user.

Differential Revision: https://reviews.llvm.org/D139480

19 months ago[Exegesis] Unbreak running benchmarks on local machine
Roman Lebedev [Thu, 8 Dec 2022 00:47:21 +0000 (03:47 +0300)]
[Exegesis] Unbreak running benchmarks on local machine

`LLVMState::Create()` would autodetect if `native` is specified,
but the default was `""`

19 months ago[clang] Ensure correct metadata for relative vtables
Leonard Chan [Thu, 29 Sep 2022 21:53:30 +0000 (21:53 +0000)]
[clang] Ensure correct metadata for relative vtables

Prior to this, metadata pertaining to the size or address point offsets
into a relative vtable were twice the value they should be (treating
component widths as pointer width rather than 4 bytes). This prevented
some vtables from being devirtualized with D134320. This ensures the
correct metadata is written so whole program devirtualization can catch
these remaining devirt targets.

Differential Revision: https://reviews.llvm.org/D134687

19 months ago[RISCV] Shrink the size of the RISCVMatInt::Inst.
Craig Topper [Wed, 7 Dec 2022 21:41:40 +0000 (13:41 -0800)]
[RISCV] Shrink the size of the RISCVMatInt::Inst.

We don't need to store a full 64-bit immediate. The largest value
used by any opcode is 20 bits.

Using an int32_t shrinks the struct from 16 bytes to 8 bytes and
reduces the size of the SmallVector that we use to store sequences
by 64 bytes.

19 months agoRemove slash in check string to fix the test that is failng on windows
Akira Hatanaka [Thu, 8 Dec 2022 00:16:50 +0000 (16:16 -0800)]
Remove slash in check string to fix the test that is failng on windows

19 months ago[NFC] Port all Inline tests to `-passes=` syntax
Roman Lebedev [Thu, 8 Dec 2022 00:08:54 +0000 (03:08 +0300)]
[NFC] Port all Inline tests to `-passes=` syntax

19 months ago[NVPTX] Minor cleanups and typo fixes.
Artem Belevich [Wed, 7 Dec 2022 23:46:12 +0000 (15:46 -0800)]
[NVPTX] Minor cleanups and typo fixes.

19 months ago[compiler-rt][hwasan] Add unused attribute to GetRegisters
Leonard Chan [Thu, 8 Dec 2022 00:07:00 +0000 (00:07 +0000)]
[compiler-rt][hwasan] Add unused attribute to GetRegisters

This is unused in the android toolchain and fixes
https://lab.llvm.org/buildbot/#/builders/77/builds/23883

19 months ago[mlir][sparse] introduce sparse vectorization to the sparse compiler pipeline
Aart Bik [Wed, 7 Dec 2022 21:57:04 +0000 (13:57 -0800)]
[mlir][sparse] introduce sparse vectorization to the sparse compiler pipeline

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D139581