platform/upstream/llvm.git
2 years ago[GlobalISel] Handle constant splat in funnel shift combine
Abinav Puthan Purayil [Thu, 12 May 2022 17:05:52 +0000 (22:35 +0530)]
[GlobalISel] Handle constant splat in funnel shift combine

This change adds the constant splat versions of m_ICst() (by using
getBuildVectorConstantSplat()) and uses it in
matchOrShiftToFunnelShift(). The getBuildVectorConstantSplat() name is
shortened to getIConstantSplatVal() so that the *SExtVal() version would
have a more compact name.

Differential Revision: https://reviews.llvm.org/D125516

2 years ago[AMDGPU][GlobalISel] Pre-commit tests for D125516
Abinav Puthan Purayil [Fri, 13 May 2022 10:58:05 +0000 (16:28 +0530)]
[AMDGPU][GlobalISel] Pre-commit tests for D125516

Differential Revision: https://reviews.llvm.org/D125539

2 years ago[X86][AVX] Add test showing poor expansion of bit-reversal permutation shuffles
Simon Pilgrim [Mon, 16 May 2022 10:24:13 +0000 (11:24 +0100)]
[X86][AVX] Add test showing poor expansion of bit-reversal permutation shuffles

Reported here: https://discourse.llvm.org/t/ir-alternatives-to-freeze-to-selectively-prevent-compiler-from-combining-shufflevectors/62521

2 years ago[SelectionDAG] Make getNode which uses single element SDVTList pass SDNodeFlags.
Yeting Kuo [Mon, 16 May 2022 03:56:31 +0000 (11:56 +0800)]
[SelectionDAG] Make getNode which uses single element SDVTList pass SDNodeFlags.

The patch make users not need to know getNode with SDNodeFlags argument may not
pass its flags.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125659

2 years ago[AArch64] Handle 64bit vectors in tryCombineFixedPointConvert
David Green [Mon, 16 May 2022 10:08:47 +0000 (11:08 +0100)]
[AArch64] Handle 64bit vectors in tryCombineFixedPointConvert

Under some situations we can visit 64bit vector extract elements in
tryCombineFixedPointConvert, where an assert fires as they are expected
to have been converted to 128bit. Turn the assert into an if statement,
bailing out and letting the extract be handled first.

Also invert some ifs, using early exits to reduce indentation.

Fixes #55417

2 years ago[StatepointLowering] Properly handle local and non-local relocates of the same value.
Denis Antrushin [Fri, 13 May 2022 10:55:26 +0000 (17:55 +0700)]
[StatepointLowering] Properly handle local and non-local relocates of the same value.

FunctionLoweringInfo::StatepointRelocationMaps map is used to pass GC pointer
lowering information from statepoint to gc.relocate  which may appear ini
different block.
D124444 introduced different lowering for local and non-local relocates.
Local relocates use SDValue and non-local relocates use value exported to VReg.
But I overlooked the fact that StatepointRelocationMap is indexed not by
GCRelocate instruction, but by derived pointer. This works incorrectly when
we have two relocates (one local and another non-local) of the same value,
because they need different relocation records.

This patch fixes the problem by recording relocation information per relocate
instruction, not per derived pointer. This way, each gc.relocate can be lowered
differently.

Reviewed By: skatkov

Differential Revision: https://reviews.llvm.org/D125538

2 years ago[clang-format][NFC] Don't call mightFitOnOneLine() unnecessarily
owenca [Sun, 15 May 2022 08:37:23 +0000 (01:37 -0700)]
[clang-format][NFC] Don't call mightFitOnOneLine() unnecessarily

Clean up UnwrappedLineParser for RemoveBracesLLVM to avoid calling
mightFitOnOneLine() as much as possible.

Differential Revision: https://reviews.llvm.org/D125626

2 years ago[clangd] parse all make_unique-like functions in preamble
Tobias Ribizel [Mon, 16 May 2022 09:17:15 +0000 (11:17 +0200)]
[clangd] parse all make_unique-like functions in preamble

I am working on support for forwarding parameter names in make_unique-like functions, first for inlay hints, later maybe for signature help.
For that to work generically, I'd like to parse all of these functions in the preamble. Not sure how this impacts performance on large codebases though.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D124688

2 years ago[llvm-c] Add functions for enabling and creating opaque pointers
Nicolas Abram Lujan [Mon, 16 May 2022 08:51:51 +0000 (10:51 +0200)]
[llvm-c] Add functions for enabling and creating opaque pointers

This is based on https://reviews.llvm.org/D125168 which adds a
wrapper to allow use of opaque pointers from the C API.

I added an opaque pointer mode test to echo.ll, and to fix assertions
that forbid the use of mixed typed and opaque pointers that were
triggering in it I had to also add wrappers for setOpaquePointers()
and isOpaquePointer().

I also changed echo.ll to remove a bitcast i32* %x to i8*, because
passing it through llvm-as and llvm-dis was generating a
%0 = bitcast ptr %x to ptr, but when building that same bitcast in
echo.cpp it was getting elided by IRBuilderBase::CreateCast
(https://github.com/llvm/llvm-project/blob/08ac66124874d70dab63c731da0244f9e29ef168/llvm/include/llvm/IR/IRBuilder.h#L1998-L1999).

Differential Revision: https://reviews.llvm.org/D125183

2 years ago[AMDGPU] SIShrinkInstructions: change static functions to methods
Jay Foad [Fri, 18 Feb 2022 17:52:24 +0000 (17:52 +0000)]
[AMDGPU] SIShrinkInstructions: change static functions to methods

This is a mechanical change to avoid passing MRI and TII around
explicitly. NFC.

Differential Revision: https://reviews.llvm.org/D125566

2 years ago[AMDGPU] Extract SIInstrInfo::removeModOperands. NFC.
Jay Foad [Mon, 21 Feb 2022 15:50:19 +0000 (15:50 +0000)]
[AMDGPU] Extract SIInstrInfo::removeModOperands. NFC.

Make this an externally callable function for use in a future patch.

Differential Revision: https://reviews.llvm.org/D125565

2 years ago[pseudo] Support parsing variant target symbols.
Haojian Wu [Thu, 5 May 2022 12:10:18 +0000 (14:10 +0200)]
[pseudo] Support parsing variant target symbols.

With this patch, we're able to parse smaller chunks of C++ code (statement,
declaration), rather than translation-unit.

The start symbol is listed in the grammar in a form of `_ :=
statement`, each start symbol has a dedicated state (`_ := • statement`).
We create and track all these separate states in the LRTable. When we
start parsing, we lookup the corresponding state to start the parser.

LR pasing table changes with this patch:
- number of states: 1467 -> 1471
- number of actions: 82891 -> 83578
- size of the table (bytes): 334248 -> 336996

Differential Revision: https://reviews.llvm.org/D125006

2 years ago[ControlHeightReduction] Freeze condition when converting select to branch
Nikita Popov [Tue, 10 May 2022 14:34:11 +0000 (16:34 +0200)]
[ControlHeightReduction] Freeze condition when converting select to branch

While select conditions can be poison, branch on poison is
immediate UB. As such, we need to freeze the condition when
converting a select into a branch.

Differential Revision: https://reviews.llvm.org/D125398

2 years ago[flang] Install Fortran_main library
Diana Picus [Mon, 2 May 2022 11:41:07 +0000 (11:41 +0000)]
[flang] Install Fortran_main library

At the moment the Fortran_main library is not installed, so it cannot be
found by the driver when run from an install directory. This patch fixes
the issue by replacing llvm_add_library with add_flang_library, which
already contains all the proper incantations for installing a library.
It also enhances add_flang_library to support a STATIC arg which forces
the library to be static even when BUILD_SHARED_LIBS is on.

Differential Revision: https://reviews.llvm.org/D124759

Co-authored-by: Dan Palermo <Dan.Palermo@amd.com>
2 years ago[FastISel] Fix load folding for registers with fixups
Nikita Popov [Thu, 12 May 2022 10:42:45 +0000 (12:42 +0200)]
[FastISel] Fix load folding for registers with fixups

FastISel tries to fold loads into the single using instruction.
However, if the register has fixups, then there may be additional
uses through an alias of the register.

In particular, this fixes the problem reported at
https://reviews.llvm.org/D119432#3507087. The load register is
(at the time of load folding) only used in a single call instruction.
However, selection of the bitcast has added a fixup between the
load register and the cross-BB register of the bitcast result.
After fixups are applied, there would now be two uses of the load
register, so load folding is not legal.

Differential Revision: https://reviews.llvm.org/D125459

2 years ago[clang-format] fix alignment w/o binpacked args
Gregory Fong [Mon, 16 May 2022 08:08:24 +0000 (10:08 +0200)]
[clang-format] fix alignment w/o binpacked args

The combination of

- AlignConsecutiveAssignments.Enabled = true
- BinPackArguments = false

would result in the first continuation line of a braced-init-list being
improperly indented (missing a shift) when in a continued function call.
Indentation was also wrong for braced-init-lists continuing a
direct-list-initialization.  Check for opening braced lists in
continuation and ensure that the correct shift occurs.

Fixes https://github.com/llvm/llvm-project/issues/55360

Reviewed By: curdeius

Differential Revision: https://reviews.llvm.org/D125162

2 years ago[clangd] NFC: Rename field to be compatible with the function name
Kirill Bobyrev [Mon, 16 May 2022 08:17:40 +0000 (10:17 +0200)]
[clangd] NFC: Rename field to be compatible with the function name

2 years ago[LoopVectorize] Permit tail-folding for low trip counts using scalable vectors
David Sherwood [Thu, 10 Mar 2022 14:22:34 +0000 (14:22 +0000)]
[LoopVectorize] Permit tail-folding for low trip counts using scalable vectors

When the loop vectoriser encounters a known low trip count it tries
to create a single predicated loop in order to get the benefit of
vectorisation and eliminate the scalar tail. However, until now the
vectoriser prevented the use of scalable vectors in this case due
to concerns in the past about stability. I believe that tail-folded
loops using scalable vectors are now sufficiently well tested that
we can enable this. For the same reason I've also enabled it when
optimising for code size too.

Tests added here:

  Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
  Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
  Transforms/LoopVectorize/RISCV/low-trip-count.ll

Differential Revision: https://reviews.llvm.org/D121595

2 years ago[clangd] Include Cleaner: ignore headers with IWYU export pragmas
Kirill Bobyrev [Mon, 16 May 2022 08:13:38 +0000 (10:13 +0200)]
[clangd] Include Cleaner: ignore headers with IWYU export pragmas

Disable the warnings with `IWYU pragma: export` or `begin_exports` +
`end_exports` until we have support for these pragmas. There are too many
false-positive warnings for the headers that have the correct pragmas for now
and it makes the user experience very unpleasant.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D125468

2 years agoAdd ThreadPriority::Low, and use QoS class Utility on Mac
stk [Mon, 16 May 2022 08:01:09 +0000 (10:01 +0200)]
Add ThreadPriority::Low, and use QoS class Utility on Mac

On Apple Silicon Macs, using a Darwin thread priority of PRIO_DARWIN_BG seems to
map directly to the QoS class Background. With this priority, the thread is
confined to efficiency cores only, which makes background indexing take forever.

Introduce a new ThreadPriority "Low" that sits in the middle between Background
and Default, and maps to QoS class "Utility" on Mac. Make this new priority the
default for indexing. This makes the thread run on all cores, but still lowers
priority enough to keep the machine responsive, and not interfere with
user-initiated actions.

I didn't change the implementations for Windows and Linux; on these systems,
both ThreadPriority::Background and ThreadPriority::Low map to the same thread
priority. This could be changed as a followup (e.g. by using SCHED_BATCH for Low
on Linux).

See also https://github.com/clangd/clangd/issues/1119.

Reviewed By: sammccall, dgoldman

Differential Revision: https://reviews.llvm.org/D124715

2 years ago[RISCV][NFC] Fix build issue
Kito Cheng [Mon, 16 May 2022 08:00:23 +0000 (16:00 +0800)]
[RISCV][NFC] Fix build issue

2 years ago[clang-format] Fix PointerAlignment: Right not working with tab indentation.
Marek Kurdej [Fri, 13 May 2022 09:27:35 +0000 (11:27 +0200)]
[clang-format] Fix PointerAlignment: Right not working with tab indentation.

Fixes https://github.com/llvm/llvm-project/issues/55407.

Given configuration:
```
UseTab: Always
PointerAlignment: Right
AlignConsecutiveDeclarations: true
```

Before, the pointer was misaligned in this code:
```
void f() {
unsigned long long big;
char       *ptr; // misaligned
int    i;
}
```

That was due to the fact that when handling right-aligned pointers, the Spaces were changed but StartOfTokenColumn was not.

Also, a tab was used not only for indentation but for spacing too when using `UseTab: ForIndentation` config option:
```
void f() {
unsigned long long big;
char       *ptr; // \t after char
int                i;
}
```

Reviewed By: owenpan

Differential Revision: https://reviews.llvm.org/D125528

2 years ago[RISCV][NFC] Refactor RISC-V vector intrinsic utils.
Kito Cheng [Wed, 11 May 2022 15:39:13 +0000 (23:39 +0800)]
[RISCV][NFC] Refactor RISC-V vector intrinsic utils.

This patch is preparation for D111617, use class/struct/enum rather than char/StringRef to present internal information as possible, that provide more compact way to store those info and also easier to serialize/deserialize.

And also that improve readability of the code, e.g. "v" vs TypeProfile::Vector.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D124730

2 years ago[gn build] Port 0a0d6489ef2e
LLVM GN Syncbot [Mon, 16 May 2022 06:42:42 +0000 (06:42 +0000)]
[gn build] Port 0a0d6489ef2e

2 years ago[Mips] Implement hasDivRemOp()
Jim Lin [Mon, 16 May 2022 02:26:32 +0000 (10:26 +0800)]
[Mips] Implement hasDivRemOp()

SDIVREM and UDIVREM can be customized lowered in MipsSE.

Fix https://github.com/llvm/llvm-project/issues/54991.

Reviewed By: sdardis

Differential Revision: https://reviews.llvm.org/D124980

2 years ago[DivRemPairs][Mips] Pre-commit test for Mips target
Jim Lin [Mon, 16 May 2022 02:22:50 +0000 (10:22 +0800)]
[DivRemPairs][Mips] Pre-commit test for Mips target

Copied from PowerPC.

Reviewed By: sdardis

Differential Revision: https://reviews.llvm.org/D124979

2 years ago[clang] Prevent folding of non-const compound expr
serge-sans-paille [Mon, 9 May 2022 12:18:58 +0000 (14:18 +0200)]
[clang] Prevent folding of non-const compound expr

When a non-const compound statement is used to initialize a constexpr pointer,
the pointed value is not const itself and cannot be folded at codegen time.

This matches GCC behavior for compound literal expr arrays.

Fix issue #39324.

Differential Revision: https://reviews.llvm.org/D124038

2 years ago[LLVM][Casting.h] Add trivial self-cast
bzcheeseman [Fri, 13 May 2022 22:34:51 +0000 (18:34 -0400)]
[LLVM][Casting.h] Add trivial self-cast

Casting from a type to itself should always be possible. Make this simple for all users, and add tests to ensure we keep being able to do this. Ref: https://reviews.llvm.org/D125543

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D125590

2 years ago[RISCV][NFC] Replace for-each with array argument call.
jacquesguan [Thu, 12 May 2022 08:20:02 +0000 (08:20 +0000)]
[RISCV][NFC] Replace for-each with array argument call.

This patch replaces some for-each set with the new arrayref argument API, since it already used an array in defination, I think this change won't cause any ambiguity.

Differential Revision: https://reviews.llvm.org/D125455

2 years ago[Diagnostic] Warn if the size argument of memset is character literal
Chuanqi Xu [Fri, 13 May 2022 05:59:46 +0000 (13:59 +0800)]
[Diagnostic] Warn if the size argument of memset is character literal
zero

Closing https://github.com/llvm/llvm-project/issues/55402

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D125521

2 years ago[RISCV] Fix incorrect use of tail agnostic vslideup.
Zakk Chen [Mon, 16 May 2022 01:10:14 +0000 (18:10 -0700)]
[RISCV] Fix incorrect use of tail agnostic vslideup.

We need to use tail undisturbed for vslideup to implement
vector insert operation correctly.

Ideally, we cound use the tail agnostic when insert subvector
or element at the end of the vector. This will be in follow-up
patch.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125545

2 years ago[mlir][bufferize] Infer memref types when possible
Matthias Springer [Sun, 15 May 2022 23:53:51 +0000 (01:53 +0200)]
[mlir][bufferize] Infer memref types when possible

Instead of recomputing memref types from tensor types, try to infer them when possible. This results in more precise layout maps.

Differential Revision: https://reviews.llvm.org/D125614

2 years ago[X86] Move combineAddOrSubToADCOrSBB earlier. NFC.
Simon Pilgrim [Sun, 15 May 2022 20:51:14 +0000 (21:51 +0100)]
[X86] Move combineAddOrSubToADCOrSBB earlier. NFC.

Make it easier to reuse in X86 ADD/SUB combines in an upcoming patch.

2 years ago[LV] Set SCEVCheckCond to nullptr whenever it was used.
Florian Hahn [Sun, 15 May 2022 20:52:07 +0000 (21:52 +0100)]
[LV] Set SCEVCheckCond to nullptr whenever it was used.

Under some circumstances, SCEVExpander will insert new instructions when
expanding a predicate, but the final result of the expansion can be a
false constant.

In those cases, the expanded instructions may later be used by other
expansions, e.g. the trip count. This may trigger an assertion during
SCEVExpander cleanup. To avoid this, always mark the result as used.

Fixes #55100.

2 years ago[X86] Adjust fadd costs to match SoG
Simon Pilgrim [Sun, 15 May 2022 20:28:20 +0000 (21:28 +0100)]
[X86] Adjust fadd costs to match SoG

znver1/2 models were incorrectly modelling these on fpupipe 0 instead of 2/3 and znver1 ymm variants also require double pumping.

Now matches AMD SoG, Agner and instlatx64 numbers.

Thanks to @fabian-r for the report

2 years ago[DWARFLinker][NFC] cleanup AddressManager interface.
Alexey Lapshin [Thu, 12 May 2022 18:48:14 +0000 (21:48 +0300)]
[DWARFLinker][NFC] cleanup AddressManager interface.

this review is extracted from D86539

1. delete areRelocationsResolved() method.
2. rename hasLiveMemoryLocation() -> isLiveVariable()
          hasLiveAddressRange() -> isLiveSubprogram().

Differential Revision: https://reviews.llvm.org/D125492

2 years agoRevert "[libunwind][AArch64] Add support for DWARF expression for RA_SIGN_STATE."
Daniel Kiss [Sun, 15 May 2022 19:42:07 +0000 (21:42 +0200)]
Revert "[libunwind][AArch64] Add support for DWARF expression for RA_SIGN_STATE."

This reverts commit f6366ef7f4f3cf1182fd70e0c50a9fa54374b612.

2 years ago[flang][nfc] Fix driver method names overridden by the plugins
Andrzej Warzynski [Sun, 15 May 2022 17:53:09 +0000 (17:53 +0000)]
[flang][nfc] Fix driver method names overridden by the plugins

After the recent re-factoring of the driver code
(https://reviews.llvm.org/D125007), `ExecuteAction` was renamed as
`executeAction`. This patch updates the examples in Flang accordingly.

If you set `FLANG_BUILD_EXAMPLES` to `On` when building Flang, then the
refactoring from D125007 would have caused build failures for you. This
patch fixes that.

This is fairly straightforward and fixes buildbot failures, so I'm
sending this without a review.

2 years ago[SLP] Fix misspelling of 'analyzed'. NFC
Craig Topper [Sun, 15 May 2022 17:30:24 +0000 (10:30 -0700)]
[SLP] Fix misspelling of 'analyzed'. NFC

2 years ago[RISCV] Add M extension command lines to ctlz-cttz-ctpop.ll. NFC
Craig Topper [Sun, 15 May 2022 04:16:02 +0000 (21:16 -0700)]
[RISCV] Add M extension command lines to ctlz-cttz-ctpop.ll. NFC

ctpop and cttz default expansion both end up using a multiply. This
can either use a mul instruction or libcall. Make sure we test both
cases.

2 years ago[RISCV] Improve test coverage in ctlz-cttz-ctpop.ll. NFC
Craig Topper [Sun, 15 May 2022 04:08:54 +0000 (21:08 -0700)]
[RISCV] Improve test coverage in ctlz-cttz-ctpop.ll. NFC

Add more i8/16 tets.
Add ctlz_zero_undef tests.

2 years ago[X86] Add test coverage for PR44915 / Issue #44260
Simon Pilgrim [Sun, 15 May 2022 16:05:19 +0000 (17:05 +0100)]
[X86] Add test coverage for PR44915 / Issue #44260

2 years ago[X86] Add checks to illegal-insert.ll
Simon Pilgrim [Sun, 15 May 2022 15:58:12 +0000 (16:58 +0100)]
[X86] Add checks to illegal-insert.ll

2 years ago[X86] lowerShuffleAsLanePermuteAndSHUFP always succeeds, so just return the result...
Simon Pilgrim [Sun, 15 May 2022 14:53:31 +0000 (15:53 +0100)]
[X86] lowerShuffleAsLanePermuteAndSHUFP always succeeds, so just return the result. NFC.

2 years ago[VPlan] Improve printing of VPReplicateRecipe with calls.
Florian Hahn [Sun, 15 May 2022 14:51:26 +0000 (15:51 +0100)]
[VPlan] Improve printing of VPReplicateRecipe with calls.

Suggested as part of D124718.

2 years ago[X86] Pull out repeated isShuffleMaskInputInPlace calls. NFC.
Simon Pilgrim [Sun, 15 May 2022 14:35:09 +0000 (15:35 +0100)]
[X86] Pull out repeated isShuffleMaskInputInPlace calls. NFC.

2 years ago[X86] lowerV4I64Shuffle - try harder to lower to PERMQ(BLENDD(V1,V2)) pattern
Simon Pilgrim [Sun, 15 May 2022 13:57:58 +0000 (14:57 +0100)]
[X86] lowerV4I64Shuffle - try harder to lower to PERMQ(BLENDD(V1,V2)) pattern

2 years ago[X86] Add shuffles showing failure to use PERMUTE(BLEND(X,Y))
Simon Pilgrim [Sun, 15 May 2022 13:31:32 +0000 (14:31 +0100)]
[X86] Add shuffles showing failure to use PERMUTE(BLEND(X,Y))

One AVX2+ targets we have a immediate VPERMQ/PD cross-lane permute thats better than relying on a pair of VPERM2F128 cross-lanes to feed a blend.

Reported on discourse

2 years ago[X86] Adjust tests for vector widening to use freeze(poison)
Simon Pilgrim [Sun, 15 May 2022 12:03:03 +0000 (13:03 +0100)]
[X86] Adjust tests for vector widening to use freeze(poison)

I incorrectly used freeze(undef) in rG1b07bd9034bd

2 years agoScalarEvolution.cpp: Reformat.
NAKAMURA Takumi [Sun, 8 May 2022 11:21:08 +0000 (20:21 +0900)]
ScalarEvolution.cpp: Reformat.

2 years ago[clang][docs] Add escape code to fix missing '*' in reduction operation list
Simon Pilgrim [Sun, 15 May 2022 11:32:11 +0000 (12:32 +0100)]
[clang][docs] Add escape code to fix missing '*' in reduction operation list

2 years agoARMFixCortexA57AES1742098Pass.cpp: Suppress a warning. [-Wunused-but-set-variable]
NAKAMURA Takumi [Sun, 15 May 2022 09:01:24 +0000 (18:01 +0900)]
ARMFixCortexA57AES1742098Pass.cpp: Suppress a warning. [-Wunused-but-set-variable]

2 years ago[clang-format] Handle "if consteval { ... }" for RemoveBracesLLVM
owenca [Fri, 13 May 2022 23:31:27 +0000 (16:31 -0700)]
[clang-format] Handle "if consteval { ... }" for RemoveBracesLLVM

Differential Revision: https://reviews.llvm.org/D125593

2 years ago[libc++][test] Verify std::views::drop and std::views::join are CPOs
Joe Loser [Sat, 14 May 2022 22:00:44 +0000 (16:00 -0600)]
[libc++][test] Verify std::views::drop and std::views::join are CPOs

`std::views::drops` and `std::views::join` have been implemented, but the tests
verifying the CPOs for them are still commented out. Uncomment the tests.

Differential Revision: https://reviews.llvm.org/D125618

2 years ago[TargetLowering] expandCTPOP don't create an used constant mask for i8 ctpop. NFC
Craig Topper [Sun, 15 May 2022 03:33:47 +0000 (20:33 -0700)]
[TargetLowering] expandCTPOP don't create an used constant mask for i8 ctpop. NFC

Use early out for the i8 case.

I'm looking at avoiding MUL on targets that use libcalls for MUL.
So doing a little pre-refactoring.

2 years agofix typos to cycle bots
Nico Weber [Sun, 15 May 2022 01:19:19 +0000 (21:19 -0400)]
fix typos to cycle bots

2 years ago[LowerTypeTests][clang] Implement and allow -fsanitize=cfi-icall for RISCV
Wende Tan [Sun, 15 May 2022 01:05:06 +0000 (18:05 -0700)]
[LowerTypeTests][clang] Implement and allow -fsanitize=cfi-icall for RISCV

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D106888

2 years ago[M68k][Disassembler] Adopt the new variable length decoder
Sheng [Sun, 15 May 2022 00:44:10 +0000 (08:44 +0800)]
[M68k][Disassembler] Adopt the new variable length decoder

This is an example usage of D120958.

After these patches are landed, we can strip off the codebeads officially.

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D120960

2 years agoRename `MCFixedLenDisassembler.h` as `MCDecoderOps.h`
Sheng [Sun, 15 May 2022 00:42:50 +0000 (08:42 +0800)]
Rename `MCFixedLenDisassembler.h` as `MCDecoderOps.h`

The name `MCFixedLenDisassembler.h` is out of date after D120958.

Rename it as `MCDecoderOps.h` to reflect the change.

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D124987

2 years ago[mlir][LLVMIR] Add support for translating shufflevector
Min-Yih Hsu [Thu, 21 Apr 2022 02:57:32 +0000 (19:57 -0700)]
[mlir][LLVMIR] Add support for translating shufflevector

Add support for translating llvm::ShuffleVectorInst

Differential Revision: https://reviews.llvm.org/D125030

2 years ago[mlir][LLVMIR] Add support for translating insert/extractvalue
Min-Yih Hsu [Thu, 21 Apr 2022 02:57:06 +0000 (19:57 -0700)]
[mlir][LLVMIR] Add support for translating insert/extractvalue

Add support for translating llvm::InsertValue and llvm::ExtractValue.

Differential Revision: https://reviews.llvm.org/D125028

2 years ago[RISCV] Remove unneeded check for ISD::VSCALE operand being a constant. NFC
Craig Topper [Sat, 14 May 2022 20:44:55 +0000 (13:44 -0700)]
[RISCV] Remove unneeded check for ISD::VSCALE operand being a constant. NFC

ISD::VSCALE only allows constant operands.

2 years ago[libc++][ranges][NFC] Mark completed issues related to the One Ranges Proposal.
varconst [Sat, 14 May 2022 20:07:08 +0000 (13:07 -0700)]
[libc++][ranges][NFC] Mark completed issues related to the One Ranges Proposal.

Quite a few C++20 LWG issues/papers related to the One Ranges Proposal
were already effectively implemented (or contain semantic-only wording
changes that don't affect the implementation), mark them as such.

Differential Revision: https://reviews.llvm.org/D125065

2 years ago[libc++] Simplify the string structures a bit more
Nikolas Klauser [Sat, 14 May 2022 10:38:00 +0000 (12:38 +0200)]
[libc++] Simplify the string structures a bit more

This simplifies the string structs a bit more and the normal layout should not contain any undefined behaviour anymore. I don't think there is a way to achieve this in the alternate string mode without breaking the ABI.

Reviewed By: ldionne, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D125496

2 years ago[clang-tidy] Restore test parameter operator<< function (NFC)
Richard [Sat, 14 May 2022 19:59:34 +0000 (13:59 -0600)]
[clang-tidy] Restore test parameter operator<< function (NFC)

Clang erroneously flagged the function as "unused", but it is most
definitely used by gtest to pretty print the parameter value when
a test fails.

Make the pretty printing function a friend function in the parameter
class similar to other clang unit tests.

2 years ago[AMDGPU] Fix typo in cttz_zero_undef(x) -> cttz(x) fold test
Simon Pilgrim [Sat, 14 May 2022 19:51:31 +0000 (20:51 +0100)]
[AMDGPU] Fix typo in cttz_zero_undef(x) -> cttz(x) fold test

v_cttz_zero_undef_i64_with_select should be selecting '64' for the x != 0 case instead of '32' like we just did in the previous 'v_cttz_zero_undef_i32_with_select' test.

Noticed by accident because it was causing some weird regressions....

Differential Revision: https://reviews.llvm.org/D125612

2 years ago[DAG] visitOR - merge isa/cast<ShuffleVectorSDNode> into dyn_cast<ShuffleVectorSDNode...
Simon Pilgrim [Sat, 14 May 2022 19:49:13 +0000 (20:49 +0100)]
[DAG] visitOR - merge isa/cast<ShuffleVectorSDNode> into dyn_cast<ShuffleVectorSDNode>. NFC.

Also, initialize entire mask to -1 to simplify undefined cases.

2 years ago[ifs] Add --strip-size flag
Alex Brachet [Sat, 14 May 2022 18:50:20 +0000 (18:50 +0000)]
[ifs] Add --strip-size flag

st_size may not be of importance to the abi if you are not using
copy relocations. This is helpful when you want to check the abi
of a shared object both when instrumented and not because asan
will increase the size of objects to include the redzone.

Differential revision: https://reviews.llvm.org/D124792

2 years ago[RS4GC] Fix -Wunused-function in -DLLVM_ENABLE_ASSERTIONS=off build after D125000
Fangrui Song [Sat, 14 May 2022 17:47:50 +0000 (10:47 -0700)]
[RS4GC] Fix -Wunused-function in -DLLVM_ENABLE_ASSERTIONS=off build after D125000

2 years ago[DAG] visitADDLike - use SelectionDAG::FoldConstantArithmetic directly to match const...
Simon Pilgrim [Sat, 14 May 2022 17:39:35 +0000 (18:39 +0100)]
[DAG] visitADDLike - use SelectionDAG::FoldConstantArithmetic directly to match constant operands

SelectionDAG::FoldConstantArithmetic determines if operands are foldable constants, so we don't need to bother with isConstantOrConstantVector / Opaque tests before calling it directly.

2 years agoRevert "[ifs] Add --strip-size flag"
Alex Brachet [Sat, 14 May 2022 17:33:27 +0000 (17:33 +0000)]
Revert "[ifs] Add --strip-size flag"

This reverts commit b6b0fd6a940b7006ced344736decccffaa583b8a.

2 years ago[ifs] Add --strip-size flag
Alex Brachet [Sat, 14 May 2022 17:23:47 +0000 (17:23 +0000)]
[ifs] Add --strip-size flag

st_size may not be of importance to the abi if you are not using
copy relocations. This is helpful when you want to check the abi
of a shared object both when instrumented and not because asan
will increase the size of objects to include the redzone.

Differential revision: https://reviews.llvm.org/D124792

2 years ago[X86] LowerAVG - fix cut+paste typo. NFC.
Simon Pilgrim [Sat, 14 May 2022 16:41:48 +0000 (17:41 +0100)]
[X86] LowerAVG - fix cut+paste typo. NFC.

2 years ago[lldb] Don't swallow crashlog exceptions
Jonas Devlieghere [Fri, 13 May 2022 22:58:56 +0000 (15:58 -0700)]
[lldb] Don't swallow crashlog exceptions

crashlog.py catches every exception in order to format them. This
results in both the exception name as well as the backtrace getting
swallowed.

Here's an example of the current output:

  error: python exception: in method 'SBTarget_ResolveLoadAddress', argument 2 of type 'lldb::addr_t'

Compare this to the output without the custom exception handling:

  Traceback (most recent call last):
    File "[...]/site-packages/lldb/macosx/crashlog.py", line 929, in __call__
      SymbolicateCrashLogs(debugger, shlex.split(command))
    File "[...]/site-packages/lldb/macosx/crashlog.py", line 1239, in SymbolicateCrashLogs
      SymbolicateCrashLog(crash_log, options)
    File "[...]/site-packages/lldb/macosx/crashlog.py", line 1006, in SymbolicateCrashLog
      thread.dump_symbolicated(crash_log, options)
    File "[...]/site-packages/lldb/macosx/crashlog.py", line 124, in dump_symbolicated
      symbolicated_frame_addresses = crash_log.symbolicate(
    File "[...]/site-packages/lldb/utils/symbolication.py", line 540, in symbolicate
      if symbolicated_address.symbolicate(verbose):
    File "[...]/site-packages/lldb/utils/symbolication.py", line 98, in symbolicate
      sym_ctx = self.get_symbol_context()
    File "[...]/site-packages/lldb/utils/symbolication.py", line 77, in get_symbol_context
      sb_addr = self.resolve_addr()
    File "[...]/site-packages/lldb/utils/symbolication.py", line 69, in resolve_addr
      self.so_addr = self.target.ResolveLoadAddress(self.load_addr)
    File "[...]/site-packages/lldb/__init__.py", line 10675, in ResolveLoadAddress
      return _lldb.SBTarget_ResolveLoadAddress(self, vm_addr)
  OverflowError: in method 'SBTarget_ResolveLoadAddress', argument 2 of type 'lldb::addr_t'

This patch removes the custom exception handling and lets LLDB or the
default exception handler deal with it instead.

Differential revision: https://reviews.llvm.org/D125589

2 years ago[lldb] Remove unused imports from crashlog.py
Jonas Devlieghere [Fri, 13 May 2022 22:32:29 +0000 (15:32 -0700)]
[lldb] Remove unused imports from crashlog.py

2 years ago[X86] Add test showing failure to reuse the same PCMPGT comparison for SMIN/SMIN...
Simon Pilgrim [Sat, 14 May 2022 14:47:53 +0000 (15:47 +0100)]
[X86] Add test showing failure to reuse the same PCMPGT comparison for SMIN/SMIN expansions

2 years ago[AArch64] Avoid emitting MOVID when NEON is disabled
Alex Richardson [Thu, 12 May 2022 10:23:10 +0000 (10:23 +0000)]
[AArch64] Avoid emitting MOVID when NEON is disabled

Previously, creating a zero floating-point constant used MOVID even when
NEON was disabled which resulted in the following fatal error:
`Attempting to emit MOVID instruction but the Feature_HasNEON predicate(s) are not met`

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D125237

2 years ago[UpdateTestChecks] Use a counter for unpredictable FileCheck variables
Alex Richardson [Thu, 12 May 2022 10:22:28 +0000 (10:22 +0000)]
[UpdateTestChecks] Use a counter for unpredictable FileCheck variables

Variable captures such as `<MCInst #` can change based on unrelated changes
to the LLVM backends, to avoid the generated test cases being different
use an incrementing counter for variable names instead of using the
actual value from the output file.
This change may also be beneficial for some nameless IR variables
(especially when combined with filtering of output), but for now I've
restricted this change to the obvious candidates (--asm-show-inst output).

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D125405

2 years ago[update_llc_test_checks] Use FileCheck captures for MCInst/MCReg output
Alex Richardson [Thu, 12 May 2022 10:21:55 +0000 (10:21 +0000)]
[update_llc_test_checks] Use FileCheck captures for MCInst/MCReg output

To avoid test churn when backends add/rename new instructions/registers,
it makes sense to use FileCheck captures for the exact MCInst/Reg number.
This is motivated by D125307, where I use --asm-show-inst to differentiate
the output for multiple instructions with the same mnemonic.

This does not quite fix the churn issue yet: While files with the generated
checks will be immune to the numbers changing, the update script test
still suffers from this problem since the number is encoded in the
FileCheck variable name. I plan to address this in a follow-up patch.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D125307

2 years ago[update_llc_test_checks] Baseline test for --asm-show-inst
Alex Richardson [Thu, 12 May 2022 10:21:00 +0000 (10:21 +0000)]
[update_llc_test_checks] Baseline test for --asm-show-inst

To avoid test churn when backends add/rename new instructions/registers,
it makes sense to scrub the exact MCInst/Reg number.

Differential Revision: https://reviews.llvm.org/D125305

2 years ago[UpdateTestChecks] Change global functions to NamelessValue members. NFCI
Alex Richardson [Thu, 12 May 2022 10:14:23 +0000 (10:14 +0000)]
[UpdateTestChecks] Change global functions to NamelessValue members. NFCI

This avoids repeated calls to get_idx_from_ir_value_match() and will make
it easier for a future patch that adds new assembly-level nameless values
in addition to the IR ones.

Differential Revision: https://reviews.llvm.org/D125390

2 years ago[AArch64] Add missing HasNEON predicates to int->float patterns
Alex Richardson [Thu, 12 May 2022 10:13:53 +0000 (10:13 +0000)]
[AArch64] Add missing HasNEON predicates to int->float patterns

I was trying to compile code with -march=+nosimd and hit various
instruction predicate verification errors, this patch should address the
ones I saw in integer to floating-pointer conversions.

I noticed that for signed conversions, some non-NEON instruction sequences
are shorter. I don't know if the longer one is still faster on current
architectures (the patterns date back to the initial backend import)

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D125308

2 years ago[AArch64] Baseline test for D125307
Alex Richardson [Thu, 12 May 2022 10:13:42 +0000 (10:13 +0000)]
[AArch64] Baseline test for D125307

Differential Revision: https://reviews.llvm.org/D125240

2 years ago[MLIR][GPU] Add canonicalizer for gpu.memcpy
Arnab Dutta [Fri, 13 May 2022 11:20:16 +0000 (16:50 +0530)]
[MLIR][GPU] Add canonicalizer for gpu.memcpy

Erase gpu.memcpy op when only uses of dest are
the memcpy op in question, its allocation and deallocation
ops.

Reviewed By: bondhugula, csigg

Differential Revision: https://reviews.llvm.org/D124257

2 years ago[DAG] visitMUL - pull out repeated SDLoc() calls. NFC.
Simon Pilgrim [Sat, 14 May 2022 13:28:39 +0000 (14:28 +0100)]
[DAG] visitMUL - pull out repeated SDLoc() calls. NFC.

2 years ago[DAG] Use SelectionDAG::FoldConstantArithmetic directly to match constant operands
Simon Pilgrim [Sat, 14 May 2022 13:19:12 +0000 (14:19 +0100)]
[DAG] Use SelectionDAG::FoldConstantArithmetic directly to match constant operands

SelectionDAG::FoldConstantArithmetic determines if operands are foldable constants, so we don't need to bother with isConstantOrConstantVector / Opaque tests before calling it directly.

2 years agoFix unused function 'operator<<' -Wunused-function warning introduced in D124500
Simon Pilgrim [Sat, 14 May 2022 12:48:26 +0000 (13:48 +0100)]
Fix unused function 'operator<<' -Wunused-function warning introduced in D124500

2 years ago[ARM] Regenerate combine-movc-sub.ll test checks
Simon Pilgrim [Sat, 14 May 2022 12:25:30 +0000 (13:25 +0100)]
[ARM] Regenerate combine-movc-sub.ll test checks

2 years ago[MLIR][GPU] NFC: simplify kernel operand accessor implementations.
Christian Sigg [Fri, 6 May 2022 18:31:36 +0000 (20:31 +0200)]
[MLIR][GPU] NFC: simplify kernel operand accessor implementations.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D125112

2 years ago[X86] rotate-extract-vector.ll - use avx512bw+avx512vl target for more useful codegen...
Simon Pilgrim [Sat, 14 May 2022 11:58:50 +0000 (12:58 +0100)]
[X86] rotate-extract-vector.ll - use avx512bw+avx512vl target for more useful codegen checks

This is a much more realistic target than just avx512bw, which has never existed as a real world cpu target

2 years ago[libc++] Improve std::to_chars for base != 10.
Mark de Wever [Sat, 27 Feb 2021 15:52:39 +0000 (16:52 +0100)]
[libc++] Improve std::to_chars for base != 10.

This improves the speed of `to_chars` for bases 2, 8, and 16.
These bases are common and used in `<format>`. This change
uses a lookup table, like done in base 10 and causes an increase
in code size. The change has a small overhead for the other bases.

```
Benchmark                             Time             CPU      Time Old      Time New       CPU Old       CPU New
------------------------------------------------------------------------------------------------------------------
BM_to_chars_good/2                 -0.9476         -0.9476           252            13           252            13
BM_to_chars_good/3                 +0.0018         +0.0018           145           145           145           145
BM_to_chars_good/4                 +0.0108         +0.0108           104           105           104           105
BM_to_chars_good/5                 +0.0159         +0.0160            89            91            89            91
BM_to_chars_good/6                 +0.0162         +0.0162            80            81            80            81
BM_to_chars_good/7                 +0.0117         +0.0117            72            73            72            73
BM_to_chars_good/8                 -0.8643         -0.8643            64             9            64             9
BM_to_chars_good/9                 +0.0095         +0.0095            60            60            60            60
BM_to_chars_good/10                +0.0540         +0.0540             6             6             6             6
BM_to_chars_good/11                +0.0299         +0.0299            55            57            55            57
BM_to_chars_good/12                +0.0060         +0.0060            48            49            49            49
BM_to_chars_good/13                +0.0102         +0.0102            48            48            48            48
BM_to_chars_good/14                +0.0184         +0.0185            47            48            47            48
BM_to_chars_good/15                +0.0269         +0.0269            44            45            44            45
BM_to_chars_good/16                -0.8207         -0.8207            37             7            37             7
BM_to_chars_good/17                +0.0241         +0.0241            37            38            37            38
BM_to_chars_good/18                +0.0221         +0.0221            37            38            37            38
BM_to_chars_good/19                +0.0222         +0.0223            37            38            37            38
BM_to_chars_good/20                +0.0317         +0.0317            38            39            38            39
BM_to_chars_good/21                +0.0342         +0.0341            38            39            38            39
BM_to_chars_good/22                +0.0336         +0.0336            36            38            36            38
BM_to_chars_good/23                +0.0222         +0.0222            34            35            34            35
BM_to_chars_good/24                +0.0185         +0.0185            31            32            31            32
BM_to_chars_good/25                +0.0157         +0.0157            32            32            32            32
BM_to_chars_good/26                +0.0181         +0.0181            32            32            32            32
BM_to_chars_good/27                +0.0153         +0.0153            32            32            32            32
BM_to_chars_good/28                +0.0179         +0.0179            32            32            32            32
BM_to_chars_good/29                +0.0189         +0.0189            32            33            32            33
BM_to_chars_good/30                +0.0212         +0.0212            32            33            32            33
BM_to_chars_good/31                +0.0221         +0.0221            32            33            32            33
BM_to_chars_good/32                +0.0292         +0.0292            32            33            32            33
BM_to_chars_good/33                +0.0319         +0.0319            32            33            32            33
BM_to_chars_good/34                +0.0411         +0.0410            33            34            33            34
BM_to_chars_good/35                +0.0515         +0.0515            33            34            33            34
BM_to_chars_good/36                +0.0502         +0.0502            32            34            32            34
BM_to_chars_bad/2                  -0.8752         -0.8752            40             5            40             5
BM_to_chars_bad/3                  +0.1952         +0.1952            21            26            21            26
BM_to_chars_bad/4                  +0.3626         +0.3626            16            22            16            22
BM_to_chars_bad/5                  +0.2267         +0.2268            17            21            17            21
BM_to_chars_bad/6                  +0.3560         +0.3559            14            19            14            19
BM_to_chars_bad/7                  +0.4599         +0.4600            12            18            12            18
BM_to_chars_bad/8                  -0.5074         -0.5074            11             5            11             5
BM_to_chars_bad/9                  +0.4814         +0.4814            10            15            10            15
BM_to_chars_bad/10                 +0.7761         +0.7761             2             4             2             4
BM_to_chars_bad/11                 +0.3948         +0.3948            12            16            12            16
BM_to_chars_bad/12                 +0.3203         +0.3203            10            13            10            13
BM_to_chars_bad/13                 +0.3067         +0.3067            11            14            11            14
BM_to_chars_bad/14                 +0.2235         +0.2235            12            14            12            14
BM_to_chars_bad/15                 +0.2675         +0.2675            11            14            11            14
BM_to_chars_bad/16                 -0.1801         -0.1801             7             5             7             5
BM_to_chars_bad/17                 +0.5651         +0.5651             7            11             7            11
BM_to_chars_bad/18                 +0.5407         +0.5406             7            11             7            11
BM_to_chars_bad/19                 +0.5593         +0.5593             8            12             8            12
BM_to_chars_bad/20                 +0.5823         +0.5823             8            13             8            13
BM_to_chars_bad/21                 +0.6032         +0.6032             9            15             9            15
BM_to_chars_bad/22                 +0.6407         +0.6408             9            14             9            14
BM_to_chars_bad/23                 +0.6292         +0.6292             7            12             7            12
BM_to_chars_bad/24                 +0.5784         +0.5784             6            10             6            10
BM_to_chars_bad/25                 +0.5784         +0.5784             6            10             6            10
BM_to_chars_bad/26                 +0.5713         +0.5713             7            10             7            10
BM_to_chars_bad/27                 +0.5969         +0.5969             7            11             7            11
BM_to_chars_bad/28                 +0.6131         +0.6131             7            11             7            11
BM_to_chars_bad/29                 +0.6937         +0.6937             7            11             7            11
BM_to_chars_bad/30                 +0.7655         +0.7656             7            12             7            12
BM_to_chars_bad/31                 +0.8939         +0.8939             6            12             6            12
BM_to_chars_bad/32                 +1.0157         +1.0157             6            13             6            13
BM_to_chars_bad/33                 +1.0279         +1.0279             7            14             7            14
BM_to_chars_bad/34                 +1.0388         +1.0388             7            14             7            14
BM_to_chars_bad/35                 +1.0990         +1.0990             7            15             7            15
BM_to_chars_bad/36                 +1.1503         +1.1503             7            15             7            15
```

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D97705

2 years ago[X86] Regenerate pull-binop-through-shift.ll showing stack address math
Simon Pilgrim [Sat, 14 May 2022 10:54:08 +0000 (11:54 +0100)]
[X86] Regenerate pull-binop-through-shift.ll showing stack address math

Also rename X32 check prefixes to X86 as we try to use X32 for gnux32 targets

2 years ago[DenseElementsAttr] Teach isValidRawBuffer that 1-elt values are splats.
Chris Lattner [Sat, 14 May 2022 10:48:17 +0000 (11:48 +0100)]
[DenseElementsAttr] Teach isValidRawBuffer that 1-elt values are splats.

We want getRaw() on tensors with i1 element type with a zero or 1 value
to be treated as a splat.  This fixes:
https://github.com/llvm/llvm-project/issues/55440

2 years agoResolve overload ambiguity on Mac OS when printing size_t in diagnostics
Aaron Puchert [Sat, 14 May 2022 10:37:35 +0000 (12:37 +0200)]
Resolve overload ambiguity on Mac OS when printing size_t in diagnostics

Precommit builds cover Linux and Windows, but this ambiguity would only
show up on Mac OS: there we have int32_t = int, int64_t = long long and
size_t = unsigned long. So printing a size_t, while successful on the
other two architectures, cannot be unambiguously resolved on Mac OS.

This is not really meant to support printing arguments of type long or
size_t, but more as a way to prevent build breakage that would not be
detected in precommit builds, as happened in D125429.

Technically we have no guarantee that one of these types has the 64 bits
that afdac5fbcb6a3 wanted to provide, so proposals are welcome. We do
have a guarantee though that these three types are different, so we
should be fine with overload resolution.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D125580

2 years ago[flang][driver] Switch to the MLIR coding style in the driver (nfc)
Andrzej Warzynski [Fri, 29 Apr 2022 17:36:26 +0000 (17:36 +0000)]
[flang][driver] Switch to the MLIR coding style in the driver (nfc)

This patch re-factors the driver code in LLVM Flang (frontend +
compiler) to use the MLIR style. For more context, please see:
https://discourse.llvm.org/t/rfc-coding-style-in-the-driver/

Most changes here are rather self-explanatory. Accessors are renamed to
be more consistent with the rest of LLVM (e.g. allSource -->
getAllSources). Additionally, MLIR clang-tidy files are added in the
affected directories.

clang-tidy and clang-format files were copied from MLIR. Small
additional changes are made to silence clang-tidy/clang-format
warnings.

[1] https://mlir.llvm.org/getting_started/DeveloperGuide/

Differential Revision: https://reviews.llvm.org/D125007

2 years ago[bazel] Port ae8bbc43f470
Benjamin Kramer [Sat, 14 May 2022 10:11:58 +0000 (12:11 +0200)]
[bazel] Port ae8bbc43f470

2 years ago[LoongArch] Add privilege instructions definition
Weining Lu [Sun, 24 Apr 2022 06:59:19 +0000 (14:59 +0800)]
[LoongArch] Add privilege instructions definition

These instructions are added by following the `LoongArch Reference
Manual Volume 1: Basic Architecture Version 1.00`.

Differential Revision: https://reviews.llvm.org/D124826

2 years ago[llvm] Fix comment nits in Module class, NFC.
Xiaodong Liu [Sat, 14 May 2022 09:40:13 +0000 (17:40 +0800)]
[llvm] Fix comment nits in Module class, NFC.

There is no member called "GlobalValRefMap" in Module class.
It has been changed to "GlobalList".

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D125187

2 years ago[lib++][doc] Fixes a link in the status paper.
Mark de Wever [Sat, 14 May 2022 09:25:15 +0000 (11:25 +0200)]
[lib++][doc] Fixes a link in the status paper.

2 years ago[DebugInfo][Test] Simplify 'llvm/test/CodeGen/ARM/*-MergedGlobalDbg.ll'. NFC
Kristina Bessonova [Sat, 14 May 2022 09:09:43 +0000 (11:09 +0200)]
[DebugInfo][Test] Simplify 'llvm/test/CodeGen/ARM/*-MergedGlobalDbg.ll'. NFC

Differential Revision: https://reviews.llvm.org/D125531