platform/kernel/opensbi-spacemit.git
2 years agolib: sbi: Enable Zicbo[m|z] extensions in the menvcfg CSR
Anup Patel [Tue, 29 Mar 2022 14:12:22 +0000 (19:42 +0530)]
lib: sbi: Enable Zicbo[m|z] extensions in the menvcfg CSR

The bits to configure/enable Zicbo[m|z] extensions in the menvcfg
CSR are WARL. We try to enable these bits irrespective whether
these extensions are available or not because writes to these
bits will be ignored if these extensions are not available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2 years agolib: sbi: Detect menvcfg CSR at boot time
Atish Patra [Tue, 29 Mar 2022 13:55:36 +0000 (19:25 +0530)]
lib: sbi: Detect menvcfg CSR at boot time

We add the menvcfg CSR as a HART feature and detect it at boot time
using traping mechanism.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2 years agoinclude: Add defines for [m|h|s]envcfg CSRs
Anup Patel [Tue, 29 Mar 2022 13:30:37 +0000 (19:00 +0530)]
include: Add defines for [m|h|s]envcfg CSRs

The latest RISC-V privileged specification introduces xenvcfg CSRs
to enable/disable certain features/extensions for lower privilege
modes. This patch adds defines for these new [m|h|s]envcfg CSRs.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2 years agoinclude: Use static asserts for FW_DYNAMIC_INFO_xxx_OFFSET defines
Xiang W [Wed, 16 Mar 2022 10:19:18 +0000 (18:19 +0800)]
include: Use static asserts for FW_DYNAMIC_INFO_xxx_OFFSET defines

Add static detection to prevent the modification of struct fw_dynamic_info
from forgetting the modification of FW_DYNAMIC_INFO_xxx_OFFSET

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agoinclude: Use static asserts for SBI_SCRATCH_xxx_OFFSET defines
Xiang W [Wed, 16 Mar 2022 10:16:48 +0000 (18:16 +0800)]
include: Use static asserts for SBI_SCRATCH_xxx_OFFSET defines

Add static detection to prevent the modification of struct sbi_scratch
from forgetting the modification of SBI_SCRATCH_xxx_OFFSET

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agoinclude: Use static asserts for SBI_PLATFORM_xxx_OFFSET defines
Xiang W [Wed, 16 Mar 2022 01:45:25 +0000 (09:45 +0800)]
include: Use static asserts for SBI_PLATFORM_xxx_OFFSET defines

Add static detection to prevent the modification of struct sbi_platform
from forgetting the modification of SBI_PLATFORM_xxx_OFFSET

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: Add error messages via conditional compilation for the future
Xiang W [Tue, 15 Mar 2022 16:22:40 +0000 (00:22 +0800)]
lib: Add error messages via conditional compilation for the future

On 128-bit machines, sbi_load_xx/sbi_store_xx needs to be improved.
Through this conditional compile, the corresponding implementation
can be prompted to be added.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agofirmware: Fix code for accessing hart_count and stack_size
Xiang W [Tue, 15 Mar 2022 16:22:39 +0000 (00:22 +0800)]
firmware: Fix code for accessing hart_count and stack_size

lwu exists under the current rv64 and should also exist under the rv128
in the future, so I modified the conditions of conditional compilation
so that it can adapt to the future situation

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: pmp_set/pmp_get moved errors from runtime to compile time
Xiang W [Tue, 15 Mar 2022 16:22:38 +0000 (00:22 +0800)]
lib: pmp_set/pmp_get moved errors from runtime to compile time

pmp_set/pmp_get calculates the location of the CSR register separately
through conditional compilation. In the case of non-32-bit and 64-bit,
we can report an error directly through #error without putting it at
runtime

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: utils: serial: Initial commit of xlnx-uartlite
Alistair Francis [Thu, 24 Feb 2022 05:01:46 +0000 (15:01 +1000)]
lib: utils: serial: Initial commit of xlnx-uartlite

Initial commit of the xlnx-uartlite device and FDT support. This was
tested by running OpenSBI on a modified QEMU virt machine using the
xlnx-uartlite for serial.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: sbi: Add a simple external interrupt handling framework
Anup Patel [Fri, 18 Feb 2022 17:48:41 +0000 (23:18 +0530)]
lib: sbi: Add a simple external interrupt handling framework

Currently, the external interrupt handling is scattered between
sbi_init and sbi_trap. This patch moves all external interrupt
handling into a simple framework called sbi_irqchip.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: sbi: verbose sbi_domain_root_add_memregion
Nikita Shubin [Fri, 11 Feb 2022 11:11:54 +0000 (14:11 +0300)]
lib: sbi: verbose sbi_domain_root_add_memregion

Be more verbose on region confict, print addresses in conflict.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: sbi: fix typo in is_region_subset
Nikita Shubin [Fri, 11 Feb 2022 11:11:53 +0000 (14:11 +0300)]
lib: sbi: fix typo in is_region_subset

Fix typo in is_region_subset, regB_end should be calculated from regB.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: utils: Disable appropriate APLIC DT nodes in fdt_fixups()
Anup Patel [Tue, 15 Jun 2021 06:07:59 +0000 (11:37 +0530)]
lib: utils: Disable appropriate APLIC DT nodes in fdt_fixups()

We should disable APLIC DT nodes in fdt_fixups() which are not
accessible to the next booting stage based on currently assigned
domain.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: utils/irqchip: Add FDT based driver for APLIC
Anup Patel [Thu, 8 Apr 2021 12:40:16 +0000 (18:10 +0530)]
lib: utils/irqchip: Add FDT based driver for APLIC

We add simple FDT irqchip driver for APLIC so that generic platform (and
other FDT based platforms) can utilize common APLIC initialization library.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: utils/irqchip: Add APLIC initialization library
Anup Patel [Thu, 8 Apr 2021 05:58:02 +0000 (11:28 +0530)]
lib: utils/irqchip: Add APLIC initialization library

We add simple APLIC initialization library which is independent of
hardware description format (FDT or ACPI). This APLIC initialization
library can be used by custom OpenSBI platform support to setup
APLIC domains.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: utils: Disable appropriate IMSIC DT nodes in fdt_fixups()
Anup Patel [Tue, 15 Jun 2021 05:49:40 +0000 (11:19 +0530)]
lib: utils: Disable appropriate IMSIC DT nodes in fdt_fixups()

We should disable IMSIC DT nodes in fdt_fixups() which are not
accessible to the next booting stage based on currently assigned
domain.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: utils/irqchip: Add FDT based driver for IMSIC
Anup Patel [Wed, 21 Apr 2021 09:57:29 +0000 (15:27 +0530)]
lib: utils/irqchip: Add FDT based driver for IMSIC

We add simple FDT irqchip driver for IMSIC so that generic platform
(and other FDT based platforms) can utilize common IMIC library.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: utils/irqchip: Add IMSIC library
Anup Patel [Tue, 20 Apr 2021 11:03:40 +0000 (16:33 +0530)]
lib: utils/irqchip: Add IMSIC library

We add simple IMSIC library which is independent of hardware description
format (FDT or ACPI). This IMSIC library can be used by custom OpenSBI
platform support to setup IMSIC for external interrupts.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: sbi: Enable mie.MEIE bit for IPIs based on external interrupts.
Anup Patel [Tue, 29 Jun 2021 07:59:52 +0000 (13:29 +0530)]
lib: sbi: Enable mie.MEIE bit for IPIs based on external interrupts.

We can have IPIs based on external interrupts provided by devices
such as AIA IMSIC so we should enable mie.MEIE bit at appropriate
places in generic library.

Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agoinclude: sbi: Introduce nascent_init() platform callback
Anup Patel [Tue, 29 Jun 2021 07:44:04 +0000 (13:14 +0530)]
include: sbi: Introduce nascent_init() platform callback

We introduce nascent_init() platform callback which will allow
platforms to do very early initialization of platform specific
per-HART CSRs and per-HART devices.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: utils/irqchip: Allow multiple FDT irqchip drivers
Anup Patel [Tue, 20 Apr 2021 06:22:47 +0000 (11:52 +0530)]
lib: utils/irqchip: Allow multiple FDT irqchip drivers

We can have multiple FDT irqchip drivers to be probed when a RISC-V
system has different types of interrupt controller in a hierarchy.

This will be certainly the case when a RISC-V system has both
RISC-V AIA IMSIC and RISC-V AIA APLIC implemented.

We extend simple FDT irqchip framework to allow multiple FDT
irqchip drivers to be used for same RISC-V platform.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: sbi: Add sbi_trap_set_external_irqfn() API
Anup Patel [Tue, 6 Apr 2021 11:37:42 +0000 (17:07 +0530)]
lib: sbi: Add sbi_trap_set_external_irqfn() API

This patch adds sbi_trap_set_external_irqfn() API which can be used by
OpenSBI platform code to set a callback function for external interrupts.
The RISC-V AIA IMSIC driver will use this API to implement inter-processor
interrupts on-top-of MSIs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: sbi: Use AIA CSRs for local interrupts when available
Anup Patel [Tue, 6 Apr 2021 10:40:00 +0000 (16:10 +0530)]
lib: sbi: Use AIA CSRs for local interrupts when available

We should use AIA CSRs to process local interrupts whenever AIA
is available.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: sbi: Detect AIA CSRs at boot-time
Anup Patel [Tue, 6 Apr 2021 07:36:47 +0000 (13:06 +0530)]
lib: sbi: Detect AIA CSRs at boot-time

We extend HART feature detection to discover AIA CSRs at boot-time.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agoinclude: sbi: Add AIA related CSR defines
Anup Patel [Mon, 5 Apr 2021 11:43:20 +0000 (17:13 +0530)]
include: sbi: Add AIA related CSR defines

The RISC-V AIA specification improves handling of per-HART local
interrupts in a backward compatible manner. This patch adds defines
for the new RISC-V AIA CSRs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: utils/serial: Round UART8250 baud rate divisor to nearest integer
Jakub Luzny [Fri, 21 Jan 2022 15:06:14 +0000 (16:06 +0100)]
lib: utils/serial: Round UART8250 baud rate divisor to nearest integer

Previously, it was rounded down and that gives suboptimal results when
non-standard clock sources or baud rates are used.

Signed-off-by: Jakub Luzny <jakub.luzny@codasip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: fix compilation when strings.h is included
Petro Karashchenko [Fri, 28 Jan 2022 07:13:23 +0000 (09:13 +0200)]
lib: fix compilation when strings.h is included

In a systems that provide strings.h and it is included
together with sbi_bitops.h the compilation error appears.
The ffs() and fls() are provided by strings.h

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agoMakefile: fix build with binutils 2.38
Aurelien Jarno [Fri, 28 Jan 2022 17:33:46 +0000 (18:33 +0100)]
Makefile: fix build with binutils 2.38

From version 2.38, binutils default to ISA spec version 20191213. This
means that the csr read/write (csrr*/csrw*) instructions and fence.i
instruction has separated from the `I` extension, become two standalone
extensions: Zicsr and Zifencei. As the kernel uses those instruction,
this causes the following build failure:

 CC        lib/sbi/sbi_tlb.o
<<BUILDDIR>>/lib/sbi/sbi_tlb.c: Assembler messages:
<<BUILDDIR>>/lib/sbi/sbi_tlb.c:190: Error: unrecognized opcode `fence.i'
make: *** [Makefile:431: <<BUILDDIR>>/build/lib/sbi/sbi_tlb.o] Error 1

The fix is to specify those extensions explicitly in -march. However as
older binutils version do not support this, we first need to detect
that.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: sbi: Disable interrupt and inhibit counting in M-mode during init
Atish Patra [Fri, 7 Jan 2022 18:54:09 +0000 (10:54 -0800)]
lib: sbi: Disable interrupt and inhibit counting in M-mode during init

Currently, the mhpmevent CSRs are untouched during hart init during
cold/warm boot. Ideally, we should clear out all the bits except
overflow and MINH bit. That is required to disable overflow
interrupt and inhibit counting in M-mode to avoid any spurious
interrupts before perf start.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: sbi: Disable interrupt during config matching
Atish Patra [Fri, 7 Jan 2022 18:54:08 +0000 (10:54 -0800)]
lib: sbi: Disable interrupt during config matching

PMU overflow interrupt should be disabled durinig initial configuration of
counters. They should be enabled while starting counters.

Fixes: 730f01bb41a6 ("lib: sbi: Support sscofpmf extension in OpenSBI")
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: sbi: Map only the counters enabled in hardware
Atish Patra [Fri, 7 Jan 2022 18:54:07 +0000 (10:54 -0800)]
lib: sbi: Map only the counters enabled in hardware

The counter mapping in DT may be incorrect if all the counters specified
in the mapping are actually not physically present in the hardware.
OpenSBI should only keep a mapping of counters enabled in hardware and
defined in DT. This assume that all the programmable hpmcounters are
consecutive as it doesn't make sense to build a system with sparse
hpmcounters.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agolib: fix pointer of type 'void *' used in arithmetic
Jukka Laitinen [Wed, 19 Jan 2022 09:20:17 +0000 (11:20 +0200)]
lib: fix pointer of type 'void *' used in arithmetic

Using "void *" in arithmetic causes errors with strict compiler settings:
"error: pointer of type 'void *' used in arithmetic [-Werror=pointer-arith]"

Avoid these by calculating on "char *" where 1-byte data size is assumed.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agoplatform: sifive_fu740: fix reset when watchdog is running
Aurelien Jarno [Wed, 5 Jan 2022 07:20:39 +0000 (08:20 +0100)]
platform: sifive_fu740: fix reset when watchdog is running

When the watchdog is running the HiFive Unmatched board does not reboot
properly and shuts down itself a few seconds after reboot, in the early
stages of the u-boot loading. On a Linux kernel this happens when the
da9063_wdt module is loaded. This does not happen if the module is
unloaded before reboot or if the watchdog module is loaded with
"stop_on_reboot=1".

Fix that by stopping the watchdog before attempting to reset the board.
This is done by zeroing the TWDSCALE field of CONTROL_D register, unless
it was already set to 0.

Reported-by: Tianon Gravi <tianon@debian.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Nikita Shubin <n.shubin@yadro.com>
Tested-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2 years agoplatform: sifive_fu740: do not use a global in da9063_reset/shutdown
Aurelien Jarno [Wed, 5 Jan 2022 07:20:38 +0000 (08:20 +0100)]
platform: sifive_fu740: do not use a global in da9063_reset/shutdown

da9063_reset() and da9063_shutdown() take the chip address in argument
(like similar functions), but in practice use the da9063 global struct
instead. Fix that.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Xiang W <wxjstz@126.com>
2 years agolib: utils/sys: Extend HTIF library to allow custom base address
Anup Patel [Thu, 6 Jan 2022 03:46:55 +0000 (09:16 +0530)]
lib: utils/sys: Extend HTIF library to allow custom base address

Some of RISC-V emulators provide HTIF at fixed base address so for
such emulators users have to hard-code HTIF base address in the
linker script.

To address this problem, we let users optionally provide fixed HTIF
base address via platform support (or device tree).

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: utils/ipi: Fix size check in aclint_mswi_cold_init()
Anup Patel [Thu, 6 Jan 2022 03:32:45 +0000 (09:02 +0530)]
lib: utils/ipi: Fix size check in aclint_mswi_cold_init()

Currently, the ACLINT MSWI size check is forcing size to be at least
0x4000. This is inappropriate check because most systems will never
utilize full 16KB for a single ACLINT MSWI device so instead we should
check that ACLINT MSWI size is enough for on the associated HARTs.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2 years agoinclude: Bump-up version to 1.0
Anup Patel [Fri, 24 Dec 2021 11:57:44 +0000 (17:27 +0530)]
include: Bump-up version to 1.0

This patch updates OpenSBI version to 1.0 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
2 years agofirmware: Move memcpy/memset mapping to fw_base.S
Anup Patel [Wed, 22 Dec 2021 12:31:23 +0000 (18:01 +0530)]
firmware: Move memcpy/memset mapping to fw_base.S

Some of the external firmwares using OpenSBI as library are facing
issues with the weak memcpy() and memset() aliases in libsbi.a so
we move these to fw_base.S. This way mapping of implicit memcpy()
or memset() calls to sbi_memcpy() or sbi_memset() will only be done
for OpenSBI firmwares.
(Refer, https://github.com/riscv-software-src/opensbi/issues/234)

In addition, we also add memmove() and memcmp() mappings in fw_base.S
because as-per the GCC documentation the freestanding environment must
provide memcpy(), memmove(), memset(), and memcmp().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: sbi: simplify pmp_set(), pmp_get()
Heinrich Schuchardt [Fri, 17 Dec 2021 17:02:58 +0000 (18:02 +0100)]
lib: sbi: simplify pmp_set(), pmp_get()

pmpcfg_csr and pmpcfg_shift are only negative for an unexpected value of
__riscv_xlen. We can immediately return in this case.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2 years agoMakefile: Improve the method to disable -m(no-)save-restore option
Xiang W [Sun, 12 Dec 2021 12:39:33 +0000 (20:39 +0800)]
Makefile: Improve the method to disable -m(no-)save-restore option

The commit 69d7e53 disables the -m(no-)save-restore option for
clang, but clang11 supports this option. This patch uses the
output information of the compiler to check whether the compiler
supports this option.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2 years agolib: sbi: Fix compile errors using -Os option
Anup Patel [Thu, 2 Dec 2021 11:22:16 +0000 (16:52 +0530)]
lib: sbi: Fix compile errors using -Os option

When compiling with -Os option along with -ffreestanding, both GCC
and clang will add implicit calls to memcpy() and memset() for stack
variables initialized in declaration.

The C standard as per Clause 4, the compiler cannot necessarily
assume that anything beyond:

 * float.h
 * iso646.h
 * limits.h
 * stdalign.h
 * stdarg.h
 * stdbool.h
 * stddef.h
 * stdint.h
 * stdnoreturn.h
 * fenv.h
 * math.h
 * and the numeric conversion functions of stdlib.h.

This patch maps memcpy() and memset() as weak-alias of sbi_memcpy()
and sbi_memset() respectively so that implicit calls to memcpy()
and memset() will compile properly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
2 years agoMakefile: Fix -msave-restore compile warning with CLANG-10 (or lower)
Anup Patel [Thu, 2 Dec 2021 05:00:28 +0000 (10:30 +0530)]
Makefile: Fix -msave-restore compile warning with CLANG-10 (or lower)

The riscv target of CLANG-10 (or lower) does not support the
-m(no-)save-restore option so we get compile warnings. This patch
fixes compile warning by using -m(no-)save-restore option only
for GCC.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
2 years agolib: pmu: check SSCOF before masking
Nikita Shubin [Wed, 8 Dec 2021 11:16:54 +0000 (14:16 +0300)]
lib: pmu: check SSCOF before masking

We should check if SSCOF extension is present,
before applying inhibit mask and clearing overflow,
otherwise undesirable value can be written
in MHPMEVENT_N CSR.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2 years agodocs/platform: spike: Enhance Spike examples
Tsukasa OI [Fri, 3 Dec 2021 01:13:56 +0000 (10:13 +0900)]
docs/platform: spike: Enhance Spike examples

This commit makes Spike usable as QEMU (in fact, those are based on
QEMU examples).

Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2 years agolib: pmu: support the event ID encoded by a bitmap.
Vincent Chen [Thu, 2 Dec 2021 01:45:42 +0000 (17:45 -0800)]
lib: pmu: support the event ID encoded by a bitmap.

RISC-V privilege specification does not specify how to encode the event ID.
Therefore, each platform is allowed to customize its own encoding rule.
The common encoding methods are as follow, directly assigning a number to an
event, or every bit in the mphmevent CSR controls one specified event or
mixes the above two methods.

To enable OpenSBI to support the above three encoding methods simultaneously,
this patch repurpose the dt property "riscv,raw-event-to-mhpmcounters". The
"riscv,raw-event-to-mhpmcounters" will describes the one or multiple raw
events that could be counted by a set of counters. But, the column number
of "riscv,raw-event-to-mhpmcounters" is extended from 2 to 3. The 1st column
(64bit) is the ID of the raw events. The 2nd column (64bit) represents a
select_mask now to represent the bits used for event ID encoding.
If a platform directly encodes each raw PMU event as a unique ID,
the value of select_mask will be 0xffffffff_ffffffff.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Signed-off-by: Atish Patra<atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2 years agolib: sbi: Improve fatal error handling
Jessica Clarke [Sun, 21 Nov 2021 17:30:22 +0000 (17:30 +0000)]
lib: sbi: Improve fatal error handling

BUG and BUG_ON are not informative and are rather lazy interfaces, only
telling the user that something went wrong in a given function, but not
what, requiring the user to find the sources corresponding to their
firmware (which may not be available) and figure out how that BUG(_ON)
was hit. Even SBI_ASSERT in its current form, which does include the
condition that triggered it in the output, isn't necessarily very
informative. In some cases, the error may be fixable by the user, but
they need to know the problem in order to have any hope of fixing it.
It's also a nuisance for developers, whose development trees may have
changed significantly since the release in question being used, and so
line numbers can make it harder for them to understand which error case
a user has hit.

This patch introduces a new sbi_panic function which is printf-like,
allowing detailed error messages to be printed to the console. BUG and
BUG_ON are removed, since the former is just a worse form of sbi_panic
and the latter is a worse version of SBI_ASSERT. Finally, SBI_ASSERT is
augmented to take a set of arguments to pass to sbi_panic on failure,
used like so (sbi_boot_print_hart's current error case, which currently
manually calls sbi_printf and sbi_hart_hang):

  SBI_ASSERT(xlen >= 1, ("Error %d getting MISA XLEN\n", xlen));

The existing users of BUG are replaced with calls to sbi_panic along
with informative error messages. BUG_ON and SBI_ASSERT were unused (and,
in the case of SBI_ASSERT, remain unused).

Many existing users of sbi_hart_hang should be converted to use either
sbi_panic or SBI_ASSERT after this commit.

Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2 years agolib: sbi: Resolve the uninitialized complaint in sbi_pmu
Dong Du [Thu, 25 Nov 2021 10:38:17 +0000 (18:38 +0800)]
lib: sbi: Resolve the uninitialized complaint in sbi_pmu

A recent commit (b28f0700) turns to read from CSR_MCOUNTINHIBIT after
checking the SBI_HART_HAS_MCOUNTINHIBIT HART feature, which leaves the
mctr_inhbt uninitialized in pmu_ctr_find_hw().
As a result, compiler will complain:
error: 'mctr_inhbt' may be used uninitialized in this function.

This commit resolves the issue by assigning an initial value to mctr_inhbt.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2 years agolib: sbi: Fix missing space
Nikita Shubin [Thu, 25 Nov 2021 10:00:16 +0000 (13:00 +0300)]
lib: sbi: Fix missing space

Fix missing space in sbi_hart_pmp_configure
error printing.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang w <wxjstz@126.com>
2 years agolib: sbi: Fix spelling of "address" in sbi_domain.c
Vagrant Cascadian [Fri, 19 Nov 2021 19:37:21 +0000 (11:37 -0800)]
lib: sbi: Fix spelling of "address" in sbi_domain.c

Fix a spelling typo in error print.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2 years agolib: utils: Add LiteX UART support
Gabriel Somlo [Tue, 16 Nov 2021 19:17:04 +0000 (14:17 -0500)]
lib: utils: Add LiteX UART support

Add support for the UART provided by the LiteX SoC
framework (https://github.com/enjoy-digital/litex),
based on its FDT info (described in the Linux tree at
Documentation/devicetree/bindings/serial/litex,liteuart.yaml).

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2 years agolib: sbi: clear pmpcfg.A before setting in pmp_set()
Xiang W [Mon, 8 Nov 2021 09:43:03 +0000 (17:43 +0800)]
lib: sbi: clear pmpcfg.A before setting in pmp_set()

We should clear A bits in prot variable before enabling A_NA4 or A_NAPOT.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2 years agoplatform: sifive_fu740: add platform reset driver
Nikita Shubin [Wed, 10 Nov 2021 09:42:30 +0000 (12:42 +0300)]
platform: sifive_fu740: add platform reset driver

da9063 PMIC can be used to reset/shutdown the
Sifive Unmatched board.

shutdown is done simply by writing SHUTDOWN bit to
DA9063_REG_CONTROL_F register.

reset via setting WAKEUP bit in DA9063_REG_CONTROL_F
register followed by masking POWER and POWER1 domains
and setting STANDBY bit in DA9063_REG_CONTROL_A,
originally discovered by Alexandre Ghiti on linux-riscv
maillists.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
2 years agolib: utils/i2c: Add minimal SiFive I2C driver
Nikita Shubin [Wed, 10 Nov 2021 09:42:29 +0000 (12:42 +0300)]
lib: utils/i2c: Add minimal SiFive I2C driver

Minimum SiFive I2C driver to read/send bytes over I2C bus.

This allows querying information and perform operation of onboard PMIC,
as well as power-off and reset.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
2 years agolib: utils/i2c: Add simple FDT based I2C framework
Nikita Shubin [Wed, 10 Nov 2021 09:42:28 +0000 (12:42 +0300)]
lib: utils/i2c: Add simple FDT based I2C framework

FDT based I2C framework on the top of I2C library.

The drivers are probed on demand by fdt_i2c_adapter_get
function.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
2 years agolib: utils/i2c: Add generic I2C configuration library
Nikita Shubin [Wed, 10 Nov 2021 09:42:27 +0000 (12:42 +0300)]
lib: utils/i2c: Add generic I2C configuration library

Helper library to keep track of registered I2C adapters,
identified by dts offset, basic send/read functions and
adapter configuration (enable, set dividers, etc...).

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
2 years agolib: utils/reset: separate driver init func
Nikita Shubin [Wed, 10 Nov 2021 09:42:26 +0000 (12:42 +0300)]
lib: utils/reset: separate driver init func

Move driver init code to separate function, so it can be reused
elsewhere.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
2 years agolib: utils/reset: add priority to gpio reset
Nikita Shubin [Wed, 10 Nov 2021 09:42:25 +0000 (12:42 +0300)]
lib: utils/reset: add priority to gpio reset

Make gpio_system_reset_check return priority instead of just true/false.

Make default 128 priority for reset/shutdown.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
2 years agolib: sbi: Fix PMP address bits detection
Vasan VS [Mon, 8 Nov 2021 04:54:56 +0000 (10:24 +0530)]
lib: sbi: Fix PMP address bits detection

We should ensure that pmpcfg0.pmp0cfg is set to zero before using
pmpaddr0 CSR for detecting implemented PMP address bits.

Fixes: bf21632860b4 ("lib: sbi: Detect PMP granularity and number
of address bits")
Signed-off-by: Vasan VS <vasan.vs@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
2 years agolib: sbi: Fix initial value mask while updating the counters
Atish Patra [Mon, 8 Nov 2021 18:53:07 +0000 (10:53 -0800)]
lib: sbi: Fix initial value mask while updating the counters

The first 32 bits of the initial value for the counter should be
preserved while updating the mhpmcounter for 32bit.

Fixes: 13d40f21d588e ("lib: sbi: Add PMU support")
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2 years agolib: utils: Rename the prefix in PMU DT properties
Atish Patra [Mon, 8 Nov 2021 18:53:06 +0000 (10:53 -0800)]
lib: utils: Rename the prefix in PMU DT properties

As per the DT schema rules, the prefix should be vendor. As the PMU
properties are generic for all vendors, change the prefix to riscv
instead of pmu.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2 years agolib: sbi: Enable PMU extension for platforms without mcountinhibit
Atish Patra [Mon, 8 Nov 2021 18:53:05 +0000 (10:53 -0800)]
lib: sbi: Enable PMU extension for platforms without mcountinhibit

Some platforms such as hifive unmatched doesn't implement mcountinhibit
csr. However, it has hardware events that can be monitored using 2
hpmcounter it has (i.e. mhpmcounter3 & mhpmcounter4).

Currently, PMU extension disabled if mcountinhibit is absent. That's not
really necessary as long as the supervisor OS keeps track of the delta
value of the counters. Without mcountinhibit, the delta value won't be
entirely accurate because the counters are freely running. However, that
should be fine to produce an approximate counter value which can help
performance analysis. Perf sampling won't work though as sscof extension
is not present in hifive unmatched.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2 years agolib: sbi: Counter info width should be zero indexed
Atish Patra [Mon, 8 Nov 2021 18:53:04 +0000 (10:53 -0800)]
lib: sbi: Counter info width should be zero indexed

The mhpm bits represent the number of bits available in mhpmcounter
while counter width describes a zero indexed value. Fix the counter width
calculation.

Fixes: 13d40f21d588 ("lib: sbi: Add PMU support")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2 years agolib: sbi: Reset the mhpmevent value upon counter reset
Atish Patra [Mon, 8 Nov 2021 18:53:03 +0000 (10:53 -0800)]
lib: sbi: Reset the mhpmevent value upon counter reset

The hardware solely relies on the event selector value in mhpmevent
to figure out what event to monitor using that counter. It should be
reset when counter reset happens.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2 years agolib: sbi: Allow programmable counters to monitor cycle/instret events
Atish Patra [Mon, 8 Nov 2021 18:53:02 +0000 (10:53 -0800)]
lib: sbi: Allow programmable counters to monitor cycle/instret events

A platform may use programmable counters for cycle/instret events.
The priv spec allows that provided that cycle/instret also report those
events in addition to the programmable counters. We should allow that
functionality in OpenSBI.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2 years agolib: sbi: Always enable access for all counters
Atish Patra [Mon, 8 Nov 2021 18:53:01 +0000 (10:53 -0800)]
lib: sbi: Always enable access for all counters

OpenSBI doesn't use any counters for its own usage. Thus, all the counters
can be made accessible for lower privilege mode always. However, the
mcountinhibit must be set so that the counter doesn't increment.
As a result, we don't have to enable/disable mcounteren at every start/stop.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2 years agolib: sbi: Support sscofpmf extension in OpenSBI
Atish Patra [Mon, 8 Nov 2021 18:53:00 +0000 (10:53 -0800)]
lib: sbi: Support sscofpmf extension in OpenSBI

This patch adds sscofpmf extension in pmu module which includes
following things.

1. Enable overflow irq when starting a counter.
2. Setting the correct event filters passed from supervisor.
3. Delegating the overflow interrupt to the supervisor.
4. Add RV32 support for sscofpmf.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2 years agolib: sbi: Delegate PMU counter overflow interrupt to S mode
Atish Patra [Mon, 8 Nov 2021 18:52:59 +0000 (10:52 -0800)]
lib: sbi: Delegate PMU counter overflow interrupt to S mode

OpenSBI doesn't handle PMU counters for now.

Delegate the overflow counter to S-mode always.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2 years agolib: sbi: Detect Sscofpmf extension at run time
Atish Patra [Mon, 8 Nov 2021 18:52:58 +0000 (10:52 -0800)]
lib: sbi: Detect Sscofpmf extension at run time

Sscofpmf ISA extension introduces PMU counter overflow and filtering support.
It introduces a read only `scountovf` csr that can be used to detect if
a hart supports this extension at runtime. However, this feature is only
useful if the hart already supports mcounteren and mcountinhibit.

Add a dynamic detection mechanism and boot time print message if sscofpmf
is present.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2 years agolib: sbi: Update csr_read/write_num for PMU
Atish Patra [Mon, 8 Nov 2021 18:52:57 +0000 (10:52 -0800)]
lib: sbi: Update csr_read/write_num for PMU

The Sscofpmf extension introduces mhpmevent[h] csrs to handle filtering
/overflow bits in RV32. There is no way to read/write mcountinhibit
using mcountinhibit csr using a variable.

Updated the support to read/write mhpmevent[h] and mcountinhibit csr.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2 years agoriscv: Add new CSRs introduced by Sscofpmf[1] extension
Atish Patra [Mon, 8 Nov 2021 18:52:56 +0000 (10:52 -0800)]
riscv: Add new CSRs introduced by Sscofpmf[1] extension

[1] https://drive.google.com/file/d/1KcjgbLM5L1ZKY8934aJl8aQwGlMz6Cbo/view

Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
3 years agolib: sbi: error handling in fdt_reset_init()
Heinrich Schuchardt [Sat, 6 Nov 2021 09:54:51 +0000 (10:54 +0100)]
lib: sbi: error handling in fdt_reset_init()

The initialization of a reset driver may fail for various reasons, like
a PMIC based reset driver not finding the required I2C driver. The return
code of the init routine may take other error values than -ENODEV.

If the initialization of a reset driver fails, this should not lead to the
board hanging. It is enough that the reset driver does not call
sbi_system_reset_add_device() to avoid invoking the driver for a device
that could not be initialized.

Change the return type of fdt_reset_init() to void.
Print a message if an error occurs.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agoplatform: generic: move fdt_reset_init to final_init
Heinrich Schuchardt [Sat, 6 Nov 2021 09:54:50 +0000 (10:54 +0100)]
platform: generic: move fdt_reset_init to final_init

Move the fdt_reset_init() invocation from generic_early_init() to
generic_final_init(). This allows to print error messages.

Ignore the return value of fdt_reset_init() as we should not stop booting
due to failure to initialize reset drivers.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: sbi: move sbi_boot_print_general()
Heinrich Schuchardt [Sat, 6 Nov 2021 09:54:49 +0000 (10:54 +0100)]
lib: sbi: move sbi_boot_print_general()

Moving the sbi_boot_print_general() call after the
sbi_platform_final_init() call allows to print devices initialized in the
latter.

To keep the overall print sequence the same also move
sbi_boot_print_domains().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: utils/gpio: use list for drivers
Nikita Shubin [Tue, 2 Nov 2021 14:39:11 +0000 (17:39 +0300)]
lib: utils/gpio: use list for drivers

Convert static array to sbi_list.

This removes size limitation, makes add/remove more efficient and
saves space.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: sbi: Fix GPA passed to __sbi_hfence_gvma_xyz() functions
Anup Patel [Tue, 26 Oct 2021 10:55:21 +0000 (16:25 +0530)]
lib: sbi: Fix GPA passed to __sbi_hfence_gvma_xyz() functions

The parameter passed to HFENCE.GVMA instruction in rs1 register
is guest physical address right shifted by 2 (i.e. divided by 4).

Unfortunately, we overlooked the semantics of rs1 registers for
HFENCE.GVMA instruction and never right shifted guest physical
address by 2. This issue did not manifest for hypervisors till
now because all H-extension implementations (such as QEMU, Spike,
Rocket Core FPGA, etc) we tried till now were conservatively
flushing everything upon any HFENCE.GVMA instruction.

This patch fixes GPA passed to __sbi_hfence_gvma_vmid_gpa()
and __sbi_hfence_gvma_gpa() functions.

Fixes: 331ff6a162c1 ("lib: Support stage1 and stage2 tlb flushing")
Reported-by: Ian Huang <ihuang@ventanamicro.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
3 years agoinclude: sbi_utils: Introduce an helper to get fdt base address
Alexandre Ghiti [Wed, 27 Oct 2021 07:43:36 +0000 (09:43 +0200)]
include: sbi_utils: Introduce an helper to get fdt base address

This simply adds an helper to get fdt address which is more explicit than
sbi_scratch_thishart_arg1_ptr.

Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: sbi: Refine addr format in sbi_printf
Dong Du [Mon, 25 Oct 2021 08:06:15 +0000 (16:06 +0800)]
lib: sbi: Refine addr format in sbi_printf

Although we have PRILX to help us print unsigned long without
considering the 32bit/64bit differences, there are still some
places using 08lx and 016lx manually --- leading to redundant code.

This commit fixes the issue by using PRILX all the time.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: utils/reset: Register separate GPIO system reset devices
Anup Patel [Thu, 21 Oct 2021 05:41:34 +0000 (11:11 +0530)]
lib: utils/reset: Register separate GPIO system reset devices

Now that sbi_system support multiple system reset devices, we should
register separate devices for GPIO restart and GPIO poweroff because
DT describes these as separate devices with different compatible
strings.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
3 years agolib: utils/irqchip: Automatically delegate T-HEAD PLIC access
Samuel Holland [Mon, 18 Oct 2021 05:33:50 +0000 (00:33 -0500)]
lib: utils/irqchip: Automatically delegate T-HEAD PLIC access

The T-HEAD PLIC implementation requires setting a delegation bit
to allow access from S-mode. Now that the T-HEAD PLIC has its own
compatible string, set this bit automatically from the PLIC driver,
instead of reaching into the PLIC's MMIO space from another driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agoMakefile: Add build time and compiler info string
Wei Fu [Thu, 30 Sep 2021 10:11:20 +0000 (18:11 +0800)]
Makefile: Add build time and compiler info string

When we are doing opensbi development, we want to know the build time
and compiler info for debug purpose.

To enable this message, please add "BUILD_INFO=y", like:

```
make BUILD_INFO=y
```

NOTE: Using `BUILD_INFO=y` without specifying SOURCE_DATE_EPOCH will
violate "reproducible builds". So it's ONLY for development and debug
purpose, and should NOT be used in a product which follows "reproducible
builds".

Signed-off-by: Wei Fu <wefu@redhat.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
3 years agolib: sbi: system reset with invalid parameters
Heinrich Schuchardt [Fri, 15 Oct 2021 13:42:21 +0000 (15:42 +0200)]
lib: sbi: system reset with invalid parameters

The SBI specification requires that sbi_system_reset() returns
SBI_ERR_INVALID_PARAM if reset_type or reset_reason are not valid.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
3 years agolib: sbi: Save context for all non-retentive suspend types
Anup Patel [Mon, 11 Oct 2021 05:31:09 +0000 (11:01 +0530)]
lib: sbi: Save context for all non-retentive suspend types

Instead of saving context only for default non-retentive suspend,
we should save context for all non-retentive suspend types.

Fixes: 74756891cc35 ("lib: sbi: Implement SBI HSM suspend function")
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
3 years agolib: sbi: add priority for reset handler
Nikita Shubin [Fri, 1 Oct 2021 08:31:17 +0000 (11:31 +0300)]
lib: sbi: add priority for reset handler

Let's make system_reset_check returning priority instead of only
true/false. In that case 0 - means not supported, and anything above
means priority that makes existing reset handlers being used in first
place, unless it is decided to lower their priority.

The handler with the most priority wins.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: sbi: convert reset to list
Nikita Shubin [Fri, 1 Oct 2021 08:31:16 +0000 (11:31 +0300)]
lib: sbi: convert reset to list

To support different handlers for different types of resets, we are
adding a sbi_list of restart handlers.

Instead of sbi_system_reset_set_device we use
sbi_system_reset_add_device to reflect the actual meaning.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: utils: identify supported GPIO reset methods
Heinrich Schuchardt [Tue, 28 Sep 2021 11:42:46 +0000 (13:42 +0200)]
lib: utils: identify supported GPIO reset methods

The GPIO reset driver supports reset and poweroff. But not all boards
support both. gpio_system_reset_check() must detect this situation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: utils/reset: use sbi_timer_mdelay() in gpio reset driver
Anup Patel [Wed, 15 Sep 2021 08:20:40 +0000 (13:50 +0530)]
lib: utils/reset: use sbi_timer_mdelay() in gpio reset driver

We should use sbi_timer_mdelay() instead of custom gpio_mdelay() in
the gpio reset driver.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
3 years agolib: sbi: Add generic timer delay loop function
Anup Patel [Wed, 15 Sep 2021 04:41:24 +0000 (10:11 +0530)]
lib: sbi: Add generic timer delay loop function

We now have frequency of the timer device provided by the platform
support so we can emulate desired delay using a loop where the number
loop iterations are based on timer frequency.

This patch provides sbi_timer_delay_loop() for above purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
3 years agolib: sbi: Print timer frequency at boot time
Anup Patel [Wed, 15 Sep 2021 03:21:42 +0000 (08:51 +0530)]
lib: sbi: Print timer frequency at boot time

We now have frequency in timer device instance provided by platform
so let's print timer frequency as part of the boot prints.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
3 years agolib: sbi: Add timer frequency to struct sbi_timer_device
Anup Patel [Tue, 14 Sep 2021 16:21:48 +0000 (21:51 +0530)]
lib: sbi: Add timer frequency to struct sbi_timer_device

Generic mdelay() and udelay() functions can be provided by the
sbi_timer framework if timer frequency is available in the timer
instance provided by the platform support or timer driver.

This patch adds timer frequency (timer_freq) member in the
struct sbi_timer_device for above purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
3 years agolib: utils/fdt: Add fdt_parse_timebase_frequency() function
Anup Patel [Tue, 14 Sep 2021 15:35:42 +0000 (21:05 +0530)]
lib: utils/fdt: Add fdt_parse_timebase_frequency() function

We add fdt_parse_timebase_frequency() function which can be used
by ACLINT mtimer driver and platform code to get timebase frequency.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
3 years agolib: sbi: Add BUG() macro for csr_read/write_num() and misa_string()
Xiang W [Thu, 16 Sep 2021 04:32:50 +0000 (12:32 +0800)]
lib: sbi: Add BUG() macro for csr_read/write_num() and misa_string()

We use BUG() macro in csr_read_num(), csr_write_num(), and
misa_string() functions for unhandled cases.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: sbi: add some macros to detect BUG at runtime
Xiang W [Thu, 16 Sep 2021 04:32:49 +0000 (12:32 +0800)]
lib: sbi: add some macros to detect BUG at runtime

Three macros are added. One is called BUG, which is used to put in an
unreachable branch. One is called BUG_ON, which is used to check bugs
and assert conditions are opposite. One is called SBI_ASSERT, used for
assertion checking.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: sbi: fix ctz bug
Xiang W [Wed, 15 Sep 2021 06:50:52 +0000 (14:50 +0800)]
lib: sbi: fix ctz bug

The original version of ctz will cause an endless loop, if the parameter
passed in is 0. This commit fixes this bug.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: utils/reset: Add a sunxi watchdog reset driver
Samuel Holland [Thu, 9 Sep 2021 02:10:09 +0000 (21:10 -0500)]
lib: utils/reset: Add a sunxi watchdog reset driver

One of the watchdogs in the D1 SoC provides a "soft reset" function,
which allows software to immediately reset the entire SoC. Add a driver
so it can implement the SBI system reset function.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: utils/reset: Sort fdt_reset driver list
Samuel Holland [Thu, 9 Sep 2021 02:10:08 +0000 (21:10 -0500)]
lib: utils/reset: Sort fdt_reset driver list

In preparation for adding a new fdt_reset driver, ensure the existing
lists are sorted alphabetically.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: sbi: Refine the way to construct platform features
Dong Du [Wed, 1 Sep 2021 03:06:24 +0000 (11:06 +0800)]
lib: sbi: Refine the way to construct platform features

sbi_platform_get_features_str() uses sbi_snprintf() to construct the
features_str. However, it passes the wrong length value (i.e., the nfstr),
which should be (nfstr-offset) as the starting point of str (i.e.,
features_str + offset) changes.

This commit also checks the return value of snprintf, and handles the
corner case that the string buffer is full.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
3 years agolib: sbi: Checking fifo validness in sbi_fifo_is_empty and is_full
Dong Du [Fri, 27 Aug 2021 14:46:28 +0000 (22:46 +0800)]
lib: sbi: Checking fifo validness in sbi_fifo_is_empty and is_full

As other exported fifo functions, we should check whether the fifo is
valid in sbi_fifo_is_empty and sbi_fifo_is_full. To this end, this patch
changes the retval from bool to int, and the two functions will return
SBI_EINVAL in the case the fifo is invalid.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
3 years agolib: sbi: protect dprintf output with spinlock
Dong Du [Sat, 28 Aug 2021 06:45:02 +0000 (14:45 +0800)]
lib: sbi: protect dprintf output with spinlock

Avoid getting messages from multiple harts (using dprintf and printf)
concurrently with a spinlock serializaing calls to sbi_dprintf(),
sbi_printf() and sbi_puts()

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
3 years agolib: sbi: Correct typo in faults delegation CSR name
Rahul Pathak [Thu, 26 Aug 2021 09:54:18 +0000 (15:24 +0530)]
lib: sbi: Correct typo in faults delegation CSR name

Correcting the name of faults delegation CSR
%s/mfdeleg/medeleg

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>