Francis Ricci [Mon, 25 Apr 2016 20:34:34 +0000 (20:34 +0000)]
Create _lldb python symlink correctly when LLVM_LIBDIR_SUFFIX is used
Summary:
Do not assume that liblldb.so is located in $(lldb -P)/../../../lib
when creating the _lldb python symlink. Instead, use the path passed
to LLVM_LIBDIR_SUFFIX, defaulting to $(lldb -P)/../../../lib when this
variable is not set.
Reviewers: vharron, emaste, zturner
Subscribers: zturner, labath, lldb-commits, sas
Differential Revision: http://reviews.llvm.org/D19067
llvm-svn: 267462
Simon Atanasyan [Mon, 25 Apr 2016 20:25:05 +0000 (20:25 +0000)]
[ELF][MIPS] Move MIPS GOT header generation to the GotSection
MIPS is the only target requires GOT header. We already have MIPS
specific code in the `GotSection` class, so move MIPS GOT header
generation there and delete redundant stuff like `GotHeaderEntriesNum`
field and `writeGotHeader` method.
Differential Revision: http://reviews.llvm.org/D19465
llvm-svn: 267460
Francis Ricci [Mon, 25 Apr 2016 20:24:30 +0000 (20:24 +0000)]
Add missing qRegisterInfo option to gdbremote testcase
Summary:
"gcc" is equivalent to "ehframe" in ProcessGDBRemote, but
only "ehframe" was a valid response in the test suite.
Reviewers: tfiala, jasonmolenda, clayborg
Subscribers: lldb-commits, sas
Differential Revision: http://reviews.llvm.org/D18807
llvm-svn: 267459
Etienne Bergeron [Mon, 25 Apr 2016 20:15:33 +0000 (20:15 +0000)]
Cleanup redundant expression in InstCombineAndOrXor.
Summary:
The expression is redundant on both side of operator |.
detected by : http://reviews.llvm.org/D19451
Reviewers: rnk, majnemer
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D19459
llvm-svn: 267458
Lang Hames [Mon, 25 Apr 2016 19:56:45 +0000 (19:56 +0000)]
[ORC] Thread Error/Expected through the RPC library.
This replaces use of std::error_code and ErrorOr in the ORC RPC support library
with Error and Expected. This required updating the OrcRemoteTarget API, Client,
and server code, as well as updating the Orc C API.
This patch also fixes several instances where Errors were dropped.
llvm-svn: 267457
Matt Arsenault [Mon, 25 Apr 2016 19:53:22 +0000 (19:53 +0000)]
AMDGPU/SI: Optimize adjacent s_nop instructions
Use the operand for how long to wait. This is somewhat
distasteful, since it would be better to just emit s_nop
with the right argument in the first place. This would require
changing TII::insertNoop to emit N operands, which would be easy.
Slightly more problematic is the post-RA scheduler and hazard recognizer
represent nops as a single null node, and would require inventing
another way of representing N nops.
llvm-svn: 267456
Kostya Serebryany [Mon, 25 Apr 2016 19:41:45 +0000 (19:41 +0000)]
[libFuzzer] remove dead code
llvm-svn: 267455
Richard Smith [Mon, 25 Apr 2016 19:30:37 +0000 (19:30 +0000)]
Implement support for conditional between xvalues of reference-compatible
types. Patch by Erik Pilkington!
llvm-svn: 267454
Richard Smith [Mon, 25 Apr 2016 19:28:08 +0000 (19:28 +0000)]
Refactor traversal of bases in deduction of template parameters from base
classes of an argument to use CXXRecordDecl::forallBases. Fix forallBases to
only visit each base class once.
llvm-svn: 267453
Matt Arsenault [Mon, 25 Apr 2016 19:27:24 +0000 (19:27 +0000)]
AMDGPU: Implement addrspacecast
llvm-svn: 267452
Matt Arsenault [Mon, 25 Apr 2016 19:27:18 +0000 (19:27 +0000)]
AMDGPU: Add queue ptr intrinsic
llvm-svn: 267451
Matt Arsenault [Mon, 25 Apr 2016 19:27:13 +0000 (19:27 +0000)]
Add useful helpers to AddrSpaceCastInst
llvm-svn: 267450
Matt Arsenault [Mon, 25 Apr 2016 19:27:09 +0000 (19:27 +0000)]
AMDGPU: Add DAG to debug dump
Also reorder case to match enum order
llvm-svn: 267449
Lang Hames [Mon, 25 Apr 2016 19:21:57 +0000 (19:21 +0000)]
[Support] Fix latent bugs in Expected and ExitOnError that were preventing them
from working with reference types.
llvm-svn: 267448
George Burgess IV [Mon, 25 Apr 2016 19:21:45 +0000 (19:21 +0000)]
[Docs] Clarify what the object-size sanitizer does.
Currently, the UBSan docs make it sound like the object-size sanitizer
will only detect out-of-bounds reads/writes. It also catches some
operations that don't necessarily access memory (invalid downcasts,
calls of methods on invalid pointers, ...). This patch adds a note
about this behavior in the docs.
llvm-svn: 267447
Jonathan Peyton [Mon, 25 Apr 2016 19:12:20 +0000 (19:12 +0000)]
ARM Limited license agreement from the copyright/patent holder
I have prepared some patches for LLVM OpenMP runtime, mostly addressing
ARMv8 support. Before I upstream them, I must address legal issues that
arose around my planned contribution. I was advised that before I send any
substantial commit, I need to make sure that LICENSE.txt file in the projects
repository contains a statement submitted by ARM, similar to the one provided
by Intel (see "a license agreement from the copyright/patent holders"). This is
the same situation as with top-level LLVM project: ARM has provided the same
statement in http://llvm.org/svn/llvm-project/llvm/trunk/lib/Target/ARM/LICENSE.TXT file.
Patch by Paul Osmialowski
Differential Revision: http://reviews.llvm.org/D19319
llvm-svn: 267446
Johannes Doerfert [Mon, 25 Apr 2016 19:09:10 +0000 (19:09 +0000)]
Extract some constant factors from "SCEVAddExprs"
Additive expressions can have constant factors too that we can extract
and thereby simplify the internal representation. For now we do
compute the gcd of all constant factors but only extract the same
(possibly negated) factor if there is one.
llvm-svn: 267445
Richard Smith [Mon, 25 Apr 2016 19:09:05 +0000 (19:09 +0000)]
When deducing template parameters from base classes of an argument type, don't
preserve any deduced types from a failed deduction to a subsequent attempt at
deduction. Patch by Erik Pilkington!
llvm-svn: 267444
Francis Ricci [Mon, 25 Apr 2016 19:02:05 +0000 (19:02 +0000)]
test commit
llvm-svn: 267443
Johannes Doerfert [Mon, 25 Apr 2016 18:55:15 +0000 (18:55 +0000)]
Do not check all GEPs for assumptions
Before, we checked all GEPs in a statement in order to derive
out-of-bound assumptions. However, this can not only introduce new
parameters but it is also not clear what we can learn from GEPs that
are not immediately used in a memory accesses inside the SCoP. As this
case is very rare, no actual change in the behaviour is expected.
llvm-svn: 267442
Johannes Doerfert [Mon, 25 Apr 2016 18:51:27 +0000 (18:51 +0000)]
Only add user assumptions on known parameters [NFC]
Before, assumptions derived from llvm.assume could reference new
parameters that were not known to the SCoP before. These were neither
beneficial to the representation nor to the user that reads the
emitted remark. Now we project them out and keep only user assumptions
on known parameters. Nevertheless, the new parameters are still part
of the SCoPs parameter space as the SCEVAffinator currently adds them
on demand.
llvm-svn: 267441
Philip Reames [Mon, 25 Apr 2016 18:48:43 +0000 (18:48 +0000)]
[LVI] Clarify comments describing the lattice values
There has been much recent confusion about the partition in the lattice between constant and non-constant values. Hopefully, documenting this will prevent confusion going forward.
llvm-svn: 267440
Philip Reames [Mon, 25 Apr 2016 18:30:31 +0000 (18:30 +0000)]
[LVI] Split solveBlockValueConstantRange into two [NFC]
This function handled both unary and binary operators. Cloning and specializing leads to much easier to follow code with minimal duplicatation.
llvm-svn: 267438
Evgeniy Stepanov [Mon, 25 Apr 2016 18:23:29 +0000 (18:23 +0000)]
[gold] Fix linkInModule and extend common.ll test.
Fix early exit from linkInModule. IRMover::move returns false on
success and true on error.
Add a few more cases of merged common linkage variables with
different sizes and alignments.
llvm-svn: 267437
Chad Rosier [Mon, 25 Apr 2016 18:20:27 +0000 (18:20 +0000)]
Fix typo from r267432.
llvm-svn: 267436
Krzysztof Parzyszek [Mon, 25 Apr 2016 18:09:36 +0000 (18:09 +0000)]
[Hexagon] Use llvm-mc instead of llc in an MC testcase
Remember to svn add the new file.
llvm-svn: 267435
Krzysztof Parzyszek [Mon, 25 Apr 2016 18:08:33 +0000 (18:08 +0000)]
[Hexagon] Use llvm-mc instead of llc in an MC testcase
llvm-svn: 267434
Krzysztof Parzyszek [Mon, 25 Apr 2016 17:49:44 +0000 (17:49 +0000)]
[Hexagon] Register save/restore functions do not follow regular conventions
Do not mark them as modifying any of the volatile registers by default.
llvm-svn: 267433
Chad Rosier [Mon, 25 Apr 2016 17:41:48 +0000 (17:41 +0000)]
[ValueTracking] Add an additional test case for r266767 where one operand is a const.
llvm-svn: 267432
Zachary Turner [Mon, 25 Apr 2016 17:38:08 +0000 (17:38 +0000)]
Resubmit "Refactor raw pdb dumper into library"
This fixes a number of endianness issues as well as an ODR
violation that hopefully causes everything to be happy.
llvm-svn: 267431
Chad Rosier [Mon, 25 Apr 2016 17:23:36 +0000 (17:23 +0000)]
[ValueTracking] Improve isImpliedCondition when the dominating cond is false.
llvm-svn: 267430
Davide Italiano [Mon, 25 Apr 2016 17:18:45 +0000 (17:18 +0000)]
[gold-plugin] Remove dead assignment. NFC.
llvm-svn: 267429
Davide Italiano [Mon, 25 Apr 2016 17:13:39 +0000 (17:13 +0000)]
[ELFRelocs] Other architectures do not have *_NUM reloc.
It also seems to be unused. Get rid of it.
Thanks to Rafael for pointing out.
llvm-svn: 267428
Adrian Prantl [Mon, 25 Apr 2016 17:04:32 +0000 (17:04 +0000)]
dsymutil: Only warn about clang module DWO id mismatches in verbose mode.
Until PR27449 (https://llvm.org/bugs/show_bug.cgi?id=27449) is fixed in
clang this warning is pointless, since ASTFileSignatures will change
randomly when a module is rebuilt.
rdar://problem/
25610919
llvm-svn: 267427
Sanjay Patel [Mon, 25 Apr 2016 16:56:52 +0000 (16:56 +0000)]
add tests for potential CGP transform (PR27344)
llvm-svn: 267426
Michael Zuckerman [Mon, 25 Apr 2016 16:42:29 +0000 (16:42 +0000)]
[Clang][Builtin][AVX512]Adding k-register logic intrinsics KAND, KANDN, KOR, KORTEST, KXNOR, KXOR, KUNPACK instruction set.
Differential Revision: http://reviews.llvm.org/D19466
llvm-svn: 267425
Jacques Pienaar [Mon, 25 Apr 2016 16:41:21 +0000 (16:41 +0000)]
[lanai] Expand findClosestSuitableAluInstr check to consider offset register.
Previously findClosestSuitableAluInstr was only considering the base register when checking the current instruction for suitability. Expand check to consider the offset if the offset is a register.
llvm-svn: 267424
Johannes Doerfert [Mon, 25 Apr 2016 16:15:13 +0000 (16:15 +0000)]
Refactor Scop parameter handling
The new handling is consistent with the remaining code, e.g., we do
not create a new parameter id for each lookup call but copy an
existing one. Additionally, we now use the implicit order defined by
the Parameters set instead of an explicit one defined in a map.
llvm-svn: 267423
Tamas Berghammer [Mon, 25 Apr 2016 15:51:45 +0000 (15:51 +0000)]
Fix ARM attribute parsing for Android after rL267291
Differential revision: http://reviews.llvm.org/D19480
llvm-svn: 267422
Todd Fiala [Mon, 25 Apr 2016 15:48:34 +0000 (15:48 +0000)]
skip TestBitfields.py on OS X
tracked by:
https://llvm.org/bugs/show_bug.cgi?id=27515
llvm-svn: 267421
Marcin Koscielnicki [Mon, 25 Apr 2016 15:43:44 +0000 (15:43 +0000)]
[PR27390] [CodeGen] Reject indexed loads in CombinerDAG.
visitAND, when folding and (load) forgets to check which output of
an indexed load is involved, happily folding the updated address
output on the following testcase:
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
%typ = type { i32, i32 }
define signext i32 @_Z8access_pP1Tc(%typ* %p, i8 zeroext %type) {
%b = getelementptr inbounds %typ, %typ* %p, i64 0, i32 1
%1 = load i32, i32* %b, align 4
%2 = ptrtoint i32* %b to i64
%3 = and i64 %2, -
35184372088833
%4 = inttoptr i64 %3 to i32*
%_msld = load i32, i32* %4, align 4
%zzz = add i32 %1, %_msld
ret i32 %zzz
}
Fix this by checking ResNo.
I've found a few more places that currently neglect to check for
indexed load, and tightened them up as well, but I don't have test
cases for them. In fact, they might not be triggerable at all,
at least with current targets. Still, better safe than sorry.
Differential Revision: http://reviews.llvm.org/D19202
llvm-svn: 267420
Hrvoje Varga [Mon, 25 Apr 2016 15:40:08 +0000 (15:40 +0000)]
[mips][microMIPS] Revert commit r267137
Commit r267137 was the reason for failing tests in LLVM test suite.
llvm-svn: 267419
Zlatko Buljan [Mon, 25 Apr 2016 15:34:57 +0000 (15:34 +0000)]
[mips][microMIPS] Revert commit r266977
Commit r266977 was reason for failing LLVM test suite with error message: fatal error: error in backend: Cannot select: t17: i32 = rotr t2, t11 ...
llvm-svn: 267418
Sanjay Patel [Mon, 25 Apr 2016 15:26:57 +0000 (15:26 +0000)]
[x86] auto-generate checks for cmov tests
llvm-svn: 267417
Eric Liu [Mon, 25 Apr 2016 15:09:22 +0000 (15:09 +0000)]
Added Fixer implementation and fix() interface in clang-format for removing redundant code.
Summary:
After applying replacements, redundant code like extra commas or empty namespaces
might be introduced. Fixer can detect and remove any redundant code introduced by replacements.
The current implementation only handles redundant commas.
Reviewers: djasper, klimek
Subscribers: ioeric, mprobst, klimek, cfe-commits
Differential Revision: http://reviews.llvm.org/D18551
llvm-svn: 267416
Etienne Bergeron [Mon, 25 Apr 2016 15:06:33 +0000 (15:06 +0000)]
Fix incorrect redundant expression in target AMDGPU.
Summary:
The expression is detected as a redundant expression.
Turn out, this is probably a bug.
```
/home/etienneb/llvm/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:306:26: warning: both side of operator are equivalent [misc-redundant-expression]
if (isSMRD(*FirstLdSt) && isSMRD(*FirstLdSt)) {
```
Reviewers: rnk, tstellarAMD
Subscribers: arsenm, cfe-commits
Differential Revision: http://reviews.llvm.org/D19460
llvm-svn: 267415
Michael Zuckerman [Mon, 25 Apr 2016 14:48:23 +0000 (14:48 +0000)]
[Clang][Builtin][AVX512]Adding intrinsics for vfpclass{sd|ss} vfpclass{pd|ps} instruction set
Differential Revision: http://reviews.llvm.org/D19476
llvm-svn: 267414
Artem Dergachev [Mon, 25 Apr 2016 14:44:25 +0000 (14:44 +0000)]
[analyzer] Let TK_PreserveContents span across the whole base region.
If an address of a field is passed through a const pointer,
the whole structure's base region should receive the
TK_PreserveContents trait and avoid invalidation.
Additionally, include a few FIXME tests shown up during testing.
Differential Revision: http://reviews.llvm.org/D19057
llvm-svn: 267413
David Majnemer [Mon, 25 Apr 2016 14:31:32 +0000 (14:31 +0000)]
[WinEH] Update SplitAnalysis::computeLastSplitPoint to cope with multiple EH successors
We didn't have logic to correctly handle CFGs where there was more than
one EH-pad successor (these are novel with WinEH).
There were situations where a register was live in one exceptional
successor but not another but the code as written would only consider
the first exceptional successor it found.
This resulted in split points which were insufficiently early if an
invoke was present.
This fixes PR27501.
N.B. This removes getLandingPadSuccessor.
llvm-svn: 267412
Silviu Baranga [Mon, 25 Apr 2016 14:29:18 +0000 (14:29 +0000)]
[ARM] Add support for the X asm constraint
Summary:
This patch adds support for the X asm constraint.
To do this, we lower the constraint to either a "w" or "r" constraint
depending on the operand type (both constraints are supported on ARM).
Fixes PR26493
Reviewers: t.p.northover, echristo, rengolin
Subscribers: joker.eph, jgreenhalgh, aemerson, rengolin, llvm-commits
Differential Revision: http://reviews.llvm.org/D19061
llvm-svn: 267411
Artem Tamazov [Mon, 25 Apr 2016 14:13:51 +0000 (14:13 +0000)]
[AMDGPU][llvm-mc] s_getreg/setreg* - Add hwreg(...) syntax.
Added hwreg(reg[,offset,width]) syntax.
Default offset = 0, default width = 32.
Possibility to specify 16-bit immediate kept.
Added out-of-range checks.
Disassembling is always to hwreg(...) format.
Tests updated/added.
Differential Revision: http://reviews.llvm.org/D19329
llvm-svn: 267410
Rafael Espindola [Mon, 25 Apr 2016 14:05:44 +0000 (14:05 +0000)]
Add support for R_X86_64_PC64.
llvm-svn: 267409
Johannes Doerfert [Mon, 25 Apr 2016 14:01:36 +0000 (14:01 +0000)]
Model zext-extend instructions
A zero-extended value can be interpreted as a piecewise defined signed
value. If the value was non-negative it stays the same, otherwise it
is the sum of the original value and 2^n where n is the bit-width of
the original (or operand) type. Examples:
zext i8 127 to i32 -> { [127] }
zext i8 -1 to i32 -> { [256 + (-1)] } = { [255] }
zext i8 %v to i32 -> [v] -> { [v] | v >= 0; [256 + v] | v < 0 }
However, LLVM/Scalar Evolution uses zero-extend (potentially lead by a
truncate) to represent some forms of modulo computation. The left-hand side
of the condition in the code below would result in the SCEV
"zext i1 <false, +, true>for.body" which is just another description
of the C expression "i & 1 != 0" or, equivalently, "i % 2 != 0".
for (i = 0; i < N; i++)
if (i & 1 != 0 /* == i % 2 */)
/* do something */
If we do not make the modulo explicit but only use the mechanism described
above we will get the very restrictive assumption "N < 3", because for all
values of N >= 3 the SCEVAddRecExpr operand of the zero-extend would wrap.
Alternatively, we can make the modulo in the operand explicit in the
resulting piecewise function and thereby avoid the assumption on N. For the
example this would result in the following piecewise affine function:
{ [i0] -> [(1)] : 2*floor((-1 + i0)/2) = -1 + i0;
[i0] -> [(0)] : 2*floor((i0)/2) = i0 }
To this end we can first determine if the (immediate) operand of the
zero-extend can wrap and, in case it might, we will use explicit modulo
semantic to compute the result instead of emitting non-wrapping assumptions.
Note that operands with large bit-widths are less likely to be negative
because it would result in a very large access offset or loop bound after the
zero-extend. To this end one can optimistically assume the operand to be
positive and avoid the piecewise definition if the bit-width is bigger than
some threshold (here MaxZextSmallBitWidth).
We choose to go with a hybrid solution of all modeling techniques described
above. For small bit-widths (up to MaxZextSmallBitWidth) we will model the
wrapping explicitly and use a piecewise defined function. However, if the
bit-width is bigger than MaxZextSmallBitWidth we will employ overflow
assumptions and assume the "former negative" piece will not exist.
llvm-svn: 267408
Pavel Labath [Mon, 25 Apr 2016 14:00:23 +0000 (14:00 +0000)]
Skip TestBitfileds on linux
Test added in r267248 exposed a bug in handling of dwarf produced by clang>=3.9, which causes a
crash during expression evaluation. Skip the test until this is sorted out.
llvm-svn: 267407
Anna Thomas [Mon, 25 Apr 2016 13:58:05 +0000 (13:58 +0000)]
Test commit: modified comment. NFC
llvm-svn: 267406
Omair Javaid [Mon, 25 Apr 2016 13:45:39 +0000 (13:45 +0000)]
Handle invalid values of PLT entry size generated by linker
Make sure we figure out correct plt entry field in case linker has generated a small value below realistic entry size like 4 bytes or below.
Differential revision: http://reviews.llvm.org/D19252
llvm-svn: 267405
Johannes Doerfert [Mon, 25 Apr 2016 13:37:24 +0000 (13:37 +0000)]
Check only loop control of loops that are part of the region
This also removes a duplicated line of code in the region generator
that caused a SPEC benchmark to fail with the new SCoPs.
llvm-svn: 267404
Johannes Doerfert [Mon, 25 Apr 2016 13:36:23 +0000 (13:36 +0000)]
Initialize the invalid domain of an access with an empty set
llvm-svn: 267403
Johannes Doerfert [Mon, 25 Apr 2016 13:34:50 +0000 (13:34 +0000)]
Do not propagate invalid domains over back edges
llvm-svn: 267402
Johannes Doerfert [Mon, 25 Apr 2016 13:33:07 +0000 (13:33 +0000)]
Introduce a parameter set type [NFC]
llvm-svn: 267401
Johannes Doerfert [Mon, 25 Apr 2016 13:32:36 +0000 (13:32 +0000)]
Remove unnecessary argument of the SCEVValidator [NFC]
llvm-svn: 267400
Chad Rosier [Mon, 25 Apr 2016 13:25:14 +0000 (13:25 +0000)]
Typo. NFC.
llvm-svn: 267399
Michael Zuckerman [Mon, 25 Apr 2016 13:01:40 +0000 (13:01 +0000)]
[Clang][AVX512][BUILTIN] Adding intrinsics for VSCATTERPF{1|0}{DPS|QPS|DPD|QPD} instruction set
Differential Revision: http://reviews.llvm.org/D19313
llvm-svn: 267398
Krzysztof Parzyszek [Mon, 25 Apr 2016 12:49:47 +0000 (12:49 +0000)]
[Hexagon] Correctly set "Flags" in ELF header
llvm-svn: 267397
Rafael Espindola [Mon, 25 Apr 2016 12:32:19 +0000 (12:32 +0000)]
Simplify. NFC.
llvm-svn: 267396
Alexey Bataev [Mon, 25 Apr 2016 12:22:29 +0000 (12:22 +0000)]
[OPENMP 4.5] Codegen for 'taskloop' directive.
The taskloop construct specifies that the iterations of one or more associated loops will be executed in parallel using OpenMP tasks. The iterations are distributed across tasks created by the construct and scheduled to be executed.
The next code will be generated for the taskloop directive:
#pragma omp taskloop num_tasks(N) lastprivate(j)
for( i=0; i<N*GRAIN*STRIDE-1; i+=STRIDE ) {
int th = omp_get_thread_num();
#pragma omp atomic
counter++;
#pragma omp atomic
th_counter[th]++;
j = i;
}
Generated code:
task = __kmpc_omp_task_alloc(NULL,gtid,1,sizeof(struct
task),sizeof(struct shar),&task_entry);
psh = task->shareds;
psh->pth_counter = &th_counter;
psh->pcounter = &counter;
psh->pj = &j;
task->lb = 0;
task->ub = N*GRAIN*STRIDE-2;
task->st = STRIDE;
__kmpc_taskloop(
NULL, // location
gtid, // gtid
task, // task structure
1, // if clause value
&task->lb, // lower bound
&task->ub, // upper bound
STRIDE, // loop increment
0, // 1 if nogroup specified
2, // schedule type: 0-none, 1-grainsize, 2-num_tasks
N, // schedule value (ignored for type 0)
(void*)&__task_dup_entry // tasks duplication routine
);
llvm-svn: 267395
Rafael Espindola [Mon, 25 Apr 2016 12:05:56 +0000 (12:05 +0000)]
Delete needsCopyRelImpl. It is redundant with getRelExpr.
llvm-svn: 267394
James Molloy [Mon, 25 Apr 2016 10:48:29 +0000 (10:48 +0000)]
[GlobalOpt] Allow constant globals to be SRA'd
The current logic assumes that any constant global will never be SRA'd. I presume this is because normally constant globals can be pushed into their uses and deleted. However, that sometimes can't happen (which is where you really want SRA, so the elements that can be eliminated, are!).
There seems to be no reason why we can't SRA constants too, so let's do it.
llvm-svn: 267393
Pavel Labath [Mon, 25 Apr 2016 10:32:23 +0000 (10:32 +0000)]
Remove flaky decorator from two tests on linux
The flakyness is no longer reproducible, and the tests seem to be passing reliably now.
llvm-svn: 267392
Simon Atanasyan [Mon, 25 Apr 2016 10:18:48 +0000 (10:18 +0000)]
[ELF] Delete extra line. NFC
llvm-svn: 267391
Igor Kudrin [Mon, 25 Apr 2016 09:43:37 +0000 (09:43 +0000)]
[Coverage] Restore the correct count value after processing a nested region in case of combined regions.
If several regions cover the same area of code, we have to restore
the combined value for that area when return from a nested region.
This patch achieves that by combining regions before calling buildSegments.
Differential Revision: http://reviews.llvm.org/D18610
llvm-svn: 267390
Silviu Baranga [Mon, 25 Apr 2016 09:27:16 +0000 (09:27 +0000)]
[SCEV] Improve the run-time checking of the NoWrap predicate
Summary:
This implements a new method of run-time checking the NoWrap
SCEV predicates, which should be easier to optimize and nicer
for targets that don't correctly handle multiplication/addition
of large integer types (like i128).
If the AddRec is {a,+,b} and the backedge taken count is c,
the idea is to check that |b| * c doesn't have unsigned overflow,
and depending on the sign of b, that:
a + |b| * c >= a (b >= 0) or
a - |b| * c <= a (b <= 0)
where the comparisons above are signed or unsigned, depending on
the flag that we're checking.
The advantage of doing this is that we avoid extending to a larger
type and we avoid the multiplication of large types (multiplying
i128 can be expensive).
Reviewers: sanjoy
Subscribers: llvm-commits, mzolotukhin
Differential Revision: http://reviews.llvm.org/D19266
llvm-svn: 267389
Marcin Koscielnicki [Mon, 25 Apr 2016 09:24:34 +0000 (09:24 +0000)]
[PowerPC] [PR27387] Disallow r0 for ADD8TLS.
ADD8TLS, a variant of add instruction used for initial-exec TLS,
currently accepts r0 as a source register. While add itself supports
r0 just fine, linker can relax it to a local-exec sequence, converting
it to addi - which doesn't support r0.
Differential Revision: http://reviews.llvm.org/D19193
llvm-svn: 267388
Mehdi Amini [Mon, 25 Apr 2016 08:47:49 +0000 (08:47 +0000)]
Run GlobalOpt before emitting the bitcode for ThinLTO
This is motivated by reducing the size of the IR and thus reduce
compile time.
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 267385
Mehdi Amini [Mon, 25 Apr 2016 08:47:37 +0000 (08:47 +0000)]
ThinLTO: Move createNameAnonFunctionPass insertion in PassManagerBuilder (NFC)
It is just code motion, but makes more sense this way.
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 267384
Igor Breger [Mon, 25 Apr 2016 08:30:28 +0000 (08:30 +0000)]
fix comments
related to
Differential Revision: http://reviews.llvm.org/D17913
llvm-svn: 267383
George Rimar [Mon, 25 Apr 2016 08:14:41 +0000 (08:14 +0000)]
[ELF] - Implemented comparsion operators for linkerscript.
Patch adds support of <,>,!=,==,>=,<= operators.
Differential revision: http://reviews.llvm.org/D19419
llvm-svn: 267382
George Rimar [Mon, 25 Apr 2016 08:08:54 +0000 (08:08 +0000)]
[ELF] - Removed dead declarations. NFC.
llvm-svn: 267381
Michael Zuckerman [Mon, 25 Apr 2016 05:32:35 +0000 (05:32 +0000)]
[Clang][AVX512][BuiltIn] Adding support to intrinsics of VPERMD and VPERMW instruction set
Differential Revision: http://reviews.llvm.org/D19195
llvm-svn: 267380
Michael Zuckerman [Mon, 25 Apr 2016 05:27:51 +0000 (05:27 +0000)]
Fixing wrong mask size error. From __mmask8 to __mmask16.
Was reviewed over the shoulder by AsafBadouh.
Connected to review http://reviews.llvm.org/D19195.
llvm-svn: 267379
Davide Italiano [Mon, 25 Apr 2016 04:38:08 +0000 (04:38 +0000)]
[Support/ELFRelocs] Add R_386_GOT32X.
The new relocation recently defined in the Intel386 psABI
was still missing from this file. A subsequent commit will
add support for GOT32X in MC, together with a test.
llvm-svn: 267378
Craig Topper [Mon, 25 Apr 2016 04:30:29 +0000 (04:30 +0000)]
[X86] Replace a SmallVector used to pass 2 values to an ArrayRef parameter with a fixed size array. NFC
llvm-svn: 267377
Derek Bruening [Mon, 25 Apr 2016 03:56:20 +0000 (03:56 +0000)]
[esan] Fix uninitialized warning from interception context
The interception context is not used by esan, but the compiler complains
about it being uninitialized all the same. We set it to null to avoid the
warning.
llvm-svn: 267376
Junmo Park [Mon, 25 Apr 2016 01:40:54 +0000 (01:40 +0000)]
Minor code cleanups. NFC.
llvm-svn: 267375
Andrew Wilkins [Mon, 25 Apr 2016 01:18:20 +0000 (01:18 +0000)]
[llgo] llgoi: separate evaluation from printing
Summary:
Separate the evaluation of expressions from printing
of results. This is in preparation for splitting the
core of the interpreter out for use in alternative
interpreter frontends.
At the same time, the output is made less noisy in
response to comments on the golang-nuts announcement.
We would ideally print out values using Go syntax,
but this is impractical until we have libgo based on
Go 1.5. When that happens, fmt's %#v will handle
reflect.Value better, and so we can fix/filter type
names to remove automatically generated package names.
Reviewers: pcc
Subscribers: llvm-commits, axw
Differential Revision: http://reviews.llvm.org/D13761
llvm-svn: 267374
Craig Topper [Mon, 25 Apr 2016 01:01:15 +0000 (01:01 +0000)]
[X86] Add a complete set of tests for all operand sizes of cttz/ctlz with and without zero undef being lowered to bsf/bsr.
llvm-svn: 267373
Enrico Granata [Mon, 25 Apr 2016 00:52:47 +0000 (00:52 +0000)]
Add a --element-count option to the expression command
This option evaluates an expression and, if the result is of pointer type, treats it as if it was an array of that many elements and displays such elements
This has a couple subtle points but is mostly as straightforward as it sounds
Add a parray N <expr> alias for this new mode
Also, extend the --object-description mode to do the moral equivalent of the above but display each element in --object-description mode
Add a poarray N <expr> alias for this
llvm-svn: 267372
Peter Collingbourne [Mon, 25 Apr 2016 00:19:47 +0000 (00:19 +0000)]
Add a note to the test explaining why it doesn't match gold's behaviour.
llvm-svn: 267371
Adrian Prantl [Sun, 24 Apr 2016 22:23:13 +0000 (22:23 +0000)]
Verifier: Verify that each inlinable callsite of a debug-info-bearing function
in a debug-info-bearing function has a debug location attached to it. Failure to
do so causes an "!dbg attachment points at wrong subprogram for function"
assertion failure when the inliner sets up inline scope info.
rdar://problem/
25878916
This reaplies r267320 without changes after fixing an issue in the OpenMP IR
generator in clang.
llvm-svn: 267370
Adrian Prantl [Sun, 24 Apr 2016 22:22:29 +0000 (22:22 +0000)]
Debug info: Apply an empty debug location for global OpenMP destructors.
LLVM really wants a debug location on every inlinable call in a function
with debug info, because it otherwise cannot set up inlining debug info.
This change applies an artificial line 0 debug location (which is how
DWARF marks automatically generated code that has no corresponding
source code) to the .__kmpc_global_dtor_. functions to avoid the
LLVM Verifier complaining.
llvm-svn: 267369
Martin Probst [Sun, 24 Apr 2016 22:05:09 +0000 (22:05 +0000)]
clang-format: [JS] generator and async functions.
For generators, see:
https://developer.mozilla.org/en-US/docs/Web/JavaScript/Guide/Iterators_and_generators
async functions are not quite in the spec yet, but stage 3 and already widely used:
http://tc39.github.io/ecmascript-asyncawait/
Reviewers: djasper
Subscribers: klimek
Differential Revision: http://reviews.llvm.org/D19204
llvm-svn: 267368
Rafael Espindola [Sun, 24 Apr 2016 21:42:56 +0000 (21:42 +0000)]
Also check the IR.
llvm-svn: 267367
Rafael Espindola [Sun, 24 Apr 2016 21:30:18 +0000 (21:30 +0000)]
Add a test for how we handle protected visibility.
llvm-svn: 267366
Saleem Abdulrasool [Sun, 24 Apr 2016 21:01:04 +0000 (21:01 +0000)]
unwind: remove unnecessary header
Availablity.h is not used within config.h. The locations which use the
availability infrastructure already include the necessary header(s). NFC.
llvm-svn: 267365
Saleem Abdulrasool [Sun, 24 Apr 2016 21:00:59 +0000 (21:00 +0000)]
unwind: unify _LIBUNWIND_ABORT
Rather than use the `__assert_rtn` on libSystem based targets and a local
`assert_rtn` function on others, expand the function definition into a macro
which will perform the writing to stderr and then abort. This unifies the
definition and behaviour across targets.
Ensure that we flush stderr prior to aborting.
llvm-svn: 267364
Ulrich Weigand [Sun, 24 Apr 2016 20:49:56 +0000 (20:49 +0000)]
Fix unwind failures when PC points beyond the end of a function
RegisterContextLLDB::InitializeNonZerothFrame already has code to attempt
to detect and handle the case where the PC points beyond the end of a
function, but there are certain cases where this doesn't work correctly.
In fact, there are *two* different places where this detection is attempted,
and the failure is in fact a result of an unfortunate interaction between
those two separate attempts.
First, the ResolveSymbolContextForAddress routine is called with the
resolve_tail_call_address flag set to true. This causes the routine
to internally accept a PC pointing beyond the end of a function, and
still resolving the PC to that function symbol.
Second, the InitializeNonZerothFrame routine itself maintains a
"decr_pc_and_recompute_addr_range" flag and, if that turns out to
be true, itself decrements the PC by one and searches again for
a symbol at that new PC value.
Both approaches correctly identify the symbol associated with the PC.
However, the problem is now that later on, we also need to find the
DWARF CFI record associated with the PC. This is done in the
RegisterContextLLDB::GetFullUnwindPlanForFrame routine, and uses
the "m_current_offset_backed_up_one" member variable.
However, that variable only actually contains the PC "backed up by
one" if the *second* approach above was taken. If the function was
already identified via the first approach above, that member variable
is *not* backed up by one but simply points to the original PC.
This in turn causes GetEHFrameUnwindPlan to not correctly identify
the DWARF CFI record associated with the PC.
Now, in many cases, if the first method had to back up the PC by one,
we *still* use the second method too, because of this piece of code:
// Or if we're in the middle of the stack (and not "above" an asynchronous event like sigtramp),
// and our "current" pc is the start of a function...
if (m_sym_ctx_valid
&& GetNextFrame()->m_frame_type != eTrapHandlerFrame
&& GetNextFrame()->m_frame_type != eDebuggerFrame
&& addr_range.GetBaseAddress().IsValid()
&& addr_range.GetBaseAddress().GetSection() == m_current_pc.GetSection()
&& addr_range.GetBaseAddress().GetOffset() == m_current_pc.GetOffset())
{
decr_pc_and_recompute_addr_range = true;
}
In many cases, when the PC is one beyond the end of the current function,
it will indeed then be exactly at the start of the next function. But this
is not always the case, e.g. if there happens to be alignment padding
between the end of one function and the start of the next.
In those cases, we may sucessfully look up the function symbol via
ResolveSymbolContextForAddress, but *not* set decr_pc_and_recompute_addr_range,
and therefore fail to find the correct DWARF CFI record.
A very simple fix for this problem is to just never use the first method.
Call ResolveSymbolContextForAddress with resolve_tail_call_address set
to false, which will cause it to fail if the PC is beyond the end of
the current function; or else, identify the next function if the PC
is also at the start of the next function. In either case, we will
then set the decr_pc_and_recompute_addr_range variable and back up the
PC anyway, but this time also find the correct DWARF CFI.
A related problem is that the ResolveSymbolContextForAddress sometimes
returns a "symbol" with empty name. This turns out to be an ELF section
symbol. Now, usually those get type eSymbolTypeInvalid. However, there
is code in ObjectFileELF::ParseSymbols that tries to change the type of
invalid symbols to eSymbolTypeCode or eSymbolTypeData if the symbol
lies within the code or data section.
Unfortunately, this check also hits the symbol for the code section
itself, which is then marked as eSymbolTypeCode. While the size of
the section symbol is 0 according to the ELF file, LLDB considers
this size invalid and attempts to figure out the "correct" size.
Depending on how this goes, we may end up with a symbol that overlays
part of the code section, even outside areas covered by real function
symbols.
Therefore, if we call ResolveSymbolContextForAddress with PC pointing
beyond the end of a function, we may get this bogus section symbol.
This again means InitializeNonZerothFrame thinks we have a valid PC,
but then we don't find any unwind info for it.
The fix for this problem is me to simply always leave ELF section
symbols as type eSymbolTypeInvalid.
Differential Revision: http://reviews.llvm.org/D18975
llvm-svn: 267363
Simon Pilgrim [Sun, 24 Apr 2016 20:30:48 +0000 (20:30 +0000)]
[X86][AVX] Added PR24935 test case
llvm-svn: 267362
Saleem Abdulrasool [Sun, 24 Apr 2016 20:12:48 +0000 (20:12 +0000)]
ARM: fix __chkstk Frame Setup on WoA
This corrects the MI annotations for the stack adjustment following the __chkstk
invocation. We were marking the original SP usage as a Def rather than Kill.
The (new) assigned value is the definition, the original reference is killed.
Adjust the ISelLowering to mark Kills and FrameSetup as well.
This partially resolves PR27480.
llvm-svn: 267361
Simon Pilgrim [Sun, 24 Apr 2016 19:31:56 +0000 (19:31 +0000)]
Tweak comments to make it clear that these combines are for SSE scalar instructions.
llvm-svn: 267360
Simon Pilgrim [Sun, 24 Apr 2016 18:35:59 +0000 (18:35 +0000)]
[InstCombine][SSE] Reduce DIVSS/DIVSD to FDIV if only first element is required
As discussed on D19318, if we only demand the first element of a DIVSS/DIVSD intrinsic, then reduce to a FDIV call. This matches the existing FADD/FSUB/FMUL patterns.
llvm-svn: 267359