vbo: Don't set node->min_index = max_index = indices_offset when merging

I'm can't see why this is necessary.  There are already new fields
(node->merged.{min,max}_index) for the new values in the merged case.
But in vbo_save_draw.c, in the !draw_using_merged_prim case, we would
try and use the original node...with the now destroyed min/max index.

Fixes some assert failures when running with swtnl and forcing the
non-merged path (though it takes the merged path by default).

Fixes: 4c751ad67aa ("vbo/dlist: use a shared index buffer")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8522>

r600/sfn: Remove StoreMerger unused member b.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8540>

ci/piglit: Upgrade to a newer piglit in our containers.

Pulls in test fixes for rasterpos on softpipe and for
simple-barrier-atomics on freedreno.  Note that many xfail-vs-xskips end
up changing, because apparently the

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8499>

intel/fs: Separate SLM size calculation from encoding

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8486>

mesa/main: Replace the uint format packing code with util/format's.

Cuts another 60kb of generated code from Mesa drivers.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8532>

mesa/main: Replace float pack function with util_format_pack_rgba().

Less main-specific code when we're pulling in util/ formats anyway.  Drops
about 20kb from Mesa drivers.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8532>

swrast: Use util_format_write_4/4ub for the scattered pixel writes.

This was the only code using the "get a pack-a-pixel function pointer"
generated code, switch it over to using util/format's.

This does mean some more format desc lookups in the loop, but this code is
only accessible from classic driver swrast fallbacks at this point, where
GPU read perf completely dominates the profile anyway.

basically no change to driver size.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8532>

radv: flush L2 for images affected by the pipe misaligned issue on GFX10+

In some rare cases, L2 needs to be flushed if an image is affected
by the pipe misaligned issue. This is roughly based on AMDVLK.

I confirmed that disabling TC-compat HTILE, and respectively DCC,
for the relevant images also fixes the regressions below.

This fixes some regressions introduced with L2 coherency for
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_* and for
dEQP-VK.renderpass2.suballocation.multisample_resolve.*.

Fixes: 4a783a3c784 ("radv: Use L2 coherency on GFX9+.")
Co-Authored-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8557>

radv: restore invalidating the vector cache for internal meta operations

The driver used to invalidate the vector cache for meta operations
but this has been removed and I think it should be restored to fix
a bunch of regressions on GFX8.

This probably needs to be cleaned up but this is a hotfix.

This fixes a bunch of regressions and flakes on GFX8 like
dEQP-VK.pipeline.multisample.sample_locations_ext.draw.color.samples_4.*.

Fixes: 8f8d72af555 ("radv: Use access helpers for flushing with meta operations.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8573>

radv: enable TC-compat HTILE for D16S8 on GFX9+

I don't know why this wasn't enabled but I think it should be.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8562>

radv: enable TC-compat HTILE with D32S8 and MSAA on GFX9+

Only GFX8 has some depth/stencil resolve failures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8562>

radv: add a comment explaining the micro tile mode resolve

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8558>

frontend/dri: fix doesn't support RGBA ordering still expose RGBA in config

Signed-off-by: cheyang <cheyang@bytedance.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8553>

aco: add test for incorrect convert_to_SDWA() check

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8577>

aco: fix convert_to_SDWA() check in add_subdword_definition()

v_or_b32 with a v2b definition should use SDWA if is_partial=true.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 56345b8c610 ("aco: allow reading/writing upper halves/bytes when possible")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8577>

zink: process ubos with location values set as long as they're actually ubos

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8514>

zink: tweak xfb slot mapping in ntv

ARB_enhanced_layouts allows specifying overlapping variable locations
for xfb outputs, so we need to explode the arrays here to a full 128
components so we can do per-component mapping

sometimes this fails though, as in the case where xfb is just selecting
a single component from a vec but still considering the whole slot, and
so for those cases we just decrement our array index until we get to the
base, which will be within 3 components

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8515>

intel: change urb max shader geometry for CML GT1

Below deqp cts failure is seen on CML GT1 only , GT2 all test
passes, changing the max shader geometry to 256 (previous 640)
fixes all failure tests.Similar issue on BDW GT1
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3173

dEQP-GLES31.functional.geometry_shading.layered.
render_with_default_layer_cubemap
render_with_default_layer_3d
render_with_default_layer_2d_array

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4102

Signed-off-by: Abhishek Kumar <abhishek4.kumar@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8550>

v3dv: use PIPE_TIMEOUT_INFINITE

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8554>

v3dv: don't wait for idle on occlusion query pool resets

Instead, wait for the specific queries being reset to
not be in use by the GPU.

This takes query pool resets in the UE4 Shooter demo from
50-60ms down to 0.5-2ms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8554>

v3dv: disable early Z writes if Z writes are disabled

I saw this while inspecting CL dumps from the UE Shooter demo,
where they disable Z writes for occlusion queries. The hardware
is probably doing this internally, but it doesn't hurt
to do this explicitly and make CL traces consistent with intended
behavior.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8571>

radeonsi: inhibit clockgating when using SQTT

Ported from PAL.

Fixes: 07c1504d1b0 ("radeonsi: implement SQTT support")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8480>

v3dv: only update uniforms for dirty descriptors if stage has descriptors

If we have dirty descriptor set state we have to update our uniform
data to reference the new resources such as addresses for textures
or UBOs. This is known to have a high CPU cost, so we want to limit
this as much as we can.

It is a common rendering pattern in applications to render many objects
using the same pipeline, but modifying the descriptor sets bound to update
textures, UBOs, etc. In this scenario, we would be incurring in unnecessary
uniform stream updates for stages that don't access descriptor sets at all.

This change makes it so we track which shader stages in a pipeline
use descriptor set state and skips updating uniform streams for them
when dirty descriptor set state is the only reason requiring us to
generate new uniform streams for a draw call.

v2: reuse shader stage information from the pipeline set layouts
    to track shader stages that use descriptor state.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8555>

radv: flush L2 metadata as part of CB/DB flush instead of CS_DONE on GFX9

This restores the previous logic because L2 coherency was fully
implemented. It appears that flushing L2 metadata with a CS_DONE
event hangs.

This fixes GPU hangs with Monster Hunter World.

Fixes: 4a783a3c ("radv: Use L2 coherency on GFX9+.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8566>

nv50/ir: Initialize DataArray members in constructor.

Fix defects reported by Coverity Scan.

uninit_member: Non-static class member array is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member arrayIdx is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member baseAddr is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member arrayLen is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member baseSym is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member vecDim is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member eltSize is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member file is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member regOnly is not initialized in this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7764>

radv: Add a trivial implementation of VK_KHR_deferred_host_operation

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8545>

mesa: fix alpha channel of ETC2_SRGB8 decompression for !bgra

If software decompression is used for ETC2, the alpha channel
for sRGB8 textures would be set only if BGRA is true.

Fixes: e5604ef78bd "st/mesa/i965: Allow decompressing ETC2 to GL_RGBA"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8529>

pan/bi: Iterate from zero when setting RA interference

It is now valid for a node to have an index of zero.

Fixes: 39aa8c4a5ac ("pan/bi: Switch to new IR")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Fix printing of node 0

Fixes: 1893a3805e4 ("pan/bi: Generate instruction printer")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Fix RA of node 0

Fixes: 39aa8c4a5ac ("pan/bi: Switch to new IR")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Fix 64-bit SSBO addresses

Fixes: 9c7efc45105 ("pan/bi: Add intrinsic emits for builder")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/mdg: Fix spilling when scratch memory is used

Add the tls_size from NIR before spilling so that it doesn't alias
with spill slots.

Fixes: 152bc5d15e1 ("pan/mdg: Support loads and stores to scratch memory")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Implement packing ops between 32-bit vec1 and 16-bit vec2

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Implement ihadd/irhadd operations

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Implement saturated add/sub operations

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Set TLS for compute jobs

Fixes CL programs using scratch storage, such as the Piglit test
i32-stack-array.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Lower umul_high

Also lower uadd_carry, which the mul_high lowering generates.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Add w0 to the 'h01' swizzle bucket

A number of instructions, such as LOAD.i8, use this swizzle in the XML.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/mdg: Allow 64-bit src_bitsize for comparison operations

Fixes Piglit test attributes.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/mdg: Don't reorder loads/stores past each other

Fixes Piglit test local-memory.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/mdg: Limit int64 vectorization

Previously, nir_opt_vectorize was sometimes vectorizing 64-bit
load_const instructions to vec4.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Assert on sysval overflow

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Add a sysval for local_work_dim

Fixes Piglit test get-work-dim.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Add a sysval for local_group_size

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Use pan_nir_lower_64bit_intrin

The intrinsics covered by the pass are implemented by reading 32-bit
registers, so there is no reason to keep them 64-bit.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Use the correct NIR options for OpenCL on Bifrost

This is needed so that 64-bit operations are lowered properly.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Improve unknown intrinsic error

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Set bifrost_props for compute shaders

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Implement load_kernel_input

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Implement load/store intrinsics

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Improve interoperability of the command-line disassembler

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Set compute lowering options

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Add some compute intrinsic loads

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Handle 64-bit pack and unpack operations

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Lower 64-bit integers

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Pipe scratch_size in from NIR

Needs to be added to whatever we spill ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

nvc0: index_bias is now only set for indexed draws

Fixes: cbdc00ac3a6 ("nouveau: fix handling draw info")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8539>

cso: set index_bounds_valid = true for arrays draws

The min/max indices are valid. Set the bit to true to indicate that.

Fixes glClear (+ clear_with_quads) on nouveau.

Fixes: 72ff53098c64 (gallium: add pipe_draw_info::index_bounds_valid)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reported-by: Simon Ser <contact@emersion.fr>
Tested-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8546>

zink: handle NULL views in zink_set_sampler_views

Passing NULL for the views parameter should be the same as passing an
array of NULL, according to the documentation. So let's respect that
detail.

This fixes a crash when using GALLIUM_HUD.

Fixes: 8d46e35d16e ("zink: introduce opengl over vulkan")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8564>

turnip: disable UBWC on Z24_S8 MSAA images on A630

Fixes GPU hangs in dEQP-VK.renderpass2.depth_stencil_resolve.* tests
on A630.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8381>

anv: Add a trivial implementation of VK_KHR_deferred_host_operation

This isn't actually capable of deferring anything; it just trivially
returns success.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7735>

radv: Do not use a pipe offset for aliased sparse images.

Otherwise the offset might not match between the images that are
aliased.

Fixes: e553ea51e8c ("radv: Create sparse images.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4072
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8535>

wsi/x11: Use get_screen_resources_current in wsi_x11_detect_xwayland

get_screen_resources may trigger an active probe of display connections
in the X server, which may take significant time and/or result in log
file spam.

Fixes: b5268d532a01 "wsi/x11: Detect Xwayland"
Reported-by: Sylvain Bertrand <sylvain.bertrand@legeek.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8492>

radeonsi: trim the size of si_vgt_param_key and si_vgt_stages_key

These are the minimum sizes we can use.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: don't use si_get_vs_state in most places

It's incorrect because si_get_vs_state returns gs_copy_shader for legacy
GS. It was harmless, but let's use si_get_vs, which is simpler.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: rearrange condition for streamout workaround on gfx7 and gfx8

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: get out of si_emit_vs_state early for blit vertex shaders

They don't use current_vs_state.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: remove MRT-draw-calls, spill-draw-calls, spill-compute-calls

due to limited usefulness and overhead in si_draw_vbo.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: make sctx->vertex_elements always non-NULL

Bind a state with 0 vertex elements there.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: add a specialized function for CP DMA L2 prefetch

This radically simplifies the code to decrease CPU overhead in si_draw_vbo.
The generic CP DMA copy function is too complicated.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: make cik_emit_prefetch_L2 templated and move it to si_state_draw.cpp

This is a great candidate for a template. There are a lot of conditions
that are already templated in si_draw_vbo.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: fix si_num_prims_for_vertices for PIPE_PRIM_POLYGON

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: don't compute average vertex count in si_draw_vbo

It's probably not needed and we also have draw merging on gfx10,
so we should be able to use total_driver_count in theory.
(I may be wrong, but I don't know if having avg_direct_count really
improves anything)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: don't pass pipe_draw_info into si_emit_derived_tess_state

Only one field is used.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: translate pipe_prim_type only when it changes

just sink it into the branch

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: don't pass pipe_draw_info into si_emit_ia_multi_vgt_param

Only one field is used.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: don't pass pipe_draw_info into si_emit_vs_state

only one field is used

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: move emit_cache_flush functions into si_gfx_cs.c

This is a better place for them. They are not inlined anyway.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: don't clear unaligned bits when unbinding vertex buffers

It's initialized to 0, so &= is a no-op.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: constant buffer cleanups

si_set_clip_state unreferenced a NULL pointer = no-op.
si_set_tess_state can just pass the user buffer to si_set_rw_buffer directly.

Then si_upload_const_buffer can be static.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

android: freedreno/ir3: Switch over to new encoder/decoder

Fixes the following building error:

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
...
ld.lld: error: undefined symbol: isa_assemble
>>> referenced by ir3_shader.c:151 (external/mesa/src/freedreno/ir3/ir3_shader.c:151)
...
ld.lld: error: undefined symbol: isa_decode
>>> referenced by ir3_shader.c:668 (external/mesa/src/freedreno/ir3/ir3_shader.c:668)

Fixes: 5cae4779c ("freedreno/ir3: Switch over to new encoder/decoder")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8538>

android: freedreno/hw/isa: Add description of ir3 ISA

Necessary to build libir3decode and libir3encode for Android

Fixes: 6d94f575d ("freedreno/hw/isa: Add description of ir3 ISA")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8538>

zink: remove excessive checks for loader version

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>

zink/codegen: find promotion version using vulkan registry

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>

zink/codegen: adding/fixing comments and copyright notice

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>

zink/codegen: codegen-ize load_instance_extensions()

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>

zink/codegen: enable instance extension unconditionally if promoted

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>

zink/codegen: make 'struct' optional in Version

while we are at it, fix a typo too

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>

zink/codegen: add some new attributes to Extension

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>

nouveau: Fix typos.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8490>

lima: introduce fs and vs shader cache

Some opengl features require shader recompilation to be implemented in
the mali400 and can only be detected at draw time. In some applications,
this could lead to recompiling shaders on every frame which could kill
performance. Introduce a shader cache to prevent this issue.
lima didn't have vertex shader recompilation yet but it is needed to
implement followup features, so include it here too.
Code heavily borrowed from the vc4 shader cache implementation.

One notable difference between the vc4 reference implementation and lima
is that lima still compiles the base shader at state creation time
without deferring it to the next draw (so that it stays compatible with
behaviour expected by unmodified shader-db, for example).

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8357>

frontends/va/image: Eliminate repetitive code on error paths

Removes repetitive code in exit on error paths in the derive image function.

Signed-off-by: Alexander Kapshuk <alexander.kapshuk@gmail.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8481>

freedreno/a2xx: add RB perfcounter 1-3

Xenos driver reads four perf counters in total.

v2: fix register names

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7666>

freedreno/a2xx: fix/add RBBM perfcounter

Xenos driver read two perf counters and their order is also different.

v2: fix typo in register address

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7666>

glsl: only expose int64 atomics when extension is enabled

This limits the exposure of these functions to when the extension is
available. Prevents crashes otherwise, as the rest of the infrastructure
doesn't necessarily expect these functions when the extension is not
available.

Fixes: 40c1f9883e5 ("mesa,glsl: add support for GL_NV_shader_atomic_int64")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8533>

nv50/ir: clear dnz flag when converting mul/mad to simpler ops

Fixes some assertion failures in the GM107 emitter with the game
'tansei', noticed while debugging gitlab issue 4101.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8534>

freedreno/a6xx: Add r2d support for GMEM resolves

For cases where we need to do an MSAA resolve that BLIT events cannot
handle, fall back to CP_BLIT (r2d)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4085
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8509>

ac/surface: Fix GFX9 sparse mip info.

Used the wrong offset & pitch for gfx9.

Fixes: 50bafb85ec1 ("ac/surf: Add sparse texture info to radeon_surf.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4072
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8526>

st/mesa: fix broken moves for u2i64 and related ops

These ops just put out mov's directly, which screws up the assignment
logic -- it just tries to only process the "last" mov. Don't try to do
the more optimized thing for 64-bit types, where this is just much
trickier.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8463>

zink: reduce blendfactor when alpha_to_one is set

if alpha is 1, some of these blendfactors can be reduced to simpler ones

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8513>