Jagan Teki [Wed, 27 Feb 2019 14:32:08 +0000 (20:02 +0530)]
spi: sun4i: Access registers and bits via enum offsets
Allwinner support two different SPI controllers one for A10 and
another for A31 with minimal changes in register offsets and
respective register bits, but the logic for accessing the SPI
master via SPI slave remains nearly similar.
Add enum offsets for register set and register bits, so-that
it can access both classes of SPI controllers.
Assign same control register for global, transfer and fifo control
registers to make the same code compatible with A31 SPI controller.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Stefan Mavrodiev <stefan@olimex.com> # A20-SOM204
Jagan Teki [Wed, 27 Feb 2019 14:32:07 +0000 (20:02 +0530)]
spi: sun4i: Simplify reg writes using set/clrbits_le32
Update the existing register writes using setbits_le32 and
clrbits_le32 in required places.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 27 Feb 2019 14:32:06 +0000 (20:02 +0530)]
clk: sunxi: Implement SPI clocks, resets
- Implement SPI AHB, MOD clocks via ccu_clk_gate for all
supported Allwinner SoCs
- Implement SPI resets via ccu_reset for all supported
Allwinner SoCs.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Jagan Teki [Wed, 27 Feb 2019 14:32:05 +0000 (20:02 +0530)]
spi: sun4i: Poll for rxfifo to be filled up
To drain rx fifo the fifo need to poll for how much data has
been filled up in rx fifo.
To achieve this, the current code is using wait_for_bit logic
on control register with exchange burst mode mask, which is not
a proper way of waiting for fifo filled up.
So, add code for polling rxfifo to be filled up using fifo
status register.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Horatiu.Vultur@microchip.com [Mon, 25 Feb 2019 10:59:54 +0000 (10:59 +0000)]
spi: designware: Change include order
With current order of include files, the file designware_spi.c
can't see that the struct global_data has the member
board_type when CONFIG_BOARD_TYPES is defined. By not seeing this
then all the members are shifted in the struct global_data.
So when the driver is trying to read from device tree blob, it
would pass the wrong address to the function 'fdtdev_get_int'.
This will make to use the default frequency 500000.
The fix consists of changing the order of include files in
designware_spi.c to include first common.h file.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Eugen Hristev [Fri, 8 Feb 2019 08:57:01 +0000 (10:57 +0200)]
configs: at91: remove SPL_GENERATE_ATMEL_PMECC_HEADER from non-nand configs
SPL_GENERATE_ATMEL_PMECC_HEADER will generate a header for the SPL for NAND
information. The initial stage 1 bootloader will use this header in case the
NAND flash doesn't support commands to retrieve sector size, etc.
However this header is bad for different boot media, like MMC or SPI.
In case SD_BOOT or SPI_BOOT is used, remove the config for this.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Alexander Dahl [Wed, 6 Feb 2019 14:19:41 +0000 (15:19 +0100)]
configs: sama5d27_som1_ek: Activate misc init for uSD variant
This was already set for 'sama5d27_som1_ek_mmc_defconfig' (first SD
card, full size). Without this option set, the MAC address is not read
from the I²C EEPROM at boot, and remains unset:
U-Boot 2019.01 (Jan 01 2019 - 00:00:00 +0000)
CPU: SAMA5D27 1G bits DDR2 SDRAM
Crystal frequency: 24 MHz
CPU clock : 492 MHz
Master clock : 164 MHz
DRAM: 128 MiB
MMC: sdio-host@
a0000000: 0, sdio-host@
b0000000: 1
Loading Environment from FAT... OK
In: serial
Out: serial
Err: serial
Net:
Error: ethernet@
f8008000 address not set.
eth-1: ethernet@
f8008000
Hit any key to stop autoboot: 0
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Hiroyuki Yokoyama [Wed, 13 Feb 2019 05:23:46 +0000 (14:23 +0900)]
pinctrl: renesas: r8a77990: Reivse USB ID pin name
Since the datasheet Rev.1.00 has an error about the USB ID pin name,
this patch revises it.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Hiroyuki Yokoyama [Wed, 13 Feb 2019 03:41:04 +0000 (12:41 +0900)]
pinctrl: renesas: r8a77990: Fix MOD_SEL0 bit3 when using TX0
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50,
the MOD_SEL0 bit3 is set to 0 when TX0_A pin function is selected,
and the MOD_SEL0 bit3 is set to 1 when TX0_B pin function is
selected.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Hiroyuki Yokoyama [Wed, 13 Feb 2019 03:35:53 +0000 (12:35 +0900)]
pinctrl: renesas: r8a77990: Fix MOD_SEL0 bit16 when using NFALE and NFRB_N
According to the R-Car Gen3 Hardware Manual Rev.1.50, the MOD_SEL0
bit16 is set to 0 when NFALE_A and NFRB_N_A pin functions are
selected.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Hiroyuki Yokoyama [Wed, 13 Feb 2019 03:18:28 +0000 (12:18 +0900)]
pinctrl: renesas: r8a77990: Fix MOD_SEL0 bit2 when using RX2,TX2 and SCK2
According to the R-Car Gen3 Hardware Manual Rev 1.50, the MOD_SEL0
bit2 is set when RX2_{A,B}, TX2_{A,B} and SCK2_A pin functions are
selected.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Hiroyuki Yokoyama [Wed, 13 Feb 2019 01:37:48 +0000 (10:37 +0900)]
pinctrl: renesas: r8a77990: Fix rename RTSx_N_TANS_x to RTSx_N_x
This patch fixes the allocation name "RTSx_N_TANS_x" of IPSR /
MOD_SEL0/1 of r8a77990 to "RTSx_N_x". This information was
confirmed in the R-Car Gen3 Hardware Manual Rev.1.50.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Hiroyuki Yokoyama [Wed, 13 Feb 2019 01:22:26 +0000 (10:22 +0900)]
pinctrl: renesas: Fix r8a779{6,65} rename sel_ndfc to sel_ndf
This patch fixes the allocation name "sel_ndfc" of MOD_SEL2[22]
of r8a7796 / r8a77965 to "sel_ndf". This information was confirmed
in the R-Car Gen3 Hardware Manual Rev.1.50.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Hiroyuki Yokoyama [Wed, 13 Feb 2019 01:06:22 +0000 (10:06 +0900)]
pinctrl: renesas: Remove r8a779{5,6,65} CC5_OSCOUT of IP17
This patch removes CC5_OSCOUT assignment of IP17[3:0] of r8a7795
/ r8a7796 / r8a77965. This information was confirmed in the R-Car
Gen3 Hardware Manual Rev.1.50.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Hiroyuki Yokoyama [Tue, 12 Feb 2019 11:50:01 +0000 (20:50 +0900)]
pinctrl: renesas: Fix r8a779{5,6,65} rename sel_adg_ to sel_adg
This patch fixes to the correct names, and "_" is not include after
"adg" for r8a7795/r8a7796/r8a77965. This information was confirmed
in the R-Car Gen3 Hardware Manual Rev.1.50.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Hiroyuki Yokoyama [Tue, 12 Feb 2019 10:09:13 +0000 (19:09 +0900)]
pinctrl: renesas: Fix r8a779{5,6,65} assign to GP7_03/02 of GPSR7
This patch is change the bit assignment of "HDMI1_CEC" to "GP7_03",
and "HDMI0_CEC" to "GP7_02". This information was confirmed in the
R-Car Gen3 Hardware Manual Rev.1.50.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Yunfeng Ding [Tue, 19 Feb 2019 06:44:04 +0000 (14:44 +0800)]
board: Enable DHCP distro boot for LS1012a, LS1021a
Enable DHCP distro boot for Layerscape LS1012A and LS1021A.
Signed-off-by: Yunfeng Ding <yunfeng.ding@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Laurentiu Tudor [Tue, 26 Feb 2019 11:18:34 +0000 (13:18 +0200)]
armv8: fsl-layerscape: avoid DT fixup warning
sec_firmware reserves JR3 for it's own usage and deletes the JR3 node
from the device tree. This causes this warning to be issued when doing
the device tree fixup:
WARNING could not find node fsl,sec-v4.0-job-ring: FDT_ERR_NOTFOUND.
Fix it by excluding the device tree fixup for the JR reserved by
sec_firmware.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Laurentiu Tudor [Tue, 26 Feb 2019 11:18:33 +0000 (13:18 +0200)]
armv8: fsl-layerscape: fix SEC QI ICID setup
The SEC QI ICID setup in the QIIC_LS register is actually an offset
that is being added to the ICID coming from the qman portal. Setting
it with a non-zero value breaks SMMU setup as the resulting ICID is
not known. On top of that, the SEC QI ICID must match the qman portal
ICIDs in order to share the isolation context.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Laurentiu Tudor [Tue, 26 Feb 2019 11:18:32 +0000 (13:18 +0200)]
fsl_sec: fix register layout on Layerscape architectures
On Layerscape architectures the SEC memory map is 1MB and the
register blocks contained in it are 64KB aligned, not 4KB as
the ccsr_sec structure currently assumes. Fix the layout of
the structure for these architectures.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Prabhakar Kushwaha [Sun, 3 Mar 2019 16:27:54 +0000 (21:57 +0530)]
board: ls1046qds: Enable PPA for secure boot
Re-organize defconfig and enabled PPA for secure boot
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Rajesh Bhagat [Fri, 1 Feb 2019 05:22:01 +0000 (05:22 +0000)]
configs: fsl: move DDR specific defines to Kconfig
Moves below DDR specific defines to Kconfig:
CONFIG_FSL_DDR_BIST
CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
CONFIG_FSL_DDR_INTERACTIVE
CONFIG_FSL_DDR_SYNC_REFRESH
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:41 +0000 (16:38 +0100)]
board: ls1043a: use default scan_dev_for_boot
Default environment variable is more complete. Also scans for efi
binaries for example.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:40 +0000 (16:38 +0100)]
board: ls1043a: enable dhcp boot
dhcp boot is a useful feature and works out-of-the-box on these
platforms. Enable it as a boot source.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:39 +0000 (16:38 +0100)]
board: ls1043a: enable EFI_LOADER_BOUNCE_BUFFER
EFI applications need bounce buffers to work properly on these
platforms.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:38 +0000 (16:38 +0100)]
board: ls1046a: use default scan_dev_for_boot
Default environment variable is more complete. Also scans for efi
binaries for example.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:37 +0000 (16:38 +0100)]
board: ls1046a: enable dhcp boot
dhcp boot is a useful feature and works out-of-the-box on these
platforms. Enable it as a boot source.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:36 +0000 (16:38 +0100)]
board: ls1046a: enable EFI_LOADER_BOUNCE_BUFFER
EFI applications need bounce buffers to work properly on these
platforms.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:35 +0000 (16:38 +0100)]
board: ls2080ardb: use default scan_dev_for_boot
Default environment variable is more complete. Also scans for efi
binaries for example.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:34 +0000 (16:38 +0100)]
Revert "ls2080ardb: remove dhcp function from env as boot source"
dhcp boot is a useful feature and works out-of-the-box for ls2088a
platforms. Moreover, no solid reason is given for disabling it.
Revert the patch to re-enable it.
This reverts commit
aea5cd75e63c20de4c00ce24a93eeee8542f923e.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:33 +0000 (16:38 +0100)]
board: ls1088ardb: use default scan_dev_for_boot
Default environment variable is more complete. Also scans for efi
binaries for example.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:32 +0000 (16:38 +0100)]
Revert "ls1088a: remove dhcp function from u-boot env as boot source"
dhcp boot is a useful feature and works out-of-the-box for ls1088a
platforms. Moreover, no solid reason is given for disabling it.
Revert the patch to re-enable it.
This reverts commit
863e42e8b1f9e97d87919e20e34a7b98089f7522.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:31 +0000 (16:38 +0100)]
board: ls1088a: fix fsl-mc search path
Path for fsl-mc node in kernel device-tree is /soc/fsl-mc whereas
in u-boot it is /fsl-mc.
Fix the incorrect search path to fix following error:
fdt_fixup_board_enet: ERROR: fsl-mc node not found in device tree
(error -1)
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mian Yousaf Kaukab [Tue, 29 Jan 2019 15:38:30 +0000 (16:38 +0100)]
board: ls1088a: fix dppa exit when using efi boot
Same issue for ls2080a was fixed by following patch:
b7b8410a8f ls2080: Exit dpaa only right before exiting U-Boot
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Tom Rini [Sun, 3 Mar 2019 13:00:30 +0000 (08:00 -0500)]
Merge git://git.denx.de/u-boot-mpc85xx
Heinrich Schuchardt [Thu, 28 Feb 2019 22:56:35 +0000 (23:56 +0100)]
efi_loader: HII protocols: debug messages
When package types are not supported by our implementation of the HII
database protocol supported error messages are displayed.
Essentially the output is only needed for debugging. By using EFI_PRINT()
the messages are only written for in debug mode and with correct
indentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 28 Feb 2019 19:41:58 +0000 (20:41 +0100)]
efi_loader: error handling for `efidebug boot add`
In `efidebug boot add iPXE scsi 0:1 snp-arm64.efi --foo` a parameter is
missing. Hence the command should not silently return as if everything were
ok but should display the usage info.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <agraf@csgraf.de>
Heinrich Schuchardt [Thu, 28 Feb 2019 22:07:00 +0000 (23:07 +0100)]
efi_loader: HII protocols: fix new_package_list()
In new_package_list() we call new_packagelist() to create a new package
list. Next we try to add the packages which fails for form packages. Due
to this error we call free_packagelist(). Now in free_packagelist()
list_del() is called for an uninitialized field hii->link. This leads to
changing random memory addresses.
To solve the problem move the initialization of hii->link to
new_packagelist().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Heinrich Schuchardt [Sat, 23 Feb 2019 10:20:23 +0000 (11:20 +0100)]
efi_loader: do not add \ in efi_fs_from_name()
In the `efidebug boot add` command we do not want an unsolicited leading
backslash added to the file name.
There is no good reason to mark a loaded file with a backslash as absolute.
Anyway when reading files the file name will be interpreted as relative to
root directory of the device.
So let's get rid of this backslash.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Peng Ma [Thu, 21 Feb 2019 02:18:27 +0000 (10:18 +0800)]
powerpc: t104xrdb: Add support of MTA9ADF1G72AZ DDR
T1040RDB has been upgraded to support new DDR ie. MTA9ADF1G72AZ-3G2, 8GB.
So adding support of new DDR part by updating board_specific_parameters
udimm0.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Heinrich Schuchardt [Sun, 20 Jan 2019 08:11:07 +0000 (09:11 +0100)]
powerpc: enabled building with CONFIG_DM=y
Moving to the driver model requires CONFIG_DM to be enabled. Currently
several boards like kmeter1_defconfig produce a build error when CONFIG_DM
is enabled:
In file included from include/common.h:35,
from ./arch/powerpc/include/asm/fsl_lbc.h:10,
from include/mpc83xx.h:10,
from ./arch/powerpc/include/asm/ppc.h:27,
from ./arch/powerpc/include/asm/u-boot.h:18,
from include/dm/of.h:10,
from include/dm/ofnode.h:12,
from include/dm/device.h:13,
from include/linux/mtd/mtd.h:26,
from drivers/mtd/mtdconcat.c:25:
include/image.h: In function ‘image_check_target_arch’:
include/image.h:846:3: error: #error "please define IH_ARCH_DEFAULT in
your arch asm/u-boot.h"
# error "please define IH_ARCH_DEFAULT in your arch asm/u-boot.h"
^~~~~
include/image.h:848:31: error: ‘IH_ARCH_DEFAULT’ undeclared (first use in
this function); did you mean ‘IH_ARCH_COUNT’?
return image_check_arch(hdr, IH_ARCH_DEFAULT);
The error can be avoided by moving the definition of IH_ARCH_DEFAULT before
#include <asm/ppc.h>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Tom Rini [Thu, 28 Feb 2019 23:57:32 +0000 (18:57 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- SoCFPGA cache/gpio fixes
Tom Rini [Thu, 28 Feb 2019 23:57:17 +0000 (18:57 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
- Gen2/Gen3 fixes for warnings and sdhi
Tom Rini [Thu, 28 Feb 2019 19:22:50 +0000 (14:22 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Various Bananapi fixes
Tom Rini [Thu, 28 Feb 2019 19:22:03 +0000 (14:22 -0500)]
Merge branch '2019-02-29-master-imports'
- Assorted BSP fixes
- Kbuild fix
Simon Goldschmidt [Tue, 26 Feb 2019 21:27:52 +0000 (22:27 +0100)]
spl: add debug print for early malloc usage
To find out how big the early malloc heap must be in SPL, add a debug
print statement that dumps its usage before switching to relocated heap
in spl_relocate_stack_gd() via CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Stephen Warren [Tue, 26 Feb 2019 19:20:26 +0000 (12:20 -0700)]
kbuild: fix DTB .cmd source variable
*.dts are processed using a custom command, then the C pre-processor is
run on them, then they are compiled using dtc. Thus, the dependency
files generated by both cpp and dtc reference a temporary file name
rather than the actual source file. While this information isn't used
for any purpose by the build system, and hence this causes no functional
issue, it does cause the dependency files to contain invalid and
confusing data, which is unhelpful while debugging build problems. Fix
this using sed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Stephen Warren [Tue, 26 Feb 2019 19:20:25 +0000 (12:20 -0700)]
kbuild: make arch-dtbs target PHONY
Without this, the arch-dtbs target only gets evaluated when building
U-Boot the first time, not when re-building (incrementally building)
U-Boot. Thus incremental builds ignore changes to DTB files.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Patrick Delaunay [Tue, 26 Feb 2019 12:09:00 +0000 (13:09 +0100)]
doc: binding: rename directory ram to memory-controller
Alignment with kernel directory name as it have already bindings for
DDR controllers in the directory:
Documentation/devicetree/bindings/memory-controller
PS: the drivers using RAM u-class should be associated with
this binding directory
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Heinrich Schuchardt [Mon, 25 Feb 2019 18:42:48 +0000 (19:42 +0100)]
fs: fat: fix link error when building with DEBUG=1
When compiling with DEBUG=1 an error
fs/fat/fat_write.c:831: undefined reference to `__aeabi_ldivmod'
occurred.
We should use do_div() instead of the modulus operator.
filesize and cur_pos cannot be negative. So let's use u64 to avoid
warnings.
Fixes:
cb8af8af5ba0 ("fs: fat: support write with non-zero offset")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Felix Brack [Mon, 25 Feb 2019 15:38:23 +0000 (16:38 +0100)]
arm: pdu001: Fix order of include files
Fix the order of include files according to U-Boot coding style.
Signed-off-by: Felix Brack <fb@ltec.ch>
Michal Simek [Thu, 21 Feb 2019 06:48:54 +0000 (07:48 +0100)]
.gitignore: Ignore regenerated *.dtbo files
*.dtbo are dt overlays files which should be also ignored as *.dtb.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Marek Vasut [Tue, 19 Feb 2019 00:43:51 +0000 (01:43 +0100)]
ARM: cache: Fix incorrect bitwise operation
The loop implemented in the code is supposed to check whether the
PL310 operation register has any bit from the mask set. Currently,
the code checks whether the PL310 operation register has any bit
set AND whether the mask is non-zero, which is incorrect. Fix the
conditional.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Tom Rini <trini@konsulko.com>
Fixes:
93bc21930a1b ("armv7: add PL310 support to u-boot")
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
David Rivshin [Mon, 18 Feb 2019 23:04:29 +0000 (18:04 -0500)]
spi: omap3: fix set_wordlen() reading from incorrect address for CHCONF
_omap3_spi_set_wordlen() indexed the regs->channel[] array with the
old wordlen (instead of the chipselect number) when reading the current
CHCONF register value. This meant it read from the wrong memory location,
modified that value, and then wrote it back to the correct CHCONF
register. The end result is that most slave configuration settings would
be lost, such as clock divisor, clock/chipselect polarities, etc.
Fixes:
77b8d04854f4 ("spi: omap3: Convert to driver model")
Signed-off-by: David Rivshin <drivshin@allworx.com>
Tom Rini [Wed, 27 Feb 2019 18:32:09 +0000 (13:32 -0500)]
Merge git://git.denx.de/u-boot-riscv
- SiFive FU540 Support
Anup Patel [Mon, 25 Feb 2019 08:15:33 +0000 (08:15 +0000)]
riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd
This patch enables CONFIG_SYS_BOOT_RAMDISK_HIGH for RISC-V
because bootm will update initrd location in DTB only if
CONFIG_SYS_BOOT_RAMDISK_HIGH is enabled. If we don't enable
this option then bootm assumes DTB already has initrd details
which is not the case most of the time.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Atish Patra [Mon, 25 Feb 2019 08:15:27 +0000 (08:15 +0000)]
doc: Add a readme guide for SiFive FU540
The readme guide describes the procedure to build, flash and boot Linux
using U-Boot on HiFive Unleashed. It also explains the current state of
U-boot support and future action items.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Anup Patel [Mon, 25 Feb 2019 08:15:19 +0000 (08:15 +0000)]
riscv: Add SiFive FU540 board support
This patch adds SiFive FU540 board support. For now, only
SiFive serial, SiFive PRCI, and Cadance MACB drivers are
only enabled. The SiFive FU540 defconfig by default builds
U-Boot for S-Mode because U-Boot on SiFive FU540 will run
in S-Mode as payload of BBL or OpenSBI.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Atish Patra [Mon, 25 Feb 2019 08:15:14 +0000 (08:15 +0000)]
cpu: Bind timer driver for boot hart
Currently, timer driver is bound only for hart0.
There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.
The timer driver should be bound for boot hart.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Atish Patra [Mon, 25 Feb 2019 08:15:08 +0000 (08:15 +0000)]
drivers: serial_sifive: Skip baudrate config if no input clock
It is possible that input clock is not available because clk
device was not available and 'clock-frequency' DT property is
also not available.
In this case, instead of failing we should just skip baudrate
config by returning zero.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Atish Patra [Mon, 25 Feb 2019 08:15:02 +0000 (08:15 +0000)]
drivers: serial_sifive: Fix baud rate calculation
Compute the baud rate multipler with more precision.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Anup Patel [Mon, 25 Feb 2019 08:14:55 +0000 (08:14 +0000)]
clk: Add fixed-factor clock driver
This patch adds fixed-factor clock driver which derives clock
rate by dividing (div) and multiplying (mult) fixed factors
to a parent clock.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Anup Patel [Mon, 25 Feb 2019 08:14:49 +0000 (08:14 +0000)]
clk: Add SiFive FU540 PRCI clock driver
Add driver code for the SiFive FU540 PRCI IP block. This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.
Based on code written by Wesley Terpstra <wesley@sifive.com>
found in commit
999529edf517ed75b56659d456d221b2ee56bb60 of:
https://github.com/riscv/riscv-linux
Boot and PLL rate change were tested on a SiFive HiFive Unleashed
board.
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Atish Patra [Mon, 25 Feb 2019 08:14:42 +0000 (08:14 +0000)]
net: macb: Fix GEM hardware detection
Fix MID bit field check to correctly identify all GEM hardwares.
The check is updated as per macb driver in Linux location:
<linux_sources>/drivers/net/ethernet/cadence/macb_main.c:259
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Anup Patel [Mon, 25 Feb 2019 08:14:36 +0000 (08:14 +0000)]
net: macb: Fix clk API usage for RISC-V systems
Don't fail in macb_enable_clk() if clk_enable() returns
-ENOSYS because we get -ENOSYS for fixed-rate clocks.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Anup Patel [Mon, 25 Feb 2019 08:14:30 +0000 (08:14 +0000)]
riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems
On 64bit systems, the DRAM top can be easily beyond 4GB and U-Boot
DMA mapping APIs will generate DMA addresses beyond 4GB. This
breaks DMA programming in 32bit DMA capable devices (such as
Cadence MACB ethernet). For example, If DRAM is more then 2GB
on QEMU sifive_u machine then Cadence MACB ethernet stops working
for U-Boot because it is a 32bit DMA capable device.
To handle 32bit DMA capable devices on 64bit systems, we provide
custom implementation of board_get_usable_ram_top() which ensures
that usable ram top is not more then 4GB. This in-turn ensures
that U-Boot always runs within 4GB hence DMA addresses generated
by DMA mapping APIs will be within 4GB too.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Anup Patel [Mon, 25 Feb 2019 08:14:24 +0000 (08:14 +0000)]
riscv: Add place-holder asm/arch/clk.h for driver compilation
Some of the drivers (such as Cadence MACB ethernet driver) expect
asm/arch/clk.h to be provided by arch support so we add place-holder
asm/arch-generic/clk.h for RISC-V generic CPU.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Anup Patel [Mon, 25 Feb 2019 08:14:17 +0000 (08:14 +0000)]
riscv: Add asm/dma-mapping.h for DMA mappings
This patch adds asm/dma-mapping.h for Linux-like DMA mappings
APIs required by some of the drivers (such as, Cadance MACB
Ethernet driver).
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Anup Patel [Mon, 25 Feb 2019 08:14:10 +0000 (08:14 +0000)]
riscv: Rename cpu/qemu to cpu/generic
The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.
This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific errata workarounds
required in cpu/generic then those can be done at runtime
in cpu/generic based on CPU vendor specific DT compatible
string.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Anup Patel [Mon, 25 Feb 2019 08:14:04 +0000 (08:14 +0000)]
riscv: Enable create symlink using kconfig
We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Tue, 26 Feb 2019 13:45:08 +0000 (08:45 -0500)]
Merge tag 'efi-2019-04-rc3' of https://github.com/xypron2/u-boot
Pull request for the UEFI sub-system for v2019.04-rc3
A new option -e is added to the env command which allows to display and
change UEFI variables in a user friendly way.
A new command efidebug is introduced to edit the UEFI boot sequence and to
display different aspects of the state of the UEFI sub-system: memory map,
loaded images, handles, drivers and devices.
A bug in the UEFI boot manager is fixed.
Marek Vasut [Tue, 19 Feb 2019 18:32:28 +0000 (19:32 +0100)]
mmc: renesas: Unconditionally set DTCNTL TAPNUM to 8
According to latest specification rev.0026 and after confirmation with
HW engineer, the DTCNTL register TAPNUM field must be set to 8 even on
H3 ES2.0 SoC. Make it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Tue, 19 Feb 2019 18:20:14 +0000 (19:20 +0100)]
mmc: tmio: Clear BUSWIDTH bit when WMODE bit is set
According to latest specification rev.0026, when HOST_MODE bit 0
(WMODE) is not set, HOST_MODE bit 8 (BUSWIDTH) is ignored. Clear
HOST_MODE bit 8 in such case and align the code with Linux and
avoid possible unforeseen issues.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Tue, 19 Feb 2019 03:27:35 +0000 (04:27 +0100)]
ARM: rmobile: Convert Gen2 to OF_SEPARATE
Convert R-Car Gen2 from OF_EMBED to OF_SEPARATE, thus getting
rid of one of the deprecation warnings.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 18 Feb 2019 12:43:56 +0000 (13:43 +0100)]
ARM: rmobile: Sync Gen3 defconfigs
Synchronize Gen3 defconfigs in wake of the Kconfig option changes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 18 Feb 2019 12:34:19 +0000 (13:34 +0100)]
ARM: rmobile: Imply SoC per board
Imply all SoCs supported by a given board. This allows building single
U-Boot binary for boards which can have multiple SoCs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 18 Feb 2019 12:23:14 +0000 (13:23 +0100)]
pinctrl: renesas: Drop def_bool per SoC
Drop per SoC def_bool on each driver, since this is now implied by
SoC Kconfig option instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 18 Feb 2019 12:22:47 +0000 (13:22 +0100)]
clk: rmobile: Drop def_bool per SoC
Drop per SoC def_bool on each driver, since this is now implied by
SoC Kconfig option instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 18 Feb 2019 12:22:03 +0000 (13:22 +0100)]
ARM: rmobile: Imply pinctrl drivers per SoC
Imply preferred pin control driver per SoC, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 18 Feb 2019 12:20:48 +0000 (13:20 +0100)]
ARM: rmobile: Imply clock drivers per SoC
Imply preferred clock driver per SoC, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 19 Feb 2019 00:07:21 +0000 (01:07 +0100)]
ARM: socfpga: Clear PL310 early in SPL
On SoCFPGA Gen5 systems, it can rarely happen that a reboot from Linux
will result in stale data in PL310 L2 cache controller. Even if the L2
cache controller is disabled via the CTRL register CTRL_EN bit, those
data can interfere with operation of devices using DMA, like e.g. the
DWMMC controller. This can in turn cause e.g. SPL to fail reading data
from SD/MMC.
The obvious solution here would be to fully reset the L2 cache controller
via the reset manager MPUMODRST L2 bit, however this causes bus hang even
if executed entirely from L1 I-cache to avoid generating any bus traffic
through the L2 cache controller.
This patch thus configures and enables the L2 cache controller very early
in the SPL boot process, clears the L2 cache and disables the L2 cache
controller again.
The reason for doing it in SPL is because we need to avoid accessing any
of the potentially stale data in the L2 cache, and we are certain any of
the stale data will be below the OCRAM address range. To further reduce
bus traffic during the L2 cache invalidation, we enable L1 I-cache and
run the invalidation code entirely out of the L1 I-cache.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Tue, 19 Feb 2019 00:11:24 +0000 (01:11 +0100)]
ARM: socfpga: Configure PL310 latencies
Configure the PL310 tag and data latency registers, which slightly
improves performance and aligns the behavior with Linux.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Wed, 13 Feb 2019 20:50:25 +0000 (21:50 +0100)]
ARM: cache: Fix incorrect bitwise operation
The loop implemented in the code is supposed to check whether the
PL310 operation register has any bit from the mask set. Currently,
the code checks whether the PL310 operation register has any bit
set AND whether the mask is non-zero, which is incorrect. Fix the
conditional.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Tom Rini <trini@konsulko.com>
Fixes:
93bc21930a1b ("armv7: add PL310 support to u-boot")
Julien Béraud [Mon, 7 Jan 2019 09:17:46 +0000 (09:17 +0000)]
gpio: altera_pio: fix get_value
gpio_get_value should return 0 or 1, not the value of bit & (1 << pin)
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Julien Beraud <julien.beraud@orolia.com>
AKASHI Takahiro [Mon, 25 Feb 2019 06:54:43 +0000 (15:54 +0900)]
cmd: efidebug: add memmap command
"memmap" command prints uefi-specific memory map information.
=> efi memmap
Type Start End Attributes
================ ================ ================ ==========
CONVENTIONAL
0000000040000000-
000000007de27000 WB
RUNTIME DATA
000000007de27000-
000000007de28000 WB|RT
RESERVED
000000007de28000-
000000007de2a000 WB
RUNTIME DATA
000000007de2a000-
000000007de2b000 WB|RT
RESERVED
000000007de2b000-
000000007de2c000 WB
RUNTIME DATA
000000007de2c000-
000000007de2d000 WB|RT
LOADER DATA
000000007de2d000-
000000007ff37000 WB
RUNTIME CODE
000000007ff37000-
000000007ff38000 WB|RT
LOADER DATA
000000007ff38000-
0000000080000000 WB
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Mon, 25 Feb 2019 06:54:42 +0000 (15:54 +0900)]
cmd: efidebug: add images command
"images" command prints loaded images-related information.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Mon, 25 Feb 2019 06:54:41 +0000 (15:54 +0900)]
cmd: efidebug: add dh command
"dh" command prints all the uefi handles used in the system.
=> efi dh
7ef3bfa0: Device Path, Device Path To Text, Device Path Utilities,
Unicode Collation 2
7ef31d30: Driver Binding
7ef31da0: Simple Text Output
7ef31e10: Simple Text Input, Simple Text Input Ex
7ef3cca0: Block IO, Device Path
7ef3d070: Block IO, Device Path
7ef3d1b0: Block IO, Device Path, Simple File System
7ef3d3e0: Block IO, Device Path, Simple File System
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Mon, 25 Feb 2019 06:54:40 +0000 (15:54 +0900)]
cmd: efidebug: add drivers command
"drivers" command prints all the uefi drivers on the system.
=> efi drivers
Driver Name Image Path
================ ==================== ====================
000000007ef003d0 <NULL> <built-in>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Mon, 25 Feb 2019 06:54:39 +0000 (15:54 +0900)]
cmd: efidebug: add devices command
"devices" command prints all the uefi variables on the system.
=> efi devices
Scanning disk ahci_scsi.id0lun0...
Scanning disk ahci_scsi.id1lun0...
Found 4 disks
Device Device Path
================ ====================
000000007ef07ea0 /VenHw(
e61d73b9-a384-4acc-aeab-
82e828f3628b)
000000007ef00c10 /VenHw(
e61d73b9-a384-4acc-aeab-
82e828f3628b)/Scsi(0,0)
000000007ef00dd0 /VenHw(
e61d73b9-a384-4acc-aeab-
82e828f3628b)/Scsi(1,0)
000000007ef07be0 /VenHw(
e61d73b9-a384-4acc-aeab-
82e828f3628b)/Scsi(1,0)/HD(1,MBR,0x086246ba,0x800,0x40000)
000000007ef07510 /VenHw(
e61d73b9-a384-4acc-aeab-
82e828f3628b)/Scsi(1,0)/HD(2,MBR,0x086246ba,0x40800,0x3f800)
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Mon, 25 Feb 2019 06:54:38 +0000 (15:54 +0900)]
cmd: add efidebug command
Currently, there is no easy way to add or modify UEFI variables.
In particular, bootmgr supports BootOrder/BootXXXX variables, it is
quite hard to define them as u-boot variables because they are represented
in a complicated and encoded format.
The new command, efidebug, helps address these issues and give us
more friendly interfaces:
* efidebug boot add: add BootXXXX variable
* efidebug boot rm: remove BootXXXX variable
* efidebug boot dump: display all BootXXXX variables
* efidebug boot next: set BootNext variable
* efidebug boot order: set/display a boot order (BootOrder)
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Mon, 25 Feb 2019 06:54:37 +0000 (15:54 +0900)]
efi_loader: define load option attributes
See UEFI specification v2.7a, section 3.1.3, "Load Option Processing."
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Mon, 25 Feb 2019 06:54:36 +0000 (15:54 +0900)]
cmd: env: add "-e" option for handling UEFI variables
"env [print|set] -e" allows for handling uefi variables without
knowing details about mapping to corresponding u-boot variables.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 24 Feb 2019 04:09:26 +0000 (05:09 +0100)]
efi_loader: fix entry count in bootmgr
Since commit
914df75b0c97 ("efi_loader: fix EFI entry counting")
entry_count is already set to 1 before efi_bootmgr_load() is called. So we
should not increment it when entering the function.
Without the patch an assert error occurs in efi_get_variable() if DEBUG is
defined.
Fixes:
914df75b0c97 ("efi_loader: fix EFI entry counting")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 24 Feb 2019 03:44:48 +0000 (04:44 +0100)]
efi_loader: error message if BootOrder not defined
For booting via `bootefi bootmgr` it is necessary that the EFI variable
BootOrder is defined. Provide a diagnostic message if the variable is
missing.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Sat, 23 Feb 2019 03:40:24 +0000 (22:40 -0500)]
Merge branch '2019-02-22-master-imports'
- Migrate PREBOOT to Kconfig
- LED Kconfig correction
- defconfig resync
Masahiro Yamada [Thu, 14 Feb 2019 02:05:33 +0000 (11:05 +0900)]
preboot: Introduce CONFIG_USE_PREBOOT and migrate CONFIG_PREBOOT
This is the same migration path as commit
b6251db8c3f0 ("Kconfig:
Introduce USE_BOOTCOMMAND and migrate BOOTCOMMAND").
I also moved the description in README to the Kconfig help.
I ripped off the sentence about 'LWMON' since it is gone already.
I only let my boards migrate, leaving the rest to platform maintainers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Jan Kiszka [Thu, 3 Jan 2019 08:08:42 +0000 (09:08 +0100)]
cmd: Kconfig: LED command depends on LED subsystems
Without CONFIG_LED, we get
cmd/built-in.o: In function `show_led_state':
cmd/led.c:40: undefined reference to `led_get_state'
cmd/built-in.o: In function `do_led':
cmd/led.c:99: undefined reference to `led_get_by_label'
cmd/led.c:108: undefined reference to `led_set_state'
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tom Rini [Fri, 22 Feb 2019 15:17:41 +0000 (10:17 -0500)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 20 Feb 2019 17:28:57 +0000 (12:28 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Wed, 20 Feb 2019 17:28:40 +0000 (12:28 -0500)]
Merge git://git.denx.de/u-boot-x86
- Add support for sound.
Albeit the big changeset, changes are pretty limited to x86 only and a
few new sound drivers used by x86 so I think it would be good to have
this in the next release.