platform/upstream/llvm.git
3 years ago[gn build] Port 54902e00d128
LLVM GN Syncbot [Mon, 19 Jul 2021 19:24:16 +0000 (19:24 +0000)]
[gn build] Port 54902e00d128

3 years ago[InstrProfiling] Use weak alias for bias variable
Petr Hosek [Thu, 8 Jul 2021 20:44:05 +0000 (13:44 -0700)]
[InstrProfiling] Use weak alias for bias variable

We need the compiler generated variable to override the weak symbol of
the same name inside the profile runtime, but using LinkOnceODRLinkage
results in weak symbol being emitted in which case the symbol selected
by the linker is going to depend on the order of inputs which can be
fragile.

This change replaces the use of weak definition inside the runtime with
a weak alias. We place the compiler generated symbol inside a COMDAT
group so dead definition can be garbage collected by the linker.

We also disable the use of runtime counter relocation on Darwin since
Mach-O doesn't support weak external references, but Darwin already uses
a different continous mode that relies on overmapping so runtime counter
relocation isn't needed there.

Differential Revision: https://reviews.llvm.org/D105176

3 years ago[infer-address-spaces] Handle complex non-pointer constexpr arguments.
Artem Belevich [Thu, 15 Jul 2021 20:39:47 +0000 (13:39 -0700)]
[infer-address-spaces] Handle complex non-pointer constexpr arguments.

Fixes https://bugs.llvm.org/show_bug.cgi?id=51099

Differential Revision: https://reviews.llvm.org/D106098

3 years ago[SLP][X86] Add dot product tests based off PR51075
Simon Pilgrim [Mon, 19 Jul 2021 18:28:42 +0000 (19:28 +0100)]
[SLP][X86] Add dot product tests based off PR51075

3 years ago[lld/mac] Change load command order to be more like ld64
Nico Weber [Sat, 17 Jul 2021 15:18:48 +0000 (11:18 -0400)]
[lld/mac] Change load command order to be more like ld64

No meaningful behavior change. Makes diffing `otool -l` output a bit easier.

Differential Revision: https://reviews.llvm.org/D106219

3 years ago[ifs] Fix linking errors on some llvm builders
Haowei Wu [Mon, 19 Jul 2021 18:59:04 +0000 (11:59 -0700)]
[ifs] Fix linking errors on some llvm builders

This change fixes linking errors on some llvm builders.

3 years ago[MemCpyOpt] Enable memcpy optimizations unconditionally.
Artem Belevich [Wed, 30 Jun 2021 22:36:14 +0000 (15:36 -0700)]
[MemCpyOpt] Enable memcpy optimizations unconditionally.

The patch does not depend on the availability of the library functions for
memcpy/memset as it operates on LLVM intrinsics.  The optimizations are useful
on the targets that have these functions disabled (e.g. NVPTX & AMDGPU).

Differential Revision: https://reviews.llvm.org/D104801

3 years ago[Bazel] Update for 6103fdfab4
Geoffrey Martin-Noble [Mon, 19 Jul 2021 18:48:52 +0000 (11:48 -0700)]
[Bazel] Update for 6103fdfab4

Update Bazel config for
https://github.com/llvm/llvm-project/commit/6103fdfab4
by deleting the llvm-elfabi target.

Differential Revision: https://reviews.llvm.org/D106295

3 years ago[Sanitizer] Intercepts flopen/flopenat on FreeBSD.
David Carlier [Mon, 19 Jul 2021 18:46:35 +0000 (19:46 +0100)]
[Sanitizer] Intercepts flopen/flopenat on FreeBSD.

Reviewers: vitalybuka

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D106218

3 years ago[libc++] Disable #pragma system_header in the new testing configuration
Louis Dionne [Mon, 19 Jul 2021 15:23:09 +0000 (11:23 -0400)]
[libc++] Disable #pragma system_header in the new testing configuration

The new testing configuration did not turn off #pragma system_header,
which means we were not seeing warnings in system headers.

Differential Revision: https://reviews.llvm.org/D106187

3 years ago[gn build] Port 8b4acb067fd3
LLVM GN Syncbot [Mon, 19 Jul 2021 18:24:11 +0000 (18:24 +0000)]
[gn build] Port 8b4acb067fd3

3 years ago[gn build] Port 61fa9afe4c5b
LLVM GN Syncbot [Mon, 19 Jul 2021 18:24:10 +0000 (18:24 +0000)]
[gn build] Port 61fa9afe4c5b

3 years ago[gn build] Port 6103fdfab4e2
LLVM GN Syncbot [Mon, 19 Jul 2021 18:24:09 +0000 (18:24 +0000)]
[gn build] Port 6103fdfab4e2

3 years ago[ifs][elfabi] Merge llvm-ifs/elfabi tools
Haowei Wu [Fri, 2 Apr 2021 03:55:11 +0000 (20:55 -0700)]
[ifs][elfabi] Merge llvm-ifs/elfabi tools

This change merges llvm-elfabi and llvm-ifs tools.

Differential Revision: https://reviews.llvm.org/D100139

3 years ago[ifs] Prepare llvm-ifs for elfabi/ifs merging.
Haowei Wu [Wed, 7 Apr 2021 22:50:12 +0000 (15:50 -0700)]
[ifs] Prepare llvm-ifs for elfabi/ifs merging.

This diff changes llvm-ifs to use unified IFS file format
and perform other renaming changes in preparation for the
merging between elfabi/ifs.

Differential Revision: https://reviews.llvm.org/D99810

3 years ago[elfabi] Prepare elfabi/ifs merging.
Haowei Wu [Wed, 31 Mar 2021 23:48:56 +0000 (16:48 -0700)]
[elfabi] Prepare elfabi/ifs merging.

This change implements unified text stub format and command line
interface proposed in the elfabi/ifs merge plan.

Differential Revision: https://reviews.llvm.org/D99399

3 years ago[SystemZ] Handle NoRegister in SystemZTargetLowering::emitMemMemWrapper().
Jonas Paulsson [Fri, 16 Jul 2021 09:23:46 +0000 (11:23 +0200)]
[SystemZ]  Handle NoRegister in SystemZTargetLowering::emitMemMemWrapper().

Bugfix: The compiler should be able to generate a memset to nullptr.

Review: Ulrich Weigand

3 years agoRevert "[llvm][sve] Lowering for VLS truncating stores" because it
Amy Huang [Mon, 19 Jul 2021 17:42:28 +0000 (10:42 -0700)]
Revert "[llvm][sve] Lowering for VLS truncating stores" because it
causes a seg fault (see https://reviews.llvm.org/D104471).

This reverts commit c305557acdaad453e32309d575fe9c6c7090c099.

3 years ago[NFC] Run -instnamer on test Transforms/LICM/sink-debuginfo-preserve.ll
Eli Friedman [Mon, 19 Jul 2021 18:00:01 +0000 (11:00 -0700)]
[NFC] Run -instnamer on test Transforms/LICM/sink-debuginfo-preserve.ll

3 years ago[mlir][tosa] Added shape inference for tosa convolution operations
Rob Suderman [Mon, 19 Jul 2021 17:31:02 +0000 (10:31 -0700)]
[mlir][tosa] Added shape inference for tosa convolution operations

Added shape inference handles cases for convolution operations. This includes
conv2d, conv3d, depthwise_conv2d, and transpose_conv2d. With transpose conv
we use the specified output shape when possible however will shape propagate
if the output shape attribute has dynamic values.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D105645

3 years ago[GlobalISel] Fix load-or combine moving loads across potential aliasing stores.
Amara Emerson [Mon, 19 Jul 2021 06:34:09 +0000 (23:34 -0700)]
[GlobalISel] Fix load-or combine moving loads across potential aliasing stores.

Although this combine checks that there's no load folding barriers between
the loads that it's trying to merge, it was inserting the load at the
MIRBuilder's default insertion point, which is the G_OR use inst.

This was causing a miscompile in the test suite's
SingleSource/Regression/C/gcc-c-torture/execute/GCC-C-execute-bswap-2

Differential Revision: https://reviews.llvm.org/D106251

3 years ago[WebAssembly] Support R_WASM_MEMORY_ADDR_TLS_SLEB64 for wasm64
Wouter van Oortmerssen [Thu, 15 Jul 2021 20:24:28 +0000 (13:24 -0700)]
[WebAssembly] Support R_WASM_MEMORY_ADDR_TLS_SLEB64 for wasm64

Also fixed TLS tests swapping addr & value in store op
Differential Revision: https://reviews.llvm.org/D106096

3 years ago[SelectionDAG][RISCV] Use isSExtCheaperThanZExt to control whether sext or zext is...
Craig Topper [Mon, 19 Jul 2021 15:31:16 +0000 (08:31 -0700)]
[SelectionDAG][RISCV] Use isSExtCheaperThanZExt to control whether sext or zext is used for constant folding any_extend.

RISCV would prefer a sign extended constant since that works better
with our constant materialization. We have an existing TLI hook we
use to control sign extension of setcc operands in type legalization.
That hook happens to do the right check we need here, but might be
straying from its original purpose. With only RISCV defining this
hook in tree, I wasn't sure if it was worth adding another hook
with identical behavior.

This is an alternative to D105785 where I tried to handle this in
the RISCV backend by not creating ANY_EXTENDs in some places.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D105918

3 years ago[mlir][Linalg] Migrate 2D pooling ops from tc definition to yaml definition.
Hanhan Wang [Mon, 19 Jul 2021 16:23:55 +0000 (09:23 -0700)]
[mlir][Linalg] Migrate 2D pooling ops from tc definition to yaml definition.

This deletes all the pooling ops in LinalgNamedStructuredOpsSpec.tc. All the
uses are replaced with the yaml pooling ops.

Reviewed By: gysit, rsuderman

Differential Revision: https://reviews.llvm.org/D106181

3 years ago[NewPM] Fix wrong perfect forwardings
Victor Campos [Fri, 16 Jul 2021 13:16:36 +0000 (14:16 +0100)]
[NewPM] Fix wrong perfect forwardings

Some template functions were missing '&&' in function arguments,
therefore these were always taken by value after template instantiation.

This patch adds the double ampersand to introduce proper perfect
forwarding.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D106148

3 years ago[NFC][PowerPC] Update builtins-ppc-altivec.c to be run under `-faltivec-src-compat...
Amy Kwan [Mon, 19 Jul 2021 16:20:09 +0000 (11:20 -0500)]
[NFC][PowerPC] Update builtins-ppc-altivec.c to be run under `-faltivec-src-compat=mixed`

This patch adds the `-faltivec-src-compat=mixed` option to the
`builtins-ppc-altivec.c` test.

Currently, the default for `-faltivec-src-compat` is `mixed`. The reason we
explicitly specify `mixed` to the RUN lines of this test is because eventually,
the default will set to `xl`.

Having the default as `xl` changes the CHECKs of this test slightly, as it
reorders some of the `vector bool` and `vector pixel` CHECKs (since under the
`xl` option, `vector bool` and `vector pixel` are treated in the same way as
other vector scalars). Explicitly specifying `mixed` ensures that we are testing
pre-existing Clang behaviour.

Differential Revision: https://reviews.llvm.org/D106282

3 years ago[ISD] Add disclaimer comments to AssertSext/Zext/Align opcodes about poison values
Simon Pilgrim [Mon, 19 Jul 2021 16:14:21 +0000 (17:14 +0100)]
[ISD] Add disclaimer comments to AssertSext/Zext/Align opcodes about poison values

As encountered on D106053, we need to be very explicit that the Assertion nodes don't hold true for a poison value (or for specific poisoned vector elements).

Differential Revision: https://reviews.llvm.org/D106257

3 years ago[X86] Fix case of IsAfterLegalize argument. NFC.
Simon Pilgrim [Mon, 19 Jul 2021 15:35:26 +0000 (16:35 +0100)]
[X86] Fix case of IsAfterLegalize argument. NFC.

Pulled out of D106280

3 years ago[mlir][linalg] Fold TensorCast into PadTensorOp.
Tobias Gysi [Mon, 19 Jul 2021 15:36:53 +0000 (15:36 +0000)]
[mlir][linalg] Fold TensorCast into PadTensorOp.

Add pattern to fold a TensorCast into a PadTensorOp if the cast removes static size information.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D106278

3 years agoGlobalISel: Preserve memory types for implicit sret load/stores
Matt Arsenault [Fri, 16 Jul 2021 16:55:41 +0000 (12:55 -0400)]
GlobalISel: Preserve memory types for implicit sret load/stores

3 years ago[ARM] Remove PromotedBitwiseVT for NEON types
David Green [Mon, 19 Jul 2021 15:36:33 +0000 (16:36 +0100)]
[ARM] Remove PromotedBitwiseVT for NEON types

This removes the promotion of NEON AND, OR and XOR nodes to v2i32/v4i32,
treating them the same as the AArch64 and MVE backends where we just add
the relevant patterns for each legal type. This prevents a lot of
bitcasts from being added to the DAG, which have the potential to make
optimizations more difficult. It does mean adding extra patterns, and
some codegen can change due to the types now being legal, not promoted.

Differential Revision: https://reviews.llvm.org/D105588

3 years ago[LICM] Create LoopNest Invariant Code Motion (LNICM) pass
maekawatoshiki [Mon, 19 Jul 2021 15:31:18 +0000 (00:31 +0900)]
[LICM] Create LoopNest Invariant Code Motion (LNICM) pass

This patch adds a new pass called LNICM which is a LoopNest version of LICM and a test case to show how LNICM works.
Basically, LNICM only hoists invariants out of loop nest (not a loop) to keep/make perfect loop nest. This enables later optimizations that require perfect loop nest.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D104180

3 years agoGlobalISel: Preserve LLT when bitcasting loads and stores
Matt Arsenault [Thu, 10 Jun 2021 23:32:41 +0000 (19:32 -0400)]
GlobalISel: Preserve LLT when bitcasting loads and stores

This also avoids improperly legalizing some truncating vector stores.

3 years ago[Polly][Isl] Stop using isl::set::lex_le_set. NFC
Riccardo Mori [Mon, 19 Jul 2021 15:06:21 +0000 (17:06 +0200)]
[Polly][Isl] Stop using isl::set::lex_le_set. NFC

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
 - Stop using `isl::set::lex_le_set`. The official way to do this is to use `isl::map::lex_le_at`
 - Removed `isl::set::lex_le_set` from `isl-noexceptions.h`
 - `isl-noexceptions.h` has been generated by this https://github.com/patacca/isl/commit/266fea1d3dbd31c23d866eb363fcc8e61e50419f

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D106269

3 years ago[flang] Runtime API for data pointers
peter klausler [Fri, 16 Jul 2021 17:42:17 +0000 (10:42 -0700)]
[flang] Runtime API for data pointers

Define and implement an API for use by lowering to
implement operations on pointers.

Differential Revision: https://reviews.llvm.org/D106170

3 years agotsan: remove duplicate arch switch in buildgo.sh
Dmitry Vyukov [Mon, 19 Jul 2021 13:51:08 +0000 (15:51 +0200)]
tsan: remove duplicate arch switch in buildgo.sh

For some reason we have 2 switches on arch and add
half of arch flags in one place and half in another.
Merge these 2 switches.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D106274

3 years ago[Clang][RISCV] Support half-precision floating point for RVV intrinsics.
Hsiangkai Wang [Mon, 28 Jun 2021 05:38:41 +0000 (13:38 +0800)]
[Clang][RISCV] Support half-precision floating point for RVV intrinsics.

Use _Float16 as the half-precision floating point type. Define a new
type specifier 'x' for the _Float16 type.

Differential Revision: https://reviews.llvm.org/D105001

3 years agoAArch64/GlobalISel: Cleanup unnecessary size checks in call lowering
Matt Arsenault [Fri, 16 Jul 2021 15:10:41 +0000 (11:10 -0400)]
AArch64/GlobalISel: Cleanup unnecessary size checks in call lowering

The CCValAssign types should now be accurate, so these are no longer
necessary.

3 years agoRevert "[OpenMP] Codegen aggregate for outlined function captures"
Giorgis Georgakoudis [Mon, 19 Jul 2021 14:54:26 +0000 (07:54 -0700)]
Revert "[OpenMP] Codegen aggregate for outlined function captures"

This reverts commit e9c7291cb25f071f1a1dfa4049ed9f5a8a217b3e.

Fix failing tests

3 years ago[PowerPC] Implement vector bool/pixel initialization under -faltivec-src-compat=xl
Amy Kwan [Mon, 19 Jul 2021 13:20:06 +0000 (08:20 -0500)]
[PowerPC] Implement vector bool/pixel initialization under -faltivec-src-compat=xl

This patch implements the initialization of vectors under the
-faltivec-src-compat=xl option introduced in https://reviews.llvm.org/D103615.

Under this option, the initialization of scalar vectors, vector bool, and vector
pixel are treated the same, where the initialization value is splatted across
the whole vector.

This patch does not change the behaviour of the -faltivec-src-compat=mixed option,
which is the current default for Clang.

Differential Revision: https://reviews.llvm.org/D106120

3 years ago[InstrRef][X86] Drop debug instruction numbers from x87 instructions
Jeremy Morse [Mon, 19 Jul 2021 13:57:34 +0000 (14:57 +0100)]
[InstrRef][X86] Drop debug instruction numbers from x87 instructions

Avoid a crash when using instruction referencing if x87 floating point
instructions are used. These instructions are significantly mutated when
they're rewritten from referring to registers, to referring to
floating-point-stack positions. As a result, their operands are re-ordered,
and (InstrRef) LiveDebugValues asserts when it sees a DBG_INSTR_REF
referring to a non-reg non-def register operand.

To fix this, drop the instruction numbers, and thus variable locations.
This patch adds a helper utility do do that.

Dropping the variable locations is sub-optimal, but applying DBG_VALUEs to
the $fp0 and similar registers is dropped on emission too. It seems we've
never done well at describing variables that live in x87 registers, at all.

Differential Revision: https://reviews.llvm.org/D105657

3 years agothread_local support for AIX
Jamie Schmeiser [Mon, 19 Jul 2021 14:03:22 +0000 (10:03 -0400)]
thread_local support for AIX

Summary:
The AIX linker will produce errors on unresolved weak symbols.  Change the
generated code to not check for the initialization function but just call
it and ensure that it always exists.  Also, the AIX atexit routine has a
different name (and signature) so call it correctly.  Update the lit tests
to test on AIX appropriately.

Author: Jamie Schmeiser <schmeise@ca.ibm.com>
Reviewed By: hubert.reinterpretcast (Hubert Tong)
Differential Revision: https://reviews.llvm.org/D104420

3 years ago[CodeGen] Remove isNON_TRUNCStore and isTRUNCStore (NFC)
Kazu Hirata [Mon, 19 Jul 2021 13:56:04 +0000 (06:56 -0700)]
[CodeGen] Remove isNON_TRUNCStore and isTRUNCStore (NFC)

The last use of isNON_TRUNCStore was removed on Oct 10, 2018 in commit
07acc992dc39edfccc5a4b773c3dcf8a5bf6d893.

isTRUNCStore seems to be unused for at least 10 years.

3 years ago[TLI] prepareSREMEqFold(): use correct VT for the final VSELECT (PR51133)
Roman Lebedev [Mon, 19 Jul 2021 13:39:37 +0000 (16:39 +0300)]
[TLI] prepareSREMEqFold(): use correct VT for the final VSELECT (PR51133)

We were using the wrong VT for this final VSELECT,
it should be in the final comparison VT,
not the source value's VT.

Fixes https://bugs.llvm.org/show_bug.cgi?id=51133

3 years ago[MLIR] AffineStructures: resolve clang-tidy warnings [NFC]
Arjun P [Mon, 19 Jul 2021 12:45:49 +0000 (18:15 +0530)]
[MLIR] AffineStructures: resolve clang-tidy warnings [NFC]

3 years agoFix duplicate checks in clangd comments
Elton [Mon, 19 Jul 2021 13:14:23 +0000 (15:14 +0200)]
Fix duplicate checks in clangd comments

This patch removes a duplicate checks in the top-level comments in `clang-tools-extra/clangd/ParsedAST.h`

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D106227

3 years ago[AMDGPU] Fix typo in comments idexen -> idxen
Jay Foad [Mon, 19 Jul 2021 12:39:30 +0000 (13:39 +0100)]
[AMDGPU] Fix typo in comments idexen -> idxen

3 years ago[clang] Change set type used for SourceLocation.
Simon Tatham [Mon, 19 Jul 2021 10:45:46 +0000 (11:45 +0100)]
[clang] Change set type used for SourceLocation.

This is part of a patch series working towards the ability to make
SourceLocation into a 64-bit type to handle larger translation units.

If clang is built for a 32-bit platform and SourceLocation is 64 bits
wide, then a SourceLocation will be larger than a pointer, so it won't
be possible to keep them in a SmallPtrSet any more. Switch to
SmallDenseSet instead.

Patch originally by Mikhail Maltsev.

Differential Revision: https://reviews.llvm.org/D105493

3 years agoRevert "[mlir] Introduce `linalg.tiled_yield` terminator for `linalg.tiled_loop`."
Alexander Belyaev [Mon, 19 Jul 2021 12:18:35 +0000 (14:18 +0200)]
Revert "[mlir] Introduce `linalg.tiled_yield` terminator for `linalg.tiled_loop`."

This reverts commit 3b03d9b874aa902f7f969e7ffdefde23c2758eeb.

3 years ago[clang-tidy] ensure run-clang-tidy reports children killed by signals
Ian Campbell [Mon, 19 Jul 2021 12:17:23 +0000 (14:17 +0200)]
[clang-tidy] ensure run-clang-tidy reports children killed by signals

If a clang-tidy child process exits with a signal then run-clang-tidy will exit
with an error but there is no hint why in the output, since the clang-tidy
doesn't log anything and may not even have had the opportunity to do so
depending on the signal used.

`subprocess.CompletedProcess.returncode` is the negative signal number in this
case.

I hit this in a CI system where the parallelism used exceeded the RAM assigned
to the container causing the OOM killer to SIGKILL clang-tidy processes.

Reviewed By: sylvestre.ledru

Differential Revision: https://reviews.llvm.org/D99081

3 years ago[rt][nfc] Rewrite #ifndef as #if defined().
Alexander Belyaev [Mon, 19 Jul 2021 12:17:13 +0000 (14:17 +0200)]
[rt][nfc] Rewrite #ifndef as #if defined().

3 years ago[mlir] Introduce `linalg.tiled_yield` terminator for `linalg.tiled_loop`.
Alexander Belyaev [Mon, 19 Jul 2021 10:57:36 +0000 (12:57 +0200)]
[mlir] Introduce `linalg.tiled_yield` terminator for `linalg.tiled_loop`.

https://llvm.discourse.group/t/rfc-changes-to-linalg-tiledloopop-to-unblock-reductions/3890

Differential Revision: https://reviews.llvm.org/D106066

3 years ago[ORC-RT] Introduce a weak-import macro.
Lang Hames [Mon, 19 Jul 2021 11:52:14 +0000 (21:52 +1000)]
[ORC-RT] Introduce a weak-import macro.

This should eliminate warnings about ignored weak_import attributes on some of
the bots, e.g. https://lab.llvm.org/buildbot/#/builders/165/builds/3770/.

3 years ago[ORC-RT] Separate jit-dispach tag decls from definitions.
Lang Hames [Mon, 19 Jul 2021 11:21:40 +0000 (21:21 +1000)]
[ORC-RT] Separate jit-dispach tag decls from definitions.

This should eliminate the "initialized and declared 'extern'" warnings produced
on some bots, e.g. https://lab.llvm.org/buildbot/#/builders/165/builds/3770

3 years ago[CostModel][X86] Add fast math tests for float reductions
Simon Pilgrim [Mon, 19 Jul 2021 12:01:12 +0000 (13:01 +0100)]
[CostModel][X86] Add fast math tests for float reductions

As noticed on D105432 we didn't have any coverage to distinguish between fast/exact float reductions

3 years ago[SLP]Fix possible crash on unreachable incoming values sorting.
Alexey Bataev [Mon, 19 Jul 2021 11:18:27 +0000 (04:18 -0700)]
[SLP]Fix possible crash on unreachable incoming values sorting.

The incoming values for PHI nodes may come from unreachable BasicBlocks,
need to handle this case.

Differential Revision: https://reviews.llvm.org/D106264

3 years ago[LoopUtils] Fix incorrect RT check bounds of loop-invariant mem accesses
Mindong Chen [Mon, 19 Jul 2021 11:24:38 +0000 (19:24 +0800)]
[LoopUtils] Fix incorrect RT check bounds of loop-invariant mem accesses

This fixes the lower and upper bound calculation of a
RuntimeCheckingPtrGroup when it has more than one loop
invariant pointers. Resolves PR50686.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D104148

3 years ago[LV] Re-generate check lines of some fragile tests (NFC)
Mindong Chen [Mon, 19 Jul 2021 11:21:04 +0000 (19:21 +0800)]
[LV] Re-generate check lines of some fragile tests (NFC)

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D105438

3 years ago[mlir][memref] Clarify the documentation for memref.clone [NFC]
Stephan Herhut [Mon, 19 Jul 2021 10:12:36 +0000 (12:12 +0200)]
[mlir][memref] Clarify the documentation for memref.clone [NFC]

The wording was wrong and suggested that operands to memref.clone may not be mutated.

Differential Revision: https://reviews.llvm.org/D106258

3 years ago[LV] Add test with ptr induction used as scalar and vector.
Florian Hahn [Tue, 6 Jul 2021 16:35:40 +0000 (17:35 +0100)]
[LV] Add test with ptr induction used as scalar and vector.

Test case inspired by D105199.

3 years agoRevert "[hwasan] Use stack safety analysis."
Florian Mayer [Mon, 19 Jul 2021 11:08:02 +0000 (12:08 +0100)]
Revert "[hwasan] Use stack safety analysis."

This reverts commit 12268fe14a1a65d4b62f0b6e5beab46ba8501ae7.

3 years agotsan: make obtaining current PC faster
Dmitry Vyukov [Thu, 15 Jul 2021 08:51:32 +0000 (10:51 +0200)]
tsan: make obtaining current PC faster

We obtain the current PC is all interceptors and collectively
common interceptor code contributes to overall slowdown
(in particular cheaper str/mem* functions).

The current way to obtain the current PC involves:

  4493e1:       e8 3a f3 fe ff          callq  438720 <_ZN11__sanitizer10StackTrace12GetCurrentPcEv>
  4493e9:       48 89 c6                mov    %rax,%rsi

and the called function is:

uptr StackTrace::GetCurrentPc() {
  438720:       48 8b 04 24             mov    (%rsp),%rax
  438724:       c3                      retq

The new way uses address of a local label and involves just:

  44a888:       48 8d 35 fa ff ff ff    lea    -0x6(%rip),%rsi

I am not switching all uses of StackTrace::GetCurrentPc to GET_CURRENT_PC
because it may lead some differences in produced reports and break tests.
The difference comes from the fact that currently we have PC pointing
to the CALL instruction, but the new way does not yield any code on its own
so the PC points to a random instruction in the function and symbolizing
that instruction can produce additional inlined frames (if the random
instruction happen to relate to some inlined function).

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D106046

3 years ago[ORC] Drop 'const' for __orc_rt_CWrapperFunctionResultDataUnion::ValuePtr.
Lang Hames [Mon, 19 Jul 2021 11:01:14 +0000 (21:01 +1000)]
[ORC] Drop 'const' for __orc_rt_CWrapperFunctionResultDataUnion::ValuePtr.

This member is now only used when storage is heap-allocated so it does not
need to be const. Dropping 'const' eliminates cast warnings on many builders.

3 years ago[ORC-RT] Fix missing std::move.
Lang Hames [Mon, 19 Jul 2021 10:59:28 +0000 (20:59 +1000)]
[ORC-RT] Fix missing std::move.

This should fix the 'could-not-covert' error at wrapper_function_utils.h:128 in
https://lab.llvm.org/buildbot/#/builders/112/builds/7748.

3 years ago[VE] Set getExtendForAtomicOps to ISD::ANY_EXTEND
Kazushi (Jam) Marukawa [Tue, 13 Jul 2021 20:01:10 +0000 (05:01 +0900)]
[VE] Set getExtendForAtomicOps to ISD::ANY_EXTEND

The implementation of subword atomics does not actually
guarantee the result is zero-extended, which now caused
failures after https://reviews.llvm.org/D101342 was landed.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D106225

3 years ago[hwasan] Use stack safety analysis.
Florian Mayer [Fri, 16 Jul 2021 08:48:08 +0000 (09:48 +0100)]
[hwasan] Use stack safety analysis.

This avoids unnecessary instrumentation.

Reviewed By: eugenis, vitalybuka

Differential Revision: https://reviews.llvm.org/D105703

3 years ago[X86][SSE] Fix copy+paste typo in dot3_float4_as_float3 partial load test
Simon Pilgrim [Mon, 19 Jul 2021 10:47:20 +0000 (11:47 +0100)]
[X86][SSE] Fix copy+paste typo in dot3_float4_as_float3 partial load test

3 years ago[ORC] Explicitly convert to ArrayRefs to silence errors.
Lang Hames [Mon, 19 Jul 2021 10:44:17 +0000 (20:44 +1000)]
[ORC] Explicitly convert to ArrayRefs to silence errors.

This aims to fix build failures like
https://lab.llvm.org/buildbot#builders/165/builds/3761.

3 years ago[compiler-rt][GWP-ASAN] Disable 2 tests on Armv7 Linux
David Spickett [Mon, 19 Jul 2021 10:43:21 +0000 (10:43 +0000)]
[compiler-rt][GWP-ASAN] Disable 2 tests on Armv7 Linux

These have been failing on our bots for a while due to
incomplete backtraces. (you don't get the names of the
functions that did the access, just the reporter frames)

See:
https://lab.llvm.org/buildbot/#/builders/170/builds/180

3 years ago[Polly] Use isl::set::tuple_dim instead of isl::set::dim. NFC
Riccardo Mori [Mon, 19 Jul 2021 10:41:46 +0000 (12:41 +0200)]
[Polly] Use isl::set::tuple_dim instead of isl::set::dim. NFC

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Note that not all the usages of `isl::set::dim` were replaced

3 years ago[ORC] Add missing std::move.
Lang Hames [Mon, 19 Jul 2021 10:36:22 +0000 (20:36 +1000)]
[ORC] Add missing std::move.

This should fix the build failure at
https://lab.llvm.org/buildbot/#/builders/58/builds/11428.

3 years ago[VE] Disable relative lookup table converter pass for VE
Kazushi (Jam) Marukawa [Sat, 17 Jul 2021 19:32:21 +0000 (04:32 +0900)]
[VE] Disable relative lookup table converter pass for VE

VE's linker, /opt/nec/ve/bin/nld, doesn't implement relative lookup table.
The relative lookup table is introduced by https://reviews.llvm.org/D94355,
but we need to disable it at the moment.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D106224

3 years ago[ORC-RT] Handle missing __has_builtin operator.
Lang Hames [Mon, 19 Jul 2021 10:17:40 +0000 (20:17 +1000)]
[ORC-RT] Handle missing __has_builtin operator.

For compilers that do not support __has_builtin just return '0'. This should fix
the bot failure at https://lab.llvm.org/buildbot/#/builders/165/builds/3761.

3 years ago[Polly][Isl] Use isl::union_map::unite() instead of isl::union_map::add_map(). NFC
Riccardo Mori [Mon, 19 Jul 2021 10:10:34 +0000 (12:10 +0200)]
[Polly][Isl] Use isl::union_map::unite() instead of isl::union_map::add_map(). NFC

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
 - Use `isl::union_map::unite()` instead of `isl::union_map::add_map()`
 - `isl-noexceptions.h` has been generated by this https://github.com/patacca/isl/commit/3f43ae29fa2a22936a583b85b2fe8d439f805d8d

Depends on D106059

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D106061

3 years ago[NFC] [MTE] helper for stack tagging lifetimes.
Florian Mayer [Fri, 16 Jul 2021 09:34:58 +0000 (10:34 +0100)]
[NFC] [MTE] helper for stack tagging lifetimes.

Reviewed By: eugenis, vitalybuka

Differential Revision: https://reviews.llvm.org/D106135

3 years ago[ORC][ORC-RT] Introduce ORC-runtime based MachO-Platform.
Lang Hames [Wed, 14 Jul 2021 11:09:36 +0000 (21:09 +1000)]
[ORC][ORC-RT] Introduce ORC-runtime based MachO-Platform.

Adds support for MachO static initializers/deinitializers and eh-frame
registration via the ORC runtime.

This commit introduces cooperative support code into the ORC runtime and ORC
LLVM libraries (especially the MachOPlatform class) to support macho runtime
features for JIT'd code. This commit introduces support for static
initializers, static destructors (via cxa_atexit interposition), and eh-frame
registration. Near-future commits will add support for MachO native
thread-local variables, and language runtime registration (e.g. for Objective-C
and Swift).

The llvm-jitlink tool is updated to use the ORC runtime where available, and
regression tests for the new MachOPlatform support are added to compiler-rt.

Notable changes on the ORC runtime side:

1. The new macho_platform.h / macho_platform.cpp files contain the bulk of the
runtime-side support. This includes eh-frame registration; jit versions of
dlopen, dlsym, and dlclose; a cxa_atexit interpose to record static destructors,
and an '__orc_rt_macho_run_program' function that defines running a JIT'd MachO
program in terms of the jit- dlopen/dlsym/dlclose functions.

2. Replaces JITTargetAddress (and casting operations) with ExecutorAddress
(copied from LLVM) to improve type-safety of address management.

3. Adds serialization support for ExecutorAddress and unordered_map types to
the runtime-side Simple Packed Serialization code.

4. Adds orc-runtime regression tests to ensure that static initializers and
cxa-atexit interposes work as expected.

Notable changes on the LLVM side:

1. The MachOPlatform class is updated to:

  1.1. Load the ORC runtime into the ExecutionSession.
  1.2. Set up standard aliases for macho-specific runtime functions. E.g.
       ___cxa_atexit -> ___orc_rt_macho_cxa_atexit.
  1.3. Install the MachOPlatformPlugin to scrape LinkGraphs for information
       needed to support MachO features (e.g. eh-frames, mod-inits), and
       communicate this information to the runtime.
  1.4. Provide entry-points that the runtime can call to request initializers,
       perform symbol lookup, and request deinitialiers (the latter is
       implemented as an empty placeholder as macho object deinits are rarely
       used).
  1.5. Create a MachO header object for each JITDylib (defining the __mh_header
       and __dso_handle symbols).

2. The llvm-jitlink tool (and llvm-jitlink-executor) are updated to use the
runtime when available.

3. A `lookupInitSymbolsAsync` method is added to the Platform base class. This
can be used to issue an async lookup for initializer symbols. The existing
`lookupInitSymbols` method is retained (the GenericIRPlatform code is still
using it), but is deprecated and will be removed soon.

4. JIT-dispatch support code is added to ExecutorProcessControl.

The JIT-dispatch system allows handlers in the JIT process to be associated with
'tag' symbols in the executor, and allows the executor to make remote procedure
calls back to the JIT process (via __orc_rt_jit_dispatch) using those tags.

The primary use case is ORC runtime code that needs to call bakc to handlers in
orc::Platform subclasses. E.g. __orc_rt_macho_jit_dlopen calling back to
MachOPlatform::rt_getInitializers using __orc_rt_macho_get_initializers_tag.
(The system is generic however, and could be used by non-runtime code).

The new ExecutorProcessControl::JITDispatchInfo struct provides the address
(in the executor) of the jit-dispatch function and a jit-dispatch context
object, and implementations of the dispatch function are added to
SelfExecutorProcessControl and OrcRPCExecutorProcessControl.

5. OrcRPCTPCServer is updated to support JIT-dispatch calls over ORC-RPC.

6. Serialization support for StringMap is added to the LLVM-side Simple Packed
Serialization code.

7. A JITLink::allocateBuffer operation is introduced to allocate writable memory
attached to the graph. This is used by the MachO header synthesis code, and will
be generically useful for other clients who want to create new graph content
from scratch.

3 years ago[ORC-RT] Fix signedness warning in unit test.
Lang Hames [Sun, 18 Jul 2021 05:16:28 +0000 (15:16 +1000)]
[ORC-RT] Fix signedness warning in unit test.

3 years ago[X86][SSE] Add codegen tests dot2/3 dot product of 128-bit dereferenceable float...
Simon Pilgrim [Mon, 19 Jul 2021 09:44:06 +0000 (10:44 +0100)]
[X86][SSE] Add codegen tests dot2/3 dot product of 128-bit dereferenceable float data

Based off the codegen reports on PR51075 - hopefully we can handle some of this in SLP or VectorCombine, but we usually have to leave load combining until the backend so at least some of these patterns will still appear even then.

3 years ago[Polly][Isl] Stop generating isl::union_{set,map} from isl::space. NFC
Riccardo Mori [Mon, 19 Jul 2021 08:47:52 +0000 (10:47 +0200)]
[Polly][Isl] Stop generating isl::union_{set,map} from isl::space. NFC

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
 - Stop generating `isl::union_set` and isl::union_map` from `isl::space` and instead generate them from `isl::ctx`
 - Disable clang-format on `isl-noexceptions.h`
 - Removed `isl::union_{set,map}` generator from `isl::space` from `isl-noexceptions.h`
 - `isl-noexceptions.h` has been generated by this https://github.com/patacca/isl/commit/87c3413b6f1d62ca3dddf716352f90a0b8533353

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D106059

3 years ago[mlir][linalg] Set explicit insertion point in pad_tensor patterns.
Tobias Gysi [Mon, 19 Jul 2021 08:16:28 +0000 (08:16 +0000)]
[mlir][linalg] Set explicit insertion point in pad_tensor patterns.

Insert ops replacing pad_tensor in front of the associated tansfer_write / insert_slice op. Otherwise we may end up with invalid ir if one of the remaining tansfer_write / insert_slice operands is defined after the pad_tensor op.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D106162

3 years ago[clang-tidy] Add 'readability-suspicious-call-argument' check
Whisperity [Tue, 5 Sep 2017 10:58:20 +0000 (12:58 +0200)]
[clang-tidy] Add 'readability-suspicious-call-argument' check

Finds function calls where the call arguments might be provided in an
incorrect order, based on the comparison (via string metrics) of the
parameter names and the argument names against each other.

A diagnostic is emitted if an argument name is similar to a *different*
parameter than the one currently passed to, and it is sufficiently
dissimilar to the one it **is** passed to currently.

False-positive warnings from this check are useful to indicate bad
naming convention issues, even if a swap isn't necessary.
This check does not generate FixIts.

Originally implemented by @varjujan as his Master's Thesis work.
The check was subsequently taken over by @barancsuk who added type
conformity checks to silence false positive matches.
The work by @whisperity involved driving the check's review and fixing
some more bugs in the process.

Reviewed By: aaron.ballman, alexfh

Differential Revision: http://reviews.llvm.org/D20689

Co-authored-by: János Varjú <varjujanos2@gmail.com>
Co-authored-by: Lilla Barancsuk <barancsuklilla@gmail.com>
3 years ago[LoopFlatten] Use Loop to identify loop induction phi. NFC
Rosie Sumpter [Thu, 15 Jul 2021 07:51:30 +0000 (08:51 +0100)]
[LoopFlatten] Use Loop to identify loop induction phi. NFC

Replace code which identifies induction phi with helper function
getInductionVariable to improve robustness.

Differential Revision: https://reviews.llvm.org/D106045

3 years ago[AArch64][SME] Add SVE2 instructions added in SME
Cullen Rhodes [Mon, 19 Jul 2021 07:40:04 +0000 (07:40 +0000)]
[AArch64][SME] Add SVE2 instructions added in SME

This patch adds support for the following instructions:

    SCLAMP, UCLAMP, REV, DUP (predicate)

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2021-06

Reviewed By: kmclaughlin

Differential Revision: https://reviews.llvm.org/D105577

3 years ago[ARM] Extend more reductions during lowering
David Green [Mon, 19 Jul 2021 07:58:03 +0000 (08:58 +0100)]
[ARM] Extend more reductions during lowering

This relaxes the VMLAV and VADDV reduction recognition code to handle
smaller than legal types, extending them as needed. That was already
handled for some reductions, this extends it to more types in a more
generic way. If a smaller than legal value is found it is extended to
the legal type as needed.

Differential Revision: https://reviews.llvm.org/D106051

3 years ago[AArch64][SVE] Optimize bitcasts between unpacked half/i16 vectors.
Sander de Smalen [Mon, 19 Jul 2021 06:13:14 +0000 (07:13 +0100)]
[AArch64][SVE] Optimize bitcasts between unpacked half/i16 vectors.

The case for nxv2f32/nxv2i32 was already covered by D104573.
This patch builds on top of that by making the mechanism work for
nxv2[b]f16/nxv2i16, nxv4[b]f16/nxv4i16 as well.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D106138

3 years ago[llvm-objdump][WebAssembly] Fix llvm-objdump on files without symbols
Andy Wingo [Wed, 7 Jul 2021 09:13:13 +0000 (11:13 +0200)]
[llvm-objdump][WebAssembly] Fix llvm-objdump on files without symbols

If a file has no symbols, perhaps because it is a linked executable,
synthesize some symbols by walking the code section.  Otherwise the
disassembler will try to treat the whole code section as a function,
which won't parse.  Fixes https://bugs.llvm.org/show_bug.cgi?id=50957.

Differential Revision: https://reviews.llvm.org/D105539

3 years ago[OpenMP][CMake] Fix an issue when there is space in the argument LIBOMPTARGET_LIT_ARGS
Shilei Tian [Mon, 19 Jul 2021 01:54:05 +0000 (21:54 -0400)]
[OpenMP][CMake] Fix an issue when there is space in the argument LIBOMPTARGET_LIT_ARGS

D106236 added a new CMake argument for `libomptarget` test, but when user's
input contains white spaces, CMake will add escape char to the final lit command,
which leads to an error. This patch converts the user's input `LIBOMPTARGET_LIT_ARGS`
into a local array, and then passes the array to the function.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D106247

3 years ago[polly] Fix uses of deprecated overload of IRBuilder::CreateGEP.
Eli Friedman [Mon, 19 Jul 2021 01:41:48 +0000 (18:41 -0700)]
[polly] Fix uses of deprecated overload of IRBuilder::CreateGEP.

3 years ago[polly] Fix regression tests with POLLY_ENABLE_GPGPU_CODEGEN
Eli Friedman [Mon, 19 Jul 2021 01:37:05 +0000 (18:37 -0700)]
[polly] Fix regression tests with POLLY_ENABLE_GPGPU_CODEGEN

Apparently there was a latent bug here.

3 years agoOpaque pointer GEP fixes for BrainF example
David Blaikie [Mon, 19 Jul 2021 01:24:42 +0000 (18:24 -0700)]
Opaque pointer GEP fixes for BrainF example

3 years ago[mlir-tblgen] Slightly improve the diagnostic message in pattern match
Chia-hung Duan [Mon, 19 Jul 2021 01:00:40 +0000 (09:00 +0800)]
[mlir-tblgen] Slightly improve the diagnostic message in pattern match

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D105883

3 years ago[X86] Remove incorrect use of known bits in shuffle simplification.
Eli Friedman [Sat, 17 Jul 2021 18:11:41 +0000 (11:11 -0700)]
[X86] Remove incorrect use of known bits in shuffle simplification.

This reverts commit 2a419a0b9957ebac9e11e4b43bc9fbe42a9207df.

The result of a shufflevector must not propagate poison from any element
other than the one noted in the shuffle mask.

The regressions outside of fptoui-may-overflow.ll can probably be
recovered some other way; for example, using isGuaranteedNotToBePoison.

See discussion on https://reviews.llvm.org/D106053 for more background.

Differential Revision: https://reviews.llvm.org/D106222

3 years ago[openmp][nfc] Simplify macros guarding math complex headers
Jon Chesterfield [Sun, 18 Jul 2021 22:30:33 +0000 (23:30 +0100)]
[openmp][nfc] Simplify macros guarding math complex headers

The `__CUDA__` macro is already defined for openmp/nvptx and is not used by
`__clang_cuda_complex_builtins.h`, so dropping that macro slightly simplifies
nvptx and avoids defining it on amdgcn (where it is likely to be harmful).

Also dropped a cplusplus test from a C++ header as compilation will have
failed on cmath earlier if it was included from C.

Reviewed By: jdoerfert, fodinabor

Differential Revision: https://reviews.llvm.org/D105221

3 years ago[InstCombine] Fold IntToPtr/PtrToInt to bitcast
Krishna Kariya [Sun, 18 Jul 2021 21:13:25 +0000 (23:13 +0200)]
[InstCombine] Fold IntToPtr/PtrToInt to bitcast

The inttoptr/ptrtoint roundtrip optimization is not always correct.
We are working towards removing this optimization and adding support
to specific cases where this optimization works. This patch is the
first one on this line.

Consider the example:

    %i = ptrtoint i8* %X to i64
    %p = inttoptr i64 %i to i16*
    %cmp = icmp eq i8* %load, %p

In this specific case, the inttoptr/ptrtoint optimization is correct
as it only compares the pointer values. In this patch, we fold
inttoptr/ptrtoint to a bitcast (if src and dest types are different).

Differential Revision: https://reviews.llvm.org/D105088

3 years ago[SCEV] Fix unused variable warning (NFC)
Nikita Popov [Sun, 18 Jul 2021 21:12:22 +0000 (23:12 +0200)]
[SCEV] Fix unused variable warning (NFC)

3 years ago[polly] Get rid of a couple uses of PointerType::getElementType().
Eli Friedman [Sun, 18 Jul 2021 20:50:07 +0000 (13:50 -0700)]
[polly] Get rid of a couple uses of PointerType::getElementType().

3 years ago[CSSPGO][NFC] Allow cl::ZeroOrMore for use-iterative-bfi-inference
Wenlei He [Sun, 18 Jul 2021 19:13:30 +0000 (12:13 -0700)]
[CSSPGO][NFC] Allow cl::ZeroOrMore for use-iterative-bfi-inference

3 years ago[ScalarEvolution] Remove uses of PointerType::getElementType.
Eli Friedman [Sun, 18 Jul 2021 20:12:25 +0000 (13:12 -0700)]
[ScalarEvolution] Remove uses of PointerType::getElementType.

3 years agoReland [Orc] Add verylazy example for C-bindings
Valentin Churavy [Sun, 18 Jul 2021 14:22:34 +0000 (16:22 +0200)]
Reland [Orc] Add verylazy example for C-bindings

This patch relands https://reviews.llvm.org/D104799, but fixes the
memory handling causing leak sanitizer failures.

This reverts commit a56fe117e04f7d4b953a4226af412dad59425fb5.

3 years ago[SimplifyCFG] add test to show miscompile from FoldBranchToCommonDest (PR51125); NFC
Sanjay Patel [Sun, 18 Jul 2021 17:34:43 +0000 (13:34 -0400)]
[SimplifyCFG] add test to show miscompile from FoldBranchToCommonDest (PR51125); NFC