Kenneth Graunke [Fri, 17 Feb 2017 05:15:07 +0000 (21:15 -0800)]
i965: Use ctx->Const.MaxVertexStreams rather than BRW_XFB_MAX_STREAMS.
This way on Sandybridge we'll only do 1 stream worth of math, since
we only have one SO_NUM_PRIMS_WRITTEN counter.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Fri, 17 Feb 2017 05:06:34 +0000 (21:06 -0800)]
i965: Move some code from gen7_sol_state.c to gen6_sol.c.
I plan to use these functions on Sandybridge soon. I changed the prefix
on a couple of functions to "brw" instead of "gen7" as in theory they
should be usable all the way back to G45.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Fri, 17 Feb 2017 05:22:51 +0000 (21:22 -0800)]
i965: Drop dead Gen8+ code from Gen7/sometimes-HSW driver hooks.
These driver hooks are not used when MI_MATH and MI_LOAD_REGISTER_REG
are supported, which Gen8+ can always do. So this code is dead.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Marek Olšák [Mon, 20 Feb 2017 18:24:18 +0000 (19:24 +0100)]
vbo: kill primitive restart lowering in glDrawArrays
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Marek Olšák [Sat, 18 Feb 2017 16:08:34 +0000 (17:08 +0100)]
radeonsi: fix issues with monolithic shaders
R600_DEBUG=mono has had no effect since:
commit
1fabb297177069e95ec1bb7053acb32f8ec3e092
Author: Marek Olšák <marek.olsak@amd.com>
Date: Tue Feb 14 22:08:32 2017 +0100
radeonsi: have separate LS and ES main shader parts in the shader selector
Also, this assertion was failing:
si_state_shaders.c:1307: si_shader_select_with_key: Assertion
`!shader->is_optimized' failed.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 19 Jan 2017 13:36:17 +0000 (14:36 +0100)]
radeonsi: set no-signed-zeros-fp-math
Recommended by Matt Arsenault.
46757 shaders in 28742 tests
Totals:
SGPRS: 2068851 -> 2066907 (-0.09 %)
VGPRS: 1604056 -> 1602676 (-0.09 %)
Spilled SGPRs: 1402 -> 1382 (-1.43 %)
Spilled VGPRs: 113 -> 113 (0.00 %)
Private memory VGPRs: 1332 -> 1332 (0.00 %)
Scratch size: 3224 -> 3188 (-1.12 %) dwords per thread
Code Size:
58815520 ->
58716788 (-0.17 %) bytes
LDS: 1162 -> 1162 (0.00 %) blocks
Max Waves: 354616 -> 354905 (0.08 %)
Wait states: 0 -> 0 (0.00 %)
Totals from affected shaders:
SGPRS: 786452 -> 784508 (-0.25 %)
VGPRS: 530000 -> 528620 (-0.26 %)
Spilled SGPRs: 958 -> 938 (-2.09 %)
Spilled VGPRs: 85 -> 85 (0.00 %)
Private memory VGPRs: 636 -> 636 (0.00 %)
Scratch size: 1880 -> 1844 (-1.91 %) dwords per thread
Code Size:
26349936 ->
26251204 (-0.37 %) bytes
LDS: 304 -> 304 (0.00 %) blocks
Max Waves: 108962 -> 109251 (0.27 %)
Wait states: 0 -> 0 (0.00 %)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 29 Jan 2017 21:45:36 +0000 (22:45 +0100)]
gallivm: add no-signed-zeros-fp-math option to lp_create_builder (v2)
v2: define lp_float_mode
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 18 Feb 2017 15:55:50 +0000 (16:55 +0100)]
radeonsi: skip TESSINNER/OUTER offchip stores if TES doesn't read them
We were unconditionally storing these outputs, sometimes even one component
at a time, but apps never read them in TES.
Move the TESSINNER/OUTER buffer stores into the TCS epilog where we can
easily disable them on demand.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 18 Feb 2017 14:30:25 +0000 (15:30 +0100)]
radeonsi: skip LDS stores in TCS if there are no LDS output reads
This removes a lot of useless LDS stores.
A few games read TESSINNER/OUTER, but not any other outputs. Most games
don't read any outputs.
The only app doing LDS output reads is UE4 Lightsroom Interior.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 18 Feb 2017 14:26:42 +0000 (15:26 +0100)]
tgsi/scan: add basic info about tessellation OUT and IN uses
not all of them will be used immediately
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Jason Ekstrand [Mon, 20 Feb 2017 19:04:12 +0000 (11:04 -0800)]
anv: Take a device parameter in anv_state_flush
This allows the helper to check for llc instead of having to do it
manually at all the call sites.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Mon, 20 Feb 2017 18:37:34 +0000 (10:37 -0800)]
anv: Pull all clflushing into a clflush_range helper
All this cache line address calculation stuff is tricky. Let's not
duplicate it more places than we have to.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Mon, 20 Feb 2017 18:30:20 +0000 (10:30 -0800)]
anv: Remove the unused state_pool_emit macro
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Mon, 20 Feb 2017 18:28:27 +0000 (10:28 -0800)]
anv: Rename clflush_range and state_clflush
It's a bit shorter and easier to work with. Also, we're about to add a
helper called clflush which does the clflush but without any memory
fencing.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Mon, 20 Feb 2017 19:03:04 +0000 (11:03 -0800)]
intel/blorp: Explicitly flush all allocated state
Found by inspection. However, I expect it fixes real bugs when using
blorp from Vulkan on little-core platforms.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Sat, 18 Feb 2017 23:58:40 +0000 (15:58 -0800)]
anv: Put everything about queries in genX_query.c
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Sat, 18 Feb 2017 23:51:11 +0000 (15:51 -0800)]
anv/Makefile: alphabetize
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Sat, 18 Feb 2017 23:21:04 +0000 (15:21 -0800)]
anv/query: Perform CmdResetQueryPool on the GPU
This fixes a some rendering corruption in The Talos Principle
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Sat, 18 Feb 2017 23:18:31 +0000 (15:18 -0800)]
genxml: Make MI_STORE_DATA_IMM more consistent
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Sat, 18 Feb 2017 21:25:04 +0000 (13:25 -0800)]
anv/query: clflush the bo map on non-LLC platforms
Found by inspection
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Mon, 20 Feb 2017 18:18:57 +0000 (10:18 -0800)]
anv: Add an invalidate_range helper
This is similar to clflush_range except that it puts the mfence on the
other side to ensure caches are flushed prior to reading.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Christian Gmeiner [Wed, 8 Feb 2017 12:14:05 +0000 (13:14 +0100)]
etnaviv: remove number of pixel pipes validation
This validation was added before the etnaviv drm driver landed in
the linux kernel. Due some pre-merge API changes we had to fix-up
this value but with a mainline kernel this is not a problem anymore.
Lets remove that validation which also gets rid of problem caught
by Coverity, reported to me by imirkin.
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Christian Gmeiner [Wed, 8 Feb 2017 12:07:25 +0000 (13:07 +0100)]
etnaviv: move pctx initialisation to avoid a null dereference
In case ctx->stream == NULL the fail label gets executed where
pctx gets dereferenced - too bad pctx is NULL in that case.
Caught by Coverity, reported to me by imirkin.
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Christian Gmeiner [Wed, 8 Feb 2017 12:03:19 +0000 (13:03 +0100)]
etnaviv: add missing fallthrough annotation
Caught by Coverity, reported to me by imirkin.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Mon, 20 Feb 2017 19:27:49 +0000 (19:27 +0000)]
docs/releasing.html: reword "distro breaking changes" hunk
v2: s/rare/rarely/ (Eric)
Suggested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com> (v1)
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Sun, 19 Feb 2017 11:49:21 +0000 (11:49 +0000)]
radv: make radv_resolve_entrypoint static
Used only within the generated source file.
Fixes:
12301c54186 ("radv: drop the RADV_CALL macro.")
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Emil Velikov [Sun, 19 Feb 2017 11:49:20 +0000 (11:49 +0000)]
radv: remove unused radv_dispatch_table dtable
Fixes:
12301c54186 ("radv: drop the RADV_CALL macro.")
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Emil Velikov [Sun, 19 Feb 2017 11:49:19 +0000 (11:49 +0000)]
anv: remove unused anv_dispatch_table dtable
Fixes:
4c9dec80ede ("anv: Get rid of the ANV_CALL macro")
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:43 +0000 (15:16 +0000)]
i915: remove extern "C" guards
None of this code is used in C++ context.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:42 +0000 (15:16 +0000)]
i915: remove 'virtual' and extern C workarounds
Analogous to previous commit.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:41 +0000 (15:16 +0000)]
i965: remove 'virtual' and extern C workarounds
The headers are properly annotated thus we don't need these.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:40 +0000 (15:16 +0000)]
i965: add extern C notation in headers
Otherwise symbols wont be annotated with C linkage and we'll fail at
link time.
Currently this is worked around by wrapping the header inclusion itself.
The latter in itself fragile and not recommended.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:39 +0000 (15:16 +0000)]
gallium: do not #include foo.h within extern C {}
Analogous to previous commit.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:38 +0000 (15:16 +0000)]
nir: do not #include util/debug.h within extern C {}
It's a problem waiting to happen. Individual headers should be annotated
if needed.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:37 +0000 (15:16 +0000)]
glsl: resolve extern C workarounds/hacks
Do not wrap header inclusion in extern C since it can cause issues.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:36 +0000 (15:16 +0000)]
st/mesa: move extern C wrappers where applicable
Namely, after the include directives. The headers are properly annotated
so keeping things as-is is only asking for trouble.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:35 +0000 (15:16 +0000)]
mesa/tests: remove unneeded extern C { #include foo } hack
The header itself (enums.h) is already properly annotated.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:34 +0000 (15:16 +0000)]
mesa: remove unneeded extern C {} wrapper
compiler.h defines a few mesa specific macros which are not C specific.
This allows us to avoid buggy extern C { #include $system_header }
constructs.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:33 +0000 (15:16 +0000)]
mesa: annotate functions for C linkage
i.e. add extern C {} in program/symbol_table.h
It will allow us remove a workaround we have elsewhere in the code.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:32 +0000 (15:16 +0000)]
anv: remove unneeded extern C notation
Analogous to previous commit - never used in any C++ code.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 16 Feb 2017 15:16:31 +0000 (15:16 +0000)]
radv: remove unneeded extern C notation
Header is never #include(d) by a C++ source.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Rhys Kidd [Sat, 11 Feb 2017 22:31:09 +0000 (17:31 -0500)]
glsl/tests: Add UINT64 and INT64 types
glsl/tests/uniform_initializer_utils.cpp:83:14: warning: enumeration value ‘GLSL_TYPE_UINT64’ not handled in switch [-Wswitch]
switch (type->base_type) {
^
glsl/tests/uniform_initializer_utils.cpp:83:14: warning: enumeration value ‘GLSL_TYPE_INT64’ not handled in switch [-Wswitch]
Fixes:
8ce53d4a2f3 ("glsl: Add basic ARB_gpu_shader_int64 types")
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Eric Engestrom [Tue, 14 Feb 2017 22:48:56 +0000 (22:48 +0000)]
docs: fix gamma correction link
That link has been dead for 15 years...
We could link to Archive.org [1] to get the last time this page existed,
but I feel like Wikipedia is a better choice.
[1] http://web.archive.org/web/
20021211151318/http://www.inforamp.net/~poynton/notes/colour_and_gamma/GammaFAQ.html
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 14 Feb 2017 21:18:52 +0000 (21:18 +0000)]
docs: add link to gallium doc
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Nicolai Hähnle [Mon, 20 Feb 2017 11:07:21 +0000 (12:07 +0100)]
radeonsi: fix UINT/SINT clamping for 10-bit formats on <= CIK
The same PS epilog workaround as for 8-bit integer formats is required,
since the CB doesn't do clamping.
Fixes GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels*.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 20 Feb 2017 09:46:13 +0000 (10:46 +0100)]
radeonsi: handle MultiDrawIndirect in si_get_draw_start_count
Also handle the GL_ARB_indirect_parameters case where the count itself
is in a buffer.
Use transfers rather than mapping the buffers directly. This anticipates
the possibility that the buffers are sparse (once ARB_sparse_buffer is
implemented), in which case they cannot be mapped directly.
Fixes GL45-CTS.gtf43.GL3Tests.multi_draw_indirect.multi_draw_indirect_type
on <= CIK.
v2:
- unmap the indirect buffer correctly
- handle the corner case where we have indirect draws, but all of them
have count 0.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Nicolai Hähnle [Sun, 19 Feb 2017 09:42:57 +0000 (10:42 +0100)]
winsys/amdgpu: reduce max_alloc_size based on GTT limits
Allocating huge buffers in VRAM is not a problem, but when those buffers
start being migrated, the kernel runs into errors because it cannot split
those buffer up for moving through GTT.
This should fix intermittent failures of
GL45-CTS.texture_buffer.texture_buffer_max_size
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bas Nieuwenhuizen [Mon, 20 Feb 2017 08:27:17 +0000 (09:27 +0100)]
radv: Don't flush at the start of a command buffer.
The preamble flushes now and the rest is the responsibility of the app.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Mon, 20 Feb 2017 08:26:00 +0000 (09:26 +0100)]
radv: Flush in the initial preamble CS.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Mon, 20 Feb 2017 08:08:31 +0000 (09:08 +0100)]
radv: Special case the initial preamble.
For flushing we don't want to flush every third IB.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Mon, 20 Feb 2017 00:57:46 +0000 (01:57 +0100)]
radv: Split emitting the cache flush out.
So that we can use it without a cmd_buffer.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Mon, 20 Feb 2017 01:22:39 +0000 (02:22 +0100)]
radv: Free empty_cs on device destruction.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ben Skeggs [Tue, 21 Feb 2017 00:01:16 +0000 (10:01 +1000)]
nvc0: use PascalB for most Pascal boards
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Dave Airlie [Mon, 20 Feb 2017 05:13:33 +0000 (15:13 +1000)]
radv: handle subpass cache flushes
This splits out the cache flush bit setting code
dependent on the src/dest access flags.
It then calls it from the subpass barrier code.
It also marks a TODO to remove the aggressive CS/PS
flushes at some point.
This fixes a bunch of the
dEQP-VK.renderpass.attachment_allocation.input_output.*
tests.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Grazvydas Ignotas [Fri, 10 Feb 2017 23:01:40 +0000 (01:01 +0200)]
r300g: only allow byteswapped formats on big endian
They cause regressions on little endian.
Fixes:
172bfdaa9e ("r300g: add support for PIPE_FORMAT_x8R8G8B8_*")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98869
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Sun, 19 Feb 2017 23:16:20 +0000 (10:16 +1100)]
mesa: remove unused variable warning in release builds
This assert might have made sense before but we no longer use
gl_linked_shader here. Unless the caller has really done something
crazy this assert is fairly useless.
We also do some small tidy ups in this change.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Emil Velikov [Mon, 13 Feb 2017 19:23:41 +0000 (19:23 +0000)]
docs/submittingpatches.html: document the Fixes tag
Provide information and an example.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Emil Velikov [Mon, 13 Feb 2017 19:23:40 +0000 (19:23 +0000)]
docs/submittingpatches.html: remove version tag for nominations
The version tag used to nominate has bitten even experienced mesa
developers. Not to mention that it deviates from the one used in the
kernel leading to further confusion.
Simplify things and omit it all together.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Emil Velikov [Mon, 13 Feb 2017 19:23:39 +0000 (19:23 +0000)]
docs/submittingpatches.html: add #backports section
Provide information about merge conflicts resolution and sending
backports.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Emil Velikov [Mon, 13 Feb 2017 19:23:38 +0000 (19:23 +0000)]
docs/submittingpatches.html: rework the #criteria section
Reword the section to focus on what is allowed, using a more brief, yet
descriptive wording.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Emil Velikov [Thu, 16 Feb 2017 14:09:41 +0000 (14:09 +0000)]
travis: bring the scons build on par with AppVeyor
Namely, always build with LLVM and run the check target.
Cc: Rhys Kidd <rhyskidd@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Ben Crocker [Thu, 19 Jan 2017 01:44:09 +0000 (20:44 -0500)]
gallivm: Reenable PPC VSX (v3)
Reenable the PPC64LE Vector-Scalar Extension for LLVM versions >= 3.8.1,
now that LLVM bug 26775 and its corollary, 25503, are fixed.
Amendment: remove extraneous spaces in macro def & invocations.
We would prefer a runtime check, e.g. via an LLVMQueryString
(analogous to glGetString, eglQueryString) or LLVMGetVersion API,
but no such API exists at this time.
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
[Emil Velikov: remove LLVM_VERSION macro]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Ben Crocker [Fri, 10 Feb 2017 23:08:07 +0000 (18:08 -0500)]
gallivm: Override getHostCPUName() "generic" w/ "pwr8" (v4)
If llvm::sys::getHostCPUName() returns "generic", override
it with "pwr8" (on PPC64LE).
This is a work-around for a bug in LLVM: a table entry for "POWER8NVL"
is missing, resulting in (big-endian) "generic" being returned on
little-endian Power8NVL systems. The result is that code that
attempts to load the least significant 32 bits of a 64-bit quantity in
memory loads the wrong half.
This omission should be fixed in the next version of LLVM (4.0),
but this work-around should be left in place in case some
future version of POWER<n> also ends up unrepresented in LLVM's table.
This workaround fixes failures in the Piglit arb_gpu_shader_fp64 conversion
tests on POWER8NVL processors.
(V4: add similar comment in the code.)
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Cc: 12.0 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Ben Crocker [Tue, 14 Feb 2017 21:16:01 +0000 (16:16 -0500)]
gallivm: Improve debug output (V2)
Improve debug output from gallivm_compile_module and
lp_build_create_jit_compiler_for_module, printing the
-mcpu and -mattr options passed to LLC.
V2: enclose MAttrs debug_printf block and llc -mcpu debug_printf
in "if (gallivm_debug & <flags>)..."
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Cc: 12.0 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v2)
[Emil Velikov: rebase]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Marek Olšák [Mon, 20 Feb 2017 16:54:12 +0000 (17:54 +0100)]
gallium/u_suballoc: update comments
as requested by Brian. Trivial.
Jonathan Gray [Sat, 18 Feb 2017 07:56:58 +0000 (18:56 +1100)]
util/build-id: define ElfW and NT_GNU_BUILD_ID if needed
Define ElfW() and NT_GNU_BUILD_ID if needed as these defines are not
present on at least OpenBSD and FreeBSD. Fixes the build on OpenBSD.
Fixes:
d4fa083e11f ("util: Add utility build-id code.")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Mauro Rossi [Sat, 18 Feb 2017 22:10:24 +0000 (23:10 +0100)]
android: define HAVE_DL_ITERATE_PHDR for build-id code
Required due to d4fa083 "util: Add utility build-id code."
to avoid following build error and warnings:
external/mesa/src/intel/vulkan/anv_device.c:60:32: error: incompatible integer to pointer conversion initializing 'const struct build_id_note *' with an expression of type 'int' [-Werror,-Wint-conversion]
const struct build_id_note *note = build_id_find_nhdr("libvulkan_intel.so");
^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/mesa/src/intel/vulkan/anv_device.c:64:19: warning: implicit declaration of function 'build_id_length' is invalid in C99 [-Wimplicit-function-declaration]
unsigned len = build_id_length(note);
^
external/mesa/src/intel/vulkan/anv_device.c:68:4: warning: implicit declaration of function 'build_id_read' is invalid in C99 [-Wimplicit-function-declaration]
build_id_read(note, uuid, VK_UUID_SIZE);
^
3 warnings and 1 error generated.
[ 40% 1438/3588] target C: libmesa_vulkan_common_32 <= external/mesa/src/intel/vulkan/anv_image.c
ninja: build stopped: subcommand failed.
build/core/ninja.mk:148: recipe for target 'ninja_wrapper' failed
make: *** [ninja_wrapper] Error 1
Fixes:
d4fa083e11f ("util: Add utility build-id code.")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Mauro Rossi [Sat, 18 Feb 2017 21:23:18 +0000 (22:23 +0100)]
android: glsl: build shader cache sources
Fixes the following building errors:
external/mesa/src/compiler/glsl/linker.cpp:4642: error: undefined reference
to 'shader_cache_read_program_metadata(gl_context*, gl_shader_program*)'
external/mesa/src/mesa/program/ir_to_mesa.cpp:3135: error: undefined reference
to 'shader_cache_write_program_metadata(gl_context*, gl_shader_program*)'
clang++: error: linker command failed with exit code 1
...
external/mesa/src/mesa/program/ir_to_mesa.cpp:3135: error: undefined reference
to 'shader_cache_write_program_metadata(gl_context*, gl_shader_program*)'
external/mesa/src/compiler/glsl/linker.cpp:4642: error: undefined reference
to 'shader_cache_read_program_metadata(gl_context*, gl_shader_program*)'
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
ninja: build stopped: subcommand failed.
build/core/ninja.mk:148: recipe for target 'ninja_wrapper' failed
make: *** [ninja_wrapper] Error 1
Fixes:
9f8dc3bf03e ("utils: build sha1/disk cache only with
Android/Autoconf")
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Mauro Rossi [Wed, 8 Feb 2017 07:14:05 +0000 (08:14 +0100)]
android: radeonsi: fix sid_table.h generated header include path
generated-sources-dir-for macro replaces intermediates-dir-for
and LOCAL_MODULE_CLASS is defined as required by new macro,
in order to avoid the following building error:
external/mesa/src/gallium/drivers/radeonsi/si_debug.c:29:10: fatal error: 'sid_tables.h' file not found
^
1 error generated.
Fixes:
730574c58e8 ("android: ac/debug: move sid_tables.h generation and
IB decode to amd/common")
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 20 Feb 2017 11:56:39 +0000 (11:56 +0000)]
docs: add news item and link release notes for 13.0.5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 20 Feb 2017 11:54:07 +0000 (11:54 +0000)]
docs: add sha256 checksums for 13.0.5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
112e75f51bc7c82bde4722485115c99734e62064)
Emil Velikov [Mon, 20 Feb 2017 11:43:27 +0000 (11:43 +0000)]
docs: add release notes for 13.0.5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
71f3ff57fa67ef72630821f4fa13a17e264d7ccb)
Dave Airlie [Sun, 19 Feb 2017 05:27:47 +0000 (15:27 +1000)]
vulkan/wsi/x11: add support to detect if we can support rendering (v3)
This adds support to radv_GetPhysicalDeviceXlibPresentationSupportKHR
and radv_GetPhysicalDeviceXcbPresentationSupportKHR to check if the
local device file descriptor is compatible with the descriptor
retrieved from the X server via DRI3.
This will stop radv binding to an X server until we have prime
support in place. Hopefully apps use this API before trying
to render things.
v2: drop unneeded function, don't leak memory. (jekstrand)
v3: also check in surface_get_support callback.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 19 Feb 2017 22:44:58 +0000 (08:44 +1000)]
Revert "radv: detect command buffers that do no work and drop them (v2)"
This just keeps popping up minor problems and regressions we should
revisit in a more sustainable manner later.
This also reverts:
Revert "radv: query cmds should mark a cmd buffer as having draws."
Revert "radv: also fixup event emission to not get culled."
This reverts commit
d1640e79328af4a63c056e3ccab299a3bffbede7.
This reverts commit
8b47b97215af7157bc15676167cab73aa5a61a76.
This reverts commit
b4b19afebeac84ddce3f1f8b7ffe0da6474fe29a.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 19 Feb 2017 13:00:25 +0000 (14:00 +0100)]
radv: Handle VK_REMAINING_ARRAY_LAYERS in fast clear eliminate.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Fri, 17 Feb 2017 11:55:24 +0000 (12:55 +0100)]
gallium/u_index_modify: don't add PIPE_TRANSFER_UNSYNCHRONIZED unconditionally
It's OK for r300g (because r300g can't write to buffers via the GPU), but
not later hardware. This issue was spotted randomly.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 16:24:38 +0000 (17:24 +0100)]
radeonsi: fix UNSIGNED_BYTE index buffer fallback with non-zero start (v2)
start can only be non-zero with MultiDrawElements, which is unlikely
to occur with UNSIGNED_BYTE indices.
v2: Also fix the util_shorten_ubyte_elts_to_userptr call.
Tested with the new piglit.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Dave Airlie [Sun, 19 Feb 2017 06:33:14 +0000 (16:33 +1000)]
radv: handle layered fast clears.
This iterates the fast clear flush across the layers in the
specified range.
It also moves the compute resolve flush into the function
and builds the range in there.
This fixes:
dEQP-VK.geometry.layered.* regressions since fast clears.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Dave Airlie [Sun, 19 Feb 2017 06:33:13 +0000 (16:33 +1000)]
radv: pass subresourceRange by pointer.
This struct is 5 dwords, we should really just pass a pointer
to it.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 19 Feb 2017 06:38:16 +0000 (16:38 +1000)]
radv: fix typo in a2b10g10r10 fast clear calculation.
This fixes:
dEQP-VK.renderpass.formats.a2b10g10r10_unorm_pack32*
regressions.
Fixes:
f22836dbdd radv: Add CPU color packing for VK_FORMAT_A2B10G10R10_UNORM_PACK32.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bas Nieuwenhuizen [Sun, 19 Feb 2017 02:35:02 +0000 (03:35 +0100)]
radv: Invert ring SGPR check.
I assume this wants to check if all pipelines use the same SGPR for
the rings.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Bas Nieuwenhuizen [Sun, 19 Feb 2017 00:16:19 +0000 (01:16 +0100)]
radv: Clamp framebuffer dimensions to min. attachment dimensions.
Even though the preferred stance is not to fix incorrect applications
via the driver, this prevents some nasty GPU hangs.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 16 Feb 2017 17:01:53 +0000 (18:01 +0100)]
gallium: remove TGSI_OPCODE_CLAMP
Not used and not widely supported. Use MIN+MAX instead.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 16 Feb 2017 21:52:53 +0000 (22:52 +0100)]
ac/llvm: use min+max instead of AMDGPU.clamp on LLVM 5.0
It selects v_med3_f32, which has the same rate & size.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 16 Feb 2017 21:41:16 +0000 (22:41 +0100)]
radeonsi: stop using TGSI_OPCODE_CLAMP by moving it amd/common
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 16 Feb 2017 16:11:30 +0000 (17:11 +0100)]
tgsi/lowering: stop using TGSI_OPCODE_CLAMP
v2: do it correctly
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 16 Feb 2017 15:59:05 +0000 (16:59 +0100)]
st/mesa: stop using TGSI_OPCODE_CLAMP
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 19:44:24 +0000 (20:44 +0100)]
radeonsi: use R600_RESOURCE_FLAG_UNMAPPABLE where it's desirable
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 19:41:01 +0000 (20:41 +0100)]
gallium/radeon: add R600_RESOURCE_FLAG_UNMAPPABLE
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 19:07:53 +0000 (20:07 +0100)]
gallium/radeon: change r600_aligned_buffer_create to take flags, not bind
All call sites set bind = 0. The next commit will use this.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 18:50:15 +0000 (19:50 +0100)]
radeonsi: upload constants into VRAM instead of GTT
This lowers lgkm wait cycles by 30% on VI and normal conditions.
The might be a measurable improvement when CE is disabled (radeon)
or under L2 thrashing.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 17:49:11 +0000 (18:49 +0100)]
gallium/radeon: use TCC line size as alignment in other places
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 17:32:34 +0000 (18:32 +0100)]
radeonsi: use a clever alignment for index buffer uploads
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 17:29:34 +0000 (18:29 +0100)]
radeonsi: use a clever alignment for descriptor uploads
Non-VBO descriptors won't be smaller than the cache line, so simply use
the cache line size.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 17:22:27 +0000 (18:22 +0100)]
radeonsi: use a clever alignment for constant buffer uploads
This results in a very tiny decrease in lgkm wait cycles.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 17:36:21 +0000 (18:36 +0100)]
radeonsi: move index buffer flushing into a non-upload indexed case
The other codepaths don't need this.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 16 Feb 2017 10:39:01 +0000 (11:39 +0100)]
radeonsi: use SI_MAX_ATTRIBS where it should be used
for consistency; no change in behavior
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 14 Feb 2017 21:14:55 +0000 (22:14 +0100)]
radeonsi: sort members of si_shader_key::part
and improve some comments
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 14 Feb 2017 21:08:32 +0000 (22:08 +0100)]
radeonsi: have separate LS and ES main shader parts in the shader selector
This might reduce the on-demand compilation if the initial VS/LS/ES
determination is wrong.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 14 Feb 2017 21:06:51 +0000 (22:06 +0100)]
radeonsi: don't compile pure monolithic shaders asynchronously
there is no point, we have to wait anyway.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>