Lionel Landwerlin [Sat, 8 Apr 2023 18:34:35 +0000 (21:34 +0300)]
intel/fs: make tcs input_vertices dynamic
We need to do 3 things to accomplish this :
1. make all the register access consider the maximal case when
unknown at compile time
2. move the clamping of load_per_vertex_input prior to lowering
nir_intrinsic_load_patch_vertices_in (in the dynamic cases, the
clamping will use the nir_intrinsic_load_patch_vertices_in to
clamp), meaning clamping using derefs rather than lowered
nir_intrinsic_load_per_vertex_input
3. in the known cases, lower nir_intrinsic_load_patch_vertices_in
in NIR (so that the clamped elements still be vectorized to the
smallest number of URB read messages)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22378>
Mike Blumenkrantz [Tue, 23 May 2023 17:58:09 +0000 (13:58 -0400)]
zink: use the per-context track_renderpasses flag in more places
this should fix some erroneous zsbuf invalidation
Fixes:
215beee16d9 ("zink: more explicitly track/check rp optimizing per-context")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23189>
Mike Blumenkrantz [Tue, 23 May 2023 13:30:59 +0000 (09:30 -0400)]
zink: don't wait on queue thread if disabled
Fixes:
270f9c0b063 ("zink: add ZINK_DEBUG=flushsync")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23189>
Alyssa Rosenzweig [Tue, 23 May 2023 22:19:03 +0000 (18:19 -0400)]
nir: Drop stale comments
Follow-on clean up after
01e9ee79f70 ("nir: Drop unused name from
nir_ssa_dest_init"). The referenced argument no longer exists.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
Alyssa Rosenzweig [Tue, 23 May 2023 18:13:00 +0000 (14:13 -0400)]
agx: Use common combine_all_barriers callback
This contains a bugfix: execution scopes are now respected when combining
barriers. Otherwise control barriers can disappear during combining, which is
wrong.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
Alyssa Rosenzweig [Tue, 23 May 2023 18:12:19 +0000 (14:12 -0400)]
nir/opt_barriers: Add a default callback
Absent any knowledge about the hardware, if the backend wants to combine
barriers we should try to combine all barriers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
Alyssa Rosenzweig [Tue, 23 May 2023 14:10:47 +0000 (10:10 -0400)]
treewide: Avoid nir_lower_regs_to_ssa calls
nir_registers are only supposed to be used temporarily. They may be created by a
producer, but then must be immediately lowered prior to optimizing the produced
shader. They may be created internally by an optimization pass that doesn't want
to deal with phis, but that pass needs to lower them back to phis immediately.
Finally they may be created when going out-of-SSA if a backend chooses, but that
has to happen late.
Regardless, there should be no case where a backend sees a shader that comes in
with nir_registers needing to be lowered. The two frontend producers of
registers (tgsi_to_nir and mesa/st) both call nir_lower_regs_to_ssa to clean up
as they should. Some backend (like intel) already depend on this behaviour.
There's no need for other backends to call nir_lower_regs_to_ssa too.
Drop the pointless calls as a baby step towards replacing nir_register.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
José Roberto de Souza [Tue, 9 May 2023 17:28:07 +0000 (10:28 -0700)]
iris: Replace aperture_bytes by sram size in iris_resource_create_for_image() for PIPE_USAGE_STAGING
All platforms supported by Iris will have aperture_bytes set as 4Gb.
Also this value is not the actual aperture in i915, it actualy is the
GGTT size.
So here replacing it by the sram size, something that will vary
depending in the amount of RAM available.
This fix some tests with Xe KMD, as it is not setting aperture_bytes.
And will not do that as there is no UAPI to fetch this information
and it is not planned to it to Xe UAPI.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Ack-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22969>
Alejandro Piñeiro [Wed, 24 May 2023 09:58:51 +0000 (11:58 +0200)]
broadcom/compiler: disable tmu pipelining when needed
disable_tmu_pipelining has been recently set to false on two
strategies that should set it to true.
Fixes the following CTS test:
dEQP-VK.graphicsfuzz.spv-stable-maze-flatten-copy-composite
Fixes:
c950098ab - broadcom/compiler: move buffer loads to lower register pressure
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23207>
Julia Tatz [Wed, 15 Feb 2023 05:39:57 +0000 (00:39 -0500)]
zink: Implement PIPE_CAP_OPENCL_INTEGER_FUNCTIONS and PIPE_CAP_INTEGER_MULTIPLY_32X16.
Enables GL_INTEL_shader_integer_functions2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23197>
Alejandro Piñeiro [Wed, 24 May 2023 08:43:55 +0000 (10:43 +0200)]
v3d: assert if v3d_compile returns NULL
Ideally we would like to trigger a compilation error like we do on
v3dv (VK_ERROR_UNKNOWN). But with v3d we can't really do that, as this
could happen on a draw call. Let's at least assert so debug builds
stops at this point.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23203>
Alejandro Piñeiro [Wed, 24 May 2023 08:32:59 +0000 (10:32 +0200)]
broadcom/compiler: return NULL if we fail to register allocate
Right now if we fail to register allocate, we return the qpu_insts
that we had at that point, even if the driver can't really use it.
Also v3dv_pipeline was already assuming that it would return NULL on
failure, returning VK_ERROR_UNKNOWN on that case.
This allows CTS tests with a lot of pressure, that regress now and
then to not being able to allocate, to finish with an error, instead
of blocking forever. For example:
dEQP-VK.graphicsfuzz.spv-stable-maze-flatten-copy-composite
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23203>
Patrick Lerda [Mon, 8 May 2023 16:02:44 +0000 (18:02 +0200)]
mesa: fix refcnt imbalance related to egl_image_target_texture()
Indeed, the locally allocated "stimg" reference was not freed
on a specific code path.
For instance, this issue is triggered on radeonsi or r600 with:
"piglit/bin/egl-ext_egl_image_storage -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.
Fixes:
6a3f5c65128b ("mesa: simplify st_egl_image binding process for texture storage")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23165>
Eric Engestrom [Wed, 24 May 2023 11:44:57 +0000 (12:44 +0100)]
ci/amd: don't override the b2c timeout in the steamdeck config
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23206>
Eric Engestrom [Wed, 24 May 2023 09:45:00 +0000 (10:45 +0100)]
ci/b2c: increase timeout to 5 minutes
We've been trying to get podman to output its progress while it downloads
images so that we don't think it's stuck, but until we manage to do that,
a longer timeout means fewer inaccurate timeouts.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23206>
Iago Toral Quiroga [Wed, 24 May 2023 07:00:48 +0000 (09:00 +0200)]
v3dv: align compressed image regions to block size
This fixes an assert crash in UE4 when forcing the blit path for
image copies, caused by an image copy of a small miplevel which
pixel size is smaller than a single compressed block, leading to
an empty blit region.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23180>
Iago Toral Quiroga [Mon, 22 May 2023 11:55:45 +0000 (13:55 +0200)]
v3dv: allow TFU transfers for mip levels other than 0
We had a check to ensure we were copying full slices, but the
size check was done against the base mip level, so in practice
we were only using the TFU for mip 0.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23180>
Iago Toral Quiroga [Mon, 22 May 2023 11:55:14 +0000 (13:55 +0200)]
v3dv: store slice dimensions in pixels
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23180>
Samuel Pitoiset [Tue, 23 May 2023 16:50:52 +0000 (18:50 +0200)]
radv: do not enable VRS flat shading if the VRS builtin is read
When the fragment shader reads the VRS builtin, VRS flat shading
shouldn't be enabled, otherwise the value might not be what the FS
expects.
Fixes dEQP-VK.fragment_shading_rate.renderpass2.monolithic.multipass.*
on RDNA2 (VRS flat shading isn't yet enabled on RDNA3).
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23187>
Corentin Noël [Tue, 23 May 2023 15:13:07 +0000 (17:13 +0200)]
nir: Propagate the type sampler type change to the used variable.
Avoid keeping a mismatching type between the sampler declaration and its
use.
In the case of virgl, we were hitting sanity checks when running the
spec@arb_fragment_program_shadow@tex-shadow2dnotdepth piglit test.
Fixes:
0843d4cbc3546a80d76109c892a1e1a3b847dd55
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23183>
Dave Airlie [Mon, 22 May 2023 03:13:25 +0000 (13:13 +1000)]
radv/video: add missing space checks for video.
Fixes:
7893040f807f ("radv: Add stricter space checks.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23158>
Tapani Pälli [Tue, 23 May 2023 05:28:40 +0000 (08:28 +0300)]
mesa: validate shader binary format in _mesa_spirv_shader_binary
Rework:
* Jordan: Added ARB_gl_spirv text to comment.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23155>
Lionel Landwerlin [Fri, 19 May 2023 18:34:46 +0000 (21:34 +0300)]
iris: use COMPUTE_WALKER post sync field to track compute work
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
Lionel Landwerlin [Fri, 19 May 2023 14:01:23 +0000 (17:01 +0300)]
anv: use COMPUTE_WALKER post sync field to track compute work
This is more accurate than PIPE_CONTROL as it won't introduce stalls
between the compute dispatches.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
Lionel Landwerlin [Fri, 19 May 2023 12:36:40 +0000 (15:36 +0300)]
anv: move timestamp vfunc initialization to genX code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
Gert Wollny [Wed, 24 May 2023 04:56:08 +0000 (06:56 +0200)]
docs/features: fix empty line error
Fixes: cbb144c (virgl: Add support for ARB_pipeline_statistics)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23195>
Tapani Pälli [Wed, 18 Jan 2023 12:11:53 +0000 (14:11 +0200)]
iris: add required invalidate/flush for Wa_14014427904
This WA impacts skus with multiple CCS, e.g. ATS-M. According to
description, we need to add a pipe control before following NP state
commands:
STATE_BASE_ADDRESS
3DSTATE_BTD
CHROMA_KEY
STATE_SIP
STATE_COMPUTE_MODE
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
Tapani Pälli [Wed, 18 Jan 2023 12:33:27 +0000 (14:33 +0200)]
anv: add required invalidate/flush for Wa_14014427904
This WA impacts skus with multiple CCS, e.g. ATS-M. According to
description, we need to add a pipe control before following NP state
commands:
STATE_BASE_ADDRESS
3DSTATE_BTD
CHROMA_KEY
STATE_SIP
STATE_COMPUTE_MODE
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
Tapani Pälli [Wed, 22 Feb 2023 07:53:43 +0000 (09:53 +0200)]
intel/dev: provide helper to check if devinfo is ATS-M
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
Rob Clark [Sat, 20 May 2023 00:28:51 +0000 (17:28 -0700)]
freedreno/batch: Move submit bo tracking to batch
We already do _most_ of the tracking of rsc associated with a batch at
the batch level. If we manually add the handful of BOs that aren't part
of the resource tracking, we can drop the duplicate drm level tracking.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Rob Clark [Sat, 20 May 2023 14:31:39 +0000 (07:31 -0700)]
freedreno/a6xx: Optimize max_indices calculation
Turn draw-time udiv into two shifts.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Rob Clark [Fri, 19 May 2023 02:45:03 +0000 (19:45 -0700)]
freedreno/a6xx: Template specialization for pipeline type
There are a bunch of extra steps for draws that involve GS and/or tess
stages. But we can use template specialization to skip all that when
there is no GS/tess shader stage bound.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Rob Clark [Fri, 19 May 2023 01:13:20 +0000 (18:13 -0700)]
freedreno/a6xx: Template specialization for draw type
Convert various run-time conditionals into a single draw type
determination, and use template specialization to generate unique
optimized code paths for each. This also lets us fold the WFM needed
in some cases into normal barrier flushes.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Rob Clark [Sat, 20 May 2023 13:37:32 +0000 (06:37 -0700)]
mesa: Skip update_gl_clamp() if samplers need clamp
update_gl_clamp() was ~12% of drawoverhead -test 40.. this turns it into
a no-op when no clamp lowering is needed.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Lucas Fryzek [Fri, 19 May 2023 15:40:51 +0000 (11:40 -0400)]
broadcom: Fix slice memory allocation logic for compressed textures
Compressed textures require their width and height padding to be
calculated based on the number of blocks in the image. This change ensures
that the number of blocks in the texture is a POT for mip levels > 1.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23133>
Lucas Fryzek [Fri, 5 May 2023 18:44:50 +0000 (14:44 -0400)]
broadcom: Add support for VK_FORMAT_A2R10G10B10_UNORM_PACK32
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23133>
Eric Engestrom [Tue, 23 May 2023 20:27:55 +0000 (21:27 +0100)]
docs: update calendar for 23.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23193>
Eric Engestrom [Tue, 23 May 2023 20:22:03 +0000 (21:22 +0100)]
docs: add release notes for 23.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23193>
Alyssa Rosenzweig [Tue, 23 May 2023 17:44:11 +0000 (13:44 -0400)]
dxil: Rely on scoped_barrier
We don't get non-scoped barriers. Don't handle them.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23188>
Filip Gawin [Tue, 23 May 2023 09:25:01 +0000 (11:25 +0200)]
ac/nir: fix slots in clamping legacy colors
fixes:
7c41cdb81f564ef52404e5f313ccfe2d723896e6
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23178>
Mike Blumenkrantz [Wed, 17 May 2023 12:37:49 +0000 (08:37 -0400)]
lavapipe: VK_EXT_pageable_device_local_memory
the memory guarantees of this extension should be implicit to linux systems
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Mike Blumenkrantz [Wed, 17 May 2023 12:36:32 +0000 (08:36 -0400)]
lavapipe: store memory allocation size onto lvp_device_memory
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Mike Blumenkrantz [Wed, 17 May 2023 12:26:24 +0000 (08:26 -0400)]
lavapipe: EXT_memory_priority
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Mike Blumenkrantz [Wed, 17 May 2023 11:47:06 +0000 (07:47 -0400)]
lavapipe: EXT_memory_budget
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Mike Blumenkrantz [Wed, 17 May 2023 11:46:12 +0000 (07:46 -0400)]
lavapipe: report full memory in heap for 64bit processes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Mike Blumenkrantz [Wed, 17 May 2023 11:33:38 +0000 (07:33 -0400)]
lavapipe: bump memory allocation heap to 3GiB
this should still be a safe limit on all systems and archs
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Erik Faye-Lund [Sun, 21 May 2023 15:08:54 +0000 (17:08 +0200)]
util: mark externally-unused functions as static
These functions aren't used outside of sha1.c, so let's remove the
prototypes from the header-file, and mark the definitions as static.
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23163>
Ruijing Dong [Tue, 16 May 2023 15:47:09 +0000 (11:47 -0400)]
frontends/va: remove private member and update target buffer
use update_decoder_target to update the target buffer to
let decoder obtain correct reference frame.
remove the previous logic which failed to update reference
info in time.
fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8996
fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8387
Cc: mesa-stable
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
Ruijing Dong [Tue, 23 May 2023 13:52:40 +0000 (09:52 -0400)]
radeonsi/vcn: apply update_decoder_target logic
implement update_decoder_target and
remove corresponding obsolete logic.
Cc: mesa-stable
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
Ruijing Dong [Tue, 23 May 2023 13:47:59 +0000 (09:47 -0400)]
gallium/pipe: add interface update_decoder_target
reason:
decoder uses the target buffer address in record
to indentify the reference frames. When target
buffer has changed outside of decoding process,
it has to be updated back to decoder, otherwise
the outdated reference will cause image corruption.
Cc: mesa-stable
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
Dave Airlie [Tue, 2 May 2023 20:42:36 +0000 (06:42 +1000)]
ci: reenable lavapipe
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22806>
Ryan Houdek [Mon, 22 May 2023 20:58:56 +0000 (22:58 +0200)]
util: move check for AVX512
As a side effect solve:
```
[91/1401] Compiling C object src/util/libmesa_util.a.p/u_cpu_detect.c.o
../src/util/u_cpu_detect.c: In function '_util_cpu_detect_once':
../src/util/u_cpu_detect.c:889:11: warning: 'regs2[2]' may be used uninitialized [-Wmaybe-uninitialized]
889 | if (((regs2[2] >> 27) & 1) && // OSXSAVE
| ^~~~~~~~~~~~~~~~~~~~~~
../src/util/u_cpu_detect.c:823:16: note: 'regs2[2]' was declared here
823 | uint32_t regs2[4];
| ^~~~~
```
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23164>
Eric Engestrom [Mon, 22 May 2023 18:51:15 +0000 (19:51 +0100)]
util/bitset: ensure the sets compared have the same size at compile time
Instead of checking this at run time.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23171>
Eric Engestrom [Fri, 12 May 2023 15:46:34 +0000 (16:46 +0100)]
ci: only execute capture-devcoredump.sh when it's present
Avoids this error:
./install/common/init-stage2.sh: line 130: /capture-devcoredump.sh: No such file or directory
One step closer to an error-free CI and being able to `set -e`.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22992>
Dave Airlie [Fri, 19 May 2023 00:29:23 +0000 (10:29 +1000)]
lvp: use stage iterator macros instead of explicit loops
This cleans up the compute checks
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
Dave Airlie [Fri, 19 May 2023 00:21:38 +0000 (10:21 +1000)]
lvp: use stage mask
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
Dave Airlie [Wed, 17 May 2023 03:12:32 +0000 (13:12 +1000)]
gallivm/nir: refactor the local invocation index calc.
This is needed elsewhere for mesh shaders.
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
Dave Airlie [Wed, 17 May 2023 01:26:53 +0000 (11:26 +1000)]
gallivm: fix whitespace in get_deref_offset
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
Dave Airlie [Tue, 16 May 2023 21:09:44 +0000 (07:09 +1000)]
lvp: explictly skip compute shader stage.
To add mesh/task later we have to loop over more stages the other side
of compute. So explicitly skip compute for now.
This has a couple of subtle bits to it, and I think there might be a bug
in pre rast
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
Dave Airlie [Tue, 16 May 2023 20:56:36 +0000 (06:56 +1000)]
lavapipe: add lavapipe specific shader stages define.
This currently does nothing, but we need to increase this to add
task/mesh later.
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
Dave Airlie [Tue, 16 May 2023 20:50:30 +0000 (06:50 +1000)]
llvmpipe/cs: support passing a csctx instead of using implicit one
This is just some refactoring to make adding mesh shaders easier
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
Dave Airlie [Tue, 16 May 2023 20:48:04 +0000 (06:48 +1000)]
llvmpipe/cs: start making variant generator less compute specific
This is just some refactoring prior to task/mesh shaders
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
Dave Airlie [Tue, 16 May 2023 20:42:32 +0000 (06:42 +1000)]
llvmpipe: convert a bunch of shader_type ifs to switches.
This makes it easier to add mesh shader support later
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
Dave Airlie [Tue, 16 May 2023 20:23:50 +0000 (06:23 +1000)]
gallivm/draw: refactor vertex header jit type out
mesh shaders will want access to this as well so start moving it to
common code.
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
Gert Wollny [Tue, 23 May 2023 04:32:43 +0000 (06:32 +0200)]
virgl/ci: uprev virglrenderer
Update DEBIAN_BASE_TAG and KERNEL_ROOTFS_TAG
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23121>
Gert Wollny [Fri, 19 May 2023 05:44:31 +0000 (07:44 +0200)]
virgl: Add support for ARB_pipeline_statistics
v2: make sure the PIPE enums map corretly to the VIRGL enums (Tintou)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23121>
Gert Wollny [Tue, 23 May 2023 07:52:13 +0000 (09:52 +0200)]
virgl: Make query result resource as dirty before requesting result
The query result resource will be written to by the host, so we have to
declare it as dirty if we want to see the change.
Fixes:
9279a28f0 (virgl: ARB_query_buffer_object support)
v2: Update expectations in CI
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23121>
norablackcat [Sat, 20 May 2023 15:06:02 +0000 (09:06 -0600)]
rusticl/device: implement cl_khr_device_uuid
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Andrey Alekseenko <al42and@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23147>
norablackcat [Sat, 20 May 2023 15:05:36 +0000 (09:05 -0600)]
rusticl/screen: implement uuid wrapper funcs
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Andrey Alekseenko <al42and@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23147>
Karol Herbst [Wed, 17 May 2023 23:22:51 +0000 (01:22 +0200)]
rusticl/spirv: skip printing info messages
Those are quite spammy and add no value.
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23091>
Lionel Landwerlin [Fri, 19 May 2023 08:10:01 +0000 (11:10 +0300)]
intel/fs: fix size_read() for LOAD_PAYLOAD
With Anv/Zink, the piglit test :
arb_shader_storage_buffer_object-max-ssbo-size -auto -fbo fsexceed
is failing validation after copy propagation :
load_payload(8) vgrf15:F, vgrf1+0.12<0>:F, vgrf1+0.0<0>:F, vgrf1+0.4<0>:F, vgrf1+0.8<0>:F, vgrf1+0.12<0>:F
../src/intel/compiler/brw_fs_validate.cpp:191: A <= B failed
A = inst->src[i].offset / REG_SIZE + regs_read(inst, i) = 2
B = alloc.sizes[inst->src[i].nr] = 1
In most cases it works because src[0] would be at offset 0 and so
reading a full reg passes validation, but Anv/Zink started emitting
slightly different code adding an offset maybe the size read 2 GRFs.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23126>
Tatsuyuki Ishi [Fri, 7 Apr 2023 09:34:17 +0000 (18:34 +0900)]
nir: Fix serializing pointer initializers.
Found by manual inspection.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes:
7acc81056f7 ("compiler/nir: Add support for variable initialization from a pointer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22355>
Eric Engestrom [Tue, 23 May 2023 11:35:18 +0000 (12:35 +0100)]
ci: disable anholt's farm
Its http cache proxy has been returning `curl: (52) Empty reply from
server` for a while and rebooting it didn't help, so turn it off for now.
Suggested-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Eric Engestrom <eric@igalia.com>
Alejandro Piñeiro [Mon, 22 May 2023 22:20:11 +0000 (00:20 +0200)]
v3d: remove v3d_get_internal_type_bpp_for_output_format
This is a one-line wrapper, so let's just use the v3d_X or v3dX macros
instead.
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23172>
Alejandro Piñeiro [Mon, 22 May 2023 22:11:58 +0000 (00:11 +0200)]
v3d: remove v3d_tfu_supports_tex_format
This is a one-line wrapper, so let's just use the v3d_X or v3dX macros
instead.
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23172>
Alejandro Piñeiro [Mon, 22 May 2023 22:06:45 +0000 (00:06 +0200)]
v3d: remove v3d_create_texture_shader_state_bo
This is a one-line wrapper, so let's just use the v3d_X or v3dX macros
instead.
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23172>
Alejandro Piñeiro [Mon, 22 May 2023 21:39:10 +0000 (23:39 +0200)]
v3d: use more an auxiliar devinfo
Improve readability by using an auxiliar
struct v3d_device_info *devinfo = &screen->devinfo;
this was triggered by the use of the v3d_X macro, where just having a
devinfo makes is more friendly. As we are here, we used it on other
places of the code.
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23172>
Iago Toral Quiroga [Wed, 20 Oct 2021 09:25:23 +0000 (11:25 +0200)]
v3dv: simplify too small Z viewport scale workaround
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23167>
Alejandro Piñeiro [Wed, 23 Jun 2021 21:57:52 +0000 (23:57 +0200)]
v3dv/pipeline: don't prepack up early-z configuration
False (so zero) is already the default value, so those prepacks are
basically superfluous.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23167>
Juan A. Suarez Romero [Fri, 19 May 2023 09:53:54 +0000 (11:53 +0200)]
v3d/ci: make traces test mandatory
Similar to other drivers, let's run always the traces tests.
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23135>
Juan A. Suarez Romero [Fri, 19 May 2023 09:52:18 +0000 (11:52 +0200)]
v3d/ci: run GPU piglit profile
Instead of running all the tests, run only the GPU related ones, which
should make the CI faster.
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23135>
Samuel Pitoiset [Mon, 22 May 2023 10:51:45 +0000 (12:51 +0200)]
radv: apply a bug workaround for smoothing on GFX6
This fixes smooth lines on GFX6.
Fixes:
85cbdba3559 ("radv: add support for smooth lines")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23168>
Mike Blumenkrantz [Wed, 10 May 2023 12:51:10 +0000 (08:51 -0400)]
zink: infer types from load_const instrs to avoid more bitcasts
this walks to uses list for the ssa def to infer a type from one of the
uses to reduce the need to bitcast
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
Mike Blumenkrantz [Tue, 9 May 2023 15:26:04 +0000 (11:26 -0400)]
zink: store and use alu types for ntv defs
this adds indexing for ssa/reg defs with the accompanying current
type of a given def (inaccurate for objects but whatever), enabling
that type to be used directly in order to avoid bitcasts in some places
this upends the assumption that all stored srcs are uint type
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
Mike Blumenkrantz [Tue, 9 May 2023 19:11:33 +0000 (15:11 -0400)]
zink: dynamically emit non-bool register values using local_vars spirv buffer
this will be useful in a future commit
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
Mike Blumenkrantz [Tue, 9 May 2023 18:35:15 +0000 (14:35 -0400)]
zink: write out register variables to a separate spirv buffer
this will enable registers to be written more dynamically with correct
type values to cut down on bitcasts
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
Mike Blumenkrantz [Tue, 9 May 2023 18:29:02 +0000 (14:29 -0400)]
zink: manually memcpy the spirv instruction buffer
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
Mike Blumenkrantz [Tue, 9 May 2023 15:24:30 +0000 (11:24 -0400)]
zink: move get_alu_type() up in file
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
Mike Blumenkrantz [Tue, 9 May 2023 15:20:11 +0000 (11:20 -0400)]
zink: use void return for store_dest
not sure why this had returns, but it doesn't seem necessary
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
Mike Blumenkrantz [Tue, 9 May 2023 14:37:28 +0000 (10:37 -0400)]
zink: delete unnecessary bitcast in load_shared/scratch
if the mem is loaded as uint and stored as uint, then
the loaded and stored value must be uint, so a bitcast to uint
is as pointless as this commit message
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
Mike Blumenkrantz [Thu, 11 May 2023 13:35:39 +0000 (09:35 -0400)]
zink: also declare int size caps inline with signed int type usage
Fixes:
854fd242faf ("zink: declare int/float size caps inline with type usage")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
Mike Blumenkrantz [Tue, 16 May 2023 14:03:28 +0000 (10:03 -0400)]
zink: promote flushed clears to unordered cmdbuf when possible
this reuses the unordered_blitting codepath for fb clears
for #9016
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23056>
Mike Blumenkrantz [Tue, 18 Apr 2023 13:18:55 +0000 (09:18 -0400)]
vk/graphics_state: handle null pipeline state structs in creation
when these members are null, the corresponding graphics states should be
initialized with sensible default values
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22236>
Mike Blumenkrantz [Fri, 31 Mar 2023 12:39:04 +0000 (08:39 -0400)]
anv: more correctly handle null pipeline states
it's not necessary to check whether dynamic states are set before
the null checks since any issues there would be VU errors
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22236>
Mike Blumenkrantz [Fri, 31 Mar 2023 12:39:04 +0000 (08:39 -0400)]
lavapipe: more correctly handle null pipeline states
it's not necessary to check whether dynamic states are set before
the null checks since any issues there would be VU errors
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22236>
Mike Blumenkrantz [Mon, 15 May 2023 13:24:48 +0000 (09:24 -0400)]
zink: flag 'has_work' on batch when promoting a cmd
has_work controls whether a flush can be deferred, i.e., when unset
a flush may be deferred
since a promoted cmd must still be flushed to take effect, ensure this
is always set when promoted cmds are pending
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
Mike Blumenkrantz [Mon, 15 May 2023 11:56:50 +0000 (07:56 -0400)]
zink: explicitly disable promotion on images that are both unflushed and non-reorderable
until #9016 is resolved, be more cautious and consider any image with unflushed
access as un-promotable to avoid layout desync
affects:
KHR-GLES3.packed_pixels.varied_rectangle.rgb
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
Mike Blumenkrantz [Mon, 15 May 2023 11:26:01 +0000 (07:26 -0400)]
zink: explicitly disable reordering after restricted swapchain readback blits
when needs_present_readback is set, reordering is disabled without hitting
the path that would normally disable promotion for the resource, so this
needs to be changed manually to avoid layout desync on the swapchain
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
Mike Blumenkrantz [Mon, 15 May 2023 11:24:02 +0000 (07:24 -0400)]
zink: disable unordered blits when swapchain images need aqcuire
this is consistent with other cmdbuf reordering for blits
Fixes:
3a9f7d70383 ("zink: implement unordered u_blitter calls")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
Mike Blumenkrantz [Fri, 12 May 2023 16:26:52 +0000 (12:26 -0400)]
zink: track/check submit info on resource batch usage
resources use a private refcount to avoid overhead from atomics on
descriptor binds, but this has the side effect of evading batch usage,
meaning that the usage may not be properly removed once the batch state
is reset, which will cause issues with detecting whether usage exists
for a given resource
to fix this, the mechanism for tc fence disambiguation can be reused,
namely adding the batch state's submit count to the usage info and
then using that to add a second set of comparisons such that it becomes
possible to check both whether the batch usage for a resource matches
a given batch AND whether the batch usage is the current state of the
batch
affects:
KHR-GLES3.copy_tex_image_conversions.required.cubemap_posy_cubemap_negz
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>