Patrick Delaunay [Thu, 30 Jun 2022 08:20:21 +0000 (10:20 +0200)]
configs: stm32mp13: activate RTC support
Activate the RTC driver in STM32MP13x config.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 30 Jun 2022 08:20:20 +0000 (10:20 +0200)]
configs: stm32mp13: activate RNG support
Activate the RNG driver provided by OP-TEE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 30 Jun 2022 08:20:19 +0000 (10:20 +0200)]
configs: stm32mp13: Add support for baudrates higher than 115200
On STM32MP13x STMicroelectronics boards, the UART can reliably go up to
4000000 bauds when connected to the external ST-LINKV3.
This patch adds the support of higher baudrates on STMicroelectronics
STM32MP13x boards with ST-LINKV3.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 30 Jun 2022 08:20:18 +0000 (10:20 +0200)]
ARM: dts: stm32mp13: activate led on STM32MP13F-DK
Activate the led managed in stm32mp1 board for U-Boot indication
in STM32MP13F-DK device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 30 Jun 2022 08:20:17 +0000 (10:20 +0200)]
ARM: dts: stm32mp13: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1 with:
- ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
- ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
- ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
- ARM: dts: stm32: enable RTC support on stm32mp135f-dk
- ARM: dts: stm32: add RTC node on stm32mp131
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 30 Jun 2022 08:20:16 +0000 (10:20 +0200)]
stm32mp: add support of STM32MP13x Rev.Y
Add support of STM32MP13x Rev.Y for the Silicon revision REV_ID = 0x1003.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Lionel Debieve [Thu, 30 Jun 2022 08:20:15 +0000 (10:20 +0200)]
rng: stm32mp1_rng: add conditional reset feature for STM32MP13x
New IP adds a conditional reset that impact the clock
error management. It is now linked to a new compatible.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 30 Jun 2022 08:20:14 +0000 (10:20 +0200)]
i2c: stm32: add support for the st,stm32mp13 SOC
The stm32mp13 soc differs from the stm32mp15 in terms of
clear register offset for controlling the FMP (Fast Mode Plus).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Tue, 5 Jul 2022 14:55:57 +0000 (16:55 +0200)]
ARM: dts: stm32: add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
Add a "secure" version of STM32 boards based on SCMI when RCC_TZCR.TZEN=1.
Only boards provided by STMicroelectronics are concerned:
-STM32MP157A-DK1
-STM32MP157C-DK2
-STM32MP157C-ED1
-STM32MP157C-EV1
The resources secured by RCC_TZCR.TZEN=1 are managed by OP-TEE
and the associated SCMI services, reset and clock.
These device trees are only supported with stm32mp15_defconfig,
with OP-TEE, SCMI and without SPL support.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Tue, 5 Jul 2022 14:55:56 +0000 (16:55 +0200)]
configs: stm32mp15: increase malloc size for pre-reloc
With support of SCMI in OP-TEE, the early malloc usage
increase, the associated defined CONFIG_SYS_MALLOC_F_LEN
need to be increased.
For example, for stm32mp15_defconfig and
stm32mp157c-dk2-scmi.dtsi, we have:
Early malloc usage: 14098 / 80000
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Tue, 5 Jul 2022 14:55:55 +0000 (16:55 +0200)]
clk: stm32: add support compatible st, stm32mp1-rcc-secure
Add support for new compatible st,stm32mp1-rcc-secure used when the
RCC resource is managed by secured world (RCC_TZCR.TZEN=1)
iand when SCMI is used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Tue, 5 Jul 2022 14:55:54 +0000 (16:55 +0200)]
ARM: dts: stm32mp15: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1
- ARM: dts: stm32: Add alternate pinmux for ethernet0 pins
- ARM: dts: stm32: Add alternate pinmux for mco2 pins
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
- ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
- dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
- dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
- dt-bindings: clock: stm32mp15: rename CK_SCMI define
- dt-bindings: reset: stm32mp15: rename RST_SCMI define
- dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains
on stm32mp15
- dt-bindings: clk: cleanup comments
- ARM: dts: align SPI NOR node name with dtschema
- ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
- ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
stm32mp15
+ patch from stm32-dt-for-v5.19-fixes-2
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
stm32mp15
- ARM: dts: stm32: fix pwr regulators references to use scmi
- ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
- ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
- ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
- ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 30 Jun 2022 08:01:47 +0000 (10:01 +0200)]
mmc: stm32_sdmmc2: introduce of_to_plat ops
Add the uclass ops of_to_plat to parse the device tree properties
to respect the expected sequence by the driver model.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 30 Jun 2022 08:01:46 +0000 (10:01 +0200)]
mmc: stm32_sdmmc2: remove privdata
All the elements of privdata are static and build from device tree,
they are moved in platdata to prepare the support of ops
of_to_plat.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 30 Jun 2022 08:01:45 +0000 (10:01 +0200)]
mmc: stm32_sdmmc2: cosmetic: rename stm32_sdmmc_bind
Rename stm32_sdmmc_bind to stm32_sdmmc2_bind as all other functions
in SDMMCv2 driver
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ic51acdfbbba6e971809c1029dd2227038bfe879d
Patrick Delaunay [Wed, 6 Jul 2022 16:20:25 +0000 (18:20 +0200)]
ARM: dts: stm32mp13: add SCMI nodes
Add the node for SCMI firmware with the associated reserved memory nodes
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Wed, 6 Jul 2022 16:20:24 +0000 (18:20 +0200)]
ARM: dts: stm32mp13: add OP-TEE nodes
Add the node for OP-TEE firmware with the associated reserved memory nodes
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 11 Jul 2022 17:45:50 +0000 (19:45 +0200)]
configs: stm32m15: support STM32MP_BOARD_EXTRA_ENV for st boards
Correctly handle STM32MP_BOARD_EXTRA_ENV define in stm32mp15_st_common.h;
the STM32MP_BOARD_EXTRA_ENV is added in CONFIG_EXTRA_ENV_SETTINGS
definition, as it is done "stm32mp15_st_common.h"
Without this patch, the content of STM32MP_BOARD_EXTRA_ENV is not used in
the default environment for STMicroelectronics boards.
Fixes:
806c4dd31532 ("configs: stm32mp1: set the console variable for extlinux.conf")
Reported-by: Gatien CHEVALLIER <gatien.chevallier@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Fri, 8 Jul 2022 21:57:39 +0000 (17:57 -0400)]
Merge branch '2022-07-08-Kconfig-migrations' into next
- Another small round of CONFIG migrations to Kconfig
Tom Rini [Mon, 27 Jun 2022 17:35:51 +0000 (13:35 -0400)]
powerpc: Use the poison value of 0xdeadbeef directly in DDR init
On p1_p2_rdb_pc platforms, we set ddr_data_init to the "poison" value of
0xdeadbeef rather than a real calculated / derived value. Do this
directly and comment rather than via CONFIG.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 27 Jun 2022 17:35:50 +0000 (13:35 -0400)]
i2c: Remove non-DM_I2C support from davinci_i2c.c
As the migration deadline has passed, and all platforms have been
migrated, remove the non-DM code here.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 27 Jun 2022 17:35:49 +0000 (13:35 -0400)]
legoev3: Migrate to DM_I2C
Perform a basic migration of the calls in setup_serial_number() to DM so
that we can switch to using DM_I2C on this platform.
Cc: David Lechner <david@lechnology.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: David Lechner <david@lechnology.com>
Tom Rini [Mon, 27 Jun 2022 17:35:48 +0000 (13:35 -0400)]
omap3: emif4: More clearly hard-code cs0 size
We have a single platform that is both in the OMAP3 family of parts, but
has an EMIF4 memory controller. Currently we hard-code the size of
chip select 0. Make this more clear by putting the value in the
function rather than a CONFIG option.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 27 Jun 2022 17:35:47 +0000 (13:35 -0400)]
arm: Remove strongarm support
There are no platforms using this architecture anymore, remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 27 Jun 2022 17:35:46 +0000 (13:35 -0400)]
Convert CONFIG_SYS_CACHE_STASHING to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_CACHE_STASHING
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 8 Jul 2022 19:23:05 +0000 (15:23 -0400)]
requirements: Move to atomicwrites==1.4.1
As explained upstream:
https://github.com/untitaker/python-atomicwrites/issues/61 there is no
longer a 1.3.0 version but the API is unchanged. Move to 1.4.1.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 8 Jul 2022 18:39:07 +0000 (14:39 -0400)]
Merge tag 'dm-pull-28jun22' of https://source.denx.de/u-boot/custodians/u-boot-dm into next
nman external-symbol improvements
Driver model memory-usage reporting
patman test-reporting improvements
Add bloblist design goals
Tom Rini [Fri, 8 Jul 2022 16:38:03 +0000 (12:38 -0400)]
Merge branch '2022-07-08-assorted-updates' into next
- Assorted bugfixes and improvements
Marek Vasut [Sat, 25 Jun 2022 17:58:24 +0000 (19:58 +0200)]
board_init: Do not reserve MALLOC_F area on stack if non-zero MALLOC_F_ADDR
In case the MALLOC_F_ADDR is set to non-zero value, the early malloc area is
not going to be placed just below stack top, but elsewhere. Do not reserve
MALLOC_F bytes in this case, as that wastes stack space and may even cause
insufficient stack space in SPL.
This functionality is particularly useful on i.MX8M, where the insufficient
stack space can be triggered.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Tom Rini <trini@konsulko.com>
Ralph Siemsen [Fri, 24 Jun 2022 15:19:15 +0000 (11:19 -0400)]
regmap: fix some comments
Correct spelling and copy/paste errors in comments.
Fixes
1c4db59d9b ("regmap: Add support for regmap fields")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Thu, 23 Jun 2022 12:13:56 +0000 (14:13 +0200)]
serial: ns16550: Wait in debug_uart_init until tx buffer is empty
Commit
d293759d55cc ("serial: ns16550: Add support for
SPL_DEBUG_UART_BASE") fixed support for setting correct early debug UART
base address in SPL.
But after this commit, output from Marvell A385 BootROM is truncated or
lost and not fully present on serial console.
Debugging this issue showed that BootROM just put bytes into UART HW output
buffer and does not wait until UART HW transmit all characters. U-Boot
ns16550 early debug is initialized very early and during its initialization
is resetting UART HW and flushing remaining transmit buffer (which still
contains BootROM output).
Fix this issue by waiting in init function prior resetting UART HW until
TxEmpty bit in UART Line Status Register is set. TxEmpty is set when all
remaining bytes from HW buffer are transmitted.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Add comment, move ';' to new line per checkpatch.pl]
Signed-off-by: Tom Rini <trini@konsulko.com>
Stefan Herbrechtsmeier [Thu, 23 Jun 2022 09:25:29 +0000 (11:25 +0200)]
led: pwm: Use NOP uclass driver for top-level node
The top level DT node of pwm-leds is not a LED itself, bind NOP uclass
driver to it, and bind different LED uclass driver to its subnodes which
represent the actual LEDs. This change removes the top-level node from
the 'led list' command output and is based on the commit
01074697801b
("led: gpio: Use NOP uclass driver for top-level node").
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Kory Maincent [Wed, 22 Jun 2022 09:11:45 +0000 (11:11 +0200)]
mtd: rawnand: Add support to dedicated function to set timings
With the current code if the board has an ONFI compliant NAND without
support to the get and set features, U-boot returns an ENOTSUP error when
trying to tune the timings which prevents the probe of the device.
Indeed onfi_set_features() return ENOTSUP error if set/get features is not
supported. In the case of timings we should not return ENOTSUP because we
can use the default timings. The NAND is already capable of listening at
its highest supported rate, so we assume in this case that it is fine to
skip the operation.
Fix it by adding an intermediate nand_onfi_set_timings() function which
does not error out if set/get feature is not supported.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Rafał Miłecki [Thu, 16 Jun 2022 18:59:03 +0000 (20:59 +0200)]
fw_env: add fallback to Linux's NVMEM based access
A new DT binding for describing environment data block has been added in
Linux's commit
5db1c2dbc04c ("dt-bindings: nvmem: add U-Boot environment
variables binding"). Once we get a proper Linux NVMEM driver it'll be
possible to use Linux's binary interface for user-space as documented
in the:
https://www.kernel.org/doc/html/latest/driver-api/nvmem.html
This commits makes fw_env fallback to looking for a compatible NVMEM
device in case config file isn't present. In a long term this may make
config files redundant and avoid code (info) duplication.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Heinrich Schuchardt [Thu, 16 Jun 2022 11:43:50 +0000 (13:43 +0200)]
Makefile: respect CONFIG_CC_OPTIMIZE_FOR_DEBUG for host tools
If CONFIG_CC_OPTIMIZE_FOR_DEBUG=y, the host tools should be built with
debug symbols and with reduced optimization.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sun, 12 Jun 2022 13:15:34 +0000 (13:15 +0000)]
sound: enable building DA7219 driver with ACPIGEN=n
sandbox_defconfig builds the DA7219 driver. It should be possible to
build the sandbox without ACPI support.
ACPI support in the DA7219 driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.
Fixes:
0324b7123e22 ("sound: Add an ACPI driver for Dialog Semicondutor da7219")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 12 Jun 2022 13:13:05 +0000 (13:13 +0000)]
snd: enable building max98357a driver with ACPIGEN=n
sandbox_defconfig builds the max98357a driver. It should be possible to
build the sandbox without ACPI support.
ACPI support in the max98357a driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.
Fixes:
54bcca29737f ("sound: Add an ACPI driver for Maxim MAX98357ac")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 12 Jun 2022 12:28:22 +0000 (12:28 +0000)]
test: fix CONFIG_ACPIGEN dependencies
Some tests cannot be built with CONFIG_ACPIGEN=n. Consider this in the
Makefile.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Pali Rohár [Tue, 31 May 2022 08:32:36 +0000 (10:32 +0200)]
distroboot: Fix ubifs
Fix multiple issues in ubifs distroboot code:
U-Boot supports attaching only one MTD device as UBI at the time. So
always call 'ubifsmount ubi0:${bootubivol}' for mounting UBI volume
${bootubivol}. Usage of 'ubi${devnum}' is incorrect as 'ubi part'
command attach MTD device always as UBI device ubi0.
Set distroboot ${bootfstype} variable to ubifs in ubifs_boot command.
Distroboot scripts require ${bootfstype} variable to be properly set and it
is already set for all other boot types.
Set distroboot ${distro_bootpart} variable to ${bootubivol} value. UBI
device does not have partitions, but has volumes. Distroboot scripts
require something to be set in ${distro_bootpart} variable, so set it to
the UBI volume which is currently mounted by ubifs.
Set distroboot ${devnum} variable to fixed string "ubi0". ubifs code
differs from the other partition code that it requires "ubi" prefix before
number.
Explicitly unmount ubifs volume after loading all data from it. This allows
to detach UBI device from MTD device.
Move definition of MTD device with UBI and UBI volume with ubifs filesystem
from global env variables ${bootubipart} and ${bootubivol} into the
distroboot "func" macro, defined in board include config files. UBIFS
distroboot macros then set ${bootubipart} and ${bootubivol} local variables
for compatibility with existing distroboot scripts.
This last change allows to define more UBIFS target devices and make it
clear what is boot MTD/UBI device.
All board include config files are adjusted to use this new scheme of
specifying boot MTD/UBI device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Pali Rohár [Mon, 30 May 2022 09:09:11 +0000 (11:09 +0200)]
ubifs: Fix reference count leak in ubifsumount
Original ubifs code was designed that after ubifs_umount() call it is
required to also call ubi_close_volume() which closes underlying UBI
volume. But U-Boot ubifs modification have not implemented it properly
which caused that ubifsumount command contains resource leak. It can be
observed by calling simple sequence of commands:
=> ubi part mtd2
ubi0: attaching mtd2
...
=> ubifsmount ubi0
=> ubifsumount
Unmounting UBIFS volume rootfs!
=> ubi detach
ubi0 error: ubi_detach_mtd_dev: ubi0 reference count 1, destroy anyway
ubi0: detaching mtd2
ubi0: mtd2 is detached
Fix this issue by calling ubi_close_volume() and mutex_unlock() in
directly in ubifs_umount() function before freeing U-Boot's global
ubifs_sb. And remove duplicate calls of these two functions in remaining
places. Note that when ubifs_umount() is not called then during error
handling is still needed to call ubi_close_volume() and mutex_unlock.
With this change ubifsumount command does not throw that error anymore:
=> ubi part rootfs
ubi0: attaching mtd2
...
=> ubifsmount ubi0
=> ubifsumount
Unmounting UBIFS volume rootfs!
=> ubi detach
ubi0: detaching mtd2
ubi0: mtd2 is detached
Signed-off-by: Pali Rohár <pali@kernel.org>
Rogier Stam [Wed, 11 May 2022 21:20:28 +0000 (23:20 +0200)]
Add SCSI scan for ENV in EXT4 or FAT
When having environment stored in EXT4 or FAT
and using an AHCI or SCSI device / partition
the scan would not be performed early enough
and hence the device would not be recognized.
This change adds the scan when the interface
is "scsi" in a similar way to mmc_initialize.
Signed-off-by: Rogier Stam <rogier@unrailed.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Tom Rini [Thu, 7 Jul 2022 18:12:07 +0000 (14:12 -0400)]
Merge branch '2022-07-07-Kconfig-migrations-dead-code-removal' into next
- Migrate more CONFIG options to Kconfig and remove some unused code
while we're at it.
Tom Rini [Sat, 25 Jun 2022 23:29:46 +0000 (19:29 -0400)]
Convert CONFIG_SYS_BOOTM_LEN to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_BOOTM_LEN
As part of this, rework error handling in boot/bootm.c so that we pass
the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not
be available to host tools but we do know the size that we passed to
malloc().
Cc: Soeren Moch <smoch@web.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:49 +0000 (11:02 -0400)]
Convert CONFIG_SYS_BOOTCOUNT_LE et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_BOOTCOUNT_LE
CONFIG_SYS_BOOTCOUNT_BE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:48 +0000 (11:02 -0400)]
kmcoge5ne: Move BFTIC3 CONFIG references to their usage
We only reference CONFIG_SYS_BFTIC3_BASE in one location. Move the
comment to where we reference it, and use the value directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Sat, 25 Jun 2022 15:02:47 +0000 (11:02 -0400)]
mx*sabresd: Reference CONFIG_SYS_AUXCORE_BOOTDATA value directly
As this is used in the environment, reference it directly rather than as
a CONFIG value.
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:46 +0000 (11:02 -0400)]
Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_BOOT_RAMDISK_HIGH
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:45 +0000 (11:02 -0400)]
Convert CONFIG_SYS_FSL_CPC et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_CPC
CONFIG_SYS_CPC_REINIT_F
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:44 +0000 (11:02 -0400)]
Convert CONFIG_SYS_RAMBOOT to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_RAMBOOT
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:43 +0000 (11:02 -0400)]
Convert CONFIG_SYS_BOOK3E_HV to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_BOOK3E_HV
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:42 +0000 (11:02 -0400)]
arm: Remove PXA architecture support
With the last platform for this architecture removed, remove the rest of
the architecture support as well.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sat, 25 Jun 2022 15:02:41 +0000 (11:02 -0400)]
Convert CONFIG_SYS_83XX_DDR_USES_CS0 to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_83XX_DDR_USES_CS0
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:40 +0000 (11:02 -0400)]
thunerx_88xx: Clean up config slightly.
We don't use CONFIG_SYS_64BIT anywhere and can use
CONFIG_TARGET_THUNDERX_88XX to build the device trees.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:38 +0000 (11:02 -0400)]
Convert CONFIG_PALMAS_POWER to Kconfig
This converts the following to Kconfig:
CONFIG_PALMAS_POWER
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:37 +0000 (11:02 -0400)]
Convert CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:36 +0000 (11:02 -0400)]
Convert CONFIG_SYS_DISCOVER_PHY to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_DISCOVER_PHY
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:35 +0000 (11:02 -0400)]
Convert CONFIG_SYS_UNIFY_CACHE to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_UNIFY_CACHE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:34 +0000 (11:02 -0400)]
layerscape: Remove some unused CONFIG symbols
All of these symbols are not referenced anywhere else in the code, so
remove them.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:33 +0000 (11:02 -0400)]
usb: Remove some unused CONFIG settings
On platforms that use CONFIG_USB_OHCI_NEW we do not need to set
CONFIG_SYS_USB_OHCI_REGS_BASE nor CONFIG_SYS_USB_OHCI_SLOT_NAME. Drop
these from platforms that we can.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:32 +0000 (11:02 -0400)]
usb: ohci-hcd: Remove some unused legacy code
At this point, the only user of ohci-hcd that also uses PCI is using DM,
so we can drop CONFIG_PCI_OHCI* usage. No platforms set either of
CONFIG_SYS_USB_OHCI_BOARD_INIT or CONFIG_SYS_USB_OHCI_CPU_INIT so those
hooks can be removed as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:31 +0000 (11:02 -0400)]
Convert CONFIG_USB_OHCI_NEW et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_OHCI_SWAP_REG_ACCESS
CONFIG_SYS_USB_OHCI_CPU_INIT
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_OHCI_SLOT_NAME
CONFIG_USB_ATMEL
CONFIG_USB_ATMEL_CLK_SEL_PLLB
CONFIG_USB_ATMEL_CLK_SEL_UPLL
CONFIG_USB_OHCI_LPC32XX
CONFIG_USB_OHCI_NEW
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 03:03:09 +0000 (23:03 -0400)]
spl: Ensure all SPL symbols in Kconfig have some SPL dependency
Tighten up symbol dependencies in a number of places. Ensure that a SPL
specific option has at least a direct dependency on SPL. In places
where it's clear that we depend on something more specific, use that
dependency instead. This means in a very small number of places we can
drop redundant dependencies.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 03:03:00 +0000 (23:03 -0400)]
Convert CONFIG_USB_XHCI_EXYNOS et al to Kconfig
This converts the following to Kconfig:
CONFIG_USB_XHCI_EXYNOS
CONFIG_USB_EHCI_EXYNOS
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 6 Jul 2022 22:54:29 +0000 (18:54 -0400)]
Merge branch '2022-07-06-platform-updates' into next
- Assorted updates for Toradex, TI, Aspeed and Nuvoton platforms
Jim Liu [Fri, 24 Jun 2022 08:24:37 +0000 (16:24 +0800)]
misc: nuvoton: Add host interface configuration driver
add nuvoton BMC npcm750 host configuration driver
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Joel Stanley [Wed, 29 Jun 2022 07:05:25 +0000 (16:35 +0930)]
CI: Add Aspeed AST2600
The AST2600 has a Qemu model that allows testing. Create a SPI NOR image
containing the combined SPL and u-boot FIT image.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:24 +0000 (16:35 +0930)]
aspeed/spl: Remove OVERLAY from linker script
The generic arm linker script contains this section:
.bss __rel_dyn_start (OVERLAY) : {
...
}
The (OVERLAY) syntax in the description causes the .bss section to be
included in the NOR area of the image:
$ objdump -t -j .bss spl/u-boot-spl
SYMBOL TABLE:
0000c61c l d .bss
00000000 .bss
0000c640 l O .bss
00000040 __value.0
0000c68c g O .bss
00000000 __bss_end
0000c61c g O .bss
00000000 __bss_start
0000c680 g O .bss
0000000c stdio_devices
This is what the custom linker script tries to avoid, as the NOR area is
read-only.
Remove the OVERLAY syntax to fix the BSS location:
$ objdump -t -j .bss spl/u-boot-spl
SYMBOL TABLE:
83000000 l d .bss
00000000 .bss
83000000 l O .bss
00000040 __value.0
0000c61c g O .bss
00000000 __image_copy_end
8300004c g O .bss
00000000 __bss_end
83000000 g O .bss
00000000 __bss_start
83000040 g O .bss
0000000c stdio_devices
This restores the state of the linker script before the patch that fixed
the linker lists issue.
Fixes:
f6810b749f2e ("aspeed/ast2600: Fix SPL linker script")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:23 +0000 (16:35 +0930)]
ast2600: Configure u-boot-with-spl.bin target
The normal way of loading u-boot is as a FIT, so configure u-boot.img as
the SPL playload.
The u-boot-with-spl.bin target will add padding according to
CONFIG_SPL_MAX_SIZE which defaults to 64KB on the AST2600.
With this the following simple steps can be used to build and boot a
system:
make u-boot-with-spl.bin
truncate -s 64M u-boot-with-spl.bin
qemu-system-arm -nographic -M ast2600-evb \
-drive file=u-boot-with-spl.bin,if=mtd,format=raw
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:22 +0000 (16:35 +0930)]
spl: Set SPL_MAX_SIZE default for AST2600
The AST2600 bootrom has a max size of 64KB. This can be overridden if the
system is running the SPL from SPI NOR and not using secure boot.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:21 +0000 (16:35 +0930)]
config/ast2600: Disable hash hardware accel
The HACE driver lacks support for all the hash types, causing boot to
fail with the default FIT configuration which uses CRC32.
Additionally the Qemu model or the u-boot driver is unable to correctly
compute the SHA256 hash used in a FIT.
Disable HACE by default while the above issues are worked out to enable
boot testing in Qemu.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:20 +0000 (16:35 +0930)]
config/ast2600: Make position independent
Allows loading one u-boot from another. Useful for testing on hardware.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:19 +0000 (16:35 +0930)]
config/ast2600: Enable CRC32
Useful for testing images with the default hash type.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:36 +0000 (18:35 +0930)]
config/ast2600: Enable eMMC related boot options
Allow booting zImage from ext4 devices with DOS or UEFI partition
layouts.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:35 +0000 (18:35 +0930)]
mmc/aspeed: Enable controller clocks
Request and enable the controller level clocks.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:34 +0000 (18:35 +0930)]
mmc/aspeed: Probe from controller
The Aspeed SDHCI controller is arranged with some shared control
registers, followed by one or two sets of actual SDHCI registers.
Adjust the driver to probe this controller device first. The driver then
wants to iterate over the child nodes to probe the SDHCI proper:
ofnode node;
dev_for_each_subnode(node, parent) {
struct udevice *dev;
int ret;
ret = device_bind_driver_to_node(parent, "aspeed_sdhci",
ofnode_get_name(node),
node, &dev);
if (ret)
return ret;
}
However if we did this the sdhci driver would probe twice; once
"naturally" from the device tree and a second time due to this code.
Instead of doing this we can rely on the probe order, where the
controller will be set up before the sdhci devices. A better solution is
preferred.
Select MISC as the controller driver is implemented as a misc device.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:33 +0000 (18:35 +0930)]
mmc/aspeed: Add debuging for clock probe failures
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:32 +0000 (18:35 +0930)]
clk/ast2500: Add SD clock
In order to use the clock from the sdhci driver, add the SD clock.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:31 +0000 (18:35 +0930)]
clk/ast2600: Adjust eMMC clock names
Adjust clock to stay compatible with those used by the Linux kernel
device tree.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:30 +0000 (18:35 +0930)]
clk/aspeed: Add debug message when clock fails
A common message across platforms that prints the clock number.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:29 +0000 (18:35 +0930)]
ARM: dts: ast2500: Update SDHCI nodes
Match the description used by the Linux kernel, except use scu instead
of syscon as the phandle.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:28 +0000 (18:35 +0930)]
ARM: dts: ast2600: Update SDHCI nodes
Match the description used by the Linux kernel, except use scu instead
of syscon as the phandle.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 05:10:41 +0000 (14:40 +0930)]
config/aspeed: Enable EEPROM options
To allow testing of the I2C driver, enable the eprom command and the
misc driver.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 05:10:40 +0000 (14:40 +0930)]
config/ast2600: Enable I2C driver
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 05:10:39 +0000 (14:40 +0930)]
i2c/aspeed: Add AST2600 compatible
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Joel Stanley [Thu, 23 Jun 2022 05:10:38 +0000 (14:40 +0930)]
i2c/aspeed: Fix reset control
The reset control was written for the ast2500 and directly programs the
clocking register.
So we can share the code with other SoC generations use the reset device
to deassert the I2C reset line.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Joel Stanley [Thu, 23 Jun 2022 05:10:37 +0000 (14:40 +0930)]
reset/aspeed: Implement status callback
The I2C driver shares a reset line between buses, so allow it to test
the state of the reset line before resetting it.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Joel Stanley [Thu, 23 Jun 2022 05:10:36 +0000 (14:40 +0930)]
ARM: dts: ast2600-evb: Add I2C devices
The EVB has an EEPROM and ADT8490 temp sensor/fan controller on bus 7,
and a LM75 temp sensor on bus 8.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 05:10:35 +0000 (14:40 +0930)]
ARM: dts: ast2500-evb: Add I2C devices
The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable
those busses we can test the I2C driver.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Joel Stanley [Thu, 23 Jun 2022 05:10:34 +0000 (14:40 +0930)]
ARM: dts: ast2600-evb: Remove redundant pinctrl
Now that these are in the dtsi we don't need them in the EVB device
tree.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 05:10:33 +0000 (14:40 +0930)]
ARM: dts: ast2600: Disable I2C nodes by default
Allow boards to enable the buses they use.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Joel Stanley [Thu, 23 Jun 2022 05:10:32 +0000 (14:40 +0930)]
ARM: dts: ast2600: Add I2C reset properties
The same as the upstream Linux device tree, each i2c bus has a property
specifying the reset line.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Eddie James [Thu, 23 Jun 2022 05:10:31 +0000 (14:40 +0930)]
ARM: dts: ast2600: Add I2C pinctrl
Set the pinctrl groups for each I2C bus. These are essential to
I2C operating correctly.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Bryan Brattlof [Tue, 21 Jun 2022 21:36:03 +0000 (16:36 -0500)]
soc: soc_ti_k3: identify j7200 SR2.0 SoCs
Anytime a new revision of a chip is produced, Texas Instruments
will increment the 4 bit VARIANT section of the CTRLMMR_WKUP_JTAGID
register by one. Typically this will be decoded as SR1.0 -> SR2.0 ...
however a few TI SoCs do not follow this convention.
Rather than defining a revision string array for each SoC, use a
default revision string array for all TI SoCs that continue to follow
the typical 1.0 -> 2.0 revision scheme.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Jim Liu [Tue, 21 Jun 2022 09:03:38 +0000 (17:03 +0800)]
phy: nuvoton: add NPCM7xx phy control driver
add BMC NPCM750 phy control driver
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Philippe Schenker [Mon, 20 Jun 2022 14:57:45 +0000 (16:57 +0200)]
toradex: tdx-cfg-block: add new toradex oui range
Add new Toradex MAC OUI (8c:06:cb), to the config block. With this change
we extend the possible serial-numbers as follows:
For serial-numbers
00000000-
16777215 OUI 00:14:2d is taken
For serial-numbers
16777216-
33554431 OUI 8c:06:cb is taken
Lower 24-bit of the serial number are used in the NIC part of the
MAC address, the complete serial number can be calculated using the OUI.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:12 +0000 (13:26 -0500)]
board: ti: common: board_detect: Do 1byte address checks first.
Do 1 byte address checks first prior to doing 2 byte address checks.
When performing 2 byte addressing on 1 byte addressing eeprom, the
second byte is taken in as a write operation and ends up erasing the
eeprom region we want to preserve.
While we could have theoretically handled this by ensuring the write
protect of the eeproms are properly managed, this is not true in case
where board are updated with 1 byte eeproms to handle supply status.
Flipping the checks by checking for 1 byte addressing prior to 2 byte
addressing check prevents this problem at the minor cost of additional
overhead for boards with 2 byte addressing eeproms.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:11 +0000 (13:26 -0500)]
board: ti: common: Handle the legacy eeprom address width properly
Due to supply chain issues, we are starting to see a mixture of eeprom
usage including the smaller 7-bit addressing eeproms such as 24c04
used for eeproms.
These eeproms don't respond well to 2 byte addressing and fail the
read operation. We do have a check to ensure that we are reading the
alternate addressing size, however the valid failure prevents us
from checking at 1 byte anymore.
Rectify the same by falling through and depend on header data comparison
to ensure that we have valid data.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:10 +0000 (13:26 -0500)]
board: ti: common: Optimize boot when detecting consecutive bad records
The eeprom data area is much bigger than the data we intend to store,
however, with bad programming, we might end up reading bad records over
and over till we run out of eeprom space. instead just exit when 10
consecutive records are read.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vignesh Raghavendra [Wed, 15 Jun 2022 14:03:05 +0000 (19:33 +0530)]
firmware: ti_sci_static_data: Make file board agnostic
Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.
Drop J7200 EVM specific settings as its same as J721e
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:34 +0000 (17:45 +0300)]
configs: am62x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig
Add CONFIG_NR_DRAM_BANKS from am62x_evm_a53_defconfig as this is
needed to calculate the size of DDR that is available.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>