Matt Arsenault [Sun, 4 Dec 2022 14:18:49 +0000 (09:18 -0500)]
ValueTracking: Teach isKnownNeverInfinity about min/max functions
Matt Arsenault [Sun, 4 Dec 2022 14:29:12 +0000 (09:29 -0500)]
ValueTracking: Add tests for isKnownNeverInfinity for min/max intrinsics
Fangrui Song [Tue, 20 Dec 2022 17:45:28 +0000 (09:45 -0800)]
Revert D139752 "cmake: Enable 64bit off_t on 32bit glibc systems"
This reverts commit
ae3e228af77fea9ff4c45cca88a7a0de2cad662b.
Seems that it may form a wrong command line for 32-bit Halide builds
`-D_FILE_OFFSET_BITS="64 -D_DEBUG -D_LARGEFILE_SOURCE -D_FILE_OFFSET_BITS=64 -DSTDC_CONSTANT_MACROS -DSTDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS"` according to
Matt Arsenault [Sun, 4 Dec 2022 13:29:17 +0000 (08:29 -0500)]
ValueTracking: Teach isKnownNeverInfinity about rounding intrinsics
Matt Arsenault [Sun, 4 Dec 2022 14:04:07 +0000 (09:04 -0500)]
ValueTracking: Add tests for isKnownNeverInfinity for rounding intrinsics
Roman Lebedev [Tue, 20 Dec 2022 17:35:08 +0000 (20:35 +0300)]
[NFC][llvm-reduce] Do show `-ir-passes` in help
It's a bit non-useful when llvm-reduce runs a pass,
a testcase for a crash in which is being reduced in the first place :)
Yaneury Fermin [Tue, 20 Dec 2022 17:37:48 +0000 (17:37 +0000)]
[scudo][standalone] Precommit pages
On Fuchsia, this CL changes garbage collection
to precommit all pages if the |Buffer| doesn't
fit into the static buffer size.
A test program (scudotest) was used that deliberately
grows a size class high water mark to the point where
the pre-allocated static buffer is no longer used for
garbage collection.
Traces showed that precommiting the Vmar removes ~30 page faults
and ~.22ms of wall time.*
Before: https://ui.perfetto.dev/#!/?s=7da19fc3f59448eef51fd6fd03283bb87b702cf1a565bcbe6c9c28371671
After: https://ui.perfetto.dev/#!/?s=97707cd99b2c9efd1e6569b2deb97e3d16f8be532c59a0cc12463c37fbb1d8
*: Use the added `zx_vmar_op_range` as a reference point to observe
the differences.
For more context, see https://fxbug.dev/115594.
Reviewed By: Chia-hungDuan
Differential Revision: https://reviews.llvm.org/D140320
Fangrui Song [Tue, 20 Dec 2022 17:34:14 +0000 (09:34 -0800)]
[CMake] add_definitions => add_compile_definitions after D139752
Suggested by alexreinking (Alex Reinking)
Roman Lebedev [Tue, 20 Dec 2022 16:55:09 +0000 (19:55 +0300)]
[InstCombine] Disallow constant expressions in `not` canonicalization
As per post-commit feedback - we generally do not like Constant Expressions,
and trying to deal with them leads to inconsistent results
that may very well be non-optimal. So just don't.
Joshua Cranmer [Tue, 20 Dec 2022 16:43:15 +0000 (11:43 -0500)]
Add TargetExtTyID to switch statements in Hexagon and DXIL backend code.
Hans Wennborg [Tue, 20 Dec 2022 16:22:53 +0000 (17:22 +0100)]
Revert "[clang] Don't spuriously pass -stdlib=libc++ to CC1 on Darwin"
This broke the instrprof-darwin-exports.c test on mac, see e.g.
https://green.lab.llvm.org/green/job/clang-stage1-RA/32351/
> Previously, we would be passing down -stdlib=libc++ from the Driver
> to CC1 whenever the default standard library on the platform was libc++,
> even if -stdlib= had not been passed to the Driver. This meant that we
> would pass -stdlib=libc++ in nonsensical circumstances, such as when
> compiling C code.
>
> This logic had been added in
b534ce46bd40 to make sure that header
> search paths were set up properly. However, since libc++ is now the
> default Standard Library on Darwin, passing this explicitly is not
> required anymore. Indeed, if no -stdlib= is specified, CC1 will end
> up using libc++ if it queries which standard library to use, without
> having to be told.
>
> Not passing -stdlib= at all to CC1 on Darwin should become possible
> once CC1 stops relying on it to set up framework search paths.
>
> Furthermore, this commit also removes a diagnostic checking whether the
> deployment target is too old to support libc++. Nowadays, all supported
> deployment targets use libc++ and compiling with libstdc++ is not
> supported anymore. The Driver was the wrong place to issue this
> diagnostic since it doesn't know whether libc++ will actually be linked
> against (e.g. C vs C++), which would lead to spurious diagnostics.
> Given that these targets are not supported anymore, we simply drop
> the diagnostic instead of trying to refactor it into CC1.
>
> rdar://
103198514
>
> Differential Revision: https://reviews.llvm.org/D139938
This reverts commit
6540f32db09cf6b367812642fbd91d44cbb6638d.
Craig Topper [Tue, 20 Dec 2022 16:21:06 +0000 (08:21 -0800)]
[RISCV] Use default attributes for intrinsics
This switches a large subset of RISC-V intrinsics to use default
attributes (nosync, nofree, nocallback and willreturn).
I didn't reformat a lot of this. I can spend more time on that if
we think it's important.
Reviewed By: nikic, asb, eopXD
Differential Revision: https://reviews.llvm.org/D140360
Joshua Cranmer [Tue, 20 Dec 2022 16:02:11 +0000 (11:02 -0500)]
[IR] Add a target extension type to LLVM.
Target-extension types represent types that need to be preserved through
optimization, but otherwise are not introspectable by target-independent
optimizations. This patch doesn't add any uses of these types by an existing
backend, it only provides basic infrastructure such that these types would work
correctly.
Reviewed By: nikic, barannikov88
Differential Revision: https://reviews.llvm.org/D135202
Pavel Iliin [Wed, 15 Dec 2021 02:12:37 +0000 (02:12 +0000)]
[AArch64] FMV support and necessary target features dependencies.
This is Function Multi Versioning (FMV) implementation for AArch64 target in
accordance with Beta Arm C Language Extensions specification
https://github.com/ARM-software/acle/blob/main/main/acle.md#function-multi-versioning
It supports new "target_version" function attribute and extends existing
"target_clones" one. Also missing dependencies for target features were added.
Differential Revision: https://reviews.llvm.org/D127812
Leon Clark [Tue, 20 Dec 2022 14:23:31 +0000 (14:23 +0000)]
Enable roundeven.
Add support for roundeven and implement appropriate tests.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D137954
Roman Lebedev [Tue, 20 Dec 2022 15:31:24 +0000 (18:31 +0300)]
Revert "[InstCombine] Fold nested selects"
One of these two changes is exposing (or causing) some more miscompiles.
A reproducer is in progress, so reverting until resolved.
This reverts commit
9ddff66d0c9c3e18d56e6b20aa26a2a8cdfb6d2b.
Roman Lebedev [Tue, 20 Dec 2022 15:25:37 +0000 (18:25 +0300)]
Revert "Reland "[SimplifyCFG] `FoldBranchToCommonDest()`: deal with mismatched IV's in PHI's in common successor block""
One of these two changes is exposing (or causing) some more miscompiles.
A reproducer is in progress, so reverting until resolved.
This reverts commit
428f36401b1b695fd501ebfdc8773bed8ced8d4e.
Paul Robinson [Tue, 20 Dec 2022 15:35:25 +0000 (07:35 -0800)]
[xray] Convert tests to check 'target=...'
Part of the project to eliminate special handling for triples in lit
expressions.
David Green [Tue, 20 Dec 2022 15:23:38 +0000 (15:23 +0000)]
[AArch64][ARM] Remove load from dup and vmul tests. NFC
These tests needn't use loads in their testing of dup and mul
instructions, and as the load changes the test may no longer test what
they are intending (as in D140069).
Roman Lebedev [Tue, 20 Dec 2022 15:15:19 +0000 (18:15 +0300)]
[InstCombine] Fix inversion of constants
`canFreelyInvertAllUsersOf()`, in general, does not make sense
for constants, and constant expressions are likely even more problematic.
For those, we just want to create a simple constant expression and be done.
Fixes https://github.com/llvm/llvm-project/issues/59613
Craig Topper [Tue, 20 Dec 2022 15:06:15 +0000 (07:06 -0800)]
[RISCV] Reduce duplicated code in RISCVMergeBaseOffsetOpt::detectFoldable. NFC
The LUI and AUIPC share quite a few similarities. This refactors the code
to share what we can.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D140345
Craig Topper [Tue, 20 Dec 2022 15:05:37 +0000 (07:05 -0800)]
[RISCV] Teach RISCVMergeBaseOffset to handle constant pools.
Primarily this allows us to fold the addi from PseudoLLA expansion
into a load.
If the linker is able to GP relax the constant pool access we'll
end up with a GP relative load.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D140341
Nico Weber [Tue, 20 Dec 2022 15:06:28 +0000 (10:06 -0500)]
[gn] Add explicit deps on TargetParser
This diff was generated by the following script:
#!/usr/bin/env python3
import os, subprocess
r = subprocess.run('git show --pretty='' --name-only
f09cf34d00'.split(),
stdout=subprocess.PIPE, text=True)
for line in r.stdout.splitlines():
if not line.endswith('CMakeLists.txt'): continue
gn = 'llvm/utils/gn/secondary/' + os.path.dirname(line) + '/BUILD.gn'
if not os.path.exists(gn): continue
with open(gn) as f:
contents = f.read()
if contents.count('"//llvm/lib/Support",') == 1:
contents = contents.replace(
'"//llvm/lib/Support",',
'"//llvm/lib/Support", "//llvm/lib/TargetParser",')
elif contents.count(' deps = [') == 1:
contents = contents.replace(
' deps = [',
' deps = [ "//llvm/lib/TargetParser",')
else:
print('needs manual fixup:', gn)
continue
with open(gn, 'w') as f:
f.write(contents)
I then manually fixed up the BUILD.gn files for Support (should not depend on
TargetParser) and TargetParser (should depend on Support) and ran `gn format`
on all touched files.
Joseph Huber [Tue, 20 Dec 2022 15:02:24 +0000 (09:02 -0600)]
[libc][llvm] Forward `LIBC_` options as well in a runtime build
Summary:
We need to forward certain CMake definitions to the runtimes build when
using `-DLLVM_ENABLE_RUNTIMES=libc`. The `libc` project uses both
`LLVM_LIBC` and `LIBC` prefixes. Previously we only forwarded
`LLVM_LIBC`. This patch adds the `LIBC_` prefix, using the underscore to
separate it from `LIBCXX`.
Nico Weber [Tue, 20 Dec 2022 15:04:39 +0000 (10:04 -0500)]
[gn] run `gn format` on new build file
KAWASHIMA Takahiro [Mon, 12 Dec 2022 05:25:32 +0000 (14:25 +0900)]
[AArch64] Add Neon int instructions to isAssociativeAndCommutative
Differential Revision: https://reviews.llvm.org/D139810
KAWASHIMA Takahiro [Mon, 12 Dec 2022 05:25:31 +0000 (14:25 +0900)]
[AArch64] Add FP16 instructions to isAssociativeAndCommutative
`-mcpu=` in `llvm/test/CodeGen/AArch64/machine-combiner.ll` is changed
to `neoverse-n2` to use FP16 and SVE/SVE2 instructions. By this, the
register allocation and/or instruction scheduling are slightly changed
and some existing `CHECK` lines need to be updated.
Differential Revision: https://reviews.llvm.org/D139809
Nico Weber [Tue, 20 Dec 2022 14:42:45 +0000 (09:42 -0500)]
[gn build] Port core part of
f09cf34d0062
For now, this adds a dep from Support on the new TargetParser library
instead of the other way round. That'll be fixed in a mechanical follow-up.
Ed Maste [Mon, 19 Dec 2022 17:13:42 +0000 (12:13 -0500)]
[libc++] accept ELF Tool Chain readelf format in tooling
ELF Tool Chain provides alternatives to most GNU binutils tools,
including readelf. These tools are currently used by FreeBSD.
ELF Tool Chain's readelf currently emits headings for symbol table
information in a slightly different format compared to GNU or LLVM
readelf. Accept both formats.
Reviewed by: philnik
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D140313
bipmis [Tue, 20 Dec 2022 14:34:17 +0000 (14:34 +0000)]
[AAch64] Optimize muls with operands having enough zero bits.
Muls with 64bit operands where each of the operand is having top 32 bits as zero, we can generate a single umull instruction on a 32bit operand.
Differential Revision: https://reviews.llvm.org/D139411
yronglin [Tue, 20 Dec 2022 13:34:00 +0000 (21:34 +0800)]
[CodeGen][AArch64] Fix AArch64ABIInfo::EmitAAPCSVAArg crash with empty record type in variadic arg
Fix AArch64ABIInfo::EmitAAPCSVAArg crash with empty record type in variadic arg
Open issue: https://github.com/llvm/llvm-project/issues/59034
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D138511
David Green [Tue, 20 Dec 2022 13:50:34 +0000 (13:50 +0000)]
[AArch64] Combine to UMULL if top bits are known zero
Given mul(zext(a), b), we can convert to a umull so long as we know that
the top bits of b are zero. This uses MaskedValueIsZero to detect that
case for NEON UMULL patterns.
Differential Revision: https://reviews.llvm.org/D140287
Archibald Elliott [Tue, 20 Dec 2022 13:43:25 +0000 (13:43 +0000)]
[compiler-rt] Add TargetParser to symbolizer
Nikita Popov [Tue, 20 Dec 2022 13:39:57 +0000 (14:39 +0100)]
[PhaseOrdering] Add test for vector promotion regression (NFC)
Sample test where
cfd594f8bb5e779c81171e7c1e61ae8436efabd3 causes
optimization regressions.
Simon Pilgrim [Mon, 19 Dec 2022 18:27:50 +0000 (18:27 +0000)]
[X86] Fix SLM uops/resources counts for CMPXCHG instructions
LOCK + CMPXCHG8/CMPXCHG16 variants still need overriding as they are not completely correct - already much better though
Based off llvm-exegesis captures, confirmed with Agner + uops.info
Jean Perier [Tue, 20 Dec 2022 12:49:38 +0000 (13:49 +0100)]
[flang] Do not convey captured globals through host link
Addresses and properties (bounds, length parameters) of host
variables associated in an internal procedure were all passed via
an extra tuple argument of the internal procedure.
This extra tuple is in general an overhead: it must be created and
passed, and require creating thunks when taking the address of the
internal procedure.
This patch allows not using the tuple for host global variables
(from modules, common block, or local saved variables) since they can
be instantiated from the fir.global symbol in the internal procedure
instead.
Add a fir.internal_proc attribute to mlir::FuncOp for internal procedures
so that ArrayValueCopy can still detect internal procedures even if they
do not have a tuple argument.
Differential Revision: https://reviews.llvm.org/D140288
Archibald Elliott [Tue, 20 Dec 2022 12:49:02 +0000 (12:49 +0000)]
[Examples] Fix TargetParser Dependency
Sebastian Neubauer [Tue, 20 Dec 2022 12:28:30 +0000 (13:28 +0100)]
[llvm] Make llvm::Any similar to std::any
This facilitates replacing llvm::Any with std::any.
- Deprecate any_isa in favor of using any_cast(Any*) and checking for
nullptr because C++17 has no any_isa.
- Remove the assert from any_cast(Any*), so it returns nullptr if the
type is not correct. This aligns it with std::any_cast(any*).
Use any_cast(Any*) throughout LLVM instead of checks with any_isa.
This is the first part outlined in
https://discourse.llvm.org/t/rfc-switching-from-llvm-any-to-std-any/67176
Differential Revision: https://reviews.llvm.org/D139973
Archibald Elliott [Tue, 20 Dec 2022 12:12:23 +0000 (12:12 +0000)]
[ADT] Correct Comment in Triple.h
Matthias Springer [Tue, 20 Dec 2022 12:08:59 +0000 (13:08 +0100)]
[mlir][linalg] Bring populateFoldUnitExtentDimsVia(Reshapes/Slices)Patterns in sync
Make sure that both functions populate patterns with the same functionality. Both should be refactored at some point so that canonicalization patterns are not populated.
Differential Revision: https://reviews.llvm.org/D140372
Stephen Tozer [Tue, 20 Dec 2022 10:01:56 +0000 (10:01 +0000)]
[DebugInfo] Variables with only empty values emitting when one is variadic
This patch fixes a simple bug in DbgValueHistoryMap::hasNonEmptyLocation
that caused it to treat empty DBG_VALUE_LIST instructions as non-empty
when determining whether to emit a variable or not.
Differential Revision: https://reviews.llvm.org/D133925
gonglingqin [Tue, 20 Dec 2022 11:21:55 +0000 (19:21 +0800)]
[LoongArch] Break MUL into SLLI and SUB or ADD
Further, after MUL is decomposed, use ALSL instead of SLLI and ADD
Differential Revision: https://reviews.llvm.org/D140282
Nikita Popov [Tue, 20 Dec 2022 11:25:35 +0000 (12:25 +0100)]
[AArch64] Convert test to opaque pointers (NFC)
One test case was testing the case where a bitcasted function
pointer is passed to an X constraint. With opaque pointers, this
is no longer a thing, and it gets treated the same way as a
non-bitcasted function pointer. Per the comment, this is a
desirable change.
Archibald Elliott [Tue, 20 Dec 2022 11:29:04 +0000 (11:29 +0000)]
[libc] Add Missing TargetParser Dependency
Nikita Popov [Tue, 20 Dec 2022 11:20:32 +0000 (12:20 +0100)]
[AArch64] Convert some tests to opaque pointers (NFC)
Nothing interesting, but required some fixups to MIR.
Nikita Popov [Tue, 20 Dec 2022 11:16:15 +0000 (12:16 +0100)]
[AArch64] Convert test to opaque pointers (NFC)
There is a minor change in register allocation in one test case,
which doesn't have impact on codegen quality though. Probably due
to differences in SCEVExpander behavior with opaque pointers.
Nikita Popov [Tue, 20 Dec 2022 11:09:55 +0000 (12:09 +0100)]
[AArch64] Name instructions in test (NFC)
And regenerate check lines.
Jessica Del [Tue, 20 Dec 2022 11:04:46 +0000 (12:04 +0100)]
[AMDGPU] Wide multiplies tests for D140208
These tests show suboptimal code generation that will
be improved by the changes in D140208
Archibald Elliott [Tue, 20 Dec 2022 10:24:02 +0000 (10:24 +0000)]
[Support] Move TargetParsers to new component
This is a fairly large changeset, but it can be broken into a few
pieces:
- `llvm/Support/*TargetParser*` are all moved from the LLVM Support
component into a new LLVM Component called "TargetParser". This
potentially enables using tablegen to maintain this information, as
is shown in https://reviews.llvm.org/D137517. This cannot currently
be done, as llvm-tblgen relies on LLVM's Support component.
- This also moves two files from Support which use and depend on
information in the TargetParser:
- `llvm/Support/Host.{h,cpp}` which contains functions for inspecting
the current Host machine for info about it, primarily to support
getting the host triple, but also for `-mcpu=native` support in e.g.
Clang. This is fairly tightly intertwined with the information in
`X86TargetParser.h`, so keeping them in the same component makes
sense.
- `llvm/ADT/Triple.h` and `llvm/Support/Triple.cpp`, which contains
the target triple parser and representation. This is very intertwined
with the Arm target parser, because the arm architecture version
appears in canonical triples on arm platforms.
- I moved the relevant unittests to their own directory.
And so, we end up with a single component that has all the information
about the following, which to me seems like a unified component:
- Triples that LLVM Knows about
- Architecture names and CPUs that LLVM knows about
- CPU detection logic for LLVM
Given this, I have also moved `RISCVISAInfo.h` into this component, as
it seems to me to be part of that same set of functionality.
If you get link errors in your components after this patch, you likely
need to add TargetParser into LLVM_LINK_COMPONENTS in CMake.
Differential Revision: https://reviews.llvm.org/D137838
Nikita Popov [Tue, 20 Dec 2022 11:04:29 +0000 (12:04 +0100)]
[AArch64] Regenerate test checks (NFC)
Dmitry Preobrazhensky [Tue, 20 Dec 2022 11:01:37 +0000 (14:01 +0300)]
[AMDGPU][DOC][NFC] Update assembler syntax description
Summary of changes:
- Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205).
- Small improvements and clarifications.
- Correct typos.
Nikita Popov [Tue, 20 Dec 2022 10:30:34 +0000 (11:30 +0100)]
[AArch64] Convert some tests to opaque pointers (NFC)
Guillaume Chatelet [Tue, 20 Dec 2022 10:56:08 +0000 (10:56 +0000)]
Revert D139181 "[lld][Alignment][NFC] Use Align instead of log2 of alignment in Wasm Sections"
As discussed on the patch the Align type is probably not a good fit for
linkers.
This reverts commit
cfe77f23d6f190d54763a7575cee95aceb9216bc.
Sebastian Neubauer [Wed, 7 Dec 2022 21:17:39 +0000 (22:17 +0100)]
[llvm][cmake] Fix add_subdirectory build in multi-config
Using CMAKE_CFG_INTDIR in paths that are used in configure_file,
resulted in a folder that is literally called '${CONFIGURATION}'
for the multi-config ninja build.
I think this is a regression from a while ago. Fix this by replacing
CMAKE_CFG_INTDIR with '.'. We can only create one of the
LLVMConfig.cmake files as the consuming CMake project can only import a
single file. This creates LLVMConfig.cmake and others in the place where
they were previously and where they are for a single-config build.
Differential Revision: https://reviews.llvm.org/D139623
Timm Bäder [Tue, 20 Dec 2022 10:46:09 +0000 (11:46 +0100)]
Revert "[clang][NFC] Clean up createDefaultOutputFile()"
This reverts commit
d20101db48945e9d7a19ce3edcfd91d7e1aeadab.
Lifetime of the string is not what I thought it was it seems.
eopXD [Tue, 20 Dec 2022 10:34:52 +0000 (02:34 -0800)]
[NFC][RISCV] Extract utility to calculate value through MajorVersion and MinorVersion
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D139025
Timm Bäder [Tue, 20 Dec 2022 10:19:20 +0000 (11:19 +0100)]
[clang][NFC] Clean up createDefaultOutputFile()
PathStorage is only used in one of the if branches, so doesn't need to
be a std::optional anyway.
Archibald Elliott [Tue, 13 Dec 2022 22:02:58 +0000 (22:02 +0000)]
[Support] Move Target/CPU Printing out of CommandLine
This change is rather more invasive than intended. The main intention
here is to make CommandLine.cpp not rely on llvm/Support/Host.h. Right
now, this reliance is only in 3 superficial places:
- Choosing how to expand response files (in two places)
- Printing the default triple and current CPU in `--version` output.
The built in version system has a method for adding "extra version
printers", commonly used by several tools (such as llc) to report the
registered targets in the built version of LLVM. It was reasonably easy
to move the logic for printing the default triple and current CPU into
a similar function, and register it with any relevant binaries.
The incompatible change here is that now, even if
LLVM_VERSION_PRINTER_SHOW_HOST_TARGET_INFO is defined, most binaries
will no longer print out the default target triple and cpu when provided
with `--version`, for instance llvm-as and llvm-dis. This breakage is
intended, but the changes in this patch keep printing the default target
and detected in `llc` and `opt` as these were remarked as important
binaries in the LLVM install.
The change to expanding response files may also be controversial, but I
believe that these macros should correspond exactly to the host triple
introspection used before.
Differential Revision: https://reviews.llvm.org/D137837
Kadir Cetinkaya [Tue, 20 Dec 2022 09:42:38 +0000 (10:42 +0100)]
[include-cleaner] Respect IWYU pragmas during analyze
Fixes https://github.com/llvm/llvm-project/issues/59541.
Differential Revision: https://reviews.llvm.org/D140380
Piyou Chen [Tue, 20 Dec 2022 09:12:57 +0000 (01:12 -0800)]
[RISCV] Refactor RVV Policy by structure
RVV intrinsic function has several policy variants.
Include TU, TA, TAMU, TAMA, TUMU, TUMA, MU, MA, TUM, TAM
Currently, the clang side enumerates these policies, but it's hard to add a new policy.
This patch use structure to replace the origin policy enumeration, and enhance some policy transform logic.
This is a clean-up job that will not affect the RVV intrinsic functionality and make sure riscv_vector_builtin_cg.inc is the same as the original one.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/D139995
Qiu Chaofan [Tue, 20 Dec 2022 09:10:51 +0000 (17:10 +0800)]
Pre-commit more cases for PowerPC is_fpclass
Nikita Popov [Thu, 1 Sep 2022 10:45:40 +0000 (12:45 +0200)]
[LICM] Allow load-only scalar promotion in the presence of aliasing loads
During scalar promotion, if there are additional potentially-aliasing
loads outside the promoted set, we can still perform a load-only
promotion. As the stores are retained, any potentially-aliasing
loads will still read the correct value.
This increases the number of load promotions in llvm-test-suite by
a factor of two:
| Old | New
licm.NumPromotionCandidates | 4448 | 6038
licm.NumLoadPromoted | 479 | 1069
licm.NumLoadStorePromoted | 1459 | 1459
Unfortunately, this does have some impact on compile-time:
http://llvm-compile-time-tracker.com/compare.php?from=
57f7f0d6cf0706a88e1ecb74f3d3e8891cceabfa&to=
72b811738148aab399966a0435f13b695da1c1c8&stat=instructions
In part this is because we now have less early bailouts from
promotion, but also due to second order effects (e.g. for one case
I looked at we spend more time in SLP now).
Differential Revision: https://reviews.llvm.org/D133192
Muhammad Omair Javaid [Tue, 20 Dec 2022 08:56:03 +0000 (13:56 +0500)]
[CLANG] Fix typo in test/CodeGen/c-strings.c
This patch fixes a typo in test/CodeGen/c-strings.c. Test was failing
on AArch64/Windows.
Haojian Wu [Tue, 20 Dec 2022 08:38:03 +0000 (09:38 +0100)]
Fix an unused-variable warning in release build, NFC
Ramkumar Ramachandra [Mon, 19 Dec 2022 18:50:54 +0000 (19:50 +0100)]
mlir/{SPIRV,Bufferization}: use std::optional in .td files (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional.
22426110c5ef changed the way mlir-tblgen generates .inc
files, emitting std::optional when an Optional attribute is specified in
a .td file. It also changed several .td files hard-coding llvm::Optional
to use std::optional. However, the patch excluded a few .td files in
SPIRV and Bufferization hard-coding llvm::Optional. This patch fixes
that defect, and after this patch, references to llvm::Optional in .cpp
and .h files can be replaced mechanically.
See also: https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Signed-off-by: Ramkumar Ramachandra <r@artagnon.com>
Differential Revision: https://reviews.llvm.org/D140329
Jean Perier [Tue, 20 Dec 2022 07:46:45 +0000 (08:46 +0100)]
[flang] Finish substring lowering
Hlfir.designate was made to support substrings but so far substrings
were not yet lowered to it. Implement support for them.
Differential Revision: https://reviews.llvm.org/D140310
Carl Ritson [Tue, 20 Dec 2022 06:47:13 +0000 (15:47 +0900)]
[AMDGPU] Replace getPhysRegClass with getPhysRegBaseClass
Accelerate finding the base class for a physical register by
building a statically mapping table from physical registers
to base classes using TableGen.
Replace uses of SIRegisterInfo::getPhysRegClass with
TargetRegisterInfo::getPhysRegBaseClass in order to use
the computed table.
Reviewed By: arsenm, foad
Differential Revision: https://reviews.llvm.org/D139422
Carl Ritson [Tue, 20 Dec 2022 06:21:51 +0000 (15:21 +0900)]
[TableGen] Emit table mapping physical registers to base classes
Allow targets to define a mapping from registers to register
classes such that each register has exactly one base class.
As registers may be in multiple register classes the base class
is determined by the container class with the lowest BaseClassOrder.
Only register classes with BaseClassOrder set are considered
when determining the base classes. By default BaseClassOrder is
unset in RegisterClass so no code is generated unless a target
explicit defines one or more base register classes.
Reviewed By: arsenm, foad
Differential Revision: https://reviews.llvm.org/D139616
Sameer Sahasrabuddhe [Tue, 20 Dec 2022 06:05:45 +0000 (11:35 +0530)]
[UniformityAnalysis][NFC] Make checks independent of order using CHECK-DAG.
This fixes the buildbot failure on reverse iteration:
https://lab.llvm.org/buildbot/#/builders/54/builds/3034
Craig Topper [Tue, 20 Dec 2022 04:52:33 +0000 (20:52 -0800)]
[RISCV] Replace i64:$r in tablegen patterns with GPR:$r. NFC
It's much more common to use a register class rather than a type.
Add an additional i64 cast to the patterns where needed to avoid
increasing isel table size.
Craig Topper [Tue, 20 Dec 2022 03:28:56 +0000 (19:28 -0800)]
[RISCV] Add Predicates to the XVentanaCondOps isel patterns.
Missed this in the review of D139394. Not a functional issue because
select only makes it to isel with XVentanaCondOps.
Craig Topper [Tue, 20 Dec 2022 03:12:35 +0000 (19:12 -0800)]
[RISCV] Add +xventanacondops command line to select-binop-identity.ll. NFC
Craig Topper [Tue, 20 Dec 2022 03:09:24 +0000 (19:09 -0800)]
[RISCV] Add zeroext attribute to i1 arguments in xventanacondops.ll. NFC
Removes some extra andi instructions.
Johannes Doerfert [Tue, 20 Dec 2022 03:09:07 +0000 (19:09 -0800)]
[OpenMP] Account for dynamic shared memory in the AMDGPU nextgen plugin
Johannes Doerfert [Sat, 17 Dec 2022 07:46:59 +0000 (23:46 -0800)]
[OpenMP] Improve AMDGPU Plugin
With this patch we:
- pick more sensible defaults for the number of teams, inspired by the
old plugin, and configured via LIBOMPTARGET_AMDGPU_TEAMS_PER_CU.
- check the input signal of a kernel launch late, after the queue lock
was taken, to avoid a barrier packet more often.
- copy the kernel arguments in one swoop into the appropriate memory.
- manually specialize the callbacks to avoid potential indirect calls.
Luke Nicholson [Tue, 20 Dec 2022 02:33:51 +0000 (02:33 +0000)]
[fuchsia] Tune PrimaryGroupSizeLog to reduce fragmentation.
21U is the default group size, which demonstrates ~15mb reduction
in heap size for some highly fragmented heaps on Fuchsia, and
a general 5mb savings when devices are under no load.
Microbenchmarks show no performance regressions, but most of our
benchmarks perform no significant mallocs. So we are choosing the
default setting, and monitoring for potential performance
issues.
Reviewed By: Chia-hungDuan
Differential Revision: https://reviews.llvm.org/D140311
Johannes Doerfert [Sat, 17 Dec 2022 23:10:51 +0000 (15:10 -0800)]
Reapply "[OpenMP][FIX] Restrict more unsound assmptions about threading"
This reverts commit
3b052558125cbedf18c2ddb65780b50d6f437d54.
This patch got reverted due to an unrelated memory leak that has been
fixed.
Matt Arsenault [Mon, 21 Nov 2022 20:38:10 +0000 (15:38 -0500)]
GlobalISel: Enable CSE of G_SELECT
Stop trying to delete a select in one combine since it would
be deleting the CSE'd instruction if that happened.
LLVM GN Syncbot [Tue, 20 Dec 2022 01:52:50 +0000 (01:52 +0000)]
[gn build] Port
475ce4c200ca
Sameer Sahasrabuddhe [Tue, 20 Dec 2022 01:19:30 +0000 (06:49 +0530)]
RFC: Uniformity Analysis for Irreducible Control Flow
Uniformity analysis is a generalization of divergence analysis to
include irreducible control flow:
1. The proposed spec presents a notion of "maximal convergence" that
captures the existing convention of converging threads at the
headers of natual loops.
2. Maximal convergence is then extended to irreducible cycles. The
identity of irreducible cycles is determined by the choices made
in a depth-first traversal of the control flow graph. Uniformity
analysis uses criteria that depend only on closed paths and not
cycles, to determine maximal convergence. This makes it a
conservative analysis that is independent of the effect of DFS on
CycleInfo.
3. The analysis is implemented as a template that can be
instantiated for both LLVM IR and Machine IR.
Validation:
- passes existing tests for divergence analysis
- passes new tests with irreducible control flow
- passes equivalent tests in MIR and GMIR
Based on concepts originally outlined by
Nicolai Haehnle <nicolai.haehnle@amd.com>
With contributions from Ruiling Song <ruiling.song@amd.com> and
Jay Foad <jay.foad@amd.com>.
Support for GMIR and lit tests for GMIR/MIR added by
Yashwant Singh <yashwant.singh@amd.com>.
Differential Revision: https://reviews.llvm.org/D130746
Hanhan Wang [Fri, 16 Dec 2022 21:03:10 +0000 (13:03 -0800)]
[mlir][tensor][linalg] Add a pattern that generalizes tensor.unpack op.
The pattern generalizes a tensor::UnPackOp into a sequence of tensor +
Linalg ops, when the outer dims are all 1s. It uses the trick of
rank-reduced tensor.extract_slice to get the tile; transpose the tile;
extract sub tile for incomplete cases if needed; use tensor.insert_slice
to insert it to the destination tensor.
Reviewed By: tyb0807, chelini
Differential Revision: https://reviews.llvm.org/D140254
Chen Zheng [Mon, 19 Dec 2022 11:15:04 +0000 (06:15 -0500)]
[PowerPC][NFC] add explicit check for ctr loop pseudo expansion.
Chen Zheng [Mon, 19 Dec 2022 10:58:09 +0000 (05:58 -0500)]
[PowerPC] don't generate hardware loop.
If the candidate loop already has hardware loop related intrinsics,
don't generate hardware loop on PPC. PPC does not support nested
hardware loops.
Chen Zheng [Mon, 19 Dec 2022 10:20:23 +0000 (05:20 -0500)]
[PowerPC][NFC] reuse a case for checking hardware loop intrinsic input
Johannes Doerfert [Tue, 20 Dec 2022 00:41:04 +0000 (16:41 -0800)]
[OpenMP][FIX] Ensure to inline `ompx::` functions after the rename in D140334
Siva Chandra Reddy [Sat, 17 Dec 2022 00:04:23 +0000 (00:04 +0000)]
[libc] Add support for standalone cross compilation of libc.
One should be able to do a cross build of the libc now. For example, using
clang on a x86_64 linux host, one can build for an aarch64 linux target by
specifying -DLIBC_TARGET_TRIPLE=aarch64-linux-gnu.
Follow up changes will add a baremetal config and also appropriate
documentation about cross compiling the libc for CPU targets.
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D140351
Ye Luo [Tue, 20 Dec 2022 00:26:38 +0000 (18:26 -0600)]
[OpenMP] Change the nextgen plugin kernel thread count scheme as old plugins'
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D140352
LLVM GN Syncbot [Tue, 20 Dec 2022 00:03:21 +0000 (00:03 +0000)]
[gn build] Port
2916b9918275
Steven Wu [Tue, 20 Dec 2022 00:02:18 +0000 (16:02 -0800)]
Revert "LTO: always parse modules in opaque pointer mode."
This reverts commit
8ba9a5218782fa4f94b5c516d513a4259992c254.
Benjamin Kramer [Mon, 19 Dec 2022 23:17:25 +0000 (00:17 +0100)]
[ADT] Alias llvm::Optional to std::optional
This avoids the continuous API churn when upgrading things to use
std::optional and makes trivial string replace upgrades possible.
I tested this with GCC 7.5, the oldest supported GCC I had around.
Differential Revision: https://reviews.llvm.org/D140332
Florian Mayer [Mon, 19 Dec 2022 21:46:19 +0000 (13:46 -0800)]
[NFC] use Optional instead of separate bool
Benjamin Kramer [Mon, 19 Dec 2022 23:15:11 +0000 (00:15 +0100)]
[Clang] Prepare for llvm::Optional becoming std::optional.
The needed tweaks are mostly trivial, the one nasty bit is Clang's usage
of OptionalStorage. To keep this working old Optional stays around as
clang::CustomizableOptional, with the default Storage removed.
Optional<File/DirectoryEntryRef> is replaced with a typedef.
I tested this with GCC 7.5, the oldest supported GCC I had around.
Differential Revision: https://reviews.llvm.org/D140332
Florian Mayer [Mon, 19 Dec 2022 21:24:34 +0000 (13:24 -0800)]
[NFC] use bitwise or instead of addition
as the bits are all distinct, these two operations have the same result,
but the bitwise operation is more explicit about what's happening.
Reviewed By: hctim
Differential Revision: https://reviews.llvm.org/D140346
Philip Reames [Mon, 19 Dec 2022 23:24:45 +0000 (15:24 -0800)]
[SDAG] neg x with only low bit demanded is x
We have a version of this transform in InstCombine, but surprisingly not in SDAG. Even more surprisingly, this benefits RISCV, but no other target. This was surprising enough I double checked my build configuration to make sure all targets were enabled; they appear to be.
Differential Revision: https://reviews.llvm.org/D140324
Lang Hames [Mon, 14 Nov 2022 06:12:09 +0000 (22:12 -0800)]
[ORC] Add JITDylib argument to ResourceManager notify-removing/transferring ops.
In some cases it's helpful to group trackers by JITDylib. E.g. Platform classes
may want to track initializer symbols with a `JITDylib -> Tracker -> [ Symbol ]`
map. This makes it easy to collect all symbols for the JITDylib, while still
allowing efficient removal of a single tracker. Passing the JITDylib as an
argument to ResourceManager::notifyRemovingResources and
ResourceManager::notifyTransferringResources supports such use-cases.
Lang Hames [Mon, 14 Nov 2022 00:41:04 +0000 (16:41 -0800)]
[ORC] Add withResourceKeyDo method to ResourceTracker.
This method behaves the same as MaterializationResponsibility::withResourceKeyDo
(which now forwards to the new method): It locks the session while providing
access to the ResourceKey associated with the tracker.
Adding this method to ResourceTracker allows resources to be allocated and
tracked for a given MaterializationUnit prior to that MaterializationUnit being
materialized. E.g. Platforms can now track and remove initializers and other
symbols.
Johannes Doerfert [Mon, 19 Dec 2022 19:25:05 +0000 (11:25 -0800)]
[OpenMP] Export `ompx::` symbols from the device runtime
Differential Revision: https://reviews.llvm.org/D140335
Johannes Doerfert [Mon, 19 Dec 2022 18:54:15 +0000 (10:54 -0800)]
[OpenMP] Rename the `_OMP` namespace in the device runtime to `ompx`
Differential Revision: https://reviews.llvm.org/D140334
Benjamin Kramer [Mon, 19 Dec 2022 22:42:08 +0000 (23:42 +0100)]
Drop unused forward declarations of llvm::Optional. NFC.
Benjamin Kramer [Mon, 19 Dec 2022 22:38:55 +0000 (23:38 +0100)]
[mlir] Add operator!= to WalkResult, for completeness.