Martin Schiller [Mon, 29 May 2017 04:08:38 +0000 (06:08 +0200)]
pinctrl: xway: fix copy/paste error in xrx200_grps
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Icenowy Zheng [Sat, 27 May 2017 10:23:03 +0000 (18:23 +0800)]
dt-bindings: add compatible string for Allwinner R40 pinctrl
Allwinner R40 has a pin controller like the ones in older Allwinner SoCs
(especially A20), and can use modified version of the A10/A20 pinctrl
driver.
Add a compatible string for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Icenowy Zheng [Sat, 27 May 2017 10:23:02 +0000 (18:23 +0800)]
pinctrl: sunxi: drop dedicated A20 driver
As we added A20 support to A10 pinctrl driver, now we can delete the
dedicated A20 pinctrl driver, which is duplicated code.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
[Drop Makefile entry]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Icenowy Zheng [Sat, 27 May 2017 10:23:01 +0000 (18:23 +0800)]
pinctrl: sunxi: add A20 support to A10 driver
As A20 is designed as a pin-compatible upgrade of A10, their pin
controller are very similar, and can share one driver.
Add A20 support to the A10 driver.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Icenowy Zheng [Sat, 27 May 2017 10:23:00 +0000 (18:23 +0800)]
pinctrl: sunxi: Add SoC ID definitions for A10, A20 and R40 SoCs
Allwinner A10, A20 and R40 SoCs have similar GPIO layout.
Add SoC definitions in pinctrl-sunxi.h, in order to merge A20 support
into A10 driver, and add R40 support into it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
David Wu [Fri, 26 May 2017 07:20:23 +0000 (15:20 +0800)]
pinctrl: rockchip: Add iomux-route switching support for rk3399
There are 2 IP blocks pin routes need to be switched, that are
uart2dbg, pcie_clkreq.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
David Wu [Fri, 26 May 2017 07:20:22 +0000 (15:20 +0800)]
pinctrl: rockchip: Add iomux-route switching support for rk3328
There are 8 IP blocks pin routes need to be switched, that are
uart2dbg, gmac-m1-optimized, pdm, spi, i2s2, card, tsp, cif.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
David Wu [Fri, 26 May 2017 07:20:21 +0000 (15:20 +0800)]
pinctrl: rockchip: Add iomux-route switching support for rk3228
There are 9 IP blocks pin routes need to be switched, that are
pwm-0, pwm-1, pwm-2, pwm-3, sdio, spi, emmc, uart2, uart1.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
David Wu [Fri, 26 May 2017 07:20:20 +0000 (15:20 +0800)]
pinctrl: rockchip: Add iomux-route switching support
On the some rockchip SOCS, some things like rk3399 specific uart2 can use
multiple pins. Somewhere between the pin io-cells and the uart it seems
to have some sort of switch to decide to which pin to actually route the
data.
+-------+ +--------+ /- GPIO4_B0 (pinmux 2)
| uart2 | -- | switch | --- GPIO4_C0 (pinmux 2)
+-------+ +--------+ \- GPIO4_C3 (pinmux 2)
(switch selects one of the 3 pins base on the GRF_SOC_CON7[BIT0, BIT1])
The routing switch is determined by one pin of a specific group to be set
to its special pinmux function. If the pinmux setting is wrong for that
pin the ip block won't work correctly anyway.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Mon, 29 May 2017 11:40:45 +0000 (13:40 +0200)]
gpio/pinctrl: ingenic: depend on OF
Fix compile errors due to missing OF.
Cc: Paul Cercueil <paul@crapouillou.net>
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Neil Armstrong [Wed, 24 May 2017 08:20:42 +0000 (10:20 +0200)]
pinctrl: meson-gxl: Add Ethernet PHY LEDS pins
The Amlogic Meson GXL SoCs embeds an 10/100 Ethernet PHY, this patchs enables
the Link and Activity LEDs signals.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Neil Armstrong [Wed, 24 May 2017 08:20:41 +0000 (10:20 +0200)]
pinctrl: meson-gxl: Add CEC pins
Add the AO and EE domain CEC pins for the Amlogic Meson GXL SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Neil Armstrong [Wed, 24 May 2017 08:20:40 +0000 (10:20 +0200)]
pinctrl: meson-gxbb: Add CEC pins
Add the AO and EE domain CEC pins for the Amlogic Meson GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Neil Armstrong [Wed, 24 May 2017 08:20:39 +0000 (10:20 +0200)]
pinctrl: meson-gxl: Fix typo in AO SPDIF pins
The AO SPDIF pins were incorrectly defined with the EE pin offset.
Fixes:
b840d649f9ec ("pinctrl: meson: gxl: add spdif output pins")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Neil Armstrong [Wed, 24 May 2017 08:20:38 +0000 (10:20 +0200)]
pinctrl: meson-gxl: Fix typo in AO I2S pins
The AO I2S pins were incorrectly defined with the EE pin offset.
Fixes:
2899adf0422 ("pinctrl: meson: gxl: add i2s output pins")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Neil Armstrong [Tue, 23 May 2017 14:09:19 +0000 (16:09 +0200)]
pinctrl: meson-gxbb: Add missing GPIODV_18 pin entry
GPIODV_18 entry was missing in the original driver push.
Fixes:
468c234f9ed7 ("pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Neil Armstrong [Tue, 23 May 2017 14:09:18 +0000 (16:09 +0200)]
pinctrl: meson-gxl: Add missing GPIODV_18 pin entry
GPIODV_18 entry was missing in the original driver push.
Fixes:
0f15f500ff2c ("pinctrl: meson: Add GXL pinctrl definitions")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Gortmaker [Mon, 22 May 2017 20:56:48 +0000 (16:56 -0400)]
pinctrl: bcm: clean up modular vs. non-modular distinctions
Fixups here tend to be more of a conglomerate of some of the other
repeated/systematic ones we've seen in the earlier pinctrl cleanups.
We remove module.h from code that isn't doing anything modular at
all; if they have __init sections, then replace it with init.h
One driver has a .remove that would be dispatched on module_exit,
and as that code is essentially orphaned, so we remove it. In case
anyone was previously doing the (pointless) unbind to get to that
function, we disable unbind for this one driver as well.
A couple bool drivers (hence non-modular) are converted over to
to builtin_platform_driver().
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
was (or is now) contained at the top of the file in the comments.
Cc: Eric Anholt <eric@anholt.net>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jon Mason <jonmason@broadcom.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Sherman Yin <syin@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: linux-gpio@vger.kernel.org
Cc: linux-rpi-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Gortmaker [Mon, 22 May 2017 20:56:47 +0000 (16:56 -0400)]
pinctrl: tegra: clean up modular vs. non-modular distinctions
None of the Kconfigs for any of these drivers are tristate,
meaning that they currently are not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned, so that
when reading the drivers there is no doubt they are builtin-only. All
drivers get similar changes, so they are handled in batch.
We remove module.h from code that isn't doing anything modular at
all; if they have __init sections, then replace it with init.h.
A couple drivers have module_exit() code that is essentially orphaned,
and so we remove that.
Quite a few bool drivers (hence non-modular) are converted over to
to builtin_platform_driver().
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
was (or is now) contained at the top of the file in the comments.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Pritesh Raithatha <praithatha@nvidia.com>
Cc: Ashwini Ghuge <aghuge@nvidia.com>
Cc: linux-gpio@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Masahiro Yamada [Sat, 20 May 2017 16:02:17 +0000 (01:02 +0900)]
pinctrl: single: use of_device_get_match_data() to get soc data
Use of_device_get_match_data() instead of of_match_device().
It allows us to remove the forward declaration of pcs_of_match.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Shawn Guo [Mon, 22 May 2017 13:59:35 +0000 (21:59 +0800)]
pinctrl: zte: fix group_desc initialization
There are a couple of issues with group_desc initialization in function
zx_pinctrl_build_state().
- num_pins is not initialized and remains zero.
- pins shouldn't be initialized with a pointer to variable in the
stack.
With them fixed, pin_request() in pinmux_enable_setting() can be invoked
correctly.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Neil Armstrong [Mon, 22 May 2017 12:59:26 +0000 (14:59 +0200)]
pinctrl: meson-gxbb: Add SPI pins for SPICC controller
The SPICC controller has dedicated SPI pins, this patchs add the pins
definition in the GXBB pinctrl driver
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Neil Armstrong [Mon, 22 May 2017 12:59:25 +0000 (14:59 +0200)]
pinctrl: meson-gxl: Add SPI pins for the SPICC controller
The SPICC controller has dedicated SPI pins, this patchs add the pins
definition in the GXL pinctrl driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Chen-Yu Tsai [Mon, 22 May 2017 06:25:49 +0000 (14:25 +0800)]
pinctrl: sunxi: Fix SPDIF function name for A83T
We use well known standard names for functions that have name, such as
I2C, SPI, SPDIF, etc..
Fix the function name of SPDIF, which was named OWA (One Wire Audio)
based on Allwinner datasheets.
Fixes:
4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
support")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Gregory CLEMENT [Fri, 19 May 2017 16:04:43 +0000 (18:04 +0200)]
MAINTAINERS: extend mvebu SoC entry with pinctrl drivers
There was no entry for the mvebu pinctrl drivers. As they are tightly
linked to the SoCs and there is a lot of common code to support the
various pinctrl of each SoCs, then add a new entry for the mvebu
maintainers.
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Mauro Carvalho Chehab [Fri, 19 May 2017 01:25:45 +0000 (22:25 -0300)]
pinctrl: pinctrl.txt: standardize document format
Each text file under Documentation follows a different
format. Some doesn't even have titles!
Change its representation to follow the adopted standard,
using ReST markups for it to be parseable by Sphinx.
This document is almost following the standard stile.
There are only two things to adjust on it:
- promote the level of the document title;
- mark literal blocks as such.
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
[Fix some indentations]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Tue, 23 May 2017 07:52:08 +0000 (09:52 +0200)]
Merge branch 'mcp23s08' into devel
Sebastian Reichel [Mon, 15 May 2017 09:24:38 +0000 (11:24 +0200)]
pinctrl: mcp23s08: fix comment for mcp23s08_platform_data.base
The comment does not match the driver, which actually supports
automatic assignment. Fix this by updating the comment.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:37 +0000 (11:24 +0200)]
pinctrl: mcp23s08: drop comment about missing irq support
The driver supports using mcp23xxx as interrupt controller, so
let's drop all comments stating otherwise.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:36 +0000 (11:24 +0200)]
pinctrl: mcp23s08: simplify spi_present_mask handling
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:35 +0000 (11:24 +0200)]
pinctrl: mcp23s08: generalize irq property handling
This moves irq property handling from spi/i2c specific code into
the generic mcp23s08_probe_one. This is possible because the
device properties are named equally.
As a side-effect this drops support for setting the properties via
pdata, which has no mainline users. If boardcode wants to enable
the chip as interrupt controller it can attach the device properties
instead.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:34 +0000 (11:24 +0200)]
pinctrl: mcp23s08: simplify spi pdata handling
Simplify spi pdata handling, so that it uses pdata when available
and falls back to reading device properties otherwise.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:33 +0000 (11:24 +0200)]
pinctrl: mcp23s08: simplify i2c pdata handling
Simplify i2c pdata handling, so that it uses pdata when available
and falls back to reading device properties otherwise.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:32 +0000 (11:24 +0200)]
pinctrl: mcp23s08: switch to devm_gpiochip_add_data
Switching to devm_gpiochip_add_data simplifies the driver's
cleanup routine and safes a few loc.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:31 +0000 (11:24 +0200)]
pinctrl: mcp23s08: use managed kzalloc for mcp
Let's remove a few lines of code by using managed memory for mcp
variable.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:30 +0000 (11:24 +0200)]
pinctrl: mcp23s08: irq mapping is already done
i2c-core and spi-core already assign the irq, so we
can drop the additional call from the mcp driver.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:29 +0000 (11:24 +0200)]
pinctrl: mcp23s08: drop OF_GPIO dependency
The driver compiles & works perfectly fine without OF_GPIO on x86,
so lets drop the dependency.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:28 +0000 (11:24 +0200)]
pinctrl: mcp23s08: switch to regmap caching
Instead of using custom caching, this switches to regmap based
caching. Before the conversion the debugfs file used uncached
values, so that it was easily possible to see power-loss related
problems. The new code will check and recover at this place.
The patch will also ensure, that irqs are not cleared by checking
register status in debugfs.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:27 +0000 (11:24 +0200)]
pinctrl: mcp23s08: drop pullup config from pdata
mcp23s08 support configuration of the pullups using the
pinconf framework. This removes the custom pullup configuration
from platform data, which has no upstream users.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:26 +0000 (11:24 +0200)]
pinctrl: mcp23s08: add pinconf support
mcp23xxx device have configurable 100k pullup resistors. This adds
support for enabling them using pinctrl's pinconf interface.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sebastian Reichel [Mon, 15 May 2017 09:24:25 +0000 (11:24 +0200)]
gpio: mcp23s08: move to pinctrl
This moves the mcp23s08 driver from gpio to pinctrl. Actual
pinctrl support for configuration of the pull-up resistors
follows in its own patch.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Mon, 22 May 2017 15:27:18 +0000 (17:27 +0200)]
Merge branch 'ingenic' into devel
Paul Cercueil [Fri, 12 May 2017 16:53:07 +0000 (18:53 +0200)]
MIPS: jz4740: Remove custom GPIO code
All the drivers for the various hardware elements of the jz4740 SoC have
been modified to use the pinctrl framework for their pin configuration
needs.
As such, this platform code is now unused and can be deleted.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:53:02 +0000 (18:53 +0200)]
MIPS: JZ4780: CI20: Add pinctrl configuration for several drivers
We set the pin configuration for the jz4780-nand and jz4780-uart
drivers.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:53:01 +0000 (18:53 +0200)]
MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers
We set the pin configuration for the jz4740-nand, jz4740-mmc,
jz4740-fb, jz4740-pwm and jz4740-uart drivers.
This will permit those drivers to be cleaned out of the custom GPIO code
that they currently use.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:53:00 +0000 (18:53 +0200)]
MIPS: jz4780: DTS: Add nodes for ingenic pinctrl and gpio drivers
For a description of the devicetree node, please read
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
For a description of the gpio devicetree nodes, please read
Documentation/devicetree/bindings/gpio/ingenic,gpio.txt
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:52:59 +0000 (18:52 +0200)]
MIPS: jz4740: DTS: Add nodes for ingenic pinctrl and gpio drivers
For a description of the pinctrl devicetree node, please read
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
For a description of the gpio devicetree nodes, please read
Documentation/devicetree/bindings/gpio/ingenic,gpio.txt
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:52:58 +0000 (18:52 +0200)]
MIPS: ingenic: Enable pinctrl for all ingenic SoCs
There is a pinctrl driver for each of the Ingenic SoCs supported by the
upstream Linux kernel. In order to switch away from the old GPIO
platform code, we now enable the pinctrl drivers by default for the
Ingenic SoCs.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:53:04 +0000 (18:53 +0200)]
mtd: nand: jz4740: Let the pinctrl driver configure the pins
Before, this NAND driver would set itself the configuration of the
chip-select pins for the various NAND banks.
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:53:05 +0000 (18:53 +0200)]
fbdev: jz4740-fb: Let the pinctrl driver configure the pins
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:53:06 +0000 (18:53 +0200)]
pwm: jz4740: Let the pinctrl driver configure the pins
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
One inherent problem of this new approach is that the pinctrl framework
does not allow us to configure each pin on demand, when the various PWM
channels are requested or released. For instance, the PWM channels can
be configured from sysfs, which would require all PWM pins to be configured
properly beforehand for the PWM function, eventually causing conflicts
with other platform or board drivers.
The proper solution here would be to modify the pwm-jz4740 driver to
handle only one PWM channel, and create an instance of this driver
for each one of the 8 PWM channels. Then, it could use the pinctrl
framework to dynamically configure the PWM pin it controls.
Until this can be done, the only jz4740 board supported upstream
(Qi lb60) can configure all of its connected PWM pins in PWM function
mode, since those are not used by other drivers nor by GPIOs on the
board.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:53:03 +0000 (18:53 +0200)]
mmc: jz4740: Let the pinctrl driver configure the pins
Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:52:57 +0000 (18:52 +0200)]
gpio: Add gpio-ingenic driver
This driver handles the GPIOs of all the Ingenic JZ47xx SoCs
currently supported by the upsteam Linux kernel.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:52:56 +0000 (18:52 +0200)]
pinctrl: add a pinctrl driver for the Ingenic jz47xx SoCs
This driver handles pin configuration and pin muxing for the
JZ4740 and JZ4780 SoCs from Ingenic.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:52:55 +0000 (18:52 +0200)]
dt/bindings: Document gpio-ingenic
This commit adds documentation for the devicetree bindings of the
gpio-ingenic driver, which handles GPIOs of the Ingenic SoCs
currently supported by the Linux kernel.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Cercueil [Fri, 12 May 2017 16:52:54 +0000 (18:52 +0200)]
dt/bindings: Document pinctrl-ingenic
This commit adds documentation for the devicetree bindings of the
pinctrl-ingenic driver, which handles pin configuration and pin
muxing of the Ingenic SoCs currently supported by the Linux kernel.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Nikita Yushchenko [Thu, 11 May 2017 20:02:11 +0000 (23:02 +0300)]
pinctrl: When claiming hog, skip maps not served by same device
When pinctrl device registers, it automatically claims hogs, that is,
maps that pinctrl device serves for itself.
It is possible that in addition to SoC's pinctrl device, other pinctrl
devices get registered. E.g. some gpio expander devies are registered
as pinctrl devices. For such devices, pinctrl maps could be defined
that set up SoC's pins (e.g. interrupt pin for gpio expander). Such
a map will have target device set to gpio expander.
Here is device tree snippet that causes this scenario:
&i2c0 {
sx1503@20 {
compatible = "semtech,sx1503q";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sx1503_20>;
...
};
};
...
&iomuxc {
pinctrl_sx1503_20: pinctrl-sx1503-20 {
fsl,pins = <
VF610_PAD_PTB1__GPIO_23 0x219d
>;
};
};
Such a map will have target device set to gpio expander. However is not
a hog, it is a regular map that is claimed by core before gpio expander
device is probed.
Thus when looking for hogs, it is not enough to check that map's target
device is set to pinctrl device being registered. Need also check that
map's control device is also set to the same.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dong Aisheng [Fri, 19 May 2017 07:05:43 +0000 (15:05 +0800)]
pinctrl: imx: add soc specific mux_mode mask and shift property
MX7ULP MUX mode mask and shift bit is different from VF610.
Let's make it a platform specific property for the later easy of
adding MX7ULP support.
One trick in exist code that Vybrid hardcoded the config part
as 0xffff because its mux_config register BIT[15-0] are all configs
part. But it's not true in ULP, so use mux_mask instead to address
the difference.
Cc: Stefan Agner <stefan@agner.ch>
Cc: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dong Aisheng [Fri, 19 May 2017 07:05:42 +0000 (15:05 +0800)]
pinctrl: imx: add generic pin config core support
The design is based on the exist architecture that the core will
provide a uniformed way to decode the generic pin config into platform
config register raw data according to the imx_cfg_params_decode maps
registered by platform.
Two useful macros, IMX_CFG_PARAMS_DECODE and IMX_CFG_PARAMS_DECODE_INVERT,
are created for platform to register decode map conveniently.
In order to cope with some special case, a platform specific fixup()
function is also available to use.
Note that rather than fully utilizing the generic pinconf support
provided by pinctrl core, IMX only adopts the device tree bindings
of generic pinconf. The config used in .pin_config_get[set] are raw
register data instead of generic one which makes us align the exist
using. And that's also why we cannot set pinconf_ops.is_generic.
Cc: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dong Aisheng [Fri, 19 May 2017 07:05:41 +0000 (15:05 +0800)]
pinctrl: imx: fix debug message for SHARE_MUX_CONF_REG case
The original implemented debug message does not work for
SHARE_MUX_CONF_REG case. This patch fixes it.
Fixes:
bf5a530971af ("pinctrl: imx: add VF610 support to imx pinctrl framework")
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Christophe JAILLET [Sat, 6 May 2017 08:23:59 +0000 (10:23 +0200)]
pinctrl: imx: Check for memory allocation failure
If 'devm_kzalloc' fails, a NULL pointer will be dereferenced.
Return -ENOMEM instead, as done for the other memory allocation just a
few lines below.
BTW, change the 'devm_kzalloc' into a 'devm_kcalloc'.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sean Wang [Mon, 1 May 2017 07:54:34 +0000 (15:54 +0800)]
pinctrl: mediatek: reuse pinctrl driver for mt7623
mt7623 pinctrl hardware can be compatible with mt2701 driver,
so the patch lets the pinctrl on mt7623 SoC reuse the driver
and deletes those redundant ones.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Acked-by: John Crispin <john@phrozen.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Martin Blumenstingl [Sat, 6 May 2017 16:57:51 +0000 (18:57 +0200)]
pinctrl: meson: meson8: add the AO HDMI CEC pin
This adds another missing pin found in the Meson8 SoCs. Currently
there's no driver which would use this pin yet.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Martin Blumenstingl [Sat, 6 May 2017 16:57:50 +0000 (18:57 +0200)]
pinctrl: meson: meson8: add support for the AO remote output pin
This adds another missing pin found in the Meson8 SoCs. Currently
there's no driver which would use this pin yet.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Martin Blumenstingl [Sat, 6 May 2017 16:57:49 +0000 (18:57 +0200)]
pinctrl: meson: meson8: add support for the I2S and SPDIF pins
This adds support for the I2S and SPDIF input and output pins, similar
to what we have on GXBB and GXL.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Martin Blumenstingl [Sat, 6 May 2017 16:57:48 +0000 (18:57 +0200)]
pinctrl: meson: meson8: add the PWM pins
This adds the missing pins for the PWM controllers found in Amlogic
Meson8 SoCs. This includes the pins for PWM_A, PWM_B, PWM_C, PWM_D,
PWM_E and PWM_F controllers.
There is an additional PWM function with the name PWM_VS in the vendor
kernel sources which seems to be used for external video input. Thus
it's not part of this change as the IP block behind the pwm-meson driver
is not responsible for these pins.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Tue, 2 May 2017 09:04:55 +0000 (11:04 +0200)]
pinctrl: Adjust nine checks for null pointers
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The script “checkpatch.pl” pointed information out like the following.
Comparison to NULL could be written …
Thus fix the affected source code places.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Tue, 2 May 2017 08:47:35 +0000 (10:47 +0200)]
pinctrl: Use seq_putc() in pinctrl_maps_show()
A single character (line break) should be put into a sequence.
Thus use the corresponding function "seq_putc".
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Tue, 2 May 2017 08:32:19 +0000 (10:32 +0200)]
pinctrl: Add spaces for better code readability
The script "checkpatch.pl" pointed information out like the following.
CHECK: spaces preferred around that '+' (ctx:VxV)
Thus fix the affected source code places.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Tue, 2 May 2017 08:22:47 +0000 (10:22 +0200)]
pinctrl: Combine substrings for a message in pin_config_group_get()
The script "checkpatch.pl" pointed information out like the following.
WARNING: quoted string split across lines
Thus fix the affected source code place.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Tue, 2 May 2017 08:01:57 +0000 (10:01 +0200)]
pinctrl: Adjust five checks for null pointers
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The script “checkpatch.pl” pointed information out like the following.
Comparison to NULL could be written !…
Thus fix the affected source code places.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Tue, 2 May 2017 07:52:50 +0000 (09:52 +0200)]
pinctrl: Replace two seq_printf() calls by seq_puts() in pinconf_show_map()
Strings which did not contain data format specifications should be put
into a sequence. Thus use the corresponding function "seq_puts".
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Shyam Sundar S K [Wed, 3 May 2017 06:29:11 +0000 (11:59 +0530)]
pinctrl/amd: Update contact information for AMD pinctrl/amd
Updating the point of contact for AMD GPIO driver.
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Signed-off-by: Nehal Shah <Nehal-bakulchandra.Shah@amd.com>
Cc: Ken Xue <Ken.Xue@amd.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Mon, 1 May 2017 20:24:29 +0000 (22:24 +0200)]
pinctrl: Use seq_putc() in three functions
A single character (line break) should be put into a sequence.
Thus use the corresponding function "seq_putc".
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Gregory CLEMENT [Fri, 28 Apr 2017 14:01:33 +0000 (16:01 +0200)]
pinctrl: armada-37xx: Add irqchip support
The Armada 37xx SoCs can handle interrupt through GPIO. However it can
only manage the edge ones.
The way the interrupt are managed is classical so we can use the generic
interrupt chip model.
The only unusual "feature" is that many interrupts are connected to the
parent interrupt controller. But we do not take advantage of this and use
the chained irq with all of them.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Masahiro Yamada [Fri, 28 Apr 2017 12:50:35 +0000 (21:50 +0900)]
pinctrl: rockchip: remove unneeded (void *) casts in of_match_table
of_device_id::data is an opaque pointer. No explicit cast is needed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Shawn Guo [Mon, 24 Apr 2017 13:01:13 +0000 (21:01 +0800)]
pinctrl: add ZTE ZX pinctrl driver support
The pin controller on ZTE ZX platforms is kinda of hybrid. It consists
of a main controller and an auxiliary one. For example, on ZX296718 SoC,
the main controller is TOP_PMM and the auxiliary one is AON_IOCFG. Both
controllers work together to control pin multiplexing and configuration.
For most of pins, the pinmux function is controlled by main controller
only, and this type of pins are meant by term 'TOP pins'. For other
pins, the pinmux is controlled by both main and auxiliary controllers,
as the available multiplexing functions for the pin spread in both
controllers. This type of pins are called 'AON pins'. Though pinmux
implementation is quite different, pinconf is same for both types of
pins. Both are controlled by auxiliary controller, i.e. AON_IOCFG on
ZX296718.
The patch adds the ZTE ZX core pinctrl driver to support this hybrid
pin controller as well as ZX296718 SoC specific pin data.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Shawn Guo [Mon, 24 Apr 2017 13:01:12 +0000 (21:01 +0800)]
dt-bindings: add bindings doc for ZTE pinctrl
It adds device tree bindings for ZTE pin controller found on ZX2967xx
family SoCs.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Torvalds [Mon, 22 May 2017 02:30:23 +0000 (19:30 -0700)]
Linux 4.12-rc2
Linus Torvalds [Mon, 22 May 2017 01:26:54 +0000 (18:26 -0700)]
x86: fix 32-bit case of __get_user_asm_u64()
The code to fetch a 64-bit value from user space was entirely buggered,
and has been since the code was merged in early 2016 in commit
b2f680380ddf ("x86/mm/32: Add support for 64-bit __get_user() on 32-bit
kernels").
Happily the buggered routine is almost certainly entirely unused, since
the normal way to access user space memory is just with the non-inlined
"get_user()", and the inlined version didn't even historically exist.
The normal "get_user()" case is handled by external hand-written asm in
arch/x86/lib/getuser.S that doesn't have either of these issues.
There were two independent bugs in __get_user_asm_u64():
- it still did the STAC/CLAC user space access marking, even though
that is now done by the wrapper macros, see commit
11f1a4b9755f
("x86: reorganize SMAP handling in user space accesses").
This didn't result in a semantic error, it just means that the
inlined optimized version was hugely less efficient than the
allegedly slower standard version, since the CLAC/STAC overhead is
quite high on modern Intel CPU's.
- the double register %eax/%edx was marked as an output, but the %eax
part of it was touched early in the asm, and could thus clobber other
inputs to the asm that gcc didn't expect it to touch.
In particular, that meant that the generated code could look like
this:
mov (%eax),%eax
mov 0x4(%eax),%edx
where the load of %edx obviously was _supposed_ to be from the 32-bit
word that followed the source of %eax, but because %eax was
overwritten by the first instruction, the source of %edx was
basically random garbage.
The fixes are trivial: remove the extraneous STAC/CLAC entries, and mark
the 64-bit output as early-clobber to let gcc know that no inputs should
alias with the output register.
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Benjamin LaHaise <bcrl@kvack.org>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: stable@kernel.org # v4.8+
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 21 May 2017 22:25:46 +0000 (15:25 -0700)]
Clean up x86 unsafe_get/put_user() type handling
Al noticed that unsafe_put_user() had type problems, and fixed them in
commit
a7cc722fff0b ("fix unsafe_put_user()"), which made me look more
at those functions.
It turns out that unsafe_get_user() had a type issue too: it limited the
largest size of the type it could handle to "unsigned long". Which is
fine with the current users, but doesn't match our existing normal
get_user() semantics, which can also handle "u64" even when that does
not fit in a long.
While at it, also clean up the type cast in unsafe_put_user(). We
actually want to just make it an assignment to the expected type of the
pointer, because we actually do want warnings from types that don't
convert silently. And it makes the code more readable by not having
that one very long and complex line.
[ This patch might become stable material if we ever end up back-porting
any new users of the unsafe uaccess code, but as things stand now this
doesn't matter for any current existing uses. ]
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 21 May 2017 19:06:44 +0000 (12:06 -0700)]
Merge branch 'for-linus' of git://git./linux/kernel/git/viro/vfs
Pull misc uaccess fixes from Al Viro:
"Fix for unsafe_put_user() (no callers currently in mainline, but
anyone starting to use it will step into that) + alpha osf_wait4()
infoleak fix"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
osf_wait4(): fix infoleak
fix unsafe_put_user()
Linus Torvalds [Sun, 21 May 2017 18:52:00 +0000 (11:52 -0700)]
Merge branch 'sched-urgent-for-linus' of git://git./linux/kernel/git/tip/tip
Pull scheduler fix from Thomas Gleixner:
"A single scheduler fix:
Prevent idle task from ever being preempted. That makes sure that
synchronize_rcu_tasks() which is ignoring idle task does not pretend
that no task is stuck in preempted state. If that happens and idle was
preempted on a ftrace trampoline the machine crashes due to
inconsistent state"
* 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
sched/core: Call __schedule() from do_idle() without enabling preemption
Linus Torvalds [Sun, 21 May 2017 18:45:26 +0000 (11:45 -0700)]
Merge branch 'irq-urgent-for-linus' of git://git./linux/kernel/git/tip/tip
Pull irq fixes from Thomas Gleixner:
"A set of small fixes for the irq subsystem:
- Cure a data ordering problem with chained interrupts
- Three small fixlets for the mbigen irq chip"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
genirq: Fix chained interrupt data ordering
irqchip/mbigen: Fix the clear register offset calculation
irqchip/mbigen: Fix potential NULL dereferencing
irqchip/mbigen: Fix memory mapping code
Al Viro [Mon, 15 May 2017 01:47:25 +0000 (21:47 -0400)]
osf_wait4(): fix infoleak
failing sys_wait4() won't fill struct rusage...
Cc: stable@vger.kernel.org
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Al Viro [Sun, 21 May 2017 17:08:42 +0000 (13:08 -0400)]
fix unsafe_put_user()
__put_user_size() relies upon its first argument having the same type as what
the second one points to; the only other user makes sure of that and
unsafe_put_user() should do the same.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Linus Torvalds [Sun, 21 May 2017 06:39:03 +0000 (23:39 -0700)]
Merge tag 'trace-v4.12-rc1' of git://git./linux/kernel/git/rostedt/linux-trace
Pull tracing fixes from Steven Rostedt:
- Fix a bug caused by not cleaning up the new instance unique triggers
when deleting an instance. It also creates a selftest that triggers
that bug.
- Fix the delayed optimization happening after kprobes boot up self
tests being removed by freeing of init memory.
- Comment kprobes on why the delay optimization is not a problem for
removal of modules, to keep other developers from searching that
riddle.
- Fix another case of rcu not watching in stack trace tracing.
* tag 'trace-v4.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace:
tracing: Make sure RCU is watching before calling a stack trace
kprobes: Document how optimized kprobes are removed from module unload
selftests/ftrace: Add test to remove instance with active event triggers
selftests/ftrace: Fix bashisms
ftrace: Remove #ifdef from code and add clear_ftrace_function_probes() stub
ftrace/instances: Clear function triggers when removing instances
ftrace: Simplify glob handling in unregister_ftrace_function_probe_func()
tracing/kprobes: Enforce kprobes teardown after testing
tracing: Move postpone selftests to core from early_initcall
Linus Torvalds [Sat, 20 May 2017 23:12:30 +0000 (16:12 -0700)]
Merge branch 'for-linus' of git://git.kernel.dk/linux-block
Pull block fixes from Jens Axboe:
"A small collection of fixes that should go into this cycle.
- a pull request from Christoph for NVMe, which ended up being
manually applied to avoid pulling in newer bits in master. Mostly
fibre channel fixes from James, but also a few fixes from Jon and
Vijay
- a pull request from Konrad, with just a single fix for xen-blkback
from Gustavo.
- a fuseblk bdi fix from Jan, fixing a regression in this series with
the dynamic backing devices.
- a blktrace fix from Shaohua, replacing sscanf() with kstrtoull().
- a request leak fix for drbd from Lars, fixing a regression in the
last series with the kref changes. This will go to stable as well"
* 'for-linus' of git://git.kernel.dk/linux-block:
nvmet: release the sq ref on rdma read errors
nvmet-fc: remove target cpu scheduling flag
nvme-fc: stop queues on error detection
nvme-fc: require target or discovery role for fc-nvme targets
nvme-fc: correct port role bits
nvme: unmap CMB and remove sysfs file in reset path
blktrace: fix integer parse
fuseblk: Fix warning in super_setup_bdi_name()
block: xen-blkback: add null check to avoid null pointer dereference
drbd: fix request leak introduced by locking/atomic, kref: Kill kref_sub()
Vijay Immanuel [Mon, 8 May 2017 23:38:35 +0000 (16:38 -0700)]
nvmet: release the sq ref on rdma read errors
On rdma read errors, release the sq ref that was taken
when the req was initialized. This avoids a hang in
nvmet_sq_destroy() when the queue is being freed.
Signed-off-by: Vijay Immanuel <vijayi@attalasystems.com>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@fb.com>
James Smart [Tue, 25 Apr 2017 23:23:09 +0000 (16:23 -0700)]
nvmet-fc: remove target cpu scheduling flag
Remove NVMET_FCTGTFEAT_NEEDS_CMD_CPUSCHED. It's unnecessary.
Signed-off-by: James Smart <james.smart@broadcom.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@fb.com>
James Smart [Tue, 25 Apr 2017 22:32:01 +0000 (15:32 -0700)]
nvme-fc: stop queues on error detection
Per the recommendation by Sagi on:
http://lists.infradead.org/pipermail/linux-nvme/2017-April/009261.html
Rather than waiting for reset work thread to stop queues and abort the ios,
immediately stop the queues on error detection. Reset thread will restop
the queues (as it's called on other paths), but it does not appear to have
a side effect.
Signed-off-by: James Smart <james.smart@broadcom.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@fb.com>
James Smart [Fri, 5 May 2017 23:13:15 +0000 (16:13 -0700)]
nvme-fc: require target or discovery role for fc-nvme targets
In order to create an association, the remoteport must be
serving either a target role or a discovery role.
Signed-off-by: James Smart <james.smart@broadcom.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@fb.com>
James Smart [Fri, 5 May 2017 23:13:02 +0000 (16:13 -0700)]
nvme-fc: correct port role bits
FC Port roles is a bit mask, not individual values.
Correct nvme definitions to unique bits.
Signed-off-by: James Smart <james.smart@broadcom.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@fb.com>
Jon Derrick [Fri, 5 May 2017 20:52:06 +0000 (14:52 -0600)]
nvme: unmap CMB and remove sysfs file in reset path
CMB doesn't get unmapped until removal while getting remapped on every
reset. Add the unmapping and sysfs file removal to the reset path in
nvme_pci_disable to match the mapping path in nvme_pci_enable.
Fixes:
202021c1a ("nvme : Add sysfs entry for NVMe CMBs when appropriate")
Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
Acked-by: Keith Busch <keith.busch@intel.com>
Reviewed-By: Stephen Bates <sbates@raithlin.com>
Cc: <stable@vger.kernel.org> # 4.9+
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@fb.com>
Linus Torvalds [Sat, 20 May 2017 16:02:27 +0000 (09:02 -0700)]
Merge tag 'staging-4.12-rc2' of git://git./linux/kernel/git/gregkh/staging
Pull staging driver fixes from Greg KH:
"Here are a number of staging driver fixes for 4.12-rc2
Most of them are typec driver fixes found by reviewers and users of
the code. There are also some removals of files no longer needed in
the tree due to the ion driver rewrite in 4.12-rc1, as well as some
wifi driver fixes. And to round it out, a MAINTAINERS file update.
All have been in linux-next with no reported issues"
* tag 'staging-4.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (22 commits)
MAINTAINERS: greybus-dev list is members-only
staging: fsl-dpaa2/eth: add ETHERNET dependency
staging: typec: fusb302: refactor resume retry mechanism
staging: typec: fusb302: reset i2c_busy state in error
staging: rtl8723bs: remove re-positioned call to kfree in os_dep/ioctl_cfg80211.c
staging: rtl8192e: GetTs Fix invalid TID 7 warning.
staging: rtl8192e: rtl92e_get_eeprom_size Fix read size of EPROM_CMD.
staging: rtl8192e: fix 2 byte alignment of register BSSIDR.
staging: rtl8192e: rtl92e_fill_tx_desc fix write to mapped out memory.
staging: vc04_services: Fix bulk cache maintenance
staging: ccree: remove extraneous spin_unlock_bh() in error handler
staging: typec: Fix sparse warnings about incorrect types
staging: typec: fusb302: do not free gpio from managed resource
staging: typec: tcpm: Fix Port Power Role field in PS_RDY messages
staging: typec: tcpm: Respond to Discover Identity commands
staging: typec: tcpm: Set correct flags in PD request messages
staging: typec: tcpm: Drop duplicate PD messages
staging: typec: fusb302: Fix chip->vbus_present init value
staging: typec: fusb302: Fix module autoload
staging: typec: tcpci: declare private structure as static
...
Linus Torvalds [Sat, 20 May 2017 15:52:34 +0000 (08:52 -0700)]
Merge tag 'usb-4.12-rc2' of git://git./linux/kernel/git/gregkh/usb
Pull USB fixes from Greg KH:
"Here are a number of small USB fixes for 4.12-rc2
Most of them come from Johan, in his valiant quest to fix up all
drivers that could be affected by "malicious" USB devices. There's
also some fixes for more "obscure" drivers to handle some of the
vmalloc stack fallout (which for USB drivers, was always the case, but
very few people actually ran those systems...)
Other than that, the normal set of xhci and gadget and musb driver
fixes as well.
All have been in linux-next with no reported issues"
* tag 'usb-4.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (42 commits)
usb: musb: tusb6010_omap: Do not reset the other direction's packet size
usb: musb: Fix trying to suspend while active for OTG configurations
usb: host: xhci-plat: propagate return value of platform_get_irq()
xhci: Fix command ring stop regression in 4.11
xhci: remove GFP_DMA flag from allocation
USB: xhci: fix lock-inversion problem
usb: host: xhci-ring: don't need to clear interrupt pending for MSI enabled hcd
usb: host: xhci-mem: allocate zeroed Scratchpad Buffer
xhci: apply PME_STUCK_QUIRK and MISSING_CAS quirk for Denverton
usb: xhci: trace URB before giving it back instead of after
USB: serial: qcserial: add more Lenovo EM74xx device IDs
USB: host: xhci: use max-port define
USB: hub: fix SS max number of ports
USB: hub: fix non-SS hub-descriptor handling
USB: hub: fix SS hub-descriptor handling
USB: usbip: fix nonconforming hub descriptor
USB: gadget: dummy_hcd: fix hub-descriptor removable fields
doc-rst: fixed kernel-doc directives in usb/typec.rst
USB: core: of: document reference taken by companion helper
USB: ehci-platform: fix companion-device leak
...
Linus Torvalds [Sat, 20 May 2017 15:44:22 +0000 (08:44 -0700)]
Merge tag 'char-misc-4.12-rc2' of git://git./linux/kernel/git/gregkh/char-misc
Pull char/misc driver fixes from Greg KH:
"Here are five small bugfixes for reported issues with 4.12-rc1 and
earlier kernels. Nothing huge here, just a lp, mem, vpd, and uio
driver fix, along with a Kconfig fixup for one of the misc drivers.
All of these have been in linux-next with no reported issues"
* tag 'char-misc-4.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc:
firmware: Google VPD: Fix memory allocation error handling
drivers: char: mem: Check for address space wraparound with mmap()
uio: fix incorrect memory leak cleanup
misc: pci_endpoint_test: select CRC32
char: lp: fix possible integer overflow in lp_setup()
Linus Torvalds [Sat, 20 May 2017 15:35:27 +0000 (08:35 -0700)]
Merge git://www.linux-watchdog.org/linux-watchdog
Pull watchdog fixes from Wim Van Sebroeck:
- orion_wdt compile-test dependencies
- sama5d4_wdt: WDDIS handling and a race confition
- pcwd_usb: fix NULL-deref at probe
- cadence_wdt: fix timeout setting
- wdt_pci: fix build error if SOFTWARE_REBOOT is defined
- iTCO_wdt: all versions count down twice
- zx2967: remove redundant dev_err call in zx2967_wdt_probe()
- bcm281xx: Fix use of uninitialized spinlock
* git://www.linux-watchdog.org/linux-watchdog:
watchdog: bcm281xx: Fix use of uninitialized spinlock.
watchdog: zx2967: remove redundant dev_err call in zx2967_wdt_probe()
iTCO_wdt: all versions count down twice
watchdog: wdt_pci: fix build error if define SOFTWARE_REBOOT
watchdog: cadence_wdt: fix timeout setting
watchdog: pcwd_usb: fix NULL-deref at probe
watchdog: sama5d4: fix race condition
watchdog: sama5d4: fix WDDIS handling
watchdog: orion: fix compile-test dependencies
Linus Torvalds [Sat, 20 May 2017 15:29:30 +0000 (08:29 -0700)]
Merge tag 'drm-fixes-for-v4.12-rc2' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"Mostly nouveau and i915, fairly quiet as usual for rc2"
* tag 'drm-fixes-for-v4.12-rc2' of git://people.freedesktop.org/~airlied/linux:
drm/atmel-hlcdc: Fix output initialization
gpu: host1x: select IOMMU_IOVA
drm/nouveau/fifo/gk104-: Silence a locking warning
drm/nouveau/secboot: plug memory leak in ls_ucode_img_load_gr() error path
drm/nouveau: Fix drm poll_helper handling
drm/i915: don't do allocate_va_range again on PIN_UPDATE
drm/i915: Fix rawclk readout for g4x
drm/i915: Fix runtime PM for LPE audio
drm/i915/glk: Fix DSI "*ERROR* ULPS is still active" messages
drm/i915/gvt: avoid unnecessary vgpu switch
drm/i915/gvt: not to restore in-context mmio
drm/etnaviv: don't put fence in case of submit failure
drm/i915/gvt: fix typo: "supporte" -> "support"
drm: hdlcd: Fix the calculation of the scanout start address
Linus Torvalds [Sat, 20 May 2017 00:46:51 +0000 (17:46 -0700)]
Merge tag 'scsi-fixes' of git://git./linux/kernel/git/jejb/scsi
Pull SCSI fixes from James Bottomley:
"This is the first sweep of mostly minor fixes. There's one security
one: the read past the end of a buffer in qedf, and a panic fix for
lpfc SLI-3 adapters, but the rest are a set of include and build
dependency tidy ups and assorted other small fixes and updates"
* tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
scsi: pmcraid: remove redundant check to see if request_size is less than zero
scsi: lpfc: ensure els_wq is being checked before destroying it
scsi: cxlflash: Select IRQ_POLL
scsi: qedf: Avoid reading past end of buffer
scsi: qedf: Cleanup the type of io_log->op
scsi: lpfc: double lock typo in lpfc_ns_rsp()
scsi: qedf: properly update arguments position in function call
scsi: scsi_lib: Add #include <scsi/scsi_transport.h>
scsi: MAINTAINERS: update OSD entries
scsi: Skip deleted devices in __scsi_device_lookup
scsi: lpfc: Fix panic on BFS configuration
scsi: libfc: do not flood console with messages 'libfc: queue full ...'