Alexey Bataev [Wed, 17 Feb 2016 13:19:37 +0000 (13:19 +0000)]
[OPENMP 4.5] Codegen support for data members in 'firstprivate' clause.
Added codegen for captured data members in non-static member functions.
llvm-svn: 261089
Daniel Sanders [Wed, 17 Feb 2016 13:16:31 +0000 (13:16 +0000)]
[libcxx] Fix definition of regex_traits::__regex_word on big-endian glibc systems
Summary:
On glibc, the bits used for the various character classes is endian dependant
(see _ISbit() in ctypes.h) but __regex_word does not account for this and uses
a spare bit that isn't spare on big-endian. On big-endian, it overlaps with the
bit for graphic characters which causes '-', '@', etc. to be considered a word
character.
Fixed this by defining the value using _ISbit(15) on MIPS glibc systems. We've
restricted this to MIPS for now to avoid the risk of introducing failures in
other targets.
Fixes PR26476.
Reviewers: hans, mclow.lists
Subscribers: dsanders, cfe-commits
Differential Revision: http://reviews.llvm.org/D17132
llvm-svn: 261088
Simon Atanasyan [Wed, 17 Feb 2016 12:49:43 +0000 (12:49 +0000)]
[ELF][MIPS] Update test case expectations due changes in MIPS/MC
llvm-svn: 261085
Anastasia Stulova [Wed, 17 Feb 2016 11:34:37 +0000 (11:34 +0000)]
[OpenCL] Added half type literal with suffix h.
OpenCL Extension v1.2 s9.5 allows half precision floating point
type literals with suffices h or H when cl_khr_fp16 is enabled.
Example: half x = 1.0h;
Patch by Liu Yaxun (Sam)!
Differential Revision: http://reviews.llvm.org/D16865
llvm-svn: 261084
Scott Egerton [Wed, 17 Feb 2016 11:15:16 +0000 (11:15 +0000)]
[mips] Removed the SHF_ALLOC flag and the SHT_REL flag from the .pdr section.
This section is used for debug information and has no need to be
in memory at runtime. This patch also fixes an error when compiling
the Linux kernel. The error is that there are relocations within the
.pdr section in a VDSO. SHT_REL was removed as it is a section type
and not a section flag, therefore it does not make sense for it to
be there. With this patch, LLVM now emits the same flags as
the GNU assembler.
llvm-svn: 261083
Simon Pilgrim [Wed, 17 Feb 2016 10:50:06 +0000 (10:50 +0000)]
[X86][AVX] Support bit-blend integer shuffles for 256-bit integer vectors
AVX1 doesn't support the shuffling of 256-bit integer vectors. For 32/64-bit elements we get around this by shuffling as float/double but for 8/16-bit elements (assuming they can't widen) we currently just split, shuffle as 128-bit vectors and concatenate the results back.
This patch adds the ability to lower using the bit-blend patterns before defaulting to the splitting behaviour.
Part 2 of 2
Differential Revision: http://reviews.llvm.org/D17292
llvm-svn: 261082
Simon Pilgrim [Wed, 17 Feb 2016 10:37:49 +0000 (10:37 +0000)]
[X86][AVX] Support bit-mask integer shuffles for 256-bit integer vectors
AVX1 doesn't support the shuffling of 256-bit integer vectors. For 32/64-bit elements we get around this by shuffling as float/double but for 8/16-bit elements (assuming they can't widen) we currently just split, shuffle as 128-bit vectors and concatenate the results back.
This patch adds the ability to lower using the bit-mask patterns before defaulting to the splitting behaviour. In some cases this ends up matching what AVX2 would do anyhow or what AVX1 does on the split vectors.
Part 1 of 2
Differential Revision: http://reviews.llvm.org/D17292
llvm-svn: 261081
Alexey Bataev [Wed, 17 Feb 2016 10:29:05 +0000 (10:29 +0000)]
[OPENMP] Fix handling loop-based directives with arrays.
Patch fixes possible problems with correct handling arrays as
expressions in initialization, conditions etc in loop-based constructs.
llvm-svn: 261080
Simon Pilgrim [Wed, 17 Feb 2016 10:12:30 +0000 (10:12 +0000)]
[X86][SSE] Tidyup BUILD_VECTOR operand collection. NFCI.
Avoid reuse of operand variables, keep them local to a particular lowering - the operand collection is unique to each case anyhow.
Renamed from V to Ops to more closely match their purpose.
llvm-svn: 261078
Benjamin Kramer [Wed, 17 Feb 2016 09:28:45 +0000 (09:28 +0000)]
[Hexagon] cast<> a reference instead of referencing + dereferencing.
llvm-svn: 261077
Jonas Hahnfeld [Wed, 17 Feb 2016 07:12:18 +0000 (07:12 +0000)]
[compiler-rt][msan] Ensure initialisation before calling __msan_unpoison
__msan_unpoison uses intercepted memset which currently leads to a SEGV
when linking with libc++ under CentOS 7.
Differential Revision: http://reviews.llvm.org/D17263
llvm-svn: 261073
David Blaikie [Wed, 17 Feb 2016 07:00:24 +0000 (07:00 +0000)]
llvm-dwp: Support for type units when merging DWPs into larger DWPs
llvm-svn: 261072
David Blaikie [Wed, 17 Feb 2016 07:00:22 +0000 (07:00 +0000)]
Fix the hash function.
llvm-svn: 261071
Cong Hou [Wed, 17 Feb 2016 06:37:04 +0000 (06:37 +0000)]
Detecte vector reduction operations just before instruction selection.
This patch detects vector reductions before instruction selection. Vector
reductions are vectorized reduction operations, and for such operations we have
freedom to reorganize the elements of the result as long as the reduction of them
stay unchanged. This will enable some reduction pattern recognition during
instruction combine such as SAD/dot-product on X86. A flag is added to
SDNodeFlags to mark those vector reduction nodes to be checked during instruction
combine.
To detect those vector reductions, we search def-use chains starting from the
given instruction, and check if all uses fall into two categories:
1. Reduction with another vector.
2. Reduction on all elements.
in which 2 is detected by recognizing the pattern that the loop vectorizer
generates to reduce all elements in the vector outside of the loop, which
includes several ShuffleVector and one ExtractElement instructions.
Differential revision: http://reviews.llvm.org/D15250
llvm-svn: 261070
Rui Ueyama [Wed, 17 Feb 2016 06:08:42 +0000 (06:08 +0000)]
Make getOffset a member function of DynamicReloc<ELFT>.
Logically it belongs to DynamicReloc, and it is more readable to
be a member of the class.
llvm-svn: 261069
Rui Ueyama [Wed, 17 Feb 2016 05:40:03 +0000 (05:40 +0000)]
Use shorter names for the .gnu.hash class.
llvm-svn: 261067
Rui Ueyama [Wed, 17 Feb 2016 05:40:01 +0000 (05:40 +0000)]
Use stable_partition instead of erasing all elements and fill it again.
llvm-svn: 261066
Rui Ueyama [Wed, 17 Feb 2016 05:06:40 +0000 (05:06 +0000)]
Use an accurate type instead of unsigned.
These values are offsets in the string table (which must fit in
host computer's memory space), so size_t is better than unsigned.
llvm-svn: 261065
Rui Ueyama [Wed, 17 Feb 2016 04:56:44 +0000 (04:56 +0000)]
Split SymbolTableSection::writeGlobalSymbols.
Previously, we added garbage-collected symbols to the symbol table
and filter them out when we were writing symbols to the file. In
this patch, garbage-collected symbols are filtered out from beginning.
llvm-svn: 261064
Hans Wennborg [Wed, 17 Feb 2016 02:49:59 +0000 (02:49 +0000)]
Revert r260979 "[X86] Enable the LEA optimization pass by default."
Asserts are still firing in Chromium builds. PR26575.
llvm-svn: 261058
Xinliang David Li [Wed, 17 Feb 2016 02:39:34 +0000 (02:39 +0000)]
revert r261038: arm/aarch64 bot failure
llvm-svn: 261057
Mehdi Amini [Wed, 17 Feb 2016 02:18:58 +0000 (02:18 +0000)]
Revert "Query the StringMap only once when creating MDString (NFC)"
This reverts commit r261030 and r261036.
(The revision was marked "approved" on phabricator, but some concerns
were raised on the mailing list. Thanks D. Blaikie for notifying me.)
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261055
Chandler Carruth [Wed, 17 Feb 2016 02:13:35 +0000 (02:13 +0000)]
[cmake] Revert r260742 (and r260744) to improve order file support.
This appears to be passing '-Wl,-order_file' to Linux link commands,
which then causes the linker to silently, behind the scenes, write the
output to 'rder_file' instead of somewhere else. Will work with Chris to
figure out the proper support for this, but so far there are numerous
people who can't get Clang to update when they build because of this.
llvm-svn: 261054
Sean Silva [Wed, 17 Feb 2016 02:08:19 +0000 (02:08 +0000)]
[AttrDocs.td] Fix up some reST syntax.
llvm-svn: 261053
Haicheng Wu [Wed, 17 Feb 2016 02:01:50 +0000 (02:01 +0000)]
[AliasSetTracker] Teach AliasSetTracker about MemSetInst
This change is to fix the problem discussed in
http://lists.llvm.org/pipermail/llvm-dev/2016-February/095446.html.
llvm-svn: 261052
JF Bastien [Wed, 17 Feb 2016 01:59:23 +0000 (01:59 +0000)]
WebAssembly: update expected failures
r261050 seems to inadvertently fix the assertion failure.
llvm-svn: 261051
Dan Gohman [Wed, 17 Feb 2016 01:43:37 +0000 (01:43 +0000)]
[WebAssembly] Call memcpy for large byval copies.
This fixes very slow compilation on
test/CodeGen/Generic/2010-11-04-BigByval.ll . Note that MaxStoresPerMemcpy
and friends are not yet carefully tuned so the cutoff point is currently
somewhat arbitrary. However, it's important that there be a cutoff point
so that we don't emit unbounded quantities of loads and stores.
llvm-svn: 261050
Evgeniy Stepanov [Wed, 17 Feb 2016 01:34:56 +0000 (01:34 +0000)]
[msan] Extend prlimit test.
llvm-svn: 261049
Evgeniy Stepanov [Wed, 17 Feb 2016 01:26:57 +0000 (01:26 +0000)]
[msan] Intercept prlimit.
llvm-svn: 261048
Xinliang David Li [Wed, 17 Feb 2016 00:59:01 +0000 (00:59 +0000)]
Test simplification
llvm-svn: 261047
Xinliang David Li [Wed, 17 Feb 2016 00:58:13 +0000 (00:58 +0000)]
Restrengthen tests relaxed in r259955
llvm-svn: 261046
Mehdi Amini [Wed, 17 Feb 2016 00:42:20 +0000 (00:42 +0000)]
Teach clang to use the ThinLTO pipeline
Summary: Use the new pipeline implemented in D17115
Reviewers: tejohnson
Subscribers: joker.eph, cfe-commits
Differential Revision: http://reviews.llvm.org/D17272
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261045
JF Bastien [Wed, 17 Feb 2016 00:34:15 +0000 (00:34 +0000)]
WebAssembly: update expected test failures
r261032 adds frame address support.
llvm-svn: 261044
Matt Arsenault [Wed, 17 Feb 2016 00:27:31 +0000 (00:27 +0000)]
Add .gitignore for build directories
llvm-svn: 261043
Matt Arsenault [Wed, 17 Feb 2016 00:27:27 +0000 (00:27 +0000)]
amdgcn: Use new workitem intrinsics
llvm-svn: 261042
Chandler Carruth [Wed, 17 Feb 2016 00:18:16 +0000 (00:18 +0000)]
[LCG] Construct an actual call graph with call-edge SCCs nested inside
reference-edge SCCs.
This essentially builds a more normal call graph as a subgraph of the
"reference graph" that was the old model. This allows both to exist and
the different use cases to use the aspect which addresses their needs.
Specifically, the pass manager and other *ordering* constrained logic
can use the reference graph to achieve conservative order of visit,
while analyses reasoning about attributes and other properties derived
from reachability can reason about the direct call graph.
Note that this isn't necessarily complete: it doesn't model edges to
declarations or indirect calls. Those can be found by scanning the
instructions of the function if desirable, and in fact every user
currently does this in order to handle things like calls to instrinsics.
If useful, we could consider caching this information in the call graph
to save the instruction scans, but currently that doesn't seem to be
important.
An important realization for why the representation chosen here works is
that the call graph is a formal subset of the reference graph and thus
both can live within the same data structure. All SCCs of the call graph
are necessarily contained within an SCC of the reference graph, etc.
The design is to build 'RefSCC's to model SCCs of the reference graph,
and then within them more literal SCCs for the call graph.
The formation of actual call edge SCCs is not done lazily, unlike
reference edge 'RefSCC's. Instead, once a reference SCC is formed, it
directly builds the call SCCs within it and stores them in a post-order
sequence. This is used to provide a consistent platform for mutation and
update of the graph. The post-order also allows for very efficient
updates in common cases by bounding the number of nodes (and thus edges)
considered.
There is considerable common code that I'm still looking for the best
way to factor out between the various DFS implementations here. So far,
my attempts have made the code harder to read and understand despite
reducing the duplication, which seems a poor tradeoff. I've not given up
on figuring out the right way to do this, but I wanted to wait until
I at least had the system working and tested to continue attempting to
factor it differently.
This also requires introducing several new algorithms in order to handle
all of the incremental update scenarios for the more complex structure
involving two edge colorings. I've tried to comment the algorithms
sufficiently to make it clear how this is expected to work, but they may
still need more extensive documentation.
I know that there are some changes which are not strictly necessarily
coupled here. The process of developing this started out with a very
focused set of changes for the new structure of the graph and
algorithms, but subsequent changes to bring the APIs and code into
consistent and understandable patterns also ended up touching on other
aspects. There was no good way to separate these out without causing
*massive* merge conflicts. Ultimately, to a large degree this is
a rewrite of most of the core algorithms in the LCG class and so I don't
think it really matters much.
Many thanks to the careful review by Sanjoy Das!
Differential Revision: http://reviews.llvm.org/D16802
llvm-svn: 261040
Reid Kleckner [Wed, 17 Feb 2016 00:17:33 +0000 (00:17 +0000)]
[X86] Fix a shrink-wrapping miscompile around __chkstk
__chkstk clobbers EAX. If EAX is live across the prologue, then we have
to take extra steps to save it. We already had code to do this if EAX
was a register parameter. This change adapts it to work when shrink
wrapping is used.
llvm-svn: 261039
Xinliang David Li [Wed, 17 Feb 2016 00:14:52 +0000 (00:14 +0000)]
New test case: make sure alloc bit is not set for covmap section on Linux
llvm-svn: 261038
Dan Gohman [Wed, 17 Feb 2016 00:14:03 +0000 (00:14 +0000)]
[WebAssembly] Use SDValue::getConstantOperandVal. NFC.
llvm-svn: 261037
Mehdi Amini [Wed, 17 Feb 2016 00:11:59 +0000 (00:11 +0000)]
Fix MSVC bot: apparently visual studio does not like explicitly defaulted move ctor
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261036
Richard Smith [Wed, 17 Feb 2016 00:04:04 +0000 (00:04 +0000)]
Improve diagnostics for ill-formed literal operator declarations.
Patch by Erik Pilkington!
llvm-svn: 261034
Andrew Kaylor [Tue, 16 Feb 2016 23:52:18 +0000 (23:52 +0000)]
Fix build LLVM with -D LLVM_USE_INTEL_JITEVENTS:BOOL=ON on Windows
Differential Revision: http://reviews.llvm.org/D16940
llvm-svn: 261033
Dan Gohman [Tue, 16 Feb 2016 23:48:04 +0000 (23:48 +0000)]
[WebAssembly] Implement __builtin_frame_address.
Differential Revision: http://reviews.llvm.org/D17307
llvm-svn: 261032
Mehdi Amini [Tue, 16 Feb 2016 23:05:56 +0000 (23:05 +0000)]
Query the StringMap only once when creating MDString (NFC)
Summary: Loading IR with debug info improves MDString::get() from 19ms to 10ms.
Reviewers: dexonsmith
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D16597
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261030
Mehdi Amini [Tue, 16 Feb 2016 23:02:29 +0000 (23:02 +0000)]
Define the ThinLTO Pipeline (experimental)
Summary:
On the contrary to Full LTO, ThinLTO can afford to shift compile time
from the frontend to the linker: both phases are parallel (even if
it is not totally "free": projects like clang are reusing product
from the "compile phase" for multiple link, think about
libLLVMSupport reused for opt, llc, etc.).
This pipeline is based on the proposal in D13443 for full LTO. We
didn't move forward on this proposal because the LTO link was far too
long after that. We believe that we can afford it with ThinLTO.
The ThinLTO pipeline integrates in the regular O2/O3 flow:
- The compile phase perform the inliner with a somehow lighter
function simplification. (TODO: tune the inliner thresholds here)
This is intendend to simplify the IR and get rid of obvious things
like linkonce_odr that will be inlined.
- The link phase will run the pipeline from the start, extended with
some specific passes that leverage the augmented knowledge we have
during LTO. Especially after the inliner is done, a sequence of
globalDCE/globalOpt is performed, followed by another run of the
"function simplification" passes. It is not clear if this part
of the pipeline will stay as is, as the split model of ThinLTO
does not allow the same benefit as FullLTO without added tricks.
The measurements on the public test suite as well as on our internal
suite show an overall net improvement. The binary size for the clang
executable is reduced by 5%. We're still tuning it with the bringup
of ThinLTO and it will evolve, but this should provide a good starting
point.
Reviewers: tejohnson
Differential Revision: http://reviews.llvm.org/D17115
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261029
Mehdi Amini [Tue, 16 Feb 2016 22:54:27 +0000 (22:54 +0000)]
Refactor the PassManagerBuilder: extract a "addFunctionSimplificationPasses()" (NFC)
It is intended to contains the passes run over a function after the
inliner is done with a function and before it moves to its callers.
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261028
Adam Nemet [Tue, 16 Feb 2016 22:50:19 +0000 (22:50 +0000)]
Fix test from r261013
llvm-svn: 261027
Simon Pilgrim [Tue, 16 Feb 2016 22:33:27 +0000 (22:33 +0000)]
[X86][AVX] Regenerated vselect tests
llvm-svn: 261026
Ahmed Bougacha [Tue, 16 Feb 2016 22:14:12 +0000 (22:14 +0000)]
[X86] Remove the now-unused X86ISD::PSIGN. NFC.
llvm-svn: 261025
Ahmed Bougacha [Tue, 16 Feb 2016 22:14:07 +0000 (22:14 +0000)]
[X86] Generalize logic blend of (x, -x) combine to match (-x, x).
I suspect this is what let PR26110 lie dormant for so long.
llvm-svn: 261024
Ahmed Bougacha [Tue, 16 Feb 2016 22:14:03 +0000 (22:14 +0000)]
[X86] Don't turn (c?-v:v) into (c?-v:0) by blindly using PSIGN.
Currently, we sometimes miscompile this vector pattern:
(c ? -v : v)
We lower it to (because "c" is <4 x i1>, lowered as a vector mask):
(~c & v) | (c & -v)
When we have SSSE3, we incorrectly lower that to PSIGN, which does:
(c < 0 ? -v : c > 0 ? v : 0)
in other words, when c is either all-ones or all-zero:
(c ? -v : 0)
While this is an old bug, it rarely triggers because the PSIGN combine
is too sensitive to operand order. This will be improved separately.
Note that the PSIGN tests are also incorrect. Consider:
%b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
%sub = sub nsw <4 x i32> zeroinitializer, %a
%0 = xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1>
%1 = and <4 x i32> %a, %0
%2 = and <4 x i32> %b.lobit, %sub
%cond = or <4 x i32> %1, %2
ret <4 x i32> %cond
if %b is zero:
%b.lobit = <4 x i32> zeroinitializer
%sub = sub nsw <4 x i32> zeroinitializer, %a
%0 = <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
%1 = <4 x i32> %a
%2 = <4 x i32> zeroinitializer
%cond = or <4 x i32> %a, zeroinitializer
ret <4 x i32> %a
whereas we currently generate:
psignd %xmm1, %xmm0
retq
which returns 0, as %xmm1 is 0.
Instead, use a pure logic sequence, as described in:
https://graphics.stanford.edu/~seander/bithacks.html#ConditionalNegate
Fixes PR26110.
Differential Revision: http://reviews.llvm.org/D17181
llvm-svn: 261023
Ahmed Bougacha [Tue, 16 Feb 2016 22:13:59 +0000 (22:13 +0000)]
[X86] Extract PSIGN/BLENDVP tests into vector-blend.ll. NFC.
We're going to stop generating PSIGN, so calling a test "psign"
isn't ideal. Instead, call these tests what they really are:
variable blends using logic.
Also add a test to exhibit a case we're currently missing in
the PSIGN combine.
llvm-svn: 261022
Ahmed Bougacha [Tue, 16 Feb 2016 22:13:55 +0000 (22:13 +0000)]
[X86] Extract PSIGN/BLENDVP combine. NFC.
llvm-svn: 261021
Ahmed Bougacha [Tue, 16 Feb 2016 22:13:49 +0000 (22:13 +0000)]
[X86] Extract ANDNP combine. NFC.
This makes it IMO more readable and reduces indentation.
llvm-svn: 261020
Mehdi Amini [Tue, 16 Feb 2016 22:07:03 +0000 (22:07 +0000)]
Bitcode writer: fix a typo, using getName() instead of getSourceFileName()
When emitting the source filename, the encoding of the string
was checked against the name instead of the filename.
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261019
Artem Belevich [Tue, 16 Feb 2016 22:03:20 +0000 (22:03 +0000)]
[CUDA] pass debug options to ptxas.
ptxas optimizations are disabled if we need to generate debug info
as ptxas does not accept '-g' otherwise.
Differential Revision: http://reviews.llvm.org/D17111
llvm-svn: 261018
Derek Schuff [Tue, 16 Feb 2016 21:52:06 +0000 (21:52 +0000)]
[WebAssembly] Update torture test expectations
These were fixed with r260978
llvm-svn: 261017
Reid Kleckner [Tue, 16 Feb 2016 21:49:26 +0000 (21:49 +0000)]
[codeview] Bail on a DBG_VALUE register operand with no register
This apparently comes up when the register allocator decides that a
variable will become undef along a certain path.
Also improve the error message we emit when we can't map from LLVM
register number to CV register number.
llvm-svn: 261016
Derek Schuff [Tue, 16 Feb 2016 21:44:19 +0000 (21:44 +0000)]
[WebAssemly] Don't move calls or stores past intervening loads
The register stackifier currently checks for intervening stores (and
loads that may alias them) but doesn't account for the fact that the
instruction being moved may affect intervening loads.
Differential Revision: http://reviews.llvm.org/D17298
llvm-svn: 261014
Adam Nemet [Tue, 16 Feb 2016 21:41:51 +0000 (21:41 +0000)]
[LTO] Support Statistics
Summary:
I thought -Xlinker -mllvm -Xlinker -stats worked at some point but maybe
it never did.
For clang, I believe that stats are printed from cc1_main. This patch
also prints them for LTO, specifically right after codegen happens.
I only looked at the C API for LTO briefly to see if this is a good
place. Probably there are still cases where this wouldn't be printed
but it seems to be working for the common case. I also experimented
putting this in the LTOCodeGenerator destructor but that didn't trigger
for me because ld64 does not destroy the LTOCodeGenerator.
Reviewers: dexonsmith, joker.eph
Subscribers: rafael, joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D17302
llvm-svn: 261013
Reid Kleckner [Tue, 16 Feb 2016 21:14:51 +0000 (21:14 +0000)]
[codeview] Fix assertion on non-memory, non-register DBG_VALUE instructions
Eventually we should find a way to describe constant variables, but it
is not obvious how to do this at the moment.
llvm-svn: 261010
Aaron Ballman [Tue, 16 Feb 2016 21:06:10 +0000 (21:06 +0000)]
Missing semicolons are kind of important. Who knew?
llvm-svn: 261009
Aaron Ballman [Tue, 16 Feb 2016 21:02:23 +0000 (21:02 +0000)]
Add a nullPointerConstant() AST matcher to handle variations of null pointer constants in one matcher.
llvm-svn: 261008
Colin LeMahieu [Tue, 16 Feb 2016 20:38:17 +0000 (20:38 +0000)]
[Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding.
The usual way to get a 32-bit relocation is to use a constant extender which doubles the size of the instruction, 4 bytes to 8 bytes.
Another way is to put a .word32 and mix code and data within a function. The disadvantage is it's not a valid instruction encoding and jumping over it causes prefetch stalls inside the hardware.
This relocation packs a 23-bit value in to an "r0 = add(rX, #a)" instruction by overwriting the source register bits. Since r0 is the return value register, if this instruction is placed after a function call which return void, r0 will be filled with an undefined value, the prefetch won't be confused, and the callee can access the constant value by way of the link register.
llvm-svn: 261006
Reid Kleckner [Tue, 16 Feb 2016 20:34:27 +0000 (20:34 +0000)]
Stop using "template" when printing qualtype names
Summary:
The keyword "template" isn't necessary when
printing a fully-qualified qualtype name, and, in fact,
results in a syntax error if one tries to use it. So stop
printing it.
Reviewers: rsmith, rnk
Subscribers: rnk, klimek, cfe-commits
Differential Revision: http://reviews.llvm.org/D17214
llvm-svn: 261005
Jun Bum Lim [Tue, 16 Feb 2016 20:02:39 +0000 (20:02 +0000)]
[AArch64] Add pass to remove redundant copy after RA
Summary:
This change will add a pass to remove unnecessary zero copies in target blocks
of cbz/cbnz instructions. E.g., the copy instruction in the code below can be
removed because the cbz jumps to BB1 when x0 is zero :
BB0:
cbz x0, .BB1
BB1:
mov x0, xzr
Jun
Reviewers: gberry, jmolloy, HaoLiu, MatzeB, mcrosier
Subscribers: mcrosier, mssimpso, haicheng, bmakam, llvm-commits, aemerson, rengolin
Differential Revision: http://reviews.llvm.org/D16203
llvm-svn: 261004
Quentin Colombet [Tue, 16 Feb 2016 19:26:02 +0000 (19:26 +0000)]
[GlobalISel] Re-apply r260922-260923 with MSVC-friendly code.
Original message:
Get rid of the ifdefs in TargetLowering.
Introduce a new API used only by GlobalISel: CallLowering.
This API will contain target hooks dedicated to call lowering.
llvm-svn: 260998
Reid Kleckner [Tue, 16 Feb 2016 19:16:28 +0000 (19:16 +0000)]
Exclude PCH/missing-file.cpp on Windows, it does not pass reliably
Tag the test with "REQUIRES: can-remove-opened-file", which is what we
use for the similar test Modules/explicit-build-missing-file.cpp.
llvm-svn: 260994
Reid Kleckner [Tue, 16 Feb 2016 19:16:20 +0000 (19:16 +0000)]
[typo-correction] Apply name specifier corrections when forming a NNS
Previously we would leave behind the old name specifier prefix, which
creates an invalid AST. Other callers of CorrectTypo update their
CXXScopeSpec objects with the correction specifier if one is present.
llvm-svn: 260993
Nico Weber [Tue, 16 Feb 2016 19:05:50 +0000 (19:05 +0000)]
clang-cl: Expose -isystem.
Like cl.exe, clang-cl allows adding system include directories via the
INCLUDE env var. Having a driver flag for this functionality is useful,
so add this too.
(In the future, we probably also want to have a flag alternative to
VCINSTALLDIR as used in MSVCToolChain::getVisualStudioBinaries(), and
a way to override the registry accesses in MSVCToolChain::getWindowsSDKDir()
-- maybe -ivcroot= and -iwinsdkroot=?).
llvm-svn: 260990
Rafael Espindola [Tue, 16 Feb 2016 18:50:12 +0000 (18:50 +0000)]
Pass a std::unique_ptr to IRMover::move.
It was already the one "destroying" the source module, now the API
reflects that.
llvm-svn: 260989
Derek Schuff [Tue, 16 Feb 2016 18:18:36 +0000 (18:18 +0000)]
[WebAssembly] Insert COPY_LOCAL between CopyToReg and FrameIndex DAG nodes
CopyToReg nodes don't support FrameIndex operands. Other targets select
the FI to some LEA-like instruction, but since we don't have that, we
need to insert some kind of instruction that can take an FI operand and
produces a value usable by CopyToReg (i.e. in a vreg). So insert a dummy
copy_local between Op and its FI operand. This results in a redundant
copy which we should optimize away later (maybe in the post-FI-lowering
peephole pass).
Differential Revision: http://reviews.llvm.org/D17213
llvm-svn: 260987
Tom Stellard [Tue, 16 Feb 2016 18:14:56 +0000 (18:14 +0000)]
[AMDGPU] Rename $dst operand to $vdst for VOP instructions.
Summary: This change renames output operand for VOP instructions from dst to vdst. This is needed to enable decoding named operands for disassembler.
Reviewers: vpykhtin, tstellarAMD, arsenm
Subscribers: arsenm, llvm-commits, nhaustov
Projects: #llvm-amdgpu-spb
Differential Revision: http://reviews.llvm.org/D16920
llvm-svn: 260986
Philip Reames [Tue, 16 Feb 2016 17:14:30 +0000 (17:14 +0000)]
Revert 260705, it appears to be causing pr26628
The root issue appears to be a confusion around what makeNoWrapRegion actually does. It seems likely we need two versions of this function with slightly different semantics.
llvm-svn: 260981
Rafael Espindola [Tue, 16 Feb 2016 16:46:31 +0000 (16:46 +0000)]
Don't create multiple .got.plt entries for the same symbol.
We were doing it for ifunc symbols.
llvm-svn: 260980
Andrey Turetskiy [Tue, 16 Feb 2016 16:41:38 +0000 (16:41 +0000)]
[X86] Enable the LEA optimization pass by default.
Differential Revision: http://reviews.llvm.org/D16877
llvm-svn: 260979
Dan Gohman [Tue, 16 Feb 2016 16:22:41 +0000 (16:22 +0000)]
[WebAssembly] Switch from RPO sorting to topological sorting.
WebAssembly doesn't require full RPO; topological sorting is sufficient and
can preserve more of the MachineBlockPlacement ordering. Unfortunately, this
still depends a lot on heuristics, because while we use the
MachineBlockPlacement ordering as a guide, we can't use it in places where
it isn't topologically ordered. This area will require further attention.
llvm-svn: 260978
Rafael Espindola [Tue, 16 Feb 2016 16:12:06 +0000 (16:12 +0000)]
Merge multiple tdata.* into a single section.
llvm-svn: 260977
Rafael Espindola [Tue, 16 Feb 2016 16:05:27 +0000 (16:05 +0000)]
Merge multiple .gcc_except_table.* into a single section.
llvm-svn: 260976
Marshall Clow [Tue, 16 Feb 2016 16:05:15 +0000 (16:05 +0000)]
Add some status
llvm-svn: 260975
Rafael Espindola [Tue, 16 Feb 2016 15:57:07 +0000 (15:57 +0000)]
Merge multiple .tbss.* sections into one output section.
llvm-svn: 260974
Aaron Ballman [Tue, 16 Feb 2016 15:35:51 +0000 (15:35 +0000)]
A signed bitfield's range is [-1,0], so assigning 1 is technically an overflow. However, the other bitfield requires a signed value (it supports negative offsets), so it is slightly better to retain a signed 1-bit bitfield and use -1 instead of 1. Silences an MSVC warning.
llvm-svn: 260973
Aaron Ballman [Tue, 16 Feb 2016 15:29:06 +0000 (15:29 +0000)]
Reverting r260922-260923; they cause link failures with MSVC.
http://lab.llvm.org:8011/builders/lldb-x86-windows-msvc2015/builds/15436/steps/build/logs/stdio
http://bb.pgr.jp/builders/msbuild-llvmclang-x64-msc18-DA/builds/961/steps/build_llvm/logs/stdio
llvm-svn: 260972
Dan Gohman [Tue, 16 Feb 2016 15:17:21 +0000 (15:17 +0000)]
[WebAssembly] Create new registers instead of reusing old ones in RegStackify.
This avoids some complications updating LiveIntervals to be aware of the new
register lifetimes, because we can just compute new intervals from scratch
rather than describe how the old ones have been changed.
llvm-svn: 260971
Rafael Espindola [Tue, 16 Feb 2016 15:16:00 +0000 (15:16 +0000)]
Reapply r260489.
Original commit message:
[readobj] Dump DT_JMPREL relocations when outputting dynamic relocations.
The bits of r260488 it depends on have been committed.
llvm-svn: 260970
Tamas Berghammer [Tue, 16 Feb 2016 15:14:36 +0000 (15:14 +0000)]
Revert "Use BKPT instead of UDF for arm/thumb breakpoints"
This reverts commit
293c18e067d663e0fe93e6f3d800c2a4bfada2b0.
The BKPT instruction generates SIGBUS instead of SIGTRAP in the Linux
kernel on Nexus 6 - 5.1.1 (kernel version 3.10.40). Revert the CL
until we can figure out how can we hanble the SIGBUS or how to get
back a SIGTRAP using the BKPT instruction.
llvm-svn: 260969
Dan Gohman [Tue, 16 Feb 2016 15:14:23 +0000 (15:14 +0000)]
[WebAssembly] Implement support for custom NaN bit patterns.
llvm-svn: 260968
Rafael Espindola [Tue, 16 Feb 2016 14:50:39 +0000 (14:50 +0000)]
Introduce a getAsRange helper.
This requires making an error message a bit more generic, but that seems
a reasonable tradeoff.
Extracted from r260488 but simplified a bit.
llvm-svn: 260967
Marshall Clow [Tue, 16 Feb 2016 14:42:23 +0000 (14:42 +0000)]
Add some comments
llvm-svn: 260966
Tobias Grosser [Tue, 16 Feb 2016 14:37:24 +0000 (14:37 +0000)]
ScopDectect: Allow memory accesses with different element types by default (try 3)
First support for this feature was committed in r259784. Support for
loop invariant load hoisting with different types was added by
Johannes Doerfert in r260045 and r260886.
llvm-svn: 260965
Marshall Clow [Tue, 16 Feb 2016 14:35:56 +0000 (14:35 +0000)]
Added a (private) status page for the Jacksonville meeting
llvm-svn: 260964
Rafael Espindola [Tue, 16 Feb 2016 14:27:33 +0000 (14:27 +0000)]
Move DynRegionInfo out of the ELFDumper.
This reduces indentation in preparation to adding a bit more code to it.
Extracted from r260488.
llvm-svn: 260963
Rafael Espindola [Tue, 16 Feb 2016 14:17:48 +0000 (14:17 +0000)]
This reverts commit r260488 and r260489.
Original messages:
Revert "[readobj] Handle ELF files with no section table or with no program headers."
Revert "[readobj] Dump DT_JMPREL relocations when outputting dynamic relocations."
r260489 depends on r260488 and among other issues r260488 deleted error
handling code.
llvm-svn: 260962
Vasileios Kalintiris [Tue, 16 Feb 2016 14:15:27 +0000 (14:15 +0000)]
Issue a warning instead of fatal errors when checks for libatomic fail.
This should fix PR26631, PR26622 and has the nice property that the addition
of the CheckLibcxxAtomic.cmake module acts as an NFC on the platforms of the
reporters (at least for the time being).
As these bug reports explain, CMake fails the atomic check because the
include headers might not exist in the host environment. We could
potentially point to the headers provided by libcxx itself.
llvm-svn: 260961
Rafael Espindola [Tue, 16 Feb 2016 13:12:55 +0000 (13:12 +0000)]
Start adding release notes for lld.
llvm-svn: 260960
Andrey Turetskiy [Tue, 16 Feb 2016 12:47:45 +0000 (12:47 +0000)]
[X86] PR26575: Fix LEA optimization pass.
Add a missing check for a type of address displacement operand of the load/store instruction being a candidate for LEA substitution.
Ref: https://llvm.org/bugs/show_bug.cgi?id=26575
Differential Revision: http://reviews.llvm.org/D17261
llvm-svn: 260959
Johannes Doerfert [Tue, 16 Feb 2016 12:36:14 +0000 (12:36 +0000)]
Replace getLoopForInst by getLoopForStmt
This patch was extracted from http://reviews.llvm.org/D13611.
llvm-svn: 260958
Alexey Bataev [Tue, 16 Feb 2016 12:13:49 +0000 (12:13 +0000)]
[OPENMP] Allow to use compound assignment operators.
Loop-based directives allow to use iterators as loop counters. Iterators are allowed to define their own operators. This patch allows to use compound assignment operators for iterators.
llvm-svn: 260957
Johannes Doerfert [Tue, 16 Feb 2016 12:11:03 +0000 (12:11 +0000)]
Set AST Build for all statements [NFC]
llvm-svn: 260956
Johannes Doerfert [Tue, 16 Feb 2016 12:10:42 +0000 (12:10 +0000)]
[FIX] LICM test case
llvm-svn: 260955