Simplify X /[ex] 8 == 0

2016-11-20  Marc Glisse  <marc.glisse@inria.fr>

gcc/
* fold-const.c (fold_comparison): Ignore EXACT_DIV_EXPR.
* match.pd (A /[ex] B CMP C): New simplifications.

gcc/testsuite/
* gcc.dg/tree-ssa/cmpexactdiv.c: New file.

From-SVN: r242638

re PR fortran/78395 ([OOP] error on polymorphic assignment)

gcc/testsuite/ChangeLog:

2016-11-20  Andre Vehreschild  <vehre@gcc.gnu.org>

PR fortran/78395
* gfortran.dg/typebound_operator_21.f03: New test.

gcc/fortran/ChangeLog:

2016-11-20  Andre Vehreschild  <vehre@gcc.gnu.org>

PR fortran/78395
* resolve.c (resolve_typebound_function): Prevent stripping of refs,
when the base-expression is a class' typed one.

From-SVN: r242637

Simplify X / X, 0 / X and X % X

2016-11-20  Marc Glisse  <marc.glisse@inria.fr>

gcc/
* match.pd (0 / X, X / X, X % X): New simplifications.

gcc/testsuite/
* gcc.dg/tree-ssa/divide-5.c: New file.

From-SVN: r242636

Protect __TMC_END__ - __TMC_LIST__ == 0

2016-11-20  Marc Glisse  <marc.glisse@inria.fr>

        PR libgcc/77813
        * crtstuff.c (deregister_tm_clones, register_tm_clones): Hide
        __TMC_END__ behind a passthrough asm.

From-SVN: r242635

Add PR sanitizer/78267 patch to libsanitizer/LOCAL_PATCHES

From-SVN: r242634

Fix libsanitizer build on OS X 10.1[01], macOS 10.12 (PR sanitizer/78267)

fixincludes:
PR sanitizer/78267
* inclhack.def (darwin_availabilityinternal, darwin_os_trace_1)
(darwin_os_trace_2, darwin_os_trace_3): New fixes.
(hpux_stdint_least_fast): Remove spurious _EOFix_.
* fixincl.x: Regenerate.
* tests/bases/AvailabilityInternal.h: New file.
* tests/bases/os/trace.h: New file.

2016-11-20  Jack Howarth  <howarth.at.gcc@gmail.com>

libsanitizer:
PR sanitizer/78267
* sanitizer_common/sanitizer_mac.cc: Include <os/trace.h> only if
compiler supports blocks extension.

From-SVN: r242633

Daily bump.

From-SVN: r242632

comp-goto-1.c (insn_t): Change offset to signed int.

* gcc.c-torture/execute/comp-goto-1.c (insn_t): Change offset to
signed int.

From-SVN: r242629

i386.c (ix86_can_inline_p): Use || instead of & when checking if callee's isa flags are subset of caller's...

* config/i386/i386.c (ix86_can_inline_p): Use || instead of &
when checking if callee's isa flags are subset of caller's isa flags.
Fix comment wording.

From-SVN: r242628

i386.c (ix86_valid_target_attribute_tree): Don't clear opts->x_ix86_isa_flags...

* config/i386/i386.c (ix86_valid_target_attribute_tree): Don't
clear opts->x_ix86_isa_flags, clear opts->x_ix86_isa_flags2
instead and using = 0 instead of &= 0.

From-SVN: r242627

i386.c (def_builtin, [...]): Formatting fixes.

* config/i386/i386.c (def_builtin, def_builtin2, def_builtin_const2,
ix86_add_new_builtins): Formatting fixes.
(ix86_expand_builtin): Use || instead of && for isa vs. isa2.
(ix86_get_builtin): Likewise.

From-SVN: r242626

i386.c (ix86_expand_builtin): Remove msk_mov variable...

* config/i386/i386.c (ix86_expand_builtin): Remove msk_mov variable,
don't initialize it, don't use it for the case where it isn't
provable %{z} nor using the same argument, instead move merge
argument into a new pseudo and use that as target.  Formatting fixes.

From-SVN: r242625

coarray_alloc_comp_1.f08: Add "-latomic" option if libatomic_available.

* gfortran.dg/coarray_alloc_comp_1.f08: Add "-latomic" option if
libatomic_available.
* gfortran.dg/coarray_alloc_comp_2.f08: Likewise.
* gfortran.dg/coarray_allocate_10.f08: Likewise.
* gfortran.dg/coarray_allocate_7.f08: Likewise.
* gfortran.dg/coarray_allocate_8.f08: Likewise.
* gfortran.dg/coarray_allocate_9.f08: Likewise.
* gfortran.dg/coarray_send_by_ref_1.f08: Likewise.
* gfortran.dg/coarray_stat_2.f90: Likewise.
* gfortran.dg/coindexed_1.f90: Likewise.

From-SVN: r242624

re PR target/25111 ([m68k] bset is not used for A = 1 << (B & 31) on ColdFire)

PR target/25111
* config/m68k/m68k.md (bsetdreg): New pattern.
(bchgdreg, bclrdreg): Likewise.

PR target/25111
* gcc.target/m68k/pr25111.c: New test.

From-SVN: r242623

re PR target/78426 (wrong code with strncmp on SH)

PR target/78426
* config/sh/sh-mem.cc (sh_expand_cmpnstr): Use copy_to_mode_reg
instead of force_reg.
(sh_expand_setmem): Likewise.

From-SVN: r242622

config.gcc (*-*-netbsd): Set use_gcc_stdint=wrap.

2016-11-19  Krister Walfridsson  <krister.walfridsson@gmail.com>

* config.gcc (*-*-netbsd): Set use_gcc_stdint=wrap.

From-SVN: r242621

TILE-Gx: Fix bundling when encountering consecutive barriers.

        * config/tilegx/tilegx.c (tilegx_gen_bundles): Preserve
          end-of-bundle marker for consecutive barriers.

From-SVN: r242617

TILE-Gx: fix clzsi2 for big-endian.

        * config/tilegx/tilegx.md (clzsi2): Fix for big-endian.

From-SVN: r242616

TILEPro: force gcc to link against libgcc.a when creating shared
libraries.

        * config.host (tilepro*-*-linux*): Add t-slibgcc-libgcc.

From-SVN: r242615

Daily bump.

From-SVN: r242613

re PR c++/68180 ([ICE]  at cp/constexpr.c:2768 in initializing __vector in a loop)

PR c++/68180
* g++.dg/cpp1y/pr68180.C: Add -Wno-psabi as dg-additional-options.

From-SVN: r242610

re PR middle-end/78419 (ICE with target_clone on invalid target)

PR middle-end/78419
* multiple_target.c (get_attr_len): Start with argnum and increment
argnum on every arg.  Use strchr in a loop instead of counting commas
manually.
(get_attr_str): Increment argnum for every comma in the string.
(separate_attrs): Use for instead of while loop, simplify.
(expand_target_clones): Rename defenition argument to definition.
Free attrs and attr_str even when diagnosing errors.  Temporarily
change input_location around targetm.target_option.valid_attribute_p
calls.  Don't emit warning or errors if that function fails.

* gcc.target/i386/pr78419.c: New test.

From-SVN: r242608

re PR c++/77285 (extern thread_local linkage)

PR c++/77285
* mangle.c (mangle_tls_init_fn, mangle_tls_wrapper_fn): Call
check_abi_tags.

* g++.dg/tls/pr77285-1.C: New test.
* g++.dg/tls/pr77285-2.C: New test.

From-SVN: r242607

re PR debug/78191 (ICE in calc_die_sizes)

* dwarf2out.c (size_of_discr_list): Fix typo in function comment.

PR debug/78191
* dwarf2out.c (abbrev_opt_base_type_end): New variable.
(die_abbrev_cmp): Sort dies with die_abbrev smaller than
abbrev_opt_base_type_end only by increasing die_abbrev, before
any other dies.
(optimize_abbrev_table): Don't change abbrev numbers of
base types and CU or optimize implicit consts in them if
calc_base_type_die_sizes has been called during build_abbrev_table.
(calc_base_type_die_sizes): If abbrev_opt_start, set
abbrev_opt_base_type_end to one plus largest base type's
die_abbrev.

From-SVN: r242606

re PR target/25112 ([m68k] Suboptimal equality comparisons with small integers)

PR target/25112
* config/m68k/m68k.c (moveq feeding equality comparison): New
peepholes.
* config/m68k/predicates.md (addq_subq_operand): New predicate.
(equality_comparison_operator): Likewise.

PR target/25112
* gcc.target/m68k/pr25112: New test.

From-SVN: r242605

PR c++/67631 - list-init and explicit conversions

* semantics.c (finish_compound_literal): Call digest_init_flags.
* typeck2.c (digest_init_flags): Add complain parm.
(store_init_value): Pass it.

From-SVN: r242603

pr71179.c: Prune ABI message.

        * gcc.dg/tree-ssa/pr71179.c: Prune ABI message.
        * gcc.dg/tree-ssa/ssa-fre-55.c: Same.

From-SVN: r242602

Make load_extend_op an inline function

gcc/
* rtlanal.c (load_extend_op): Move to...
* rtl.h: ...here and make inline.

From-SVN: r242601

runtime: move schedt type and sched var from C to Go

    This doesn't change any actual code, it just starts using the Go
    definition of the schedt type and the sched variable rather than the C
    definitions.

    The schedt type is tweaked slightly for gccgo.  We aren't going to
    release goroutine stacks, so we don't need separate gfreeStack and
    gfreeNostack lists.  We only have one size of defer function, so we
    don't need a list of 5 different pools.

    Reviewed-on: https://go-review.googlesource.com/33364

From-SVN: r242600

[ARM] Optional -mthumb for Thumb only targets

2016-11-18  Terry Guo  <terry.guo@arm.com>
            Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * common/config/arm/arm-common.c (arm_target_thumb_only): New function.
    * config/arm/arm-opts.h: Include arm-flags.h.
    (struct arm_arch_core_flag): Define.
    (arm_arch_core_flags): Define.
    * config/arm/arm-protos.h: Include arm-flags.h
    (FL_NONE, FL_ANY, FL_CO_PROC, FL_ARCH3M, FL_MODE26, FL_MODE32,
    FL_ARCH4, FL_ARCH5, FL_THUMB, FL_LDSCHED, FL_STRONG, FL_ARCH5E,
    FL_XSCALE, FL_ARCH6, FL_VFPV2, FL_WBUF, FL_ARCH6K, FL_THUMB2, FL_NOTM,
    FL_THUMB_DIV, FL_VFPV3, FL_NEON, FL_ARCH7EM, FL_ARCH7, FL_ARM_DIV,
    FL_ARCH8, FL_CRC32, FL_SMALLMUL, FL_NO_VOLATILE_CE, FL_IWMMXT,
    FL_IWMMXT2, FL_ARCH6KZ, FL2_ARCH8_1, FL2_ARCH8_2, FL2_FP16INST,
    FL_TUNE, FL_FOR_ARCH2, FL_FOR_ARCH3, FL_FOR_ARCH3M, FL_FOR_ARCH4,
    FL_FOR_ARCH4T, FL_FOR_ARCH5, FL_FOR_ARCH5T, FL_FOR_ARCH5E,
    FL_FOR_ARCH5TE, FL_FOR_ARCH5TEJ, FL_FOR_ARCH6, FL_FOR_ARCH6J,
    FL_FOR_ARCH6K, FL_FOR_ARCH6Z, FL_FOR_ARCH6ZK, FL_FOR_ARCH6KZ,
    FL_FOR_ARCH6T2, FL_FOR_ARCH6M, FL_FOR_ARCH7, FL_FOR_ARCH7A,
    FL_FOR_ARCH7VE, FL_FOR_ARCH7R, FL_FOR_ARCH7M, FL_FOR_ARCH7EM,
    FL_FOR_ARCH8A, FL2_FOR_ARCH8_1A, FL2_FOR_ARCH8_2A, FL_FOR_ARCH8M_BASE,
    FL_FOR_ARCH8M_MAIN, arm_feature_set, ARM_FSET_MAKE,
    ARM_FSET_MAKE_CPU1, ARM_FSET_MAKE_CPU2, ARM_FSET_CPU1, ARM_FSET_CPU2,
    ARM_FSET_EMPTY, ARM_FSET_ANY, ARM_FSET_HAS_CPU1, ARM_FSET_HAS_CPU2,
    ARM_FSET_HAS_CPU, ARM_FSET_ADD_CPU1, ARM_FSET_ADD_CPU2,
    ARM_FSET_DEL_CPU1, ARM_FSET_DEL_CPU2, ARM_FSET_UNION, ARM_FSET_INTER,
    ARM_FSET_XOR, ARM_FSET_EXCLUDE, ARM_FSET_IS_EMPTY,
    ARM_FSET_CPU_SUBSET): Move to ...
    * config/arm/arm-flags.h: This new file.
    * config/arm/arm.h (TARGET_MODE_SPEC_FUNCTIONS): Define.
    (EXTRA_SPEC_FUNCTIONS): Add TARGET_MODE_SPEC_FUNCTIONS to its value.
    (TARGET_MODE_SPECS): Define.
    (DRIVER_SELF_SPECS): Add TARGET_MODE_SPECS to its value.

    gcc/testsuite/
    * gcc.target/arm/optional_thumb-1.c: New test.
    * gcc.target/arm/optional_thumb-2.c: New test.
    * gcc.target/arm/optional_thumb-3.c: New test.

From-SVN: r242597

Make arm_feature_set agree with type of FL_* macros

2016-11-18  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm-protos.h (FL_NONE, FL_ANY, FL_CO_PROC, FL_ARCH3M,
    FL_MODE26, FL_MODE32, FL_ARCH4, FL_ARCH5, FL_THUMB, FL_LDSCHED,
    FL_STRONG, FL_ARCH5E, FL_XSCALE, FL_ARCH6, FL_VFPV2, FL_WBUF,
    FL_ARCH6K, FL_THUMB2, FL_NOTM, FL_THUMB_DIV, FL_VFPV3, FL_NEON,
    FL_ARCH7EM, FL_ARCH7, FL_ARM_DIV, FL_ARCH8, FL_CRC32, FL_SMALLMUL,
    FL_NO_VOLATILE_CE, FL_IWMMXT, FL_IWMMXT2, FL_ARCH6KZ, FL2_ARCH8_1,
    FL2_ARCH8_2, FL2_FP16INST): Reindent comment, add final dot when
    missing and make value unsigned.
    (arm_feature_set): Use unsigned entries instead of unsigned long.

From-SVN: r242596

MAINTAINERS (Write After Approval): Add myself.

2016-11-18  Toma Tabacu  <toma.tabacu@imgtec.com>

* MAINTAINERS (Write After Approval): Add myself.

From-SVN: r242595

runtime: don't call __go_alloc/__go_free in environment functions

    Reviewed-on: https://go-review.googlesource.com/33363

From-SVN: r242594

libgo: remove old/regexp and old/template

    They were removed from the master Go library in 2012
    (https://golang.org/cl/5979046) but somehow that was not reflected here.

    Reviewed-on: https://go-review.googlesource.com/33391

From-SVN: r242592

S/390: Lower requirements for successful htm tests.

The attached patch makes the htm tests on s390 less sensitive to
spurious abort.  Please check the commit comment for details.  The
modified tests have been run once on a zEC12.

gcc/ChangeLog:

2016-11-18  Dominik Vogt  <vogt@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (rs6000_stack_info): PR/77359: Properly align
local variables in functions calling alloca.  Also update the ASCII
drawings
* config/rs6000/rs6000.h (STARTING_FRAME_OFFSET, STACK_DYNAMIC_OFFSET):
PR/77359: Likewise.
* config/rs6000/aix.h (STARTING_FRAME_OFFSET, STACK_DYNAMIC_OFFSET):
PR/77359: Copy AIX specific versions of the rs6000.h macros to aix.h.

From-SVN: r242591

Re-apply: Drop excess size used for run time allocated stack variables.

The patch got reverted after hitting PR77359 which turned out to be a
rs6000 backend problem.  Reapplying after the PR got fixed.

gcc/ChangeLog:

2016-11-18  Dominik Vogt  <vogt@linux.vnet.ibm.com>

Re-apply after PR bootstrap/77359 is fixed:
2016-08-23  Dominik Vogt  <vogt@linux.vnet.ibm.com>

        * explow.c (get_dynamic_stack_size): Take known alignment of stack
        pointer + STACK_DYNAMIC_OFFSET into account when calculating the
        size needed.

--This line, and those below, will be
ignored--

M    gcc/ChangeLog
M    gcc/explow.c

From-SVN: r242590

RS6000: Fix PR 77359: Properly align local variables in functions calling alloca.

gcc/ChangeLog:

2016-11-18  Dominik Vogt  <vogt@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (rs6000_stack_info): PR/77359: Properly align
local variables in functions calling alloca.  Also update the ASCII
drawings
* config/rs6000/rs6000.h (STARTING_FRAME_OFFSET, STACK_DYNAMIC_OFFSET):
PR/77359: Likewise.
* config/rs6000/aix.h (STARTING_FRAME_OFFSET, STACK_DYNAMIC_OFFSET):
PR/77359: Copy AIX specific versions of the rs6000.h macros to aix.h.

From-SVN: r242589

MIPS: Check for sysroot support when upgrading/downgrading test options

gcc/testsuite/

* gcc.target/mips/inline-memcpy-1.c (dg-options): Add
(REQUIRES_STDLIB).
* gcc.target/mips/inline-memcpy-2.c: Ditto.
* gcc.target/mips/inline-memcpy-3.c: Ditto.
* gcc.target/mips/inline-memcpy-4.c: Ditto.
* gcc.target/mips/inline-memcpy-5.c: Ditto.
* gcc.target/mips/loongson-shift-count-truncated-1.c: Ditto.
* gcc.target/mips/loongson-simd.c: Ditto.
* gcc.target/mips/memcpy-1.c: Ditto.
* gcc.target/mips/mips-3d-1.c: Ditto.
* gcc.target/mips/mips-3d-2.c: Ditto.
* gcc.target/mips/mips-3d-3.c: Ditto.
* gcc.target/mips/mips-3d-4.c: Ditto.
* gcc.target/mips/mips-3d-5.c: Ditto.
* gcc.target/mips/mips-3d-6.c: Ditto.
* gcc.target/mips/mips-3d-7.c: Ditto.
* gcc.target/mips/mips-3d-8.c: Ditto.
* gcc.target/mips/mips-3d-9.c: Ditto.
* gcc.target/mips/mips-ps-1.c: Ditto.
* gcc.target/mips/mips-ps-2.c: Ditto.
* gcc.target/mips/mips-ps-3.c: Ditto.
* gcc.target/mips/mips-ps-4.c: Ditto.
* gcc.target/mips/mips-ps-6.c: Ditto.
* gcc.target/mips/mips16-attributes.c: Ditto.
* gcc.target/mips/mips32-dsp-run.c: Ditto.
* gcc.target/mips/mips32-dsp.c: Ditto.
* gcc.target/mips/save-restore-1.c: Ditto.
* gcc.target/mips/mips.exp (mips_option_groups): Add stdlib.
(mips_preprocess): Add ignore_output argument that when set
will not return the pre-processed output.
(mips_arch_info): Update arguments for the call to
mips_preprocess.
(mips-dg-init): Ditto.
(mips-dg-options): Check if a test having test option
(REQUIRES_STDLIB) has the required sysroot support for
the current test options.

Co-Authored-By: Toma Tabacu <toma.tabacu@imgtec.com>
From-SVN: r242587

Use rtx_mode_t instead of std::make_pair

This change makes the code less sensitive to the exact type of the mode,
i.e. it forces a conversion where necessary.  This becomes important
when wrappers like scalar_int_mode and scalar_mode can also be used
instead of machine_mode.

Using rtx_mode_t also abstracts away the representation.  The fact that
it's a std::pair rather than a custom class isn't important to users of
the interface.

gcc/
2016-11-18  Richard Sandiford  <richard.sandiford@arm.com>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

* combine.c (try_combine): Use rtx_mode_t instead of std::make_pair.
* dwarf2out.c (mem_loc_descriptor, loc_descriptor): Likewise.
(add_const_value_attribute): Likewise.
* explow.c (plus_constant): Likewise.
* expmed.c (expand_mult, make_tree): Likewise.
* expr.c (convert_modes): Likewise.
* loop-doloop.c (doloop_optimize): Likewise.
* postreload.c (reload_cse_simplify_set): Likewise.
* simplify-rtx.c (simplify_const_unary_operation): Likewise.
(simplify_binary_operation_1, simplify_const_binary_operation):
(simplify_const_relational_operation, simplify_immed_subreg): Likewise.
* wide-int.h: Update documentation to recommend rtx_mode_t
instead of std::make_pair.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r242586

Add SET_DECL_MODE

This may no longer be necessary with the current version
of the SVE patches, but it does at least make things consistent
with the TYPE_MODE/SET_TYPE_MODE split.

gcc/ada/
2016-11-16  Richard Sandiford  <richard.sandiford@arm.com>
      Alan Hayward  <alan.hayward@arm.com>
      David Sherwood  <david.sherwood@arm.com>

* gcc-interface/utils.c (create_label_decl): Use SET_DECL_MODE.

gcc/c/
2016-11-16  Richard Sandiford  <richard.sandiford@arm.com>
      Alan Hayward  <alan.hayward@arm.com>
      David Sherwood  <david.sherwood@arm.com>

* c-decl.c (merge_decls): Use SET_DECL_MODE.
(make_label, finish_struct): Likewise.

gcc/cp/
2016-11-16  Richard Sandiford  <richard.sandiford@arm.com>
      Alan Hayward  <alan.hayward@arm.com>
      David Sherwood  <david.sherwood@arm.com>

* class.c (finish_struct_bits): Use SET_DECL_MODE.
(build_base_field_1, layout_class_type, finish_struct_1): Likewise.
* decl.c (make_label_decl): Likewise.
* pt.c (tsubst_decl): Likewise.

gcc/fortran/
2016-11-16  Richard Sandiford  <richard.sandiford@arm.com>
      Alan Hayward  <alan.hayward@arm.com>
      David Sherwood  <david.sherwood@arm.com>

* trans-common.c (build_common_decl): Use SET_DECL_MODE.
* trans-decl.c (gfc_build_label_decl): Likewise.
* trans-types.c (gfc_get_array_descr_info): Likewise.

gcc/lto/
2016-11-16  Richard Sandiford  <richard.sandiford@arm.com>
      Alan Hayward  <alan.hayward@arm.com>
      David Sherwood  <david.sherwood@arm.com>

* lto.c (offload_handle_link_vars): Use SET_DECL_MODE.

gcc/
2016-11-16  Richard Sandiford  <richard.sandiford@arm.com>
      Alan Hayward  <alan.hayward@arm.com>
      David Sherwood  <david.sherwood@arm.com>

* tree.h (SET_DECL_MODE): New macro.
* cfgexpand.c (avoid_deep_ter_for_debug): Use SET_DECL_MODE.
(expand_gimple_basic_block): Likewise.
* function.c (split_complex_args): Likeise.
* ipa-prop.c (ipa_modify_call_arguments): Likewise.
* omp-simd-clone.c (ipa_simd_modify_stmt_ops): Likewise.
* stor-layout.c (layout_decl, relayout_decl): Likewise.
(finish_bitfield_representative): Likewise.
* tree.c (make_node_stat): Likewise.
* tree-inline.c (remap_ssa_name): Likewise.
(tree_function_versioning): Likewise.
* tree-into-ssa.c (rewrite_debug_stmt_uses): Likewise.
* tree-sra.c (sra_ipa_reset_debug_stmts): Likewise.
* tree-ssa-ccp.c (optimize_atomic_bit_test_and): Likewise.
* tree-ssa-loop-ivopts.c (remove_unused_ivs): Likewise.
* tree-ssa.c (insert_debug_temp_for_var_def): Likewise.
* tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
* varasm.c (make_debug_expr_from_rtl): Likewise.

libcc1/
2016-11-16  Richard Sandiford  <richard.sandiford@arm.com>
      Alan Hayward  <alan.hayward@arm.com>
      David Sherwood  <david.sherwood@arm.com>

* plugin.cc (plugin_build_add_field): Use SET_DECL_MODE.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r242585

bb-reorder: Improve compgotos pass (PR71785)

For code like the testcase in PR71785 GCC factors all the indirect branches
to a single dispatcher that then everything jumps to.  This is because
having many indirect branches with each many jump targets does not scale
in large parts of the compiler.  Very late in the pass pipeline (right
before peephole2) the indirect branches are then unfactored again, by
the duplicate_computed_gotos pass.

This pass works by replacing branches to such a common dispatcher by a
copy of the dispatcher.  For code like this testcase this does not work
so well: most cases do a single addition instruction right before the
dispatcher, but not all, and we end up with only two indirect jumps: the
one without the addition, and the one with the addition in its own basic
block, and now everything else jumps _there_.

This patch rewrites the algorithm to deal with this.  It also makes it
simpler: it does not need the "candidates" array anymore, it does not
need RTL layout mode, it does not need cleanup_cfg, and it does not
need to keep track of what blocks it already visited.

PR rtl-optimization/71785
* bb-reorder.c (maybe_duplicate_computed_goto): New function.
(duplicate_computed_gotos): New function.
(pass_duplicate_computed_gotos::execute): Rewrite.

From-SVN: r242584

Correct gcc/go/gofrontend/lex.cc and libgo/aclocal.m4 to the versions in the gofrontend repo...

Correct gcc/go/gofrontend/lex.cc and libgo/aclocal.m4 to the versions
in the gofrontend repo, which is supposed to be the master copy.

Remove a few files in libgo that somehow were not deleted in the past.

From-SVN: r242583

Update libgo/configure to restore it to the master version.

Update a few binary files that were changed in the master gc repo,
copied into the gofrontend repo, but not correctly copied into the GCC
repo.  The changes are all minor and do not affect any actual tests.
Two instances of "http" changed to "https", and two timestamps were
zeroed out.

From-SVN: r242582

Daily bump.

From-SVN: r242581

runtime, reflect: rewrite Go to FFI type conversion in Go

    As we move toward the Go 1.7 garbage collector, it's essential that all
    allocation of values that can contain Go pointers be done using the
    correct type descriptor.  That is simplest if we do all such allocation
    in Go code.  This rewrites the code that converts from a Go type to a
    libffi CIF into Go.

    Reviewed-on: https://go-review.googlesource.com/33353

From-SVN: r242578

re PR middle-end/38219 (gcc.dg/tree-ssa/vrp47.c fails on m68k)

PR middle-end/38219
* gcc.dg/tree-ssa/vrp47.c: Do not run on m68k.

From-SVN: r242576

re PR target/47192 (m68k target - gcc uses stack frame after it has been unlinked when compiling with -Os)

PR target/47192
* config/m68k/m68k.c (m68k_expand_epilogue): Emit a scheduling
barrier prior to deallocating the stack.

PR target/47192
* gcc.target/m68k/pr47192.c: New test.

From-SVN: r242575

branch-cost-1.c (dg-options): Use (HAS_MOVN) instead of isa>=4, in order to downgrade to R5.

2016-11-17  Toma Tabacu  <toma.tabacu@imgtec.com>

* gcc.target/mips/branch-cost-1.c (dg-options): Use (HAS_MOVN)
instead of isa>=4, in order to downgrade to R5.

From-SVN: r242574

PR c++/78193 - inherited ctor regressions on sparc32.

* call.c (build_over_call): Don't set CALL_FROM_THUNK_P here.
(build_call_a): Set it here, and don't insert EMPTY_CLASS_EXPR.
(convert_like_real) [ck_rvalue]: Also pass non-addressable
types along directly.

From-SVN: r242573

arc/nps400: New peephole2 pattern allow more cmem loads

In the case where we access a single bit from a value and use this in a
EQ/NE comparison, GCC will convert this into a sign-extend and GE/LT
comparison.

Normally this would be fine, however, if the value is in CMEM memory,
then we don't have a sign-extending load available (using the special
short CMEM load instructions), and instead we end up using a long form
load with LIMM, which is less efficient.

This peephole optimisation looks for the sign-extend followed by GE/LT
pattern and converts this back into a load and EQ/NE comparison.

gcc/ChangeLog:

* config/arc/arc.md (cmem bit/sign-extend peephole2): New peephole
to make better use of cmem loads in the case where a single bit is
being accessed.
* config/arc/predicates.md (ge_lt_comparison_operator): New
predicate.

gcc/testsuite/ChangeLog:

* gcc.target/arc/cmem-bit-1.c: New file.
* gcc.target/arc/cmem-bit-2.c: New file.
* gcc.target/arc/cmem-bit-3.c: New file.
* gcc.target/arc/cmem-bit-4.c: New file.

From-SVN: r242572

Add avx5124vnniw/avx5124fmaps to target attributes

gcc/

2016-11-17  Andrew Senkevich <andrew.senkevich@intel.com>

* config/i386/i386.c (processor_features): Add F_AVX5124VNNIW,
F_AVX5124FMAPS.
(isa_names_table): Handle new features.

gcc/testsuite/

2016-11-17  Andrew Senkevich <andrew.senkevich@intel.com>

* gcc.target/i386/builtin_target.c: Handle new "avx5124vnniw",
"avx5124fmaps".
* gcc.target/i386/funcspec-56.inc: Test new attributes.

libgcc/

2016-11-17  Andrew Senkevich <andrew.senkevich@intel.com>

* config/i386/cpuinfo.c (processor_features): Add
FEATURE_AVX5124VNNIW, FEATURE_AVX5124FMAPS.

From-SVN: r242570

Enable AVX512_4FMAPS and AVX512_4VNNIW instructions

This requires additional patch for register allocator from Vladimir
Makarov.

gcc/

2016-11-17  Kirill Yukhin  <kirill.yukhin@gmail.com>
    Andrew Senkevich <andrew.senkevich@intel.com>

* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX5124FMAPS_SET,
OPTION_MASK_ISA_AVX5124FMAPS_UNSET,
OPTION_MASK_ISA_AVX5124VNNIW_SET,
OPTION_MASK_ISA_AVX5124VNNIW_UNSET): New.
(ix86_handle_option): Handle OPT_mavx5124fmaps,
OPT_mavx5124vnniw.
* config.gcc: Add avx5124fmapsintrin.h, avx5124vnniwintrin.h.
* config/i386/avx5124fmapsintrin.h: New file.
* config/i386/avx5124vnniwintrin.h: Ditto.
* config/i386/constraints.md (h): New constraint.
* config/i386/cpuid.h: (bit_AVX5124VNNIW,
bit_AVX5124FMAPS): New.
* config/i386/driver-i386.c (host_detect_local_cpu):
Detect avx5124fmaps, avx5124vnniw.
* config/i386/i386-builtin-types.def: Add types
V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF_V16SF_UHI,
V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF,
V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF,
V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF_V4SF_UQI,
V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI,
V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI.
* config/i386/i386-builtin.def (__builtin_ia32_4fmaddps_mask,
__builtin_ia32_4fmaddps, __builtin_ia32_4fmaddss,
__builtin_ia32_4fmaddss_mask, __builtin_ia32_4fnmaddps_mask,
__builtin_ia32_4fnmaddps, __builtin_ia32_4fnmaddss,
__builtin_ia32_4fnmaddss_mask, __builtin_ia32_vp4dpwssd,
__builtin_ia32_vp4dpwssd_mask, __builtin_ia32_vp4dpwssds,
__builtin_ia32_vp4dpwssds_mask): New.
* config/i386/i386-c.c (ix86_target_macros_internal):
Define __AVX5124FMAPS__, __AVX5124VNNIW__.
* config/i386/i386-modes.def: Fixed comment typos, added new
modes (VECTOR_MODES (FLOAT, 256), VECTOR_MODE (INT, SI, 64)).
* config/i386/i386.c (ix86_target_string): Add -mavx5124fmaps,
-mavx5124vnniw.
(PTA_AVX5124FMAPS, PTA_AVX5124VNNIW): Define.
(ix86_option_override_internal): Handle new options.
(ix86_valid_target_attribute_inner_p): Add avx5124fmaps,
avx5124vnniw.
(ix86_expand_builtin): Handle new builtins.
(ix86_additional_allocno_class_p): New.
* config/i386/i386.h (TARGET_AVX5124FMAPS,
TARGET_AVX5124FMAPS_P,
TARGET_AVX5124VNNIW,
TARGET_AVX5124VNNIW_P): Define.
(reg_class): Add MOD4_SSE_REGS.
(MOD4_SSE_REG_P, MOD4_SSE_REGNO_P): New.
* config/i386/i386.opt: Add mavx5124fmaps, mavx5124vnniw.
* config/i386/immintrin.h: Include avx5124fmapsintrin.h,
avx5124vnniwintrin.h.
* config/i386/sse.md (unspec): Add UNSPEC_VP4FMADD,
UNSPEC_VP4FNMADD,
UNSPEC_VP4DPWSSD, UNSPEC_VP4DPWSSDS.
(define_mode_iterator IMOD4): New.
(define_mode_attr imod4_narrow): Ditto.
(define_insn "mov<mode>"): Ditto.
(define_insn "avx5124fmaddps_4fmaddps"): Ditto.
(define_insn "avx5124fmaddps_4fmaddps_mask"): Ditto.
(define_insn "avx5124fmaddps_4fmaddps_maskz"): Ditto.
(define_insn "avx5124fmaddps_4fmaddss"): Ditto.
(define_insn "avx5124fmaddps_4fmaddss_mask"): Ditto.
(define_insn "avx5124fmaddps_4fmaddss_maskz"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddps"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddps_mask"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddps_maskz"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddss"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddss_mask"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddss_maskz"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssd"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssd_mask"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssd_maskz"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssds"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssds_mask"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssds_maskz"): Ditto.
* init-regs.c (initialize_uninitialized_regs): Add emit_clobber call.
* genmodes.c (mode_size_inline): Extend return type.
* machmode.h (mode_size, mode_base_align): Extend type.

gcc/testsuite/

2016-11-17  Kirill Yukhin  <kirill.yukhin@gmail.com>
    Andrew Senkevich <andrew.senkevich@intel.com>

* gcc.target/i386/avx5124fmadd-v4fmaddps-1.c: New test.
* gcc.target/i386/avx5124fmadd-v4fmaddps-2.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fmaddss-1.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fnmaddps-1.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fnmaddps-2.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fnmaddss-1.c: Ditto.
* gcc.target/i386/avx5124fmaps-check.h: Ditto.
* gcc.target/i386/avx5124vnniw-check.h: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssd-1.c: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssd-2.c: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssds-1.c: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssds-2.c: Ditto.
* gcc.target/i386/avx512f-helper.h: Add avx5124fmaps-check.h,
avx5124vnniw-check.h.
* gcc.target/i386/i386.exp (check_effective_target_avx5124fmaps,
check_effective_target_avx5124vnniw): New.
* gcc.target/i386/m128-check.h (ESP_FLOAT, ESP_DOUBLE):
Set under ifndef.
* gcc.target/i386/sse-12.c: Add -mavx5124fmaps, -mavx5124vnniw.
* gcc.target/i386/sse-13.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.

From-SVN: r242569

re PR c++/55080 (-pedantic produces error: floating-point literal cannot appear in a constant-expression)

/cp
2016-11-17  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/55080
* parser.c (cp_parser_non_integral_constant_expression): Issue a
pedwarn instead of an error for case NIC_FLOAT.

/testsuite
2016-11-17  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/55080
* g++.dg/parse/pr55080.C: New.

From-SVN: r242565

re PR target/78101 (PowerPC 64-bit little endian fusion failure with -O3 -mcpu=power9)

[gcc]
2016-11-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/78101
* config/rs6000/predicates.md (fusion_addis_mem_combo_load): Add
the appropriate checks for SFmode/DFmode load/stores in GPR
registers.
(fusion_addis_mem_combo_store): Likewise.
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Rename
fusion_fpr_* to fusion_vsx_* and add in support for ISA 3.0 scalar
d-form instructions for traditional Altivec registers.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/rs6000/rs6000.md (p9 fusion store peephole2): Remove
early clobber from scratch register.  Do not match if the register
being stored is the scratch register.
(fusion_vsx_<P:mode>_<FPR_FUSION:mode>_load): Rename fusion_fpr_*
to fusion_vsx_* and add in support for ISA 3.0 scalar d-form
instructions for traditional Altivec registers.
(fusion_fpr_<P:mode>_<FPR_FUSION:mode>_load): Likewise.
(fusion_vsx_<P:mode>_<FPR_FUSION:mode>_store): Likewise.
(fusion_fpr_<P:mode>_<FPR_FUSION:mode>_store): Likewise.

[gcc/testsuite]
2016-11-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/78101
* gcc.target/powerpc/fusion4.c: New test.

From-SVN: r242564

PR c++/78124 - list-initialization and inherited ctor

* name-lookup.c (do_class_using_decl): Set CLASSTYPE_NON_AGGREGATE.

From-SVN: r242563

PR c++/78369 - {} as default argument

* call.c (build_special_member_call): Handle CONSTRUCTOR.

From-SVN: r242562

PR c++/68377 - parenthesized expr in fold-expression

* parser.c (cp_parser_fold_expression): Check TREE_NO_WARNING.

From-SVN: r242561

Fix PR77933: stack corruption on ARM when using high registers and LR

2016-11-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR target/77933
    * config/arm/arm.c (thumb1_expand_prologue): Distinguish between lr
    being live in the function and lr needing to be saved.  Distinguish
    between already saved pushable registers and registers to push.
    Check for LR being an available pushable register.

    gcc/testsuite/
    PR target/77933
    * gcc.target/arm/pr77933-1.c: New test.
    * gcc.target/arm/pr77933-2.c: Likewise.

From-SVN: r242559

i386.md (cmpstrnsi): New test to bail out if neither string input is a string constant.

2016-11-17  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>

* config/i386/i386.md (cmpstrnsi): New test to bail out if neither
string input is a string constant.
* builtins.c (expand_builtin_strncmp): Attempt expansion of strncmp
via cmpstrnsi even if neither string is constant.

From-SVN: r242556

re PR middle-end/78201 (ICE in tree_to_shwi, at tree.h:4037 (seen both on ARM32 an AArch64))

PR middle-end/78201
* varasm.c (default_use_anchors_for_symbol_p): Fix a comment typo.
Don't test decl != NULL.  Don't look at DECL_SIZE, but DECL_SIZE_UNIT
instead, return false if it is NULL, or doesn't fit into uhwi, or
is larger or equal to targetm.max_anchor_offset.

* g++.dg/opt/pr78201.C: New test.

From-SVN: r242555

re PR rtl-optimization/78355 (LRA generates unaligned accesses when SLOW_UNALIGNED_ACCESS is 1)

PR rtl-optimization/78355
* doc/tm.texi.in (SLOW_UNALIGNED_ACCESS): Document that the macro only
needs to deal with unaligned accesses.
* doc/tm.texi: Regenerate.
* lra-constraints.c (simplify_operand_subreg): Only invoke
SLOW_UNALIGNED_ACCESS on innermode if the MEM is not aligned enough.

Co-Authored-By: Eric Botcazou <ebotcazou@adacore.com>
From-SVN: r242554

Fix PR78333 testcase for non-glibc systems.

2016-11-17  Christophe Lyon  <christophe.lyon@linaro.org>

gcc/testsuite/

* gcc.dg/pr78333.c: Add empty implementations of
__cyg_profile_func_enter() and __cyg_profile_func_exit() to avoid
problems on non-glibc systems.

From-SVN: r242553

Fix locations within raw strings

Whilst investigating PR preprocessor/78324 I noticed that the
substring location code currently doesn't handle raw strings
correctly, by not skipping the 'R', opening quote, delimiter
and opening parenthesis.

For example, an attempt to underline chars 4-7 with caret at 6 of
this raw string yields this erroneous output:
   __emit_string_literal_range (R"foo(0123456789)foo",
                                    ~~^~

With the patch, the correct range/caret is printed:

   __emit_string_literal_range (R"foo(0123456789)foo",
                                          ~~^~

gcc/ChangeLog:
* input.c (selftest::test_lexer_string_locations_long_line): New
function.
(selftest::test_lexer_string_locations_raw_string_multiline): New
function.
(selftest::input_c_tests): Call the new functions, via
for_each_line_table_case.

gcc/testsuite/ChangeLog:
* gcc.dg/plugin/diagnostic-test-string-literals-1.c
(test_raw_string_one_liner): New function.
(test_raw_string_multiline): New function.

libcpp/ChangeLog:
* charset.c (cpp_interpret_string_1): Skip locations from
loc_reader when advancing 'p' when handling raw strings.

From-SVN: r242552

[AArch64] Expand DImode constant stores to two SImode stores when profitable

* config/aarch64/aarch64.md (mov<mode>): Call
aarch64_split_dimode_const_store on DImode constant stores.
* config/aarch64/aarch64-protos.h (aarch64_split_dimode_const_store):
New prototype.
* config/aarch64/aarch64.c (aarch64_split_dimode_const_store): New
function.

* gcc.target/aarch64/store_repeating_constant_1.c: New test.
* gcc.target/aarch64/store_repeating_constant_2.c: Likewise.

From-SVN: r242551

re PR tree-optimization/77848 (Gimple if-conversion results in redundant comparisons)

[gcc]

2016-11-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
            Richard Biener  <rguenther@suse.de>

PR tree-optimization/77848
* tree-if-conv.c (tree_if_conversion): Always version loops unless
the user specified -ftree-loop-if-convert.

[gcc/testsuite]

2016-11-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
            Richard Biener  <rguenther@suse.de>

PR tree-optimization/77848
* gfortran.dg/vect/pr77848.f: New test.

Co-Authored-By: Richard Biener <rguenther@suse.de>
From-SVN: r242550

re PR target/77308 (surprisingly large stack usage for sha512 on arm)

2016-11-17  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR target/77308
        * config/arm/arm.md (*thumb2_ldrd, *thumb2_ldrd_base,
        *thumb2_ldrd_base_neg, *thumb2_strd, *thumb2_strd_base,
        *thumb2_strd_base_neg): Recognize insn regardless of
        current_tune->prefer_ldrd_strd.
        * config/arm/ldrdstrd.md: Enable all ldrd/strd peephole rules
        whenever possible.

testsuite:
2016-11-17  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR target/77308
        * gcc.target/arm/pr53447-5.c: New test.
        * lib/target-supports.exp
        (check_effective_target_arm_prefer_ldrd_strd): Adjust.

From-SVN: r242549

[ARC] Fix compilation issue in pr71872.

gcc/
2016-11-17  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.c (arc_ccfsm_post_advance): Handle return
instruction type.

From-SVN: r242548

[ARC][libgcc] Add support for QuarkSE processor.

libgcc/
2016-11-17  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/dp-hack.h (ARC_OPTFPE): Define.
(__ARC_NORM__): Use instead ARC_OPTFPE.
* config/arc/fp-hack.h: Likewise.
* config/arc/lib1funcs.S (ARC_OPTFPE): Define.
(__ARC_MPY__): Use it insetead of __ARC700__ and __HS__.

From-SVN: r242547

[ARC] Add support for QuarkSE processor.

gcc/
2016-11-17  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc-arches.def: Add FPX quarkse instruction as valid
for arcem.
* config/arc/arc-c.def (__ARC_FPX_QUARK__): Define.
* config/arc/arc-cpus.def (quarkse_em): Add.
* config/arc/arc-options.def (FL_FPX_QUARK, FL_QUARK): Likewise.
* config/arc/arc-opts.h (FPX_QK): Define.
* config/arc/arc-tables.opt: Regenerate.
* config/arc/arc.c (gen_compare_reg): Change.
(arc_register_move_cost): Avoid Dy,Dx moves.
* config/arc/arc.h (TARGET_HARD_FLOAT): Change.
(TARGET_FPX_QUARK, TARGET_FP_ASSIST): Define.
* config/arc/arc.md (divsf3, sqrtsf2, fix_truncsfsi2, floatsisf2):
New expands.
* config/arc/fpu.md (divsf3_fpu, sqrtsf2_fpu, floatsisf2_fpu)
(fix_truncsfsi2_fpu): Rename.
* config/arc/fpx.md (cmp_quark, cmpsf_quark_, cmpsf_quark_ord)
(cmpsf_quark_uneq, cmpsf_quark_eq, divsf3_quark, sqrtsf2_quark)
(fix_truncsfsi2_quark, floatsisf2_quark): New patterns.
* config/arc/t-multilib: Regenerate.

From-SVN: r242546

[ARC] Update target specific tests.

gcc/testsuite
2016-11-17  Claudiu Zissulescu  <claziss@synopsys.com>

* gcc.target/arc/abitest.S: New file.
* gcc.target/arc/abitest.h: Likewise.
* gcc.target/arc/va_args-1.c: Likewise.
* gcc.target/arc/va_args-2.c: Likewise.
* gcc.target/arc/va_args-3.c: Likewise.
* gcc.target/arc/mcrc.c: Deleted.
* gcc.target/arc/mdsp-packa.c: Likewise.
* gcc.target/arc/mdvbf.c: Likewise.
* gcc.target/arc/mmac-24.c: Likewise.
* gcc.target/arc/mmac-d16.c: Likewise.
* gcc.target/arc/mno-crc.c: Likewise.
* gcc.target/arc/mno-dsp-packa.c: Likewise.
* gcc.target/arc/mno-dvbf.c: Likewise.
* gcc.target/arc/mno-mac-24.c: Likewise.
* gcc.target/arc/mno-mac-d16.c: Likewise.
* gcc.target/arc/mno-rtsc.c: Likewise.
* gcc.target/arc/mno-xy.c: Likewise.
* gcc.target/arc/mrtsc.c: Likewise.
* gcc.target/arc/arc.exp (check_effective_target_arcem):
New function.
(check_effective_target_arc700): Likewise.
(check_effective_target_arc6xx): Likewise.
(check_effective_target_arcmpy): Likewise.
(check_effective_target_archs): Likewise.
(check_effective_target_clmcpu): Likewise.
(check_effective_target_barrelshifter): Likewise.
* gcc.target/arc/barrel-shifter-1.c: Changed.
* gcc.target/arc/builtin_simd.c: Test only for ARC700
cpus.
* gcc.target/arc/cmem-1.c: Changed.
* gcc.target/arc/cmem-2.c: Likewise.
* gcc.target/arc/cmem-3.c: Likewise.
* gcc.target/arc/cmem-4.c: Likewise.
* gcc.target/arc/cmem-5.c: Likewise.
* gcc.target/arc/cmem-6.c: Likewise.
* gcc.target/arc/cmem-7.c: Likewise.
* gcc.target/arc/interrupt-1.c: Test for RTIE as well.
* gcc.target/arc/interrupt-2.c: Skip it for ARCv2 cores.
* gcc.target/arc/interrupt-3.c: Match also ARCv2
warnings.
* gcc.target/arc/jump-around-jump.c: Update options.
* gcc.target/arc/mARC601.c: Changed.
* gcc.target/arc/mcpu-arc600.c: Changed.
* gcc.target/arc/mcpu-arc601.c: Changed.
* gcc.target/arc/mcpu-arc700.c: Changed.
* gcc.target/arc/mdpfp.c: Skip for ARCv2 cores.
* gcc.target/arc/movb-1.c: Changed.
* gcc.target/arc/movb-2.c: Likewise.
* gcc.target/arc/movb-3.c: Likewise.
* gcc.target/arc/movb-4.c: Likewise.
* gcc.target/arc/movb-5.c: Likewise.
* gcc.target/arc/movb_cl-1.c: Likewise.
* gcc.target/arc/movb_cl-2.c: Likewise.
* gcc.target/arc/movbi_cl-1.c: Likewise.
* gcc.target/arc/movh_cl-1.c: Likewise.
* gcc.target/arc/mspfp.c: Skip for ARC HS cores.
* gcc.target/arc/mul64.c: Enable it only for ARC600.
* gcc.target/arc/mulsi3_highpart-1.c: Scan for ARCv2
instructions.
* gcc.target/arc/mulsi3_highpart-2.c: Skip it for ARCv1
cores.
* gcc.target/arc/no-dpfp-lrsr.c: Skip it for ARC HS.
* gcc.target/arc/trsub.c: Only for ARC EM cores.
* gcc.target/arc/builtin_simdarc.c: Changed.
* gcc.target/arc/extzv-1.c: Likewise.
* gcc.target/arc/insv-1.c: Likewise.
* gcc.target/arc/insv-2.c: Likewise.
* gcc.target/arc/mA6.c: Likewise.
* gcc.target/arc/mA7.c: Likewise.
* gcc.target/arc/mARC600.c: Likewise.
* gcc.target/arc/mARC700.c: Likewise.
* gcc.target/arc/mcpu-arc600.c: Likewise.
* gcc.target/arc/mcpu-arc700.c: Likewise.
* gcc.target/arc/movl-1.c: Likewise.
* gcc.target/arc/nps400-1.c: Likewise.
* gcc.target/arc/trsub.c: Likewise.
* gcc.target/arc/barrel-shifter-2.c: Check for barrel
shifter configuration.
* gcc.target/arc/mlock.c: Skip for arc6xx
configurations.
* gcc.target/arc/mswape.c: Likewise.

From-SVN: r242545

avr.c (avr_print_operand_address): Use CONST_INT_P if appropriate.

* config/avr/avr.c (avr_print_operand_address): Use CONST_INT_P if
appropriate.
(ashlqi3_out, ashlsi3_out, ashrqi3_out, ashrhi3_out): Same.
(ashrsi3_out, lshrqi3_out, lshrhi3_out, lshrsi3_out): Same.
(avr_rtx_costs_1, extra_constraint_Q): Same.
(avr_address_cost): Use SUBREG_P if possible.

From-SVN: r242544

re PR c++/78383 (label as values ICE with C++ lambda)

2016-11-17  Richard Biener  <rguenther@suse.de>

PR middle-end/78383
* tree-cfgcleanup.c (cleanup_control_flow_bb): Do not turn
non-local goto into CFG.

From-SVN: r242543

common.opt (ftree-loop-if-convert-stores): Mark as preserved for backward compatibility.

2016-11-17  Richard Biener  <rguenther@suse.de>

* common.opt (ftree-loop-if-convert-stores): Mark as preserved for
backward compatibility.
* doc/invoke.texi (ftree-loop-if-convert-stores): Remove.
* tree-if-conv.c (pass_if_conversion::gate): Do not test
flag_tree_loop_if_convert_stores.
(pass_if_conversion::execute): Likewise.

From-SVN: r242542

re PR c++/68180 ([ICE]  at cp/constexpr.c:2768 in initializing __vector in a loop)

2016-11-17  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/68180
* g++.dg/cpp1y/pr68180.C: New.

From-SVN: r242541

re PR tree-optimization/78319 (PASS->FAIL: gcc.dg/uninit-pred-8_a.c bogus warning (test for bogus messages, line 20))

2016-11-17  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

PR tree-optimization/78319

testsuite/
* gcc.dg/uninit-pred-8_a.c (foo): Mark dg-bogus test to xfail on
arm-none-eabi.

From-SVN: r242540

[AArch64] Fix gcc.dg/torture/float32-builtin.c with RTL checking

    * config/aarch64/predicates.md (aarch64_reg_or_fp_zero): Check for
    const_double code before calling aarch64_float_const_zero_rtx_p.

From-SVN: r242539

re PR middle-end/78306 ([CilkPlus] "inlining failed in call to always_inline ‘memset’: function not inlinable" with -fcilkplus)

2016-11-17  Richard Biener  <rguenther@suse.de>

PR tree-optimization/78306
* ipa-inline-analysis.c (initialize_inline_failed): Do not
inhibit inlining if function calls cilk_spawn.
(can_inline_edge_p): Likewise.

* gcc.dg/cilk-plus/pr78306.c: New testcase.

From-SVN: r242537

re PR tree-optimization/78305 (Wrong constant folding)

2016-11-17  Richard Biener  <rguenther@suse.de>

PR middle-end/78305
* fold-const.c (negate_expr_p): Fix multiplication case.

* gcc.dg/torture/pr78305.c: New testcase.

From-SVN: r242536

re PR fortran/66227 ([OOP] EXTENDS_TYPE_OF n returns wrong result for polymorphic variable allocated to extended type)

2016-11-17  Janus Weil  <janus@gcc.gnu.org>

PR fortran/66227
* simplify.c (gfc_simplify_extends_type_of): Fix missed optimization.
Prevent over-simplification. Fix a comment. Add a comment.

2016-11-17  Janus Weil  <janus@gcc.gnu.org>

PR fortran/66227
* gfortran.dg/extends_type_of_3.f90: Fix and extend the test case.

From-SVN: r242535

re PR target/78357 (nios2 uses non-standard atomic functions)

2016-11-17  Chung-Lin Tang  <cltang@codesourcery.com>

PR target/78357
* config/nios2/nios2.c (nios2_init_libfuncs): Remove TARGET_LINUX_ABI
condition.
(TARGET_INIT_LIBFUNCS): Delete definition and...
* config/nios2/linux.h (TARGET_INIT_LIBFUNCS): ...move to here, add
comments.

From-SVN: r242534

netbsd-stdint.h: New.

2016-11-17  Krister Walfridsson  <krister.walfridsson@gmail.com>

* config/netbsd-stdint.h: New.
* config.gcc (i[34567]86-*-netbsd): Add netbsd-stdint.h to tm_file.
(x86_64-*-netbsd*): Likewise.

From-SVN: r242533

re PR c/78285 (error on duplicate switch label where a note should be)

PR c/78285
* c-common.c (c_add_case_label): Turn error_at calls into inform.

* gcc.dg/switch-5.c: Turn several dg-errors into dg-messages.
* g++.dg/ext/case-range2.C: Likewise.

From-SVN: r242532

aarch64.opt (mverbose-cost-dump): New option.

2016-11-16  Andrew PInski  <apinski@cavium.com>

        * config/aarch64/aarch64.opt (mverbose-cost-dump): New option.
        * config/aarch64/aarch64.c (aarch64_rtx_costs): Use
        flag_aarch64_verbose_cost instead of checking for details dump.
        (aarch64_rtx_costs_wrapper): Likewise.

From-SVN: r242531

re PR fortran/58001 (Make it possible to silence "Extension: Tab character in format" warning)

2016-11-16  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/58001
* io.c (next_char_not_space): Update handling of a 'tab' in a FORMAT.
  (format_lex): Adjust invocations of next_char_not_space().

2016-11-16  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/58001
* gfortran.dg/fmt_tab_1.f90: Adjust testcase.
* gfortran.dg/fmt_tab_2.f90: Ditto.

From-SVN: r242530

Daily bump.

From-SVN: r242529

re PR rtl-optimization/78378 (wrong code when combining shift + mult + zero_extend)

PR rtl-optimization/78378
* combine.c (make_extraction): Use force_to_mode for non-{REG,MEM}
inner only if pos is 0.  Fix up formatting.

* gcc.c-torture/execute/pr78378.c: New test.

From-SVN: r242526

R_MIPS_JALR failures

This is a fix for my PR70890 patch, which incorrectly removed all
REG_EQUIV notes rather than just one regarding a reg that dies.

PR rtl-optimization/78325
PR rtl-optimization/70890
* ira.c (combine_and_move_insns): Only remove REG_EQUIV notes
for dead regno.

From-SVN: r242525

libiberty: Add Rust symbol demangling.

Adds Rust symbol demangler. Rust mangles symbols using GNU_V3 style,
adding a hash and various special character subtitutions. This adds
a new rust style to cplus_demangle and adds 3 helper functions
rust_demangle, rust_demangle_sym and rust_is_mangled.

rust-demangle.c was written by David. Mark did the code formatting to
GNU style and integration into the gcc/libiberty build system and
testsuite.

include/ChangeLog:

2016-11-03  David Tolnay <dtolnay@gmail.com>
           Mark Wielaard  <mark@klomp.org>

       * demangle.h (DMGL_RUST): New macro.
       (DMGL_STYLE_MASK): Add DMGL_RUST.
       (demangling_styles): Add dlang_rust.
       (RUST_DEMANGLING_STYLE_STRING): New macro.
       (RUST_DEMANGLING): New macro.
       (rust_demangle): New prototype.
       (rust_is_mangled): Likewise.
       (rust_demangle_sym): Likewise.

libiberty/ChangeLog:

2016-11-03  David Tolnay <dtolnay@gmail.com>
           Mark Wielaard  <mark@klomp.org>

       * Makefile.in (CFILES): Add rust-demangle.c.
       (REQUIRED_OFILES): Add rust-demangle.o.
       * cplus-dem.c (libiberty_demanglers): Add rust_demangling case.
       (cplus_demangle): Handle RUST_DEMANGLING.
       (rust_demangle): New function.
       * rust-demangle.c: New file.
       * testsuite/Makefile.in (really-check): Add check-rust-demangle.
       (check-rust-demangle): New rule.
       * testsuite/rust-demangle-expected: New file.

Co-Authored-By: Mark Wielaard <mark@klomp.org>
From-SVN: r242524

PR c++/78373 - ICE with TREE_CONSTANT reference

* decl.c (cp_finish_decl): Don't set TREE_CONSTANT on a reference.
* typeck2.c (store_init_value): Likewise.

From-SVN: r242523

* rtl.h: Declare gt_ggc_mx and gt_pch_nx.

From-SVN: r242522

Commentary corrections

From-SVN: r242521

re PR tree-optimization/77848 (Gimple if-conversion results in redundant comparisons)

2016-11-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

PR tree-optimization/77848
* tree-if-conv.c (version_loop_for_if_conversion): When versioning
an outer loop, only save basic block aux information for the inner
loop.
(versionable_outer_loop_p): New function.
(tree_if_conversion): Version the outer loop instead of the inner
one if the pattern will be recognized for outer-loop
vectorization.

From-SVN: r242520

gcc: remove unneeded global related to hot/cold partitioning

The `user_defined_section_attribute' is used as part of the condition to
determine if GCC should partition blocks within a function into hot and
cold blocks.  This global is initially false, and is set to true from
within the file parse phase of GCC, as part of the attribute handling
hook.

The `user_defined_section_attribute' is reset to false as part of the
final pass of GCC.  However, the final pass is part of the optimisation
phase of the compiler, and so if at any point during the file parse
phase any function, or data, has a section attribute the global
`user_defined_section_attribute' will be set to true.

When GCC performs the block partitioning pass on the first function, if
`user_defined_section_attribute' is true then the function will not be
partitioned.  Notice though, that due to the above, whether we partition
this first function or not has nothing to do with whether the function
has a section attribute, instead, if any function or data in the parsed
file has a section attribute then we don't partition the first
function.

After performing (or not) the block partitioning pass on the first
function we perform the final pass on the first function, at which point
we reset `user_defined_section_attribute' to false.  As parsing is
complete by this point, we will never set
`user_defined_section_attribute' to true after that, and so all of the
following functions will have the partition blocks pass performed on
them, even if the function has a section attribute, and will not be
partitioned.

Luckily we don't end up partitioning functions that should not be
partitioned though.  Due to the way that functions are selected during
the assembler writing phase, if a function has a section attribute this
takes priority over any hot/cold block partitioning that has been done.

What we see from the above then is that the
`user_defined_section_attribute' mechanism is broken.  It was originally
created when GCC parsed, optimised, and generated assembler function at
a time.  Now that we deal with the whole file in one go, we need to
update the mechanism used to gate the block partitioning pass.

This patch does this by looking specifically for a section attribute on
the function DECL, which removes the need for a global variable, and
will work whether we parse the whole file in one go, or one function at
a time.

A few new tests have been added.  These check for the case where a
function is not partitioned when it could be.

gcc/ChangeLog:

* gcc/bb-reorder.c: Remove 'toplev.h' include.
(pass_partition_blocks::gate): No longer check
user_defined_section_attribute, instead check the function decl
for a section attribute.
* gcc/c-family/c-attribs.c (handle_section_attribute): No longer
set user_defined_section_attribute.
* gcc/final.c (rest_of_handle_final): Likewise.
* gcc/toplev.c: Remove definition of user_defined_section_attribute.
* gcc/toplev.h: Remove declaration of
user_defined_section_attribute.

gcc/testsuiteChangeLog:

* gcc.dg/tree-prof/section-attr-1.c: New file.
* gcc.dg/tree-prof/section-attr-2.c: New file.
* gcc.dg/tree-prof/section-attr-3.c: New file.

From-SVN: r242519

re PR libfortran/51119 (MATMUL slow for large matrices)

2016-11-16  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

PR libgfortran/51119
* Makefile.am: Remove -fno-protect-parens -fstack-arrays.
* Makefile.in: Regenerate.

From-SVN: r242518

MIPS16/GCC: Emit explicit JRC from `casesi_internal_mips16_<mode>' insn

gcc/
* config/mips/mips.md (casesi_internal_mips16_<mode>):
Explicitly switch between JR and JRC for the table jump.  Adjust
instruction count.

From-SVN: r242517

MIPS16/GCC: Improve `casesi_internal_mips16_<mode>'s instruction count estimate

gcc/
* config/mips/mips.md (casesi_internal_mips16_<mode>): Set
`insn_count' to 11 rather than 16.

From-SVN: r242516

MIPS16/GCC: Correct `casesi_internal_mips16_<mode>'s RTL pattern

gcc/
* config/mips/mips.md (casesi_internal_mips16_<mode>): Use the
`ltu' rather than `leu' operation in the RTL pattern

From-SVN: r242515

MIPS16/GCC: Fix DImode `casesi_internal_mips16_<mode>' assembly instructions

gcc/
* config/mips/mips.md (casesi_internal_mips16_<mode>): Add
missing <d> instruction prefixes throughout.  Correct
formatting.

gcc/testsuite/
* gcc.target/mips/code-readable-4.c (dg-final): Expect `dla'
rather than `la'.

From-SVN: r242514

Fix tuple decomposition decltype.

* decl.c (store_decomp_type, lookup_decomp_type): New.
(cp_finish_decomp): Call store_decomp_type.
* semantics.c (finish_decltype_type): Call lookup_decomp_type.
* cp-tree.h: Declare lookup_decomp_type.

From-SVN: r242513

microMIPS/GCC: Fix PIC call relaxation

gcc/
* config/mips/mips.c (mips_output_jump): Output R_MICROMIPS_JALR
rather than R_MIPS_JALR relocation in microMIPS code.  Do not
cancel short delay slots in PIC call relaxation.

gcc/testsuite/
* gcc.target/mips/call-1.c (dg-options): Add `-mno-micromips'.
(dg-final): Remove microMIPS JALRS mnemonic matching.
* gcc.target/mips/call-2.c (dg-options): Add `-mno-micromips'.
(dg-final): Remove microMIPS JALRS mnemonic matching.
* gcc.target/mips/call-3.c (dg-options): Add `-mno-micromips'.
(dg-final): Remove microMIPS JALRS mnemonic matching.
* gcc.target/mips/call-4.c (dg-options): Add `-mno-micromips'.
* gcc.target/mips/call-5.c (dg-options): Add `-mno-micromips'.
* gcc.target/mips/call-6.c (dg-options): Add `-mno-micromips'.
* gcc.target/mips/call-1u.c: New test case.
* gcc.target/mips/call-2u.c: New test case.
* gcc.target/mips/call-3u.c: New test case.
* gcc.target/mips/call-4u.c: New test case.
* gcc.target/mips/call-5u.c: New test case.
* gcc.target/mips/call-6u.c: New test case.

From-SVN: r242512