Fangrui Song [Sat, 25 Dec 2021 03:01:50 +0000 (19:01 -0800)]
[ELF] Optimize replaceCommonSymbols
This decreases the 0.2% time (no debug info) to nearly no.
Fangrui Song [Sat, 25 Dec 2021 01:54:12 +0000 (17:54 -0800)]
[ELF] Cache global variable `target` in relocate*
This avoid repeated load of the unique_ptr in hot paths.
Fangrui Song [Sat, 25 Dec 2021 01:10:38 +0000 (17:10 -0800)]
[ELF] Add ELFFileBase::{elfShdrs,numELFShdrs} to avoid duplicate llvm::object::ELFFile::sections()
This mainly avoid `relsOrRelas` cost in `InputSectionBase::relocate`.
`llvm::object::ELFFile::sections()` has redundant and expensive checks.
William S. Moses [Fri, 24 Dec 2021 21:51:54 +0000 (16:51 -0500)]
[MLIR][LLVM] Add MemmoveOp to LLVM Dialect
LLVM Dialect in MLIR doesn't have a memmove op. This adds one.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D116274
Fangrui Song [Fri, 24 Dec 2021 23:41:56 +0000 (15:41 -0800)]
[CMake] Revert -Wl,-O3
This reverts
8cb7876cb366b5803ca35d92313ea00eadf29b78 and follow-ups.
GNU ld/gold/ld.lld -O has nothing to do with any code related linker optimizations.
It has very small benefit (save 144Ki (.hash, .gnu_hash) with GNU ld, save 0.7%
.debug_str with gold/ld.lld) while it makes gold/ld.lld significantly slower
when linking RelWithDebInfo clang (gold: 16.437 vs 19.488; ld.lld: 1.882 vs 4.881).
Markus Böck [Fri, 24 Dec 2021 21:25:32 +0000 (22:25 +0100)]
[mlir] Fully qualify default types used in parser code
Fangrui Song [Fri, 24 Dec 2021 21:16:34 +0000 (13:16 -0800)]
[ELF] parseLazy: skip local symbols
Fangrui Song [Fri, 24 Dec 2021 20:28:59 +0000 (12:28 -0800)]
[ELF] Optimize --wrap to only check non-local symbols
Fangrui Song [Fri, 24 Dec 2021 20:09:48 +0000 (12:09 -0800)]
[ELF] Avoid referencing SectionBase::repl after ICF
It is fairly easy to forget SectionBase::repl after ICF.
Let ICF rewrite a Defined symbol's `section` field to avoid references to
SectionBase::repl in subsequent passes. This slightly improves the --icf=none
performance due to less indirection (maybe for --icf={safe,all} as well if most
symbols are Defined).
With this change, there is only one reference to `repl` (--gdb-index D89751).
We can undo
f4fb5fd7523f8e3c3b3966d43c0a28457b59d1d8 (`Move Repl to SectionBase.`)
but move `repl` to `InputSection` instead.
Reviewed By: ikudrin
Differential Revision: https://reviews.llvm.org/D116093
Gabriel Smith [Fri, 24 Dec 2021 19:38:55 +0000 (11:38 -0800)]
[clang-format] Fix short enums getting wrapped even when denied
Single-variant enums were still getting placed on a single line
even when AllowShortEnumsOnASingleLine was false. This fixes that
by checking that setting when looking to merge lines.
Differential Revision: https://reviews.llvm.org/D116188
Groverkss [Fri, 24 Dec 2021 19:09:27 +0000 (00:39 +0530)]
Revert "[MLIR][FlatAffineConstraints][NFC] Move some static functions to be available to Presburger/"
This reverts commit
6c0eaefaf832745f509841afe4dd8a698671b86e.
Groverkss [Fri, 24 Dec 2021 18:41:35 +0000 (00:11 +0530)]
[MLIR][FlatAffineConstraints][NFC] Move some static functions to be available to Presburger/
This patch moves some static functions from AffineStructures.cpp to
Presburger/Utils.cpp and some to be private members of FlatAffineConstraints
(which will later be moved to IntegerPolyhedron) to allow for a smoother
transition for moving FlatAffineConstraints math functionality to
Presburger/IntegerPolyhedron.
This patch is part of a series of patches for moving math functionality to
Presburger directory.
Reviewed By: arjunp, bondhugula
Differential Revision: https://reviews.llvm.org/D115869
Anastasia Stulova [Fri, 24 Dec 2021 16:21:34 +0000 (16:21 +0000)]
[Docs] Minor fix in clang user manual
Alexey Zhikhartsev [Wed, 15 Dec 2021 17:14:13 +0000 (12:14 -0500)]
[DFAJumpThreading] Determinator BB should precede switch-defining BB
Otherwise, it is possible that the state defined in the determinator
block defines the state for the next iteration of the loop, rather than
for the current one.
Fixes llvm-test-suite's
SingleSource/Regression/C/gcc-c-torture/execute/pr80421.c
Differential Revision: https://reviews.llvm.org/D115832
alex-t [Thu, 23 Dec 2021 22:01:07 +0000 (01:01 +0300)]
[AMDGPU] Changing S_AND_B32 to V_AND_B32_e64 in the divergent 'trunc' to i1 pattern
In 'trunc' i16/32/64 to i1 pattern the 'and $src, 1' node supply operand to 'setcc'.
The latter is selected to S_CMP_EQ/V_CMP_EQ dependent on the divergence. In case the 'and' is scalar
and 'setcc' is divergent, we need VGPR to SGPR copy to adjust input operand for V_CMP_EQ.
This patch changes the S_AND_B32 to V_AND_B32_e64 in the 'trunc to i1' divergent patterns.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D116241
Matt Arsenault [Thu, 16 Dec 2021 18:47:57 +0000 (13:47 -0500)]
InstCombine: Gracefully handle more allocas in the wrong address space
Officially this is currently required to always use the datalayout's
alloca address space. This may change in the future, and it's cleaner
to propagate the existing alloca's addrspace anyway.
This is a triple fix. Initially the change in simplifyAllocaArraySize
would drop the address space, but produce output. Fixing this hit an
assertion in the cast combine.
This patch also makes the changes to handle this situation from
a33e12801279a947c74fdee2655b24480941fb39 dead, so eliminate
it. InstCombine should not take it upon itself to introduce
addrspacecasts, and preserve the original address space instead.
Simon Pilgrim [Thu, 23 Dec 2021 18:53:06 +0000 (18:53 +0000)]
[X86] Enable v32i16 ISD::ROTL/ROTR lowering on AVX512BW targets
Shilei Tian [Fri, 24 Dec 2021 13:16:33 +0000 (08:16 -0500)]
[Clang][OpenMP] Add the support for atomic compare in parser
This patch adds the support for `atomic compare` in parser. The support
in Sema and CodeGen will come soon. For now, it simply eimits an error when it
is encountered.
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D115561
Alexandros Lamprineas [Fri, 24 Dec 2021 11:01:36 +0000 (11:01 +0000)]
[AArch64] Add a tablegen pattern for RADDHN/RADDHN2.
Converts RSHRN/RSHRN2 to RADDHN/RADDHN2 when the shift amount is half
the width of the vector element. The latter has twice the throughput
and half the latency on Arm out-of-order cores. Setting up the zero
register adds no latency.
Differential Revision: https://reviews.llvm.org/D116166
LLVM GN Syncbot [Fri, 24 Dec 2021 11:05:23 +0000 (11:05 +0000)]
[gn build] Port
969a51ff3632
Krasimir Georgiev [Fri, 24 Dec 2021 11:01:36 +0000 (12:01 +0100)]
Revert "[ASan] Moved optimized callbacks into a separate library."
We need some internal updates for this, shared directly with the author.
This reverts commit
71b3bfde9cd296525bbf5b1619e199074156d12b.
Nikita Popov [Fri, 24 Dec 2021 10:25:25 +0000 (11:25 +0100)]
[DSE] Fix typo in recent commit
This fixes a typo in
81d69e1bda9e4b6a83f29ba1f614e43ab4700972.
Of course we should only skip the particular store if it isn't
removable, not bail out of the whole loop. Add a test to cover
this case.
Nikita Popov [Fri, 24 Dec 2021 09:45:35 +0000 (10:45 +0100)]
[DSE] Remove unnecessary check in getLocForWrite() (NFC)
MemoryLocation::getForDest() checks this itself, call it directly.
Nikita Popov [Fri, 24 Dec 2021 09:42:44 +0000 (10:42 +0100)]
[DSE] Rename getLocForWriteEx() to getLocForWrite() (NFC)
We used to have both getLocForWrite() and getLocForWriteEx(). Now
that we only have a single method, the "ex" suffix no longer makes
sense.
Phoebe Wang [Fri, 24 Dec 2021 09:12:56 +0000 (17:12 +0800)]
Reland "[X86][MS-InlineAsm] Use exact conditions to recognize MS global variables"
This reverts commit
a954558e878ed9e97e99036229e99af8c6b6c881.
Thanks Yuanfang's help. I think I found the root cause of the buildbot
fail.
The failed test has both Memory and Immediate X86Operand. All data of
different operand kinds share the same memory space by a union
definition. So it has chance we get the wrong result if we don't check
the operand kind.
It's probably it happen to be the correct value in my local environment
so that I can't reproduce the fail.
Differential Revision: https://reviews.llvm.org/D116090
Nikita Popov [Fri, 24 Dec 2021 08:37:25 +0000 (09:37 +0100)]
[DSE] Assert analyzable write in isRemovable() (NFC)
As requested on D116210. The function is not necessarily well-defined
without this precondition.
Nikita Popov [Fri, 24 Dec 2021 09:14:55 +0000 (10:14 +0100)]
[DSE] Avoid calling isRemovable() on non-analyzable location (NFC)
At this point the instruction may either have an analyzable
write or be a terminator. For terminators, isRemovable() is not
necessarily well-defined. Move the check until after we have ensured
that it is not a terminator.
Nikita Popov [Fri, 24 Dec 2021 08:55:44 +0000 (09:55 +0100)]
[DSE] Call isRemovable() after getLocForWriteEx() (NFCI)
The only non-trivial change here is that the isReadClobber()
check for redundant stores is now on the DefLoc, not the
UpperLoc. This is semantically the right location to use, though
in practice it makes no difference (the locations are either the
same, or the def inst does not read).
Fangrui Song [Fri, 24 Dec 2021 08:55:54 +0000 (00:55 -0800)]
[GlobalISel] Fix -Wunused-function in -DLLVM_ENABLE_ASSERTIONS=off builds after D114198
Nikita Popov [Fri, 24 Dec 2021 08:39:44 +0000 (09:39 +0100)]
[DSE] Simplify isGuaranteedLoopInvariant() (NFC)
We have Value->stripInBoundsConstantOffsets() which does what we
want here, but the inbounds requirement isn't actually necessary.
We should probably add Value->stripConstantOffsets() as well.
Nikita Popov [Thu, 23 Dec 2021 08:19:26 +0000 (09:19 +0100)]
[DSE][MemLoc] Handle intrinsics more generically
Remove the special casing for intrinsics in MemoryLocation::getForDest()
and handle them through the general attribute based code. On the DSE
side, this means that isRemovable() now needs to handle more than a
hardcoded list of intrinsics. We consider everything apart from
volatile memory intrinsics and lifetime markers to be removable.
This allows us to perform DSE on intrinsics that DSE has not been
specially taught about, using a matrix store as an example here.
There is an interesting test change for invariant.start, but I
believe that optimization is correct. It only looks a bit odd
because the code is immediate UB anyway.
Differential Revision: https://reviews.llvm.org/D116210
Nikita Popov [Fri, 24 Dec 2021 08:24:45 +0000 (09:24 +0100)]
[DebugInfo] Remove type-units-maybe-unused-types.ll test
78d15a112cbd545fbb6e1aa37c221ef5aeffb3f2 has been reverted, but
the test not deleted, so it is failing now.
Nikita Popov [Mon, 20 Dec 2021 13:27:58 +0000 (14:27 +0100)]
[Attributor] Directly call areTypesABICompatible() hook
Instead of using the ArgumentPromotion implementation, we now walk
call sites using checkForAllCallSites() and directly call
areTypesABICompatible() using the replacement types. I believe
that resolves the TODO in the code.
Differential Revision: https://reviews.llvm.org/D116033
Nikita Popov [Thu, 23 Dec 2021 09:43:47 +0000 (10:43 +0100)]
[OpenMP] Avoid creating null pointer lvalue (NFC)
The reduction initialization code creates a "naturally aligned null
pointer to void lvalue", which I found somewhat odd, even though it
works out in the end because it is not actually used. It doesn't
look like this code actually needs an LValue for anything though,
and we can use an invalid Address to represent this case instead.
Differential Revision: https://reviews.llvm.org/D116214
Fangrui Song [Fri, 24 Dec 2021 05:54:32 +0000 (21:54 -0800)]
[ELF] Optimize symbol initialization and resolution
Avoid repeated load of global pointer (symtab) / members (sections.size(), firstGlobal) in the hot paths.
And remove some unneeded this->
Chuanqi Xu [Fri, 24 Dec 2021 05:33:52 +0000 (13:33 +0800)]
[C++20] [Coroutines] Allow promise_type to not define return_void or return_value
According to [dcl.fct.def.coroutine]p6, the promise_type is allowed to
not define return_void nor return_value:
> If searches for the names return_void and return_value in the scope
> of the promise type each find any declarations, the program is
> ill-formed.
> [Note 1: If return_void is found, flowing off the end of a coroutine is
> equivalent to a co_return with no operand. Otherwise, flowing off the
> end of a coroutine results in
> undefined behavior ([stmt.return.coroutine]). — end note]
So the program isn't ill-formed if the promise_type doesn't define
return_void nor return_value. It is just a potential UB. So the program
should be allowed to compile.
Reviewed By: urnathan
Differential Revision: https://reviews.llvm.org/D116204
Jim Lin [Fri, 24 Dec 2021 01:27:04 +0000 (09:27 +0800)]
[RISCV] Use DAG variable directly instead of DCI.DAG
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D116087
David Blaikie [Fri, 24 Dec 2021 04:28:37 +0000 (20:28 -0800)]
Revert "[DWARF] Fix PR51087 Extraneous enum record in DWARF with type units"
Causes invalid debug_gnu_pubnames (& I think non-gnu pubnames too) -
visible as 0 values for the offset in gnu pubnames. More details on the
original review in D115325.
This reverts commit
78d15a112cbd545fbb6e1aa37c221ef5aeffb3f2.
This reverts commit
54586582d3e17c0bba76258d2930486a6dfaaf2a.
Chuanqi Xu [Fri, 24 Dec 2021 03:48:15 +0000 (11:48 +0800)]
[C++20] Conform coroutine's comments in clang (NFC-ish)
The comments for coroutine in clang wrote for coroutine-TS. Now
coroutine is merged into standard. Try to conform the comments.
Fangrui Song [Fri, 24 Dec 2021 04:23:13 +0000 (20:23 -0800)]
[ELF] Simplify and optimize ObjFile<ELFT>::parseLazy
Shilei Tian [Fri, 24 Dec 2021 04:21:21 +0000 (23:21 -0500)]
[NFC] Remove tailing whitespaces in llvm/include/llvm/Frontend/OpenMP/OMP.td
Craig Topper [Thu, 23 Dec 2021 21:20:06 +0000 (15:20 -0600)]
[RISCV] Don't allow vector types to be used with inline asm 'r' constraint
The 'r' constraint uses the GPR class. There is generic support
for bitcasting and extending/truncating non-integer VTs to the
required integer VT. This doesn't work for scalable vectors and
instead crashes.
To prevent this, explicitly reject vectors. Fixed vectors might
work without crashing, but it doesn't seem worthwhile to allow.
While there remove an unnecessary level of indentation in the
"vr" and "vm" constraint handling.
Differential Revision: https://reviews.llvm.org/D115810
Fangrui Song [Fri, 24 Dec 2021 02:18:25 +0000 (18:18 -0800)]
[ELF] scanVersionScript: remove unused variable
Mogball [Fri, 24 Dec 2021 01:41:21 +0000 (01:41 +0000)]
[mlir] Add getNumThreads to MLIRContext
Querying threads directly from the thread pool fails if there is no thread pool or if multithreading is not enabled. Returns 1 by default.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D116259
Fangrui Song [Fri, 24 Dec 2021 01:59:25 +0000 (17:59 -0800)]
[ELF] Simplify SymbolTable::insert. NFC
Stella Laurenzo [Fri, 24 Dec 2021 00:13:54 +0000 (16:13 -0800)]
[mlir] Use thread-pool's notion of thread count instead of requerying system.
The computed number of hardware threads can change over the life of the process based on affinity changes. Since we need a data structure that is at least as large as the maximum parallelism, it is important to use the value that was actually latched for the thread pool we will be dispatching work to.
Also adds an assert specifically for if it doesn't line up (I was getting a crash on an index into the vector).
Differential Revision: https://reviews.llvm.org/D116257
Nico Weber [Fri, 24 Dec 2021 00:49:19 +0000 (19:49 -0500)]
[gn build] "port"
71b3bfde9cd2
Fangrui Song [Fri, 24 Dec 2021 00:49:38 +0000 (16:49 -0800)]
[ELF] SymbolTable: change some vector<Symbol *> to SmallVector
The generated assembly for Symbol::insert is much shorter (std::vector resize is
inefficient) and enables some inlining.
Kirill Stoimenov [Thu, 23 Dec 2021 20:47:10 +0000 (20:47 +0000)]
[ASan] Moved optimized callbacks into a separate library.
This will allow linking in the callbacks directly instead of using PLT.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D116182
Mehdi Amini [Fri, 24 Dec 2021 00:09:15 +0000 (00:09 +0000)]
Revert "[mlir][tosa] Split tosa-to-linalg named ops out of pass"
This reverts commit
313de31fbb757643db13bcb47f8fe515039e298a.
There is a missing CMake dependency, building with shared libraries is
broken:
55.509 [45/4/3061] Linking CXX shared library lib/libMLIRTosaToLinalg.so.14git
FAILED: lib/libMLIRTosaToLinalg.so.14git
...
TosaToLinalgPass.cpp: undefined reference to `mlir::createCanonicalizerPass()'
Jason Molenda [Thu, 23 Dec 2021 23:18:03 +0000 (15:18 -0800)]
Load binary by UUID from qProcessInfo packet fields
Support three new keys in the qProcessInfo response from the remote
gdb stub to handle the case of attaching to a core running some type
of standalone/firmware code and the stub knows the UUID and load
address-or-slide for the binary. There will be no proper DynamicLoader
plugin in this scenario, but we can try to locate and load the binary
into lldb at the correct offset.
Differential Revision: https://reviews.llvm.org/D116211
rdar://
75191077
Siva Chandra Reddy [Thu, 23 Dec 2021 22:59:14 +0000 (22:59 +0000)]
[libc][obvious] Fix style of MPFRWrapper.
Krzysztof Parzyszek [Thu, 23 Dec 2021 23:03:55 +0000 (15:03 -0800)]
[Hexagon] Revamp HVX flag verification in driver
Generalize warning/error messages (for reuse), refactor flag verification
code, rewrite HVX flag driver testcase.
Fangrui Song [Thu, 23 Dec 2021 23:13:46 +0000 (15:13 -0800)]
[ELF] Remove stale comment which was duplicated in MarkLive<ELFT>::run
Pointed out by thakis
Nico Weber [Thu, 23 Dec 2021 23:06:48 +0000 (18:06 -0500)]
[gn build] (manually) port
7cd7b4d2f807 (sanitizer_symbolize_set_demangle)
Kristina Bessonova [Thu, 23 Dec 2021 16:10:52 +0000 (18:10 +0200)]
Revert "[DwarfDebug] Support emitting function-local declaration for a lexical block" & dependent patches
Try to revert D113741 once again.
This also reverts
0ac75e82fff93a80ca401d3db3541e8d1d9098f9 (D114705)
as it causes LLDB's lldb-api.lang/cpp/nsimport.TestCppNsImport.py test
failure w/o D113741.
This reverts commit
f9607d45f399e2afc39ec16222ea68b4e0831564.
Differential Revision: https://reviews.llvm.org/D116225
Vitaly Buka [Thu, 23 Dec 2021 03:04:13 +0000 (19:04 -0800)]
[sanitizer] Add common "demangle" flag
Reviewed By: browneee
Differential Revision: https://reviews.llvm.org/D116202
Florian Hahn [Thu, 23 Dec 2021 22:20:11 +0000 (23:20 +0100)]
[Verifier] Iteratively traverse all indirect users.
The recursive implementation can run into stack overflows, e.g. like in PR52844.
The order the users are visited changes, but for the current use case
this only impacts the order error messages are emitted.
Nico Weber [Thu, 23 Dec 2021 21:40:07 +0000 (16:40 -0500)]
[gn build] (manually) port
f103ee2e9e3fc (sanitizer_symbolize_set_inline_frames)
Victor Perez [Thu, 23 Dec 2021 20:33:47 +0000 (14:33 -0600)]
[RISCV][VP] Lower mask vector VP AND/OR/XOR to RVV instructions
For fixed and scalable vectors, each intrinsic x is lowered to vmx.mm,
dropping the mask, which is safe to do as masked-off elements are
undef anyway.
Differential Revision: https://reviews.llvm.org/D115339
Rob Suderman [Thu, 23 Dec 2021 20:09:20 +0000 (12:09 -0800)]
[mlir][tosa] Split tosa-to-linalg named ops out of pass
Linalg named ops lowering are moved to a separate pass. This allows TOSA
canonicalizers to run between named-ops lowerings and the general TOSA
lowerings. This allows the TOSA canonicalizers to run between lowerings.
Reviewed By: NatashaKnk
Differential Revision: https://reviews.llvm.org/D116057
Michael Kruse [Thu, 23 Dec 2021 19:45:42 +0000 (13:45 -0600)]
[Polly][SchedOpt] Account for prevectorization of multiple statements.
A prevectorized loop may contain multiple statements, in which case
isl_schedule_node_band_sink will sink the vector band to multiple
leaves. Instead of statically assuming a specific tree structure after
sinking, add a SIMD marker to all inner bands.
Fixes llvm.org/PR52637
Arthur O'Dwyer [Thu, 23 Dec 2021 19:51:24 +0000 (14:51 -0500)]
[libc++] [ranges] Whitespace and namespace-style adjustments. NFC.
Largely split out of D116199 to keep that PR smaller.
Arthur O'Dwyer [Thu, 23 Dec 2021 19:25:18 +0000 (14:25 -0500)]
[libc++] [test] Eliminate `== true` and `== false`. NFC.
As suggested in D115312.
Arthur O'Dwyer [Wed, 22 Dec 2021 23:06:48 +0000 (18:06 -0500)]
[libc++] [ranges] Fix bugs in ranges::empty().
It was missing the cast to `bool` in `bool(__t.empty())`.
It was wrongly using `std::forward` in some places.
Differential Revision: https://reviews.llvm.org/D115312
Arthur O'Dwyer [Thu, 23 Dec 2021 01:25:17 +0000 (20:25 -0500)]
[libc++] [test] Flatten the directory structure a bit. NFC.
Differential Revision: https://reviews.llvm.org/D116198
Mogball [Thu, 23 Dec 2021 19:55:29 +0000 (11:55 -0800)]
[mlir] Remove spurious debug guard
Nathan Chancellor [Thu, 23 Dec 2021 18:43:26 +0000 (11:43 -0700)]
[clang][driver] Warn when '-mno-outline-atomics' is used with a non-AArch64 triple
The Linux kernel has a make macro called cc-option that invokes the
compiler with an option in isolation to see if it is supported before
adding it to CFLAGS. The exit code of the compiler is used to determine
if the flag is supported and should be added to the compiler invocation.
A call to cc-option with '-mno-outline-atomics' was added to prevent
linking errors with newer GCC versions but this call succeeds with a
non-AArch64 target because there is no warning from clang with
'-mno-outline-atomics', just '-moutline-atomics'. Because the call
succeeds and adds '-mno-outline-atomics' to the compiler invocation,
there is a warning from LLVM because the 'outline-atomics target
feature is only supported by the AArch64 backend.
$ echo | clang -target x86_64 -moutline-atomics -Werror -x c -c -o /dev/null -
clang-14: error: The 'x86_64' architecture does not support -moutline-atomics; flag ignored [-Werror,-Woption-ignored]
$ echo $?
1
$ echo | clang -target x86_64 -mno-outline-atomics -Werror -x c -c -o /dev/null -
'-outline-atomics' is not a recognized feature for this target (ignoring feature)
$ echo $?
0
This does not match GCC's behavior, which errors when the flag is added
to a non-AArch64 target.
$ echo | gcc -moutline-atomics -x c -c -o /dev/null -
gcc: error: unrecognized command-line option ‘-moutline-atomics’; did you mean ‘-finline-atomics’?
$ echo | gcc -mno-outline-atomics -x c -c -o /dev/null -
gcc: error: unrecognized command-line option ‘-mno-outline-atomics’; did you mean ‘-fno-inline-atomics’?
$ echo | aarch64-linux-gnu-gcc -moutline-atomics -x c -c -o /dev/null -
$ echo | aarch64-linux-gnu-gcc -mno-outline-atomics -x c -c -o /dev/null -
To get closer to GCC's behavior, issue a warning when
'-mno-outline-atomics' is used without an AArch64 triple and do not add
'{-,+}outline-atomic" to the list of target features in these cases.
Link: https://github.com/ClangBuiltLinux/linux/issues/1552
Reviewed By: melver, nickdesaulniers
Differential Revision: https://reviews.llvm.org/D116128
Fangrui Song [Thu, 23 Dec 2021 19:32:44 +0000 (11:32 -0800)]
[ELF][PPC32] Support .got2 in an output section description
I added `PPC32Got2Section` D62464 to support .got2 but did not implement .got2
in another output section.
PR52799 has a linker script placing .got2 in .rodata, which causes a null
pointer dereference because a MergeSyntheticSection's file is nullptr.
Add the support.
Vitaly Buka [Wed, 22 Dec 2021 23:25:16 +0000 (15:25 -0800)]
[sanitizer] Move internal_symbolizer "inline" option
This option is per process anyway. I'd like to add more options, but
having them as parameters of __sanitizer_symbolize_code looks
inconvenient.
Reviewed By: browneee
Differential Revision: https://reviews.llvm.org/D116201
Fangrui Song [Thu, 23 Dec 2021 19:25:13 +0000 (11:25 -0800)]
[Driver][test] Remove unneeded -no-canonical-prefixes and use preferred --target=
-no-canonical-prefixes is not needed if we omit "clang" from CHECK lines.
"-cc1" is sufficient to anchor the line we want to test.
--target= is preferred over Separate form -target.
Vitaly Buka [Thu, 23 Dec 2021 19:11:47 +0000 (11:11 -0800)]
[NFC][sanitizer] Increase kArgVMax to 16
D116202 uses all availible slots.
Vitaly Buka [Thu, 23 Dec 2021 19:02:56 +0000 (11:02 -0800)]
[sanitizer] Check kArgVMax in SymbolizerProcess::GetArgV
Michael Jones [Thu, 23 Dec 2021 18:40:10 +0000 (10:40 -0800)]
[libc][NFC] fix variable name
A variable was named in a way that doesn't match the format. This patch
renames it to match the format.
Differential Revision: https://reviews.llvm.org/D116228
Krzysztof Parzyszek [Thu, 23 Dec 2021 18:02:24 +0000 (10:02 -0800)]
[Hexagon] Driver/preprocessor options for Hexagon v69
Jakub Kuderski [Thu, 23 Dec 2021 18:13:25 +0000 (13:13 -0500)]
[Bazel] Add target for llvm-tli-checker
Reviewed By: vettoreldaniele, GMNGeoffrey
Differential Revision: https://reviews.llvm.org/D116222
Fangrui Song [Thu, 23 Dec 2021 17:53:08 +0000 (09:53 -0800)]
[ELF] --gc-sections: combine two iterations over inputSections
There is a slight speed-up.
Kirill Stoimenov [Thu, 23 Dec 2021 17:11:25 +0000 (17:11 +0000)]
Revert "[ASan] Moved optimized callbacks into a separate library."
This reverts commit
ab3640aa0e8361921a5d0cdc393a5b75e78ec22b.
Reviewed By: kstoimenov
Differential Revision: https://reviews.llvm.org/D116223
Brendon Cahoon [Sat, 18 Dec 2021 21:01:50 +0000 (15:01 -0600)]
[AMDGPU] Don't remove VGPR to AGPR dead spills from frame info
Removing dead frame indices for VGPR to AGPR spills is incorrect
when the frame index is shared by multiple objects, which may
occur due to stack slot coloring. The problem is that subsequent
code that processes the other object will assert because the stack
frame index is marked dead.
Removing dead frame indices is needed prior to stack slot
coloring, which is what happens with SGPR to VGPR spills. These
spills are lowered prior to stack slot coloring, but the VGPR
to AGPR spills are processed afterwards during the Prolog/Epilog
Inserter pass. This patch marks the VGPR to AGPR spill slot as
dead if the slot is not used by another object.
Differential Revision: https://reviews.llvm.org/D115996
Krzysztof Parzyszek [Wed, 22 Dec 2021 15:46:14 +0000 (07:46 -0800)]
[Hexagon] Add Hexagon v69 builtins to clang
Krzysztof Parzyszek [Wed, 22 Dec 2021 15:46:14 +0000 (07:46 -0800)]
[Hexagon] Introduce Hexagon v69 ISA
Kirill Stoimenov [Wed, 8 Dec 2021 18:42:29 +0000 (18:42 +0000)]
[ASan] Moved optimized callbacks into a separate library.
This will allow linking in the callbacks directly instead of using PLT.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D116182
Mark de Wever [Wed, 22 Dec 2021 17:46:23 +0000 (18:46 +0100)]
[libc++][format][NFC] Remove some unneeded headers.
Reviewed By: #libc, Quuxplusone, Mordante
Differential Revision: https://reviews.llvm.org/D116175
Craig Topper [Thu, 23 Dec 2021 16:24:37 +0000 (10:24 -0600)]
[RISCV] Use positive 0.0 for the neutral element in fadd reductions if nsz is present.
-0.0 requires a constant pool. +0.0 can be made with vmv.v.x x0.
Not doing this in getNeutralElement for fear of changing other targets.
Differential Revision: https://reviews.llvm.org/D115978
Mark de Wever [Tue, 21 Dec 2021 18:12:54 +0000 (19:12 +0100)]
[libc++][format] Improve ABI stability.
During the review of D115991 @vitaut pointed out the enum shouldn't
depend on whether or not _LIBCPP_HAS_NO_INT128 is defined. The current
implementation lets the enum's ABI depend on this configuration option
without a good cause.
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D116120
Craig Topper [Thu, 23 Dec 2021 14:57:51 +0000 (08:57 -0600)]
[RISCV] Support strict FP conversion operations.
This adds support for strict conversions between fp types and between
integer and fp.
NOTE: RISCV has static rounding mode instructions, but the constrainted
intrinsic metadata is not used to select static rounding modes. Dynamic
rounding mode is always used.
Differential Revision: https://reviews.llvm.org/D115997
Alexandros Lamprineas [Thu, 23 Dec 2021 15:14:40 +0000 (15:14 +0000)]
[AArch64] Add a tablegen pattern for SQXTN2.
Converts concat_vectors(Vd, trunc(smin(smax Vm, -2^n), 2^n-1) to
sqxtn2(Vd, Vm). Deliberately not handling v2i64 ~> v2i32 as the
min/max nodes are not legal (same thing we did for the SQXTN
patterns in https://reviews.llvm.org/D103263).
Differential Revision: https://reviews.llvm.org/D116105
Petar Avramovic [Thu, 23 Dec 2021 15:13:20 +0000 (16:13 +0100)]
AMDGPU/GlobalISel: Fix attempt to select non-legal instr in mir test
Delete inst-select-insert.xfail.mir.
G_INSERT instructions in inst-select-insert.xfail.mir are no longer
legal after D114198. This breaks build bots, since builds with
LLVM_ENABLE_ASSERTIONS=Off don't check for legality and report cannot
select while build with LLVM_ENABLE_ASSERTIONS=On reports instruction
is not legal.
Anastasia Stulova [Thu, 23 Dec 2021 14:57:34 +0000 (14:57 +0000)]
[SPIR-V] Add a toolchain for SPIR-V in clang
This patch adds a toolchain (TC) for SPIR-V along with the
following changes in Driver and base ToolChain and Tool.
This is required to provide a mechanism in clang to bypass
SPIR-V backend in LLVM for SPIR-V until it lands in LLVM and
matures.
The SPIR-V code is generated by the SPIRV-LLVM translator tool
named 'llvm-spirv' that is sought in 'PATH'.
The compilation phases/actions should be bound for SPIR-V in
the meantime as following:
compile -> tools::Clang
backend -> tools::SPIRV::Translator
assemble -> tools::SPIRV::Translator
However, Driver’s ToolSelector collapses compile-backend-assemble
and compile-backend sequences to tools::Clang. To prevent this,
added new {use,has}IntegratedBackend properties in ToolChain and
Tool to which the ToolSelector reacts on, and which SPIR-V TC
overrides.
Linking of multiple input files is currently not supported but
can be added separately.
Differential Revision: https://reviews.llvm.org/D112410
Co-authored-by: Henry Linjamäki <henry.linjamaki@parmance.com>
Simon Pilgrim [Thu, 23 Dec 2021 14:52:23 +0000 (14:52 +0000)]
[X86][SSE] Add ISD::ROTR support
Fix issue in TargetLowering::expandROT where we only attempt to flip a rotation if the other direction has better support - this matches TargetLowering::expandFunnelShift
This allows us to enable ISD::ROTR lowering on SSE targets, which particularly simplifies/improves codegen for splat amount and AVX2 per-element shifts.
Mehrnoosh Heidarpour [Tue, 14 Dec 2021 21:05:52 +0000 (16:05 -0500)]
[InstSimplify] Fold logic AND to zero
Adding following fold opportunity:
((A | B) ^ A) & ((A | B) ^ B) --> 0
Reviewed By: spatel, rampitec
Differential Revision: https://reviews.llvm.org/D115755
Craig Topper [Thu, 23 Dec 2021 14:11:09 +0000 (08:11 -0600)]
[RISCV] Disable interleaving scalar loops in the loop vectorizer.
The loop vectorizer can interleave scalar loops even if it doesn't
vectorize them. I don't believe we intended to enable this when
we enabled interleaving for vector instructions.
Disable interleaving for VF=1 like X86 and AMDGPU already do. Test
lifted from AMDGPU.
Differential Revision: https://reviews.llvm.org/D115975
Simon Pilgrim [Thu, 23 Dec 2021 14:09:23 +0000 (14:09 +0000)]
[X86] isVectorShiftByScalarCheap - vXi8 select(shift(x,splat0),shift(x,splat1)) is better than shift(x,select(splat0,splat1))
Even though we don't have vXi8 vector shifts (apart from XOP), it is still better to prefer shift (or funnel-shift/rotate) by scalar where possible.
https://llvm.godbolt.org/z/6ss6ffTxv
Differential Revision: https://reviews.llvm.org/D116191
Nikita Popov [Thu, 23 Dec 2021 14:15:26 +0000 (15:15 +0100)]
[OpenMP] Remove no-op cast (NFC)
This was casting the address to its own element type, which is
a no-op.
Nikita Popov [Thu, 23 Dec 2021 13:58:47 +0000 (14:58 +0100)]
[CodeGen] Use CreateConstInBoundsGEP() in one more place
This does exactly what this code manually implemented.
Nikita Popov [Thu, 23 Dec 2021 13:41:03 +0000 (14:41 +0100)]
[CGBuilder] Add CreateGEP() overload that accepts an Address
Add an overload for an Address and a single non-constant offset.
This makes it easier to preserve the element type and adjust the
alignment appropriately.
Petar Avramovic [Thu, 23 Dec 2021 13:09:51 +0000 (14:09 +0100)]
[GlobalISel] Rework more/fewer elements for vectors
Artifact combiner is not able to access individual elements after using
LCMTy style merge/unmerge, extract and insert to change vector number of
elements (pad with undef or split to sub-vector instructions).
Use unmerge to individual elements instead and then merge elements into
requested types.
Change argument lowering for vectors and moreElementsVector to use
buildPadVectorWithUndefElements and buildDeleteTrailingVectorElements.
FewerElementsVector had a few helpers that had different behavior,
introduce new helper for most of the opcodes.
FewerElementsVector helper is more flexible since it can create leftover
instruction smaller then requested type (useful in case target wants to
avoid pad with undef and use fewer registers). If target does not want
leftover of different type it should call more elements first.
Some helpers were performing more elements first to have split without
leftover. Opcodes that used this helper use clampMaxNumElementsStrict
(does more elements first) in LegalizerInfo to avoid test changes.
Fixes failures caused by failing to combine artifacts created during
more/fewer elements vector.
Differential Revision: https://reviews.llvm.org/D114198
Petar Avramovic [Thu, 23 Dec 2021 11:39:38 +0000 (12:39 +0100)]
GlobalISel: Regen vector mir tests, add tests for vector arg lowering
Precommit for D114198 (Rework more/fewer elements for vectors).
Regenerate auto-generated mir tests for vectors (use CHECK-NEXT instead
of CHECK). Remove -global-isel-abort=0 where it is no longer needed.
Add mir tests for different AMDGPU sub-targets and they way they lower
function vector arguments (tests for legalization artifact combiner).
Simon Moll [Thu, 23 Dec 2021 13:14:29 +0000 (14:14 +0100)]
[VE] Add manuals to CompilerWriterInfo
Reference VE manual and documentations in CompilerWriterInfo.
Reviewed By: kaz7
Differential Revision: https://reviews.llvm.org/D116212
Chuanqi Xu [Thu, 23 Dec 2021 13:12:28 +0000 (21:12 +0800)]
[C++20] [Modules] Mark imported module as imported if not exported
In C++20 Modules, imported module which doesn't get exported wouldn't be
recorded. This patch would record such modules to avoid possible
incorrect visibility problems.
Reviewed By: urnathan
Differential Revision: https://reviews.llvm.org/D116098